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authorJoel Sherrill <joel@rtems.org>2018-03-12 14:53:09 -0500
committerJoel Sherrill <joel@rtems.org>2018-03-13 09:55:23 -0500
commit0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f (patch)
treebdb81bd29cb7ad96d43897ac126eae39e49a45a2 /cpukit/score/cpu/powerpc
parentAdd ARM Paravirtualization support (diff)
downloadrtems-0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f.tar.bz2
Add PowerPC paravirtualization support
Cannot read or write MSR when executing in user mode. This is used when RTEMS_PARAVIRT is defined. Provide alternate methods to disable/enable interrupts Closes #3306.
Diffstat (limited to 'cpukit/score/cpu/powerpc')
-rw-r--r--cpukit/score/cpu/powerpc/headers.am1
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h7
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpu.h12
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h74
4 files changed, 94 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/headers.am b/cpukit/score/cpu/powerpc/headers.am
index 5d8037c566..df026fab45 100644
--- a/cpukit/score/cpu/powerpc/headers.am
+++ b/cpukit/score/cpu/powerpc/headers.am
@@ -17,4 +17,5 @@ include_rtems_score_HEADERS =
include_rtems_score_HEADERS += include/rtems/score/cpu.h
include_rtems_score_HEADERS += include/rtems/score/cpuatomic.h
include_rtems_score_HEADERS += include/rtems/score/cpuimpl.h
+include_rtems_score_HEADERS += include/rtems/score/paravirt.h
include_rtems_score_HEADERS += include/rtems/score/powerpc.h
diff --git a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
index 4d9350324e..b63060d0a7 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
@@ -672,6 +672,7 @@ extern "C" {
*
* A one bit means that this bit should be cleared.
*/
+#if !defined(PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE)
extern char _PPC_INTERRUPT_DISABLE_MASK[];
static inline uint32_t ppc_interrupt_get_disable_mask( void )
@@ -734,6 +735,12 @@ static inline void ppc_interrupt_flash( uint32_t level )
: "r" (level)
);
}
+#else
+uint32_t ppc_interrupt_get_disable_mask( void );
+uint32_t ppc_interrupt_disable( void );
+void ppc_interrupt_enable( uint32_t level );
+void ppc_interrupt_flash( uint32_t level );
+#endif /* PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE */
#define _CPU_ISR_Disable( _isr_cookie ) \
do { \
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
index 7b6948a1d2..02560695bd 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
@@ -36,6 +36,9 @@
#define _RTEMS_SCORE_CPU_H
#include <rtems/score/basedefs.h>
+#if defined(RTEMS_PARAVIRT)
+#include <rtems/score/paravirt.h>
+#endif
#include <rtems/score/powerpc.h>
#include <rtems/powerpc/registers.h>
@@ -654,6 +657,8 @@ RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level )
return ( level & MSR_EE ) != 0;
}
+#if !defined(PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE)
+
static inline uint32_t _CPU_ISR_Get_level( void )
{
register unsigned int msr;
@@ -674,6 +679,13 @@ static inline void _CPU_ISR_Set_level( uint32_t level )
}
_CPU_MSR_SET(msr);
}
+#else
+/* disable, enable, etc. are in registers.h */
+uint32_t ppc_get_interrupt_level( void );
+void ppc_set_interrupt_level( uint32_t level );
+#define _CPU_ISR_Get_level( _new_level ) ppc_get_interrupt_level()
+#define _CPU_ISR_Set_level( _new_level ) ppc_set_interrupt_level(_new_level)
+#endif
#endif /* ASM */
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h
new file mode 100644
index 0000000000..c9fee7d1d1
--- /dev/null
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h
@@ -0,0 +1,74 @@
+/**
+ * @file
+ *
+ * @brief PowerPC Paravirtualization Definitions
+ *
+ * This include file contains definitions pertaining to paravirtualization
+ * of the PowerPC port.
+ */
+
+/*
+ * COPYRIGHT (c) 2018.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may in
+ * the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+
+#ifndef RTEMS_PARAVIRT
+#error "This file should only be included with paravirtualization is enabled."
+#endif
+
+#ifndef _RTEMS_SCORE_PARAVIRT_H
+#define _RTEMS_SCORE_PARAVIRT_H
+
+/**
+ * @defgroup ParavirtPowerPC Paravirtualization PowerPC Support
+ *
+ * @ingroup Score
+ *
+ * This handler encapulates the functionality (primarily conditional
+ * feature defines) related to paravirtualization on the PowerPC.
+ *
+ * Paravirtualization on the PowerPC makes the following assumptions:
+ *
+ * - RTEMS executes in user space
+ * - In user space there is no access to the MSR.
+ * - Interrupt enable/disable support using the MSR must be disabled
+ * and replaced with BSP provided methods which are adapted to the
+ * hosting environment.
+ */
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+/**
+ * In a paravirtualized environment, RTEMS executes in user space
+ * and cannot disable/enable external exceptions (e.g. interrupts).
+ * The BSP which acts as an adapter to the hosting environment will
+ * provide the interrupt enable/disable methods.
+ */
+#define PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE
+
+/**
+ * In a paravirtualized environment, RTEMS executes in user space
+ * and cannot access the MSR.
+ *
+ * Try to have as little impact as possible with this define. Leave
+ * the msr in the thread context because that would impact the definition
+ * of offsets for assembly code.
+ */
+#define PPC_DISABLE_MSR_ACCESS
+
+#endif