diff options
author | Joel Sherrill <joel@rtems.org> | 2018-03-12 14:53:09 -0500 |
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committer | Joel Sherrill <joel@rtems.org> | 2018-03-13 09:55:23 -0500 |
commit | 0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f (patch) | |
tree | bdb81bd29cb7ad96d43897ac126eae39e49a45a2 /cpukit/score/cpu/powerpc/include/rtems/score | |
parent | Add ARM Paravirtualization support (diff) | |
download | rtems-0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f.tar.bz2 |
Add PowerPC paravirtualization support
Cannot read or write MSR when executing in user mode. This
is used when RTEMS_PARAVIRT is defined.
Provide alternate methods to disable/enable interrupts
Closes #3306.
Diffstat (limited to 'cpukit/score/cpu/powerpc/include/rtems/score')
-rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 12 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h | 74 |
2 files changed, 86 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h index 7b6948a1d2..02560695bd 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h @@ -36,6 +36,9 @@ #define _RTEMS_SCORE_CPU_H #include <rtems/score/basedefs.h> +#if defined(RTEMS_PARAVIRT) +#include <rtems/score/paravirt.h> +#endif #include <rtems/score/powerpc.h> #include <rtems/powerpc/registers.h> @@ -654,6 +657,8 @@ RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) return ( level & MSR_EE ) != 0; } +#if !defined(PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE) + static inline uint32_t _CPU_ISR_Get_level( void ) { register unsigned int msr; @@ -674,6 +679,13 @@ static inline void _CPU_ISR_Set_level( uint32_t level ) } _CPU_MSR_SET(msr); } +#else +/* disable, enable, etc. are in registers.h */ +uint32_t ppc_get_interrupt_level( void ); +void ppc_set_interrupt_level( uint32_t level ); +#define _CPU_ISR_Get_level( _new_level ) ppc_get_interrupt_level() +#define _CPU_ISR_Set_level( _new_level ) ppc_set_interrupt_level(_new_level) +#endif #endif /* ASM */ diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h new file mode 100644 index 0000000000..c9fee7d1d1 --- /dev/null +++ b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h @@ -0,0 +1,74 @@ +/** + * @file + * + * @brief PowerPC Paravirtualization Definitions + * + * This include file contains definitions pertaining to paravirtualization + * of the PowerPC port. + */ + +/* + * COPYRIGHT (c) 2018. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may in + * the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + + +#ifndef RTEMS_PARAVIRT +#error "This file should only be included with paravirtualization is enabled." +#endif + +#ifndef _RTEMS_SCORE_PARAVIRT_H +#define _RTEMS_SCORE_PARAVIRT_H + +/** + * @defgroup ParavirtPowerPC Paravirtualization PowerPC Support + * + * @ingroup Score + * + * This handler encapulates the functionality (primarily conditional + * feature defines) related to paravirtualization on the PowerPC. + * + * Paravirtualization on the PowerPC makes the following assumptions: + * + * - RTEMS executes in user space + * - In user space there is no access to the MSR. + * - Interrupt enable/disable support using the MSR must be disabled + * and replaced with BSP provided methods which are adapted to the + * hosting environment. + */ + +#ifndef ASM + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* !ASM */ + +/** + * In a paravirtualized environment, RTEMS executes in user space + * and cannot disable/enable external exceptions (e.g. interrupts). + * The BSP which acts as an adapter to the hosting environment will + * provide the interrupt enable/disable methods. + */ +#define PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE + +/** + * In a paravirtualized environment, RTEMS executes in user space + * and cannot access the MSR. + * + * Try to have as little impact as possible with this define. Leave + * the msr in the thread context because that would impact the definition + * of offsets for assembly code. + */ +#define PPC_DISABLE_MSR_ACCESS + +#endif |