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authorRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 15:33:28 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 15:33:28 +0000
commit44b06ca617a8d8910a308037ebad06876085a6cc (patch)
treec9bd98f2ad44ad1fbfab11b51f9b09c9d3561d0b /c
parentWhitespace removal. (diff)
downloadrtems-44b06ca617a8d8910a308037ebad06876085a6cc.tar.bz2
Whitespace removal.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/sparc/erc32/clock/ckinit.c2
-rw-r--r--c/src/lib/libbsp/sparc/erc32/startup/spurious.c2
-rw-r--r--c/src/lib/libbsp/sparc/leon2/cchip/cchip.c88
-rw-r--r--c/src/lib/libbsp/sparc/leon2/clock/ckinit.c2
-rw-r--r--c/src/lib/libbsp/sparc/leon2/console/console.c46
-rw-r--r--c/src/lib/libbsp/sparc/leon2/console/debugputs.c2
-rw-r--r--c/src/lib/libbsp/sparc/leon2/include/bsp.h10
-rw-r--r--c/src/lib/libbsp/sparc/leon2/include/leon.h50
-rw-r--r--c/src/lib/libbsp/sparc/leon2/include/rasta.h6
-rw-r--r--c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c4
-rw-r--r--c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon2/pci/pci.c106
-rw-r--r--c/src/lib/libbsp/sparc/leon2/rasta/rasta.c94
-rw-r--r--c/src/lib/libbsp/sparc/leon2/startup/bspidle.c4
-rw-r--r--c/src/lib/libbsp/sparc/leon2/startup/bspstart.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon2/startup/setvec.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon2/startup/spurious.c26
-rw-r--r--c/src/lib/libbsp/sparc/leon2/timer/timer.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon3/amba/amba.c6
-rw-r--r--c/src/lib/libbsp/sparc/leon3/clock/ckinit.c2
-rw-r--r--c/src/lib/libbsp/sparc/leon3/console/console.c28
-rw-r--r--c/src/lib/libbsp/sparc/leon3/console/debugputs.c2
-rw-r--r--c/src/lib/libbsp/sparc/leon3/include/bsp.h8
-rw-r--r--c/src/lib/libbsp/sparc/leon3/include/leon.h36
-rw-r--r--c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c6
-rw-r--r--c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c14
-rw-r--r--c/src/lib/libbsp/sparc/leon3/pci/pci.c106
-rw-r--r--c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c6
-rw-r--r--c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c6
-rw-r--r--c/src/lib/libbsp/sparc/leon3/startup/bspidle.S6
-rw-r--r--c/src/lib/libbsp/sparc/leon3/startup/bspstart.c10
-rw-r--r--c/src/lib/libbsp/sparc/leon3/startup/setvec.c8
-rw-r--r--c/src/lib/libbsp/sparc/leon3/startup/spurious.c26
-rw-r--r--c/src/lib/libbsp/sparc/leon3/timer/timer.c12
-rw-r--r--c/src/lib/libbsp/sparc/shared/1553/b1553brm.c318
-rw-r--r--c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c18
-rw-r--r--c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c18
-rw-r--r--c/src/lib/libbsp/sparc/shared/amba/ambapp.c10
-rw-r--r--c/src/lib/libbsp/sparc/shared/bspgetworkarea.c2
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/grcan.c492
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c18
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/occan.c528
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/occan_pci.c12
-rw-r--r--c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c40
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/ambapp.h8
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h8
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h8
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/b1553brm.h14
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h12
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h12
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/debug_defs.h6
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/grcan.h10
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h4
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/grspw.h18
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/grspw_pci.h2
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h2
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/i2cmst.h4
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/occan.h30
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/occan_pci.h2
-rw-r--r--c/src/lib/libbsp/sparc/shared/include/pci.h24
-rw-r--r--c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c2
-rw-r--r--c/src/lib/libbsp/sparc/shared/spw/grspw.c370
-rw-r--r--c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c16
-rw-r--r--c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c30
-rw-r--r--c/src/lib/libbsp/sparc/shared/start.S28
-rw-r--r--c/src/lib/libbsp/sparc/shared/uart/apbuart.c268
-rw-r--r--c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c8
-rw-r--r--c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c8
69 files changed, 1557 insertions, 1557 deletions
diff --git a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
index 260d38f49a..e1175909f8 100644
--- a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
+++ b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
@@ -52,7 +52,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
clicks = ERC32_MEC.Real_Time_Clock_Counter;
- return (uint32_t)
+ return (uint32_t)
(rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
}
diff --git a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
index 28cb012d01..5ca46e2080 100644
--- a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
@@ -63,7 +63,7 @@ rtems_isr bsp_spurious_handler(
printk( "fp exception\n" );
break;
case 0x09:
- printk("data access exception at 0x%08x\n",
+ printk("data access exception at 0x%08x\n",
ERC32_MEC.First_Failing_Address );
break;
case 0x0A:
diff --git a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
index 12ad9203b6..e0c6364c66 100644
--- a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
+++ b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
@@ -52,9 +52,9 @@ typedef struct {
unsigned int bar2;
unsigned int bar3;
unsigned int bar4;/* 0x10 */
-
+
unsigned int unused[4*3-1];
-
+
unsigned int ambabars[1]; /* 0x40 */
} amba_bridge_regs;
@@ -65,7 +65,7 @@ typedef struct {
unsigned int bar2;
unsigned int bar3;
unsigned int bar4; /* 0x10 */
-
+
unsigned int ilevel;
unsigned int ipend;
unsigned int iforce;
@@ -77,20 +77,20 @@ typedef struct {
typedef struct {
pci_bridge_regs *pcib;
amba_bridge_regs *ambab;
-
+
/* AT697 PCI */
unsigned int bars[5];
int bus, dev, fun;
-
+
/* AMBA bus */
amba_confarea_type amba_bus;
struct amba_mmap amba_maps[2];
-
+
/* FT AHB SRAM */
int ftsram_size; /* kb */
unsigned int ftsram_start;
unsigned int ftsram_end;
-
+
} cchip1;
cchip1 cc1;
@@ -102,7 +102,7 @@ int init_pcif(void){
amba_bridge_regs *ambab;
int amba_master_cnt;
amba_confarea_type *abus;
-
+
if ( BSP_pciFindDevice(0x1AC8, 0x0701, 0, &bus, &dev, &fun) == 0 ) {
;
}else if (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) {
@@ -111,15 +111,15 @@ int init_pcif(void){
/* didn't find any Companionship board on the PCI bus. */
return -1;
}
-
+
/* found Companionship PCI board, Set it up: */
-
+
pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
-
+
#ifdef DEBUG
for(i=0; i<5; i++){
printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
@@ -138,7 +138,7 @@ int init_pcif(void){
cc1.amba_maps[0].size = 0x04000000;
cc1.amba_maps[0].cpu_adr = cc1.bars[1];
cc1.amba_maps[0].remote_amba_adr = 0xfc000000;
-
+
/* Mark end of table */
cc1.amba_maps[1].size=0;
cc1.amba_maps[1].cpu_adr = 0;
@@ -149,7 +149,7 @@ int init_pcif(void){
com1 |= 0x3;
pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
-
+
/* Set up AMBA Masters ==> PCI */
ambab = (void *)(cc1.bars[1]+0x400);
#ifdef DEBUG
@@ -157,34 +157,34 @@ int init_pcif(void){
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
#endif
- ambab->ambabars[0] = 0x40000000; /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
-
+ ambab->ambabars[0] = 0x40000000; /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
+
/* Scan bus for AMBA devices */
abus = &cc1.amba_bus;
memset(abus,0,sizeof(amba_confarea_type));
amba_scan(abus,cc1.bars[1]+0x3f00000,&cc1.amba_maps[0]);
-
+
/* Get number of amba masters */
amba_master_cnt = abus->ahbmst.devnr;
-#ifdef BOARD_INFO
+#ifdef BOARD_INFO
printk("Found %d AMBA masters\n\r",amba_master_cnt);
#endif
for(i=1; i<amba_master_cnt; i++){
ambab->ambabars[i] = 0x40000000;
}
-
+
/* Enable PCI Master */
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
com1 |= 0x4;
pci_write_config_dword(bus, dev, fun, 0x4, com1);
- pci_read_config_dword(bus, dev, fun, 0x4, &com1);
-
+ pci_read_config_dword(bus, dev, fun, 0x4, &com1);
+
cc1.pcib = pcib;
cc1.ambab = ambab;
cc1.bus = bus;
cc1.dev = dev;
cc1.fun = fun;
-
+
return 0;
}
@@ -195,8 +195,8 @@ int init_onboard_sram(void){
amba_ahb_device ahb;
amba_apb_device apb;
unsigned int conf, size;
-
- /* Find SRAM controller
+
+ /* Find SRAM controller
* 1. AHB slave interface
* 2. APB slave interface
*/
@@ -204,20 +204,20 @@ int init_onboard_sram(void){
printk("On Board FT SRAM not found (APB)\n");
return -1;
}
-
+
if ( amba_find_ahbslv(&cc1.amba_bus,VENDOR_GAISLER,GAISLER_FTAHBRAM,&ahb) != 1 ){
printk("On Board FT SRAM not found (AHB)\n");
return -1;
}
-
+
/* We have found the controller.
* Get it going.
*
- * Get size of SRAM
+ * Get size of SRAM
*/
conf = *(unsigned int *)apb.start;
size = (conf >>10) & 0x7;
-
+
/* 2^x kb */
cc1.ftsram_size = 1<<size;
cc1.ftsram_start = ahb.start[0];
@@ -229,10 +229,10 @@ int init_onboard_sram(void){
}
int cchip1_register(void){
-
+
/* Init AT697 PCI Controller */
init_pci();
-
+
/* Find & init CChip board .
* Also scan AMBA Plug&Play info for us.
*/
@@ -243,43 +243,43 @@ int cchip1_register(void){
/* Set interrupt common board stuff */
cchip1_irq_init();
-
+
/* Find on board SRAM */
if ( init_onboard_sram() ){
printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
return -1;
}
-
+
/* Register interrupt install functions */
b1553brm_pci_int_reg = cchip1_set_isr;
occan_pci_int_reg = cchip1_set_isr;
grspw_pci_int_reg = cchip1_set_isr;
apbuart_pci_int_reg = cchip1_set_isr;
-
+
/* register the BRM PCI driver, use 16k FTSRAM... */
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
printk("Failed to register BRM PCI driver\n");
return -1;
}
-
+
/* register the BRM PCI driver, no DMA memory... */
if ( occan_pci_register(&cc1.amba_bus) ){
printk("Failed to register OC_CAN PCI driver\n");
return -1;
}
-
+
/* register the GRSPW PCI driver, use malloc... */
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
printk("Failed to register GRSPW PCI driver\n");
return -1;
}
-
+
/* register the APBUART PCI driver, no DMA memory */
if ( apbuart_pci_register(&cc1.amba_bus) ){
printk("Failed to register APBUART PCI driver\n");
return -1;
}
-
+
return 0;
}
@@ -298,7 +298,7 @@ void cchip1_irq_init(void){
/* Configure AT697 ioport bit 7 to input pci irq */
regs->PIO_Direction &= ~(1<<7);
regs->PIO_Interrupt = 0x87; /* level sensitive */
-
+
/* Set up irq controller (mask all IRQs) */
cc1.pcib->imask = 0x0000;
cc1.pcib->ipend = 0;
@@ -307,10 +307,10 @@ void cchip1_irq_init(void){
cc1.pcib->ilevel = 0x0;
memset(int_handlers,0,sizeof(int_handlers));
-
+
/* Reset spurious counter */
cchip1_spurious_cnt = 0;
-
+
/* Register interrupt handler */
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
}
@@ -323,11 +323,11 @@ void cchip1_set_isr(void *handler, int irqno, void *arg){
#endif
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
}
-
-static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
+
+static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
unsigned int pending = READ_REG(&cc1.pcib->ipend);
unsigned int (*handler)(int irqno, void *arg);
- unsigned int clr = pending;
+ unsigned int clr = pending;
int irq=1;
if ( !pending ){
@@ -343,7 +343,7 @@ static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
/* IRQ 0 doesn't exist */
irq=1;
pending = pending>>1;
-
+
while ( pending ){
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
handler(irq,int_handlers[irq].arg);
@@ -353,6 +353,6 @@ static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
}
cc1.pcib->iclear = clr;
-
+
/*LEON_Clear_interrupt( brd->irq );*/
}
diff --git a/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
index 543549f808..90a17cbb92 100644
--- a/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
+++ b/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
@@ -66,7 +66,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
clicks = LEON_REG.Timer_Counter_1;
/* Down counter */
- return (uint32_t)
+ return (uint32_t)
(rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
}
diff --git a/c/src/lib/libbsp/sparc/leon2/console/console.c b/c/src/lib/libbsp/sparc/leon2/console/console.c
index 25deed7cd6..8c55b8778a 100644
--- a/c/src/lib/libbsp/sparc/leon2/console/console.c
+++ b/c/src/lib/libbsp/sparc/leon2/console/console.c
@@ -21,7 +21,7 @@
/*
* Should we use a polled or interrupt drived console?
- *
+ *
* NOTE: This is defined in the custom/leon.cfg file.
*
* WARNING: In sis 1.6, it did not appear that the UART interrupts
@@ -29,7 +29,7 @@
* a character into the TX buffer, an interrupt was generated.
* This did not allow enough time for the program to put more
* characters in the buffer. So every character resulted in
- * "priming" the transmitter. This effectively results in
+ * "priming" the transmitter. This effectively results in
* in a polled console with a useless interrupt per character
* on output. It is reasonable to assume that input does not
* share this problem although it was not investigated.
@@ -50,7 +50,7 @@ void console_outbyte_polled(
/* body is in debugputs.c */
/*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* This routine polls for a character.
*/
@@ -70,10 +70,10 @@ int console_inbyte_nonblocking( int port );
*/
#include <ringbuf.h>
-
+
Ring_buffer_t TX_Buffer[ 2 ];
bool Is_TX_active[ 2 ];
-
+
void *console_termios_data[ 2 ];
/*
@@ -82,7 +82,7 @@ void *console_termios_data[ 2 ];
* This routine is the console interrupt handler for Channel 1.
*
* Input parameters:
- * vector - vector number
+ * vector - vector number
*
* Output parameters: NONE
*
@@ -92,10 +92,10 @@ void *console_termios_data[ 2 ];
rtems_isr console_isr_a(
rtems_vector_number vector
)
-{
+{
char ch;
int UStat;
-
+
if ( (UStat = LEON_REG.UART_Status_1) & LEON_REG_UART_STATUS_DR ) {
if (UStat & LEON_REG_UART_STATUS_ERR) {
LEON_REG.UART_Status_1 = LEON_REG_UART_STATUS_CLR;
@@ -104,7 +104,7 @@ rtems_isr console_isr_a(
rtems_termios_enqueue_raw_characters( console_termios_data[ 0 ], &ch, 1 );
}
-
+
if ( LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE ) {
if ( !Ring_buffer_Is_empty( &TX_Buffer[ 0 ] ) ) {
Ring_buffer_Remove_character( &TX_Buffer[ 0 ], ch );
@@ -112,7 +112,7 @@ rtems_isr console_isr_a(
} else
Is_TX_active[ 0 ] = false;
}
-
+
LEON_Clear_interrupt( LEON_INTERRUPT_UART_1_RX_TX );
}
@@ -122,13 +122,13 @@ rtems_isr console_isr_a(
* This routine is the console interrupt handler for Channel 2.
*
* Input parameters:
- * vector - vector number
+ * vector - vector number
*
* Output parameters: NONE
*
* Return values: NONE
*/
-
+
rtems_isr console_isr_b(
rtems_vector_number vector
)
@@ -193,11 +193,11 @@ void console_exit()
* Now wait for all the data to actually get out ... the send register
* should be empty.
*/
-
- while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) !=
+
+ while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) !=
LEON_REG_UART_STATUS_THE );
- while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) !=
+ while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) !=
LEON_REG_UART_STATUS_THE );
LEON_REG.UART_Control_1 = 0;
@@ -261,7 +261,7 @@ void console_initialize_interrupts( void )
*
* Return values: NONE
*/
-
+
void console_outbyte_interrupt(
int port,
char ch
@@ -308,7 +308,7 @@ int console_write_support (int minor, const char *buf, int len)
* Console Device Driver Entry Points
*
*/
-
+
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -334,7 +334,7 @@ rtems_device_driver console_initialize(
/*
* Initialize Hardware
*/
-
+
LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE |
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
@@ -382,7 +382,7 @@ rtems_device_driver console_open(
assert( minor <= 1 );
if ( minor > 2 )
return RTEMS_INVALID_NUMBER;
-
+
#if (CONSOLE_USE_INTERRUPTS)
sc = rtems_termios_open (major, minor, arg, &intrCallbacks);
@@ -393,7 +393,7 @@ rtems_device_driver console_open(
return RTEMS_SUCCESSFUL;
}
-
+
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -402,7 +402,7 @@ rtems_device_driver console_close(
{
return rtems_termios_close (arg);
}
-
+
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -411,7 +411,7 @@ rtems_device_driver console_read(
{
return rtems_termios_read (arg);
}
-
+
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -420,7 +420,7 @@ rtems_device_driver console_write(
{
return rtems_termios_write (arg);
}
-
+
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
diff --git a/c/src/lib/libbsp/sparc/leon2/console/debugputs.c b/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
index b418696054..ffd489b4a6 100644
--- a/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
+++ b/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
@@ -40,7 +40,7 @@ void console_outbyte_polled(
}
/*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* This routine polls for a character.
*/
diff --git a/c/src/lib/libbsp/sparc/leon2/include/bsp.h b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
index f35b499e9f..caf3e5dd12 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to ERC32 implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -35,7 +35,7 @@ extern "C" {
/* SPARC CPU variant: LEON2 */
#define LEON2 1
-
+
/*
* BSP provides its own Idle thread body
*/
@@ -81,13 +81,13 @@ extern int CPU_SPARC_HAS_SNOOPING;
extern int RAM_START;
extern int RAM_END;
extern int RAM_SIZE;
-
+
extern int PROM_START;
extern int PROM_END;
extern int PROM_SIZE;
extern int CLOCK_SPEED;
-
+
extern int end; /* last address in the program */
/* miscellaneous stuff assumed to exist */
diff --git a/c/src/lib/libbsp/sparc/leon2/include/leon.h b/c/src/lib/libbsp/sparc/leon2/include/leon.h
index 99368d04b6..168ebe5b52 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/leon.h
@@ -5,9 +5,9 @@
* This CPU has a number of on-board peripherals and
* was developed by the European Space Agency to target space applications.
*
- * NOTE: Other than where absolutely required, this version currently
- * supports only the peripherals and bits used by the basic board
- * support package. This includes at least significant pieces of
+ * NOTE: Other than where absolutely required, this version currently
+ * supports only the peripherals and bits used by the basic board
+ * support package. This includes at least significant pieces of
* the following items:
*
* + UART Channels A and B
@@ -23,20 +23,20 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
*/
-
+
#ifndef _INCLUDE_LEON_h
#define _INCLUDE_LEON_h
#include <rtems/score/sparc.h>
-
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -44,7 +44,7 @@ extern "C" {
/*
* Interrupt Sources
*
- * The interrupt source numbers directly map to the trap type and to
+ * The interrupt source numbers directly map to the trap type and to
* the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
* and the Interrupt Pending Registers.
*/
@@ -72,7 +72,7 @@ extern "C" {
*
* Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
*
- * NOTE: The priority level for each source corresponds to the least
+ * NOTE: The priority level for each source corresponds to the least
* significant nibble of the trap type.
*/
@@ -85,12 +85,12 @@ extern "C" {
(_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) )
/*
- * Structure for LEON memory mapped registers.
+ * Structure for LEON memory mapped registers.
*
* Source: Section 6.1 - On-chip registers
*
- * NOTE: There is only one of these structures per CPU, its base address
- * is 0x80000000, and the variable LEON_REG is placed there by the
+ * NOTE: There is only one of these structures per CPU, its base address
+ * is 0x80000000, and the variable LEON_REG is placed there by the
* linkcmds file.
*/
@@ -107,7 +107,7 @@ typedef struct {
volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2;
volatile unsigned int dummy3;
- volatile unsigned int dummy4;
+ volatile unsigned int dummy4;
volatile unsigned int dummy5;
volatile unsigned int dummy6;
volatile unsigned int dummy7;
@@ -213,7 +213,7 @@ typedef struct {
#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00
-
+
/*
* The following defines the bits in the Timer Control Register.
*/
@@ -230,8 +230,8 @@ typedef struct {
*
*/
-#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
-
+#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
@@ -246,7 +246,7 @@ typedef struct {
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
-
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
@@ -270,7 +270,7 @@ typedef struct {
*/
extern LEON_Register_Map LEON_REG;
-
+
/*
* Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
* and the Interrupt Pending Registers.
@@ -290,13 +290,13 @@ extern LEON_Register_Map LEON_REG;
do { \
LEON_REG.Interrupt_Force = (1 << (_source)); \
} while (0)
-
+
#define LEON_Is_interrupt_pending( _source ) \
(LEON_REG.Interrupt_Pending & (1 << (_source)))
-
+
#define LEON_Is_interrupt_masked( _source ) \
(LEON_REG.Interrupt_Masked & (1 << (_source)))
-
+
#define LEON_Mask_interrupt( _source ) \
do { \
uint32_t _level; \
@@ -305,7 +305,7 @@ extern LEON_Register_Map LEON_REG;
LEON_REG.Interrupt_Mask &= ~(1 << (_source)); \
sparc_enable_interrupts( _level ); \
} while (0)
-
+
#define LEON_Unmask_interrupt( _source ) \
do { \
uint32_t _level; \
@@ -326,7 +326,7 @@ extern LEON_Register_Map LEON_REG;
sparc_enable_interrupts( _level ); \
(_previous) &= _mask; \
} while (0)
-
+
#define LEON_Restore_interrupt( _source, _previous ) \
do { \
uint32_t _level; \
@@ -350,7 +350,7 @@ extern LEON_Register_Map LEON_REG;
* 0 = stop counter at zero
*
* D2 - Counter Load
- * 1 = load counter with preset value
+ * 1 = load counter with preset value
* 0 = no function
*
*/
@@ -374,6 +374,6 @@ extern LEON_Register_Map LEON_REG;
#ifdef __cplusplus
}
#endif
-
+
#endif /* !_INCLUDE_LEON_h */
diff --git a/c/src/lib/libbsp/sparc/leon2/include/rasta.h b/c/src/lib/libbsp/sparc/leon2/include/rasta.h
index 67ea8c3a4d..751ec3eb8e 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/rasta.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/rasta.h
@@ -44,8 +44,8 @@ extern int rasta_register(void);
* The following defines the bits in the UART Control Registers.
*
*/
-#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
-
+#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
@@ -58,7 +58,7 @@ extern int rasta_register(void);
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
-
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
diff --git a/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c b/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
index ea89310d74..aab451fad5 100644
--- a/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
+++ b/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
@@ -28,8 +28,8 @@
#define OPEN_ETH_VECTOR 0x1C
open_eth_configuration_t leon_open_eth_configuration = {
- OPEN_ETH_BASE_ADDRESS, /* base address */
- OPEN_ETH_VECTOR, /* vector number */
+ OPEN_ETH_BASE_ADDRESS, /* base address */
+ OPEN_ETH_VECTOR, /* vector number */
TDA_COUNT, /* number of transmit descriptors */
RDA_COUNT, /* number of receive descriptors */
0 /* 100 MHz operation */
diff --git a/c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c b/c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c
index abb35cee93..47b4d7a413 100644
--- a/c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c
+++ b/c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c
@@ -30,9 +30,9 @@
#define SMC91111_BASE_PIO 4
scmv91111_configuration_t leon_scmv91111_configuration = {
- SMC91111_BASE_ADDR, /* base address */
- SMC91111_BASE_IRQ, /* vector number */
- SMC91111_BASE_PIO, /* PIO */
+ SMC91111_BASE_ADDR, /* base address */
+ SMC91111_BASE_IRQ, /* vector number */
+ SMC91111_BASE_PIO, /* PIO */
100, /* 100b */
1, /* fulldx */
1 /* autoneg */
@@ -56,7 +56,7 @@ int rtems_smc91111_driver_attach_leon2(struct rtems_bsdnet_ifconfig *config)
*((volatile unsigned int *)0x800000A8) |=
(0xe0 | leon_scmv91111_configuration.pio)
<< (8 * ((leon_scmv91111_configuration.vector & 0x0f) - 4));
-
+
return _rtems_smc91111_driver_attach(config,&leon_scmv91111_configuration);
};
diff --git a/c/src/lib/libbsp/sparc/leon2/pci/pci.c b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
index f328025a0b..f6de9f8cd6 100644
--- a/c/src/lib/libbsp/sparc/leon2/pci/pci.c
+++ b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
@@ -18,7 +18,7 @@
* Till Straumann, <strauman@slac.stanford.edu>, 1/2002
* - separated bridge detection code out of this file
*
- * Adapted to LEON2 AT697 PCI
+ * Adapted to LEON2 AT697 PCI
* Copyright (C) 2006 Gaisler Research
*
*/
@@ -28,14 +28,14 @@
#include <stdlib.h>
/* Define PCI_INFO to get a listing of configured devices at boot time */
-#define PCI_INFO 1
+#define PCI_INFO 1
/* #define DEBUG 1 */
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
-#define DBG(x...)
+#define DBG(x...)
#endif
/* allow for overriding these definitions */
@@ -55,7 +55,7 @@
/*
* Bit encode for PCI_CONFIG_HEADER_TYPE register
*/
-unsigned char ucMaxPCIBus;
+unsigned char ucMaxPCIBus;
typedef struct {
volatile unsigned int pciid1; /* 0x80000100 - PCI Device identification register 1 */
@@ -65,7 +65,7 @@ typedef struct {
volatile unsigned int mbar1; /* 0x80000110 - Memory Base Address Register 1 */
volatile unsigned int mbar2; /* 0x80000114 - Memory Base Address Register 2 */
volatile unsigned int iobar3; /* 0x80000118 - IO Base Address Register 3 */
- volatile unsigned int dummy1[4]; /* 0x8000011c - 0x80000128 */
+ volatile unsigned int dummy1[4]; /* 0x8000011c - 0x80000128 */
volatile unsigned int pcisid; /* 0x8000012c - Subsystem identification register */
volatile unsigned int dummy2; /* 0x80000130 */
volatile unsigned int pcicp; /* 0x80000134 - PCI capabilities pointer register */
@@ -78,12 +78,12 @@ typedef struct {
volatile unsigned int pcidma; /* 0x80000150 - PCI DMA configuration register */
volatile unsigned int pciis; /* 0x80000154 - PCI Initiator Status Register */
volatile unsigned int pciic; /* 0x80000158 - PCI Initiator Configuration */
- volatile unsigned int pcitpa; /* 0x8000015c - PCI Target Page Address Register */
+ volatile unsigned int pcitpa; /* 0x8000015c - PCI Target Page Address Register */
volatile unsigned int pcitsc; /* 0x80000160 - PCI Target Status-Command Register */
volatile unsigned int pciite; /* 0x80000164 - PCI Interrupt Enable Register */
volatile unsigned int pciitp; /* 0x80000168 - PCI Interrupt Pending Register */
volatile unsigned int pciitf; /* 0x8000016c - PCI Interrupt Force Register */
- volatile unsigned int pcid; /* 0x80000170 - PCI Data Register */
+ volatile unsigned int pcid; /* 0x80000170 - PCI Data Register */
volatile unsigned int pcibe; /* 0x80000174 - PCI Burst End Register */
volatile unsigned int pcidmaa; /* 0x80000178 - PCI DMA Address Register */
} AT697_PCI_Map;
@@ -104,7 +104,7 @@ struct pci_res {
/* The configuration access functions uses the DMA functionality of the
* AT697 pci controller to be able access all slots
*/
-
+
static int
BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int *val) {
@@ -112,7 +112,7 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
- pcic->pciitp = 0xff; /* clear interrupts */
+ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f);
pcic->pcidma = 0xa01;
@@ -120,8 +120,8 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
while (pcic->pciitp == 0)
;
-
- pcic->pciitp = 0xff; /* clear interrupts */
+
+ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000;
@@ -130,13 +130,13 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
else
*val = data;
- DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
+ DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL;
}
-static int
+static int
BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
unsigned int v;
@@ -149,7 +149,7 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
}
-static int
+static int
BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
unsigned int v;
@@ -167,7 +167,7 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
pcic->pciitp = 0xff; /* clear interrupts */
-
+
pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f);
pcic->pcidma = 0xb01;
pcic->pcidmaa = (unsigned int) &val;
@@ -187,7 +187,7 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
}
-static int
+static int
BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
unsigned int v;
@@ -201,14 +201,14 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
}
-static int
+static int
BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3)));
-
+
return pci_write_config_dword(bus, slot, function, offset&~3, v);
}
@@ -262,7 +262,7 @@ int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
return -1;
}
- pcic->pciitp = 0xff; /* clear interrupts */
+ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = paddr;
pcic->pcidma = 0xc00 | len;
@@ -271,17 +271,17 @@ int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
while (pcic->pciitp == 0)
;
- if (pcic->pciitp & 0x7F) {
+ if (pcic->pciitp & 0x7F) {
retval = -1;
}
- pcic->pciitp = 0xff; /* clear interrupts */
+ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000;
retval = -1;
}
-
+
return retval;
}
@@ -292,7 +292,7 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
if (addr & 3) return -1;
- pcic->pciitp = 0xff; /* clear interrupts */
+ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = paddr;
pcic->pcidma = 0x700 | len;
@@ -300,10 +300,10 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
while (pcic->pciitp == 0)
;
-
+
if (pcic->pciitp & 0x7F) retval = -1;
- pcic->pciitp = 0xff; /* clear interrupts */
+ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000;
@@ -315,7 +315,7 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
/* Transfer len number of words from addr to paddr */
int dma_to_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
-
+
int tmp_len;
/* Align to 1k boundary */
@@ -329,11 +329,11 @@ int dma_to_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
addr += tmp_len;
paddr += tmp_len;
len -= tmp_len/4;
-
+
/* Transfer all 1k blocks */
while (len >= 128) {
- if (dma_to_pci_1k(addr, paddr, 128) < 0)
+ if (dma_to_pci_1k(addr, paddr, 128) < 0)
return -1;
addr += 512;
@@ -364,7 +364,7 @@ int dma_from_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
addr += tmp_len;
paddr += tmp_len;
len -= tmp_len/4;
-
+
/* Transfer all 1k blocks */
while (len >= 128) {
@@ -386,7 +386,7 @@ void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char functio
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
}
@@ -394,7 +394,7 @@ void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char func
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
}
@@ -413,7 +413,7 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
* latency timers are set to 40.
*
* NOTE that it only allocates PCI memory space devices. IO spaces are not enabled.
- * Also, it does not handle pci-pci bridges. They are left disabled.
+ * Also, it does not handle pci-pci bridges. They are left disabled.
*
*
*/
@@ -426,7 +426,7 @@ void pci_allocate_resources(void) {
res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6);
for (i = 0; i < 32*8*6; i++) {
- res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
+ res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
res[i]->size = 0;
res[i]->devfn = i;
}
@@ -443,7 +443,7 @@ void pci_allocate_resources(void) {
}
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
-
+
if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
@@ -463,7 +463,7 @@ void pci_allocate_resources(void) {
if (tmp == PCI_CLASS_BRIDGE_PCI) {
continue;
}
-
+
for (pos = 0; pos < 6; pos++) {
pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
@@ -485,7 +485,7 @@ void pci_allocate_resources(void) {
}
- /* Sort the resources in descending order */
+ /* Sort the resources in descending order */
swapped = 1;
while (swapped == 1) {
@@ -511,32 +511,32 @@ void pci_allocate_resources(void) {
printk("Out of PCI memory space, all devices not configured.\n");
goto done;
}
-
+
dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7;
-
+
DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size;
/* Set latency timer to 64 */
- pci_read_config_dword(0, dev, fn, 0xC, &tmp);
+ pci_read_config_dword(0, dev, fn, 0xC, &tmp);
pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000);
- pci_mem_enable(0, dev, fn);
+ pci_mem_enable(0, dev, fn);
+
+ }
- }
-
done:
#ifdef PCI_INFO
printk("\nPCI devices found and configured:\n");
for (slot = 0; slot < PCI_MAX_DEVICES; slot++) {
-
- pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
-
+
+ pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
+
if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
@@ -545,15 +545,15 @@ done:
}
for (func = 0; func < numfuncs; func++) {
-
+
pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp);
- if (tmp & PCI_COMMAND_MEMORY) {
-
+ if (tmp & PCI_COMMAND_MEMORY) {
+
pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id);
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
-
+
printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) {
@@ -563,17 +563,17 @@ done:
printk("\tBAR %d: %x\n", pos, tmp);
}
-
+
}
printk("\n");
- }
+ }
}
}
printk("\n");
#endif
-
+
for (i = 0; i < 1536; i++) {
free(res[i]);
}
@@ -594,7 +594,7 @@ int init_pci(void)
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned char ucHeader;
unsigned char ucMaxSubordinate;
- unsigned int ulClass, ulDeviceID;
+ unsigned int ulClass, ulDeviceID;
init_at697_pci();
pci_allocate_resources();
diff --git a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
index ae28904ed8..7b66b07246 100644
--- a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
+++ b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
@@ -34,7 +34,7 @@
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
-#define DBG(x...)
+#define DBG(x...)
#endif
/*
@@ -72,7 +72,7 @@ struct gpio_reg *gpio0, *gpio1;
/* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
/* if (*pci_int & 0x20) { */
-
+
/* *pci_int = 0x20; */
/* *pci_mem = 0; */
@@ -99,13 +99,13 @@ void (*brm_int_handler)(int irq, void *arg) = NULL;
static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
{
unsigned int status;
-
+
status = irq->ipend;
if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
}
-
+
if (status & SPW_IRQ) {
if ( (status & SPW0_IRQ) && spw0_int_handler ){
spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
@@ -114,12 +114,12 @@ static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
if ( (status & SPW1_IRQ) && spw1_int_handler ){
spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
}
-
+
if ( (status & SPW2_IRQ) && spw2_int_handler ){
spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
}
}
- if ((status & BRM_IRQ) && brm_int_handler ){
+ if ((status & BRM_IRQ) && brm_int_handler ){
brm_int_handler(BRM_IRQNO,brm_int_arg);
}
if ( (status & UART0_IRQ) && uart0_int_handler ) {
@@ -128,10 +128,10 @@ static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
if ( (status & UART1_IRQ) && uart1_int_handler) {
uart1_int_handler(UART1_IRQNO,uart1_int_arg);
}
-
+
DBG("RASTA-IRQ: 0x%x\n",status);
irq->iclear = status;
-
+
}
void rasta_interrrupt_register(void *handler, int irqno, void *arg)
@@ -141,27 +141,27 @@ void rasta_interrrupt_register(void *handler, int irqno, void *arg)
DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart0_int_handler = handler;
uart0_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = UART0_IRQ;
irq->mask[0] |= UART0_IRQ;
}
-
+
if ( irqno == UART1_IRQNO ){
DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart1_int_handler = handler;
uart1_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = UART1_IRQ;
irq->mask[0] |= UART1_IRQ;
}
-
+
if ( irqno == SPW0_IRQNO ){
DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw0_int_handler = handler;
spw0_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = SPW0_IRQ;
irq->mask[0] |= SPW0_IRQ;
@@ -171,41 +171,41 @@ void rasta_interrrupt_register(void *handler, int irqno, void *arg)
DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw1_int_handler = handler;
spw1_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = SPW1_IRQ;
irq->mask[0] |= SPW1_IRQ;
}
-
+
if ( irqno == SPW2_IRQNO ){
DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw2_int_handler = handler;
spw2_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = SPW2_IRQ;
irq->mask[0] |= SPW2_IRQ;
}
-
+
if ( irqno == GRCAN_IRQNO ){
DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
grcan_int_handler = handler;
grcan_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = GRCAN_IRQ;
irq->mask[0] |= GRCAN_IRQ;
}
-
+
if ( irqno == BRM_IRQNO ){
DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
brm_int_handler = handler;
brm_int_arg = arg;
-
+
/* unmask interrupt source */
irq->iclear = BRM_IRQ;
irq->mask[0] |= BRM_IRQ;
- }
+ }
}
@@ -213,21 +213,21 @@ int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs,
{
amba_apb_device dev;
int cores;
-
- if ( !abus )
+
+ if ( !abus )
return -1;
-
+
/* Scan PnP info for GPIO port number 'index' */
cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index);
if ( cores < 1 )
return -1;
-
+
if ( regs )
*regs = (struct gpio_reg *)dev.start;
-
+
if ( irq )
*irq = dev.irq;
-
+
return 0;
}
@@ -235,37 +235,37 @@ int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs,
static amba_confarea_type abus;
static struct amba_mmap amba_maps[3];
-int rasta_register(void)
+int rasta_register(void)
{
unsigned int bar0, bar1, data;
unsigned int *page0 = NULL;
unsigned int *apb_base = NULL;
int found=0;
-
+
DBG("Searching for RASTA board ...");
-
+
/* Search PCI vendor/device id. */
if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
found = 1;
}
-
+
/* Search old PCI vendor/device id. */
if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
found = 1;
}
-
+
/* Did we find a RASTA board? */
if ( !found )
return -1;
-
+
DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
pci_read_config_dword(bus, dev, fun, 0x10, &bar0);
pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
- page0 = (unsigned int *)(bar0 + 0x400000);
+ page0 = (unsigned int *)(bar0 + 0x400000);
*page0 = 0x80000000; /* Point PAGE0 to start of APB */
apb_base = (unsigned int *)(bar0+APB2_OFFSET);
@@ -279,13 +279,13 @@ int rasta_register(void)
apb_base[0] = 0x000002ff;
apb_base[1] = 0x00001260;
apb_base[2] = 0x000e8000;
-#else
+#else
apb_base[0] = 0x000002ff;
apb_base[1] = 0x82206000;
apb_base[2] = 0x000e8000;
#endif
/* Set up rasta irq controller */
- irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET);
+ irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET);
irq->iclear = 0xffff;
irq->ilevel = 0;
irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
@@ -297,23 +297,23 @@ int rasta_register(void)
apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */
apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */
-
+
/* set parity error response */
pci_read_config_dword(bus, dev, fun, 0x4, &data);
pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
-
+
pci_master_enable(bus, dev, fun);
/* install PCI interrupt vector */
/* set_vector(pci_interrupt_handler,14+0x10, 1); */
-
+
/* install interrupt vector */
set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
/* Scan AMBA Plug&Play */
-
+
/* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
amba_maps[0].size = 0x10000000;
amba_maps[0].cpu_adr = bar0;
@@ -328,14 +328,14 @@ int rasta_register(void)
amba_maps[2].size=0;
amba_maps[2].cpu_adr = 0;
amba_maps[2].remote_amba_adr = 0;
-
+
memset(&abus,0,sizeof(abus));
-
+
/* Start AMBA PnP scan at first AHB bus */
amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]);
-
+
printk("Registering RASTA GRCAN driver\n\r");
-
+
/*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/
grcan_rasta_int_reg=rasta_interrrupt_register;
if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){
@@ -352,7 +352,7 @@ int rasta_register(void)
printk("Failed to register BRM RASTA driver\n");
return -1;
}
-
+
/* provide the spacewire driver with AMBA Plug&Play
* info so that it can find the GRSPW cores.
*/
@@ -376,13 +376,13 @@ int rasta_register(void)
printk("Failed to get address for RASTA GPIO0\n\r");
return -1;
}
-
+
/* Find GPIO1 address */
if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){
printk("Failed to get address for RASTA GPIO1\n\r");
return -1;
}
-
+
/* Successfully registered the RASTA board */
return 0;
}
diff --git a/c/src/lib/libbsp/sparc/leon2/startup/bspidle.c b/c/src/lib/libbsp/sparc/leon2/startup/bspidle.c
index 34365be8ff..7c1a8c5588 100644
--- a/c/src/lib/libbsp/sparc/leon2/startup/bspidle.c
+++ b/c/src/lib/libbsp/sparc/leon2/startup/bspidle.c
@@ -9,10 +9,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
diff --git a/c/src/lib/libbsp/sparc/leon2/startup/bspstart.c b/c/src/lib/libbsp/sparc/leon2/startup/bspstart.c
index 899c4dd8aa..f182121629 100644
--- a/c/src/lib/libbsp/sparc/leon2/startup/bspstart.c
+++ b/c/src/lib/libbsp/sparc/leon2/startup/bspstart.c
@@ -24,17 +24,17 @@
/*
* Tells us if data cache snooping is available
- */
+ */
int CPU_SPARC_HAS_SNOOPING;
/*
* set_snooping
- *
+ *
* Read the data cache configuration register to determine if
* bus snooping is available. This is needed for some drivers so
- * that they can select the most efficient copy routines.
+ * that they can select the most efficient copy routines.
*/
-static inline int set_snooping(void)
+static inline int set_snooping(void)
{
unsigned int tmp = *(unsigned int *)0x80000014; /* Cache control register */
return ((tmp>>23) & 1); /* Data cache snooping enabled */
diff --git a/c/src/lib/libbsp/sparc/leon2/startup/setvec.c b/c/src/lib/libbsp/sparc/leon2/startup/setvec.c
index b48b3e050d..c7b8af6616 100644
--- a/c/src/lib/libbsp/sparc/leon2/startup/setvec.c
+++ b/c/src/lib/libbsp/sparc/leon2/startup/setvec.c
@@ -21,10 +21,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */
if ( type )
rtems_interrupt_catch( handler, vector, &previous_isr );
- else
+ else
_CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
real_trap = SPARC_REAL_TRAP_NUMBER( vector );
if ( LEON_INT_TRAP( real_trap ) ) {
-
+
source = LEON_TRAP_SOURCE( real_trap );
LEON_Clear_interrupt( source );
diff --git a/c/src/lib/libbsp/sparc/leon2/startup/spurious.c b/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
index 41564f3158..ef4bf8053b 100644
--- a/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
@@ -1,11 +1,11 @@
/*
* LEON Spurious Trap Handler
*
- * This is just enough of a trap handler to let us know what
+ * This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
- * Developed as part of the port of RTEMS to the LEON implementation
- * of the SPARC by On-Line Applications Research Corporation (OAR)
+ * Developed as part of the port of RTEMS to the LEON implementation
+ * of the SPARC by On-Line Applications Research Corporation (OAR)
* under contract to the European Space Agency (ESA).
*
* COPYRIGHT (c) 1995. European Space Agency.
@@ -41,31 +41,31 @@ rtems_isr bsp_spurious_handler(
* First the ones defined by the basic architecture
*/
- case 0x00:
+ case 0x00:
printk( "reset\n" );
break;
- case 0x01:
+ case 0x01:
printk( "instruction access exception\n" );
break;
- case 0x02:
+ case 0x02:
printk( "illegal instruction\n" );
break;
- case 0x03:
+ case 0x03:
printk( "privileged instruction\n" );
break;
- case 0x04:
+ case 0x04:
printk( "fp disabled\n" );
break;
- case 0x07:
+ case 0x07:
printk( "memory address not aligned\n" );
break;
- case 0x08:
+ case 0x08:
printk( "fp exception\n" );
break;
- case 0x09:
+ case 0x09:
printk("data access exception at 0x%08x\n", LEON_REG.Failed_Address );
break;
- case 0x0A:
+ case 0x0A:
printk( "tag overflow\n" );
break;
@@ -139,7 +139,7 @@ void bsp_spurious_initialize()
*/
if (( trap == 5 || trap == 6 ) ||
- (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
+ (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
diff --git a/c/src/lib/libbsp/sparc/leon2/timer/timer.c b/c/src/lib/libbsp/sparc/leon2/timer/timer.c
index b071b5c74c..4c139b44f5 100644
--- a/c/src/lib/libbsp/sparc/leon2/timer/timer.c
+++ b/c/src/lib/libbsp/sparc/leon2/timer/timer.c
@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -42,8 +42,8 @@ void benchmark_timer_initialize(void)
benchmark_timer_is_initialized = true;
}
- LEON_REG.Timer_Control_2 = (
- LEON_REG_TIMER_COUNTER_ENABLE_COUNTING |
+ LEON_REG.Timer_Control_2 = (
+ LEON_REG_TIMER_COUNTER_ENABLE_COUNTING |
LEON_REG_TIMER_COUNTER_LOAD_COUNTER
);
diff --git a/c/src/lib/libbsp/sparc/leon3/amba/amba.c b/c/src/lib/libbsp/sparc/leon3/amba/amba.c
index 29a62f0f6a..ad901df1c0 100644
--- a/c/src/lib/libbsp/sparc/leon3/amba/amba.c
+++ b/c/src/lib/libbsp/sparc/leon3/amba/amba.c
@@ -27,9 +27,9 @@ int LEON3_Cpu_Index = 0;
* bsp_predriver_hook
*
* BSP predriver hook. Called just before drivers are initialized.
- * Used to scan system bus. Probes for AHB masters, AHB slaves and
+ * Used to scan system bus. Probes for AHB masters, AHB slaves and
* APB slaves. Addresses to configuration areas of the AHB masters,
- * AHB slaves, APB slaves and APB master are storeds in
+ * AHB slaves, APB slaves and APB master are storeds in
* amba_ahb_masters, amba_ahb_slaves and amba.
*/
@@ -64,7 +64,7 @@ void bsp_predriver_hook(void)
}
#endif
}
-
+
/* find GP Timer */
i = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&dev);
if ( i > 0 ){
diff --git a/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
index 54794cd1c2..071265a30e 100644
--- a/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
+++ b/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
@@ -36,7 +36,7 @@
(rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
#else
#define LEON3_CLOCK_INDEX 0
-#endif
+#endif
volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs = 0;
diff --git a/c/src/lib/libbsp/sparc/leon3/console/console.c b/c/src/lib/libbsp/sparc/leon3/console/console.c
index 5a9084affd..817eb1c6d7 100644
--- a/c/src/lib/libbsp/sparc/leon3/console/console.c
+++ b/c/src/lib/libbsp/sparc/leon3/console/console.c
@@ -26,7 +26,7 @@
/*
* Should we use a polled or interrupt drived console?
- *
+ *
* NOTE: This is defined in the custom/leon.cfg file.
*/
@@ -44,7 +44,7 @@ void console_outbyte_polled(
/* body is in debugputs.c */
/*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* This routine polls for a character.
*/
@@ -86,7 +86,7 @@ int scan_uarts(void) {
if (isinit == 0) {
i = 0;
uarts = 0;
-
+
uarts = amba_find_apbslvs(
&amba_conf, VENDOR_GAISLER, GAISLER_APBUART, apbuarts, LEON3_APBUARTS);
for(i=0; i<uarts; i++) {
@@ -113,16 +113,16 @@ rtems_device_driver console_initialize(
scan_uarts();
/* default to zero and override if multiprocessing */
- uart0 = 0;
+ uart0 = 0;
#if defined(RTEMS_MULTIPROCESSING)
if (rtems_configuration_get_user_multiprocessing_table() != NULL)
uart0 = LEON3_Cpu_Index;
#endif
/* Register Device Names */
-
- if (uarts && (uart0 < uarts))
- {
+
+ if (uarts && (uart0 < uarts))
+ {
status = rtems_io_register_name( "/dev/console", major, 0 );
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
@@ -139,7 +139,7 @@ rtems_device_driver console_initialize(
/*
* Initialize Hardware if ONLY CPU or first CPU in MP system
*/
-
+
#if defined(RTEMS_MULTIPROCESSING)
if (rtems_configuration_get_user_multiprocessing_table()->node == 1)
#endif
@@ -148,7 +148,7 @@ rtems_device_driver console_initialize(
{
LEON3_Console_Uart[i]->ctrl |=
LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
- LEON3_Console_Uart[i]->status = 0;
+ LEON3_Console_Uart[i]->status = 0;
}
}
@@ -178,13 +178,13 @@ rtems_device_driver console_open(
assert( minor <= LEON3_APBUARTS );
if ( minor > LEON3_APBUARTS )
return RTEMS_INVALID_NUMBER;
-
+
sc = rtems_termios_open (major, minor, arg, &pollCallbacks);
return RTEMS_SUCCESSFUL;
}
-
+
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -193,7 +193,7 @@ rtems_device_driver console_close(
{
return rtems_termios_close (arg);
}
-
+
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -202,7 +202,7 @@ rtems_device_driver console_read(
{
return rtems_termios_read (arg);
}
-
+
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -211,7 +211,7 @@ rtems_device_driver console_write(
{
return rtems_termios_write (arg);
}
-
+
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
diff --git a/c/src/lib/libbsp/sparc/leon3/console/debugputs.c b/c/src/lib/libbsp/sparc/leon3/console/debugputs.c
index 10862b8ce5..b6276930d3 100644
--- a/c/src/lib/libbsp/sparc/leon3/console/debugputs.c
+++ b/c/src/lib/libbsp/sparc/leon3/console/debugputs.c
@@ -45,7 +45,7 @@ void console_outbyte_polled(
}
/*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* This routine polls for a character.
*/
diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
index c62cc0887b..2c41d70450 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to ERC32 implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -91,13 +91,13 @@ extern int CPU_SPARC_HAS_SNOOPING;
extern int RAM_START;
extern int RAM_END;
extern int RAM_SIZE;
-
+
extern int PROM_START;
extern int PROM_END;
extern int PROM_SIZE;
extern int CLOCK_SPEED;
-
+
extern int end; /* last address in the program */
/* miscellaneous stuff assumed to exist */
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h
index 8c130ad6cc..93bc05462c 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h
@@ -15,7 +15,7 @@
*
* $Id$
*/
-
+
#ifndef _INCLUDE_LEON_h
#define _INCLUDE_LEON_h
@@ -34,7 +34,7 @@ extern "C" {
*
* Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
*
- * NOTE: The priority level for each source corresponds to the least
+ * NOTE: The priority level for each source corresponds to the least
* significant nibble of the trap type.
*/
@@ -45,14 +45,14 @@ extern "C" {
#define LEON_INT_TRAP( _trap ) \
( (_trap) >= 0x11 && \
(_trap) <= 0x1F )
-
+
/*
- * Structure for LEON memory mapped registers.
+ * Structure for LEON memory mapped registers.
*
* Source: Section 6.1 - On-chip registers
*
- * NOTE: There is only one of these structures per CPU, its base address
- * is 0x80000000, and the variable LEON_REG is placed there by the
+ * NOTE: There is only one of these structures per CPU, its base address
+ * is 0x80000000, and the variable LEON_REG is placed there by the
* linkcmds file.
*/
@@ -73,7 +73,7 @@ extern "C" {
volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2;
volatile unsigned int dummy3;
- volatile unsigned int dummy4;
+ volatile unsigned int dummy4;
volatile unsigned int dummy5;
volatile unsigned int dummy6;
volatile unsigned int dummy7;
@@ -146,7 +146,7 @@ typedef struct {
/* Leon uses dynamic register mapping using amba configuration records */
/* LEON_Register_Map is obsolete */
/* extern LEON_Register_Map LEON_REG; */
-
+
#endif
/*
@@ -161,7 +161,7 @@ typedef struct {
#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00
-
+
/*
* The following defines the bits in the Timer Control Register.
*/
@@ -178,8 +178,8 @@ typedef struct {
*
*/
-#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
-
+#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
@@ -193,7 +193,7 @@ typedef struct {
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
-
+
/*
* The following defines the bits in the LEON UART Status Registers.
*/
@@ -243,16 +243,16 @@ extern int LEON3_Cpu_Index;
do { \
LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
} while (0)
-
+
#define LEON_Is_interrupt_pending( _source ) \
(LEON3_IrqCtrl_Regs.ipend & (1 << (_source)))
-
+
#define LEON_Is_interrupt_masked( _source ) \
do {\
(LEON3_IrqCtrl_Regs.mask[LEON3_Cpu_Index] & (1 << (_source))); \
} while (0)
-
+
#define LEON_Mask_interrupt( _source ) \
do { \
uint32_t _level; \
@@ -260,7 +260,7 @@ extern int LEON3_Cpu_Index;
LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] &= ~(1 << (_source)); \
sparc_enable_interrupts( _level ); \
} while (0)
-
+
#define LEON_Unmask_interrupt( _source ) \
do { \
uint32_t _level; \
@@ -279,7 +279,7 @@ extern int LEON3_Cpu_Index;
sparc_enable_interrupts( _level ); \
(_previous) &= _mask; \
} while (0)
-
+
#define LEON_Restore_interrupt( _source, _previous ) \
do { \
uint32_t _level; \
@@ -303,7 +303,7 @@ extern int LEON3_Cpu_Index;
* 0 = stop counter at zero
*
* D2 - Counter Load
- * 1 = load counter with preset value
+ * 1 = load counter with preset value
* 0 = no function
*
*/
diff --git a/c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c b/c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c
index 2058d7d7c1..341bd2792e 100644
--- a/c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c
+++ b/c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c
@@ -24,7 +24,7 @@
#define RDA_COUNT 32
#define TDA_COUNT 32
-greth_configuration_t leon_greth_configuration;
+greth_configuration_t leon_greth_configuration;
int rtems_leon_greth_driver_attach(
struct rtems_bsdnet_ifconfig *config,
@@ -38,11 +38,11 @@ int rtems_leon_greth_driver_attach(
/* Scan for MAC AHB slave interface */
device_found = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_ETHMAC,&apbgreth);
- if (device_found == 1)
+ if (device_found == 1)
{
base_addr = apbgreth.start;
eth_irq = apbgreth.irq + 0x10;
-
+
/* clear control register and reset NIC */
*(volatile int *) base_addr = 0;
*(volatile int *) base_addr = GRETH_CTRL_RST;
@@ -54,7 +54,7 @@ int rtems_leon_greth_driver_attach(
if (rtems_greth_driver_attach( config, &leon_greth_configuration )) {
LEON_Clear_interrupt(leon_greth_configuration.vector);
LEON_Unmask_interrupt(leon_greth_configuration.vector);
- }
+ }
}
return 0;
}
diff --git a/c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c b/c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c
index c4586dd309..3d42d9f53b 100644
--- a/c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c
+++ b/c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c
@@ -24,7 +24,7 @@
#define RDA_COUNT 16
#define TDA_COUNT 16
-open_eth_configuration_t leon_open_eth_configuration;
+open_eth_configuration_t leon_open_eth_configuration;
int rtems_leon_open_eth_driver_attach(
struct rtems_bsdnet_ifconfig *config,
@@ -54,7 +54,7 @@ int rtems_leon_open_eth_driver_attach(
}
- if (device_found)
+ if (device_found)
{
/* clear control register and reset NIC */
*(volatile int *) base_addr = 0;
@@ -69,7 +69,7 @@ int rtems_leon_open_eth_driver_attach(
if (rtems_open_eth_driver_attach( config, &leon_open_eth_configuration )) {
LEON_Clear_interrupt(leon_open_eth_configuration.vector);
LEON_Unmask_interrupt(leon_open_eth_configuration.vector);
- }
+ }
}
return 0;
}
diff --git a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
index 443a12d04d..5ebdc12cfc 100644
--- a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
+++ b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
@@ -12,9 +12,9 @@
#define SMC91111_BASE_PIO 4
scmv91111_configuration_t leon_scmv91111_configuration = {
- SMC91111_BASE_ADDR, /* base address */
+ SMC91111_BASE_ADDR, /* base address */
LEON_TRAP_TYPE (SMC91111_BASE_IRQ), /* vector number */
- SMC91111_BASE_PIO, /* PIO */
+ SMC91111_BASE_PIO, /* PIO */
100, /* 100b */
1, /* fulldx */
1 /* autoneg */
@@ -35,12 +35,12 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
amba_apb_device apbpio;
amba_ahb_device apbmctrl;
-
+
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_PIOPORT,&apbpio) != 1 ){
printk("SMC9111_leon3: didn't find PIO\n");
return 0;
}
-
+
/* Find LEON2 memory controller */
if ( amba_find_ahbslv(&amba_conf,VENDOR_ESA,ESA_MCTRL,&apbmctrl) != 1 ){
/* LEON2 memory controller not found, search for fault tolerant memory controller */
@@ -49,16 +49,16 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
return 0;
}
}
-
+
/* Get controller address */
addr_mctrl = (unsigned long) apbmctrl.start;
io = (LEON3_IOPORT_Regs_Map *) apbpio.start;
-
+
printk(
"Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
(unsigned int)io,
(unsigned int)addr_mctrl);
-
+
/* Setup PIO IRQ */
io->irqmask |= (1 << leon_scmv91111_configuration.pio);
io->irqpol |= (1 << leon_scmv91111_configuration.pio);
diff --git a/c/src/lib/libbsp/sparc/leon3/pci/pci.c b/c/src/lib/libbsp/sparc/leon3/pci/pci.c
index f41936bb87..a5f5c3a34a 100644
--- a/c/src/lib/libbsp/sparc/leon3/pci/pci.c
+++ b/c/src/lib/libbsp/sparc/leon3/pci/pci.c
@@ -19,7 +19,7 @@
* - separated bridge detection code out of this file
*
*
- * Adapted to GRPCI
+ * Adapted to GRPCI
* Copyright (C) 2006 Gaisler Research
*
*/
@@ -39,14 +39,14 @@
/*#define BT_ENABLED 1*/
/* Define PCI_INFO to get a listing of configured devices at boot time */
-#define PCI_INFO 1
+#define PCI_INFO 1
-#define DEBUG 1
+#define DEBUG 1
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
-#define DBG(x...)
+#define DBG(x...)
#endif
/* allow for overriding these definitions */
@@ -66,7 +66,7 @@
/*
* Bit encode for PCI_CONFIG_HEADER_TYPE register
*/
-unsigned char ucMaxPCIBus;
+unsigned char ucMaxPCIBus;
typedef struct {
volatile unsigned int cfg_stat;
volatile unsigned int bar0;
@@ -95,7 +95,7 @@ static inline unsigned int flip_dword (unsigned int l)
/* The configuration access functions uses the DMA functionality of the
* AT697 pci controller to be able access all slots
*/
-
+
static int
BSP_pci_read_config_dword(
@@ -109,7 +109,7 @@ BSP_pci_read_config_dword(
volatile unsigned int *pci_conf;
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
-
+
if (slot > 21) {
*val = 0xffffffff;
return PCIBIOS_SUCCESSFUL;
@@ -128,13 +128,13 @@ BSP_pci_read_config_dword(
*val = 0xffffffff;
}
- DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
+ DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL;
}
-static int
+static int
BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
unsigned int v;
@@ -147,7 +147,7 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
}
-static int
+static int
BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
unsigned int v;
@@ -179,13 +179,13 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
*pci_conf = value;
- DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value);
+ DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value);
return PCIBIOS_SUCCESSFUL;
}
-static int
+static int
BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
unsigned int v;
@@ -199,14 +199,14 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
}
-static int
+static int
BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3)));
-
+
return pci_write_config_dword(bus, slot, function, offset&~3, v);
}
@@ -238,20 +238,20 @@ int init_grpci(void) {
pci_read_config_dword(0,0,0,0x10, &addr);
pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */
addr = (~flip_dword(addr)+1)>>1; /* page0 is accessed through upper half of bar0 */
- pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */
+ pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */
page0[addr/4] = 0; /* Disable bytetwisting ... */
#endif
-
+
/* set 1:1 mapping between AHB -> PCI memory */
pcic->cfg_stat = (pcic->cfg_stat & 0x0fffffff) | PCI_MEM_START;
-
- /* and map system RAM at pci address 0x40000000 */
+
+ /* and map system RAM at pci address 0x40000000 */
pci_write_config_dword(0, 0, 0, 0x14, 0x40000000);
pcic->page1 = 0x40000000;
-
- /* set as bus master and enable pci memory responses */
+
+ /* set as bus master and enable pci memory responses */
pci_read_config_dword(0, 0, 0, 0x4, &data);
- pci_write_config_dword(0, 0, 0, 0x4, data | 0x6);
+ pci_write_config_dword(0, 0, 0, 0x4, data | 0x6);
return 0;
}
@@ -264,16 +264,16 @@ int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) {
pcidma[1] = ahb_addr;
pcidma[2] = pci_addr;
pcidma[3] = len;
- pcidma[0] = 0x83;
+ pcidma[0] = 0x83;
while ( (pcidma[0] & 0x4) == 0)
;
- if (pcidma[0] & 0x8) { /* error */
+ if (pcidma[0] & 0x8) { /* error */
ret = -1;
}
- pcidma[0] |= 0xC;
+ pcidma[0] |= 0xC;
return ret;
}
@@ -285,26 +285,26 @@ int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len)
pcidma[1] = ahb_addr;
pcidma[2] = pci_addr;
pcidma[3] = len;
- pcidma[0] = 0x81;
+ pcidma[0] = 0x81;
while ( (pcidma[0] & 0x4) == 0)
;
- if (pcidma[0] & 0x8) { /* error */
+ if (pcidma[0] & 0x8) { /* error */
ret = -1;
}
- pcidma[0] |= 0xC;
+ pcidma[0] |= 0xC;
return ret;
-}
+}
void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) {
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
}
@@ -312,7 +312,7 @@ void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char func
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
}
@@ -330,8 +330,8 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
* single function and multi function devices. All allocated devices are enabled and
* latency timers are set to 40.
*
- * NOTE that it only allocates PCI memory space devices (that are at least 1 KB).
- * IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled.
+ * NOTE that it only allocates PCI memory space devices (that are at least 1 KB).
+ * IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled.
*
*
*/
@@ -344,7 +344,7 @@ void pci_allocate_resources(void) {
res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6);
for (i = 0; i < 32*8*6; i++) {
- res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
+ res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
res[i]->size = 0;
res[i]->devfn = i;
}
@@ -361,7 +361,7 @@ void pci_allocate_resources(void) {
}
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
-
+
if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
@@ -381,7 +381,7 @@ void pci_allocate_resources(void) {
if (tmp == PCI_CLASS_BRIDGE_PCI) {
continue;
}
-
+
for (pos = 0; pos < 6; pos++) {
pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
@@ -403,7 +403,7 @@ void pci_allocate_resources(void) {
}
- /* Sort the resources in descending order */
+ /* Sort the resources in descending order */
swapped = 1;
while (swapped == 1) {
swapped = 0;
@@ -427,32 +427,32 @@ void pci_allocate_resources(void) {
printk("Out of PCI memory space, all devices not configured.\n");
goto done;
}
-
+
dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7;
-
+
DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size;
/* Set latency timer to 64 */
- pci_read_config_dword(0, dev, fn, 0xC, &tmp);
+ pci_read_config_dword(0, dev, fn, 0xC, &tmp);
pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000);
- pci_mem_enable(0, dev, fn);
+ pci_mem_enable(0, dev, fn);
+
+ }
- }
-
done:
#ifdef PCI_INFO
printk("\nPCI devices found and configured:\n");
for (slot = 1; slot < PCI_MAX_DEVICES; slot++) {
-
- pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
-
+
+ pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
+
if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
@@ -461,15 +461,15 @@ done:
}
for (func = 0; func < numfuncs; func++) {
-
+
pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp);
- if (tmp & PCI_COMMAND_MEMORY) {
-
+ if (tmp & PCI_COMMAND_MEMORY) {
+
pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id);
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
-
+
printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) {
@@ -479,17 +479,17 @@ done:
printk("\tBAR %d: %x\n", pos, tmp);
}
-
+
}
printk("\n");
- }
+ }
}
}
printk("\n");
#endif
-
+
for (i = 0; i < 1536; i++) {
free(res[i]);
}
@@ -503,7 +503,7 @@ int init_pci(void)
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned char ucHeader;
unsigned char ucMaxSubordinate;
- unsigned int ulClass, ulDeviceID;
+ unsigned int ulClass, ulDeviceID;
DBG("Initializing PCI\n");
if ( init_grpci() ) {
diff --git a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
index e667779676..609c2b1d98 100644
--- a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
+++ b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
@@ -87,7 +87,7 @@ void Shm_Get_configuration(
extern rtems_configuration_table Configuration;
int i;
unsigned int tmp;
-
+
BSP_shm_cfgtbl.base = 0x40000000;
BSP_shm_cfgtbl.length = 0x00001000;
BSP_shm_cfgtbl.format = SHM_BIG;
@@ -108,7 +108,7 @@ void Shm_Get_configuration(
BSP_shm_cfgtbl.poll_intr = INTR_MODE;
BSP_shm_cfgtbl.Intr.address =
(vol_u32) &(LEON3_IrqCtrl_Regs->force[LEON3_Cpu_Index]);
- BSP_shm_cfgtbl.Intr.value = 1 << LEON3_MP_IRQ ;
+ BSP_shm_cfgtbl.Intr.value = 1 << LEON3_MP_IRQ ;
BSP_shm_cfgtbl.Intr.length = 4;
if (LEON3_Cpu_Index == 0) {
@@ -116,7 +116,7 @@ void Shm_Get_configuration(
for (i = 1;
i < (Configuration.User_multiprocessing_table)->maximum_nodes+1; i++)
tmp |= (1 << i);
- LEON3_IrqCtrl_Regs->mpstat = tmp;
+ LEON3_IrqCtrl_Regs->mpstat = tmp;
}
*shmcfg = &BSP_shm_cfgtbl;
diff --git a/c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c b/c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c
index f94cadb966..b915f746ef 100644
--- a/c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c
+++ b/c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c
@@ -45,10 +45,10 @@ asm(
".text\n"
".align 4\n"
"LEON3_Atomic_Swap:\n"
-" retl\n"
+" retl\n"
" swapa [%o1] 1, %o0\n"
-);
-
+);
+
void Shm_Lock(
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/bspidle.S b/c/src/lib/libbsp/sparc/leon3/startup/bspidle.S
index e25128c0f6..24be8c0cb0 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/bspidle.S
+++ b/c/src/lib/libbsp/sparc/leon3/startup/bspidle.S
@@ -15,9 +15,9 @@
*/
-
+
#include <rtems/asm.h>
-
+
/* LEON specific power-down function */
.align 4
@@ -26,6 +26,6 @@ SYM(bsp_idle_thread):
pwdloop: mov %g0, %asr19
ba pwdloop
nop
- retl
+ retl
nop
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c b/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
index f53c1f4abc..fd44df82cf 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
+++ b/c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
@@ -24,21 +24,21 @@
/*
* Tells us if data cache snooping is available
- */
+ */
int CPU_SPARC_HAS_SNOOPING;
/*
* set_snooping
- *
+ *
* Read the data cache configuration register to determine if
* bus snooping is available. This is needed for some drivers so
- * that they can select the most efficient copy routines.
+ * that they can select the most efficient copy routines.
*
*/
-static inline int set_snooping(void)
+static inline int set_snooping(void)
{
- int tmp;
+ int tmp;
asm(" lda [%1] 2, %0 "
: "=r"(tmp)
: "r"(0xC)
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/setvec.c b/c/src/lib/libbsp/sparc/leon3/startup/setvec.c
index b48b3e050d..c7b8af6616 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/setvec.c
+++ b/c/src/lib/libbsp/sparc/leon3/startup/setvec.c
@@ -21,10 +21,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */
if ( type )
rtems_interrupt_catch( handler, vector, &previous_isr );
- else
+ else
_CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
real_trap = SPARC_REAL_TRAP_NUMBER( vector );
if ( LEON_INT_TRAP( real_trap ) ) {
-
+
source = LEON_TRAP_SOURCE( real_trap );
LEON_Clear_interrupt( source );
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
index 3b0cab8e85..62d38d3f0c 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
@@ -1,11 +1,11 @@
/*
* LEON Spurious Trap Handler
*
- * This is just enough of a trap handler to let us know what
+ * This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
- * Developed as part of the port of RTEMS to the LEON implementation
- * of the SPARC by On-Line Applications Research Corporation (OAR)
+ * Developed as part of the port of RTEMS to the LEON implementation
+ * of the SPARC by On-Line Applications Research Corporation (OAR)
* under contract to the European Space Agency (ESA).
*
* COPYRIGHT (c) 1995. European Space Agency.
@@ -46,34 +46,34 @@ rtems_isr bsp_spurious_handler(
* First the ones defined by the basic architecture
*/
- case 0x00:
+ case 0x00:
printk( "reset\n" );
break;
- case 0x01:
+ case 0x01:
printk( "instruction access exception\n" );
break;
- case 0x02:
+ case 0x02:
printk( "illegal instruction\n" );
break;
- case 0x03:
+ case 0x03:
printk( "privileged instruction\n" );
break;
- case 0x04:
+ case 0x04:
printk( "fp disabled\n" );
break;
- case 0x07:
+ case 0x07:
printk( "memory address not aligned\n" );
break;
- case 0x08:
+ case 0x08:
printk( "fp exception\n" );
break;
- case 0x09:
+ case 0x09:
printk( "Unexpected trap (0x%2d) at address XXX\n",
real_trap
/* XXX FIXME isf->tpc */
);
break;
- case 0x0A:
+ case 0x0A:
printk( "tag overflow\n" );
break;
@@ -150,7 +150,7 @@ void bsp_spurious_initialize()
*/
if (( trap == 5 || trap == 6 ) ||
- (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
+ (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
diff --git a/c/src/lib/libbsp/sparc/leon3/timer/timer.c b/c/src/lib/libbsp/sparc/leon3/timer/timer.c
index 03d7536db0..47de8339dc 100644
--- a/c/src/lib/libbsp/sparc/leon3/timer/timer.c
+++ b/c/src/lib/libbsp/sparc/leon3/timer/timer.c
@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE.
*
* Ported to LEON implementation of the SPARC by On-Line Applications
- * Research Corporation (OAR) under contract to the European Space
+ * Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
- * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
+ * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*
* $Id$
@@ -26,7 +26,7 @@
#define LEON3_TIMER_INDEX \
((rtems_configuration_get_user_multiprocessing_table()) ? \
(rtems_configuration_get_user_multiprocessing_table()->node) - 1 : 1)
-#else
+#else
#define LEON3_TIMER_INDEX 0
#endif
@@ -63,12 +63,12 @@ int benchmark_timer_read(void)
if (LEON3_Timer_Regs) {
total = LEON3_Timer_Regs->timer[LEON3_TIMER_INDEX].value;
-
+
total = 0xffffff - total;
-
+
if ( benchmark_timer_find_average_overhead == true )
return total; /* in one microsecond units */
-
+
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
diff --git a/c/src/lib/libbsp/sparc/shared/1553/b1553brm.c b/c/src/lib/libbsp/sparc/shared/1553/b1553brm.c
index cc9988be32..5eac447450 100644
--- a/c/src/lib/libbsp/sparc/shared/1553/b1553brm.c
+++ b/c/src/lib/libbsp/sparc/shared/1553/b1553brm.c
@@ -1,5 +1,5 @@
/*
- * BRM driver
+ * BRM driver
*
* COPYRIGHT (c) 2006.
* Gaisler Research.
@@ -21,7 +21,7 @@
#endif
/* default name to /dev/brm */
-#if !defined(B1553BRM_DEVNAME) || !defined(B1553BRM_DEVNAME_NO)
+#if !defined(B1553BRM_DEVNAME) || !defined(B1553BRM_DEVNAME_NO)
#undef B1553BRM_DEVNAME
#undef B1553BRM_DEVNAME_NO
#define B1553BRM_DEVNAME "/dev/brm0"
@@ -68,7 +68,7 @@
/* EVENT_QUEUE_SIZE sets the size of the event queue
*/
-#define EVENT_QUEUE_SIZE 1024
+#define EVENT_QUEUE_SIZE 1024
#define INDEX(x) ( x&(EVENT_QUEUE_SIZE-1) )
@@ -76,13 +76,13 @@
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
-#define DBG(x...)
+#define DBG(x...)
#endif
#ifdef FUNCDEBUG
#define FUNCDBG(x...) printk(x)
#else
-#define FUNCDBG(x...)
+#define FUNCDBG(x...)
#endif
#define READ_REG(address) _BRM_REG_READ16((unsigned int)address)
@@ -132,7 +132,7 @@ struct irq_log_list {
volatile unsigned short iaw;
};
-typedef struct {
+typedef struct {
unsigned int memarea_base;
struct brm_reg *regs;
@@ -140,7 +140,7 @@ typedef struct {
/* BRM descriptors */
struct desc_table {
- volatile unsigned short ctrl;
+ volatile unsigned short ctrl;
volatile unsigned short top;
volatile unsigned short cur;
volatile unsigned short bot;
@@ -160,7 +160,7 @@ typedef struct {
unsigned short ba; /* branch address */
unsigned short timer; /* timer value */
} descs[128]; /* 2k (1024 half words) */
-
+
/* message data */
struct {
unsigned short data[32]; /* 1 message's data */
@@ -191,7 +191,7 @@ typedef struct {
struct desc_table rxmodes[32];
/* TX mode code descriptors */
struct desc_table txmodes[32];
-
+
/* RX Sub Address messages */
struct circ_buf rxsuba_msgs[32];
/* TX Sub Address messages */
@@ -200,11 +200,11 @@ typedef struct {
struct circ_buf rxmode_msgs[32];
/* RX Mode Code messages */
struct circ_buf txmode_msgs[32];
-
-
+
+
/* offset to last 64bytes of 128k: tot-used-needed */
unsigned short unused[(64*1024-(4*32*4+4*32*9*34))-16*2];
-
+
/* interrupt log at 64 bytes from end */
struct irq_log_list irq_logs[16];
} *rtmem;
@@ -224,7 +224,7 @@ typedef struct {
struct desc_table rxmodes[32];
/* TX mode code descriptors */
struct desc_table txmodes[32];
-
+
/* RX Sub Address messages */
struct circ_buf_2 rxsuba_msgs[32];
/* TX Sub Address messages */
@@ -233,11 +233,11 @@ typedef struct {
struct circ_buf_2 rxmode_msgs[32];
/* RX Mode Code messages */
struct circ_buf_1 txmode_msgs[32];
-
-
+
+
/* offset to last 64bytes of 16k: tot-used-needed */
unsigned short unused[8*1024 -(4*32*4 +3*32*2*34 +1*32*1*34) -16*2];
-
+
/* interrupt log at 64 bytes from end */
struct irq_log_list irq_logs[16];
} *rtmem;
@@ -266,11 +266,11 @@ typedef struct {
int minor;
int irqno;
unsigned int mode;
-#ifdef DEBUG
+#ifdef DEBUG
unsigned int log[EVENT_QUEUE_SIZE*4];
unsigned int log_i;
#endif
-
+
rtems_id event_id; /* event that may be signalled upon errors, needs to be set through ioctl command BRM_SET_EVENTID */
unsigned int status;
int bc_list_fail;
@@ -298,7 +298,7 @@ static int odd_parity(unsigned int data) {
{
i++;
data &= (data - 1);
- }
+ }
return !(i&1);
}
@@ -346,25 +346,25 @@ int B1553BRM_PREFIX(_register)(amba_confarea_type *bus, unsigned int clksel, uns
rtems_device_major_number m;
FUNCDBG("brm_register:\n\r");
-
+
/* save amba bus pointer */
amba_bus = bus;
if ( !bus ){
printk("brm_register: bus is NULL\n\r");
return 1;
}
-
+
#ifdef B1553BRM_LOCAL_MEM
allbrm_memarea = B1553BRM_LOCAL_MEM_ADR;
#else
allbrm_memarea = 0;
#endif
-
+
/* Save clksel, clkdiv and brm_freq for later use */
allbrm_cfg_clksel = clksel & CLKSEL_MASK;
allbrm_cfg_clkdiv = clkdiv & CLKDIV_MASK;
allbrm_cfg_freq = brm_freq & BRM_FREQ_MASK;
-
+
if ((r = rtems_io_register_driver(0, &brm_driver, &m)) == RTEMS_SUCCESSFUL) {
DBG("BRM: driver successfully registered, major: %d\n",m);
@@ -404,12 +404,12 @@ static rtems_device_driver rt_init(brm_priv *brm) {
if ( brm->rt_event )
free(brm->rt_event);
-
+
brm->bcmem = NULL;
brm->rtmem = (void *)brm->mem;
brm->rt_event = (struct rt_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct rt_msg));
-
+
if (brm->rt_event == NULL) {
DBG("BRM driver failed to allocated memory.");
return RTEMS_NO_MEMORY;
@@ -426,7 +426,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
-
+
clr_int_logs(brm->irq_log);
/* Legalize all commands */
@@ -434,19 +434,19 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->regs->rt_cmd_leg[i] = 0;
}
- /* Init descriptor table
- *
+ /* Init descriptor table
+ *
* Each circular buffer has room for 8 messages with up to 34 (32 data + miw + time) words (16b) in each.
* The buffers must separated by 34 words.
*/
-
+
/* RX Sub-address 0 - 31 */
for (i = 0; i < 32; i++) {
brm->rtmem->rxsubs[i].ctrl = 0x00E0; /* Interrupt: INTX, IWA, and IBRD */
brm->rtmem->rxsubs[i].top = OFS(brm->rtmem->rxsuba_msgs[i]); /* Top address */
brm->rtmem->rxsubs[i].cur = OFS(brm->rtmem->rxsuba_msgs[i]); /* Current address */
- brm->rtmem->rxsubs[i].bot = OFS(brm->rtmem->rxsuba_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
+ brm->rtmem->rxsubs[i].bot = OFS(brm->rtmem->rxsuba_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i] = OFS(brm->rtmem->rxsuba_msgs[i]);
}
/* TX Sub-address 0 - 31 */
@@ -465,7 +465,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->rtmem->rxmodes[i].cur = OFS(brm->rtmem->rxmode_msgs[i]); /* Current address */
brm->rtmem->rxmodes[i].bot = OFS(brm->rtmem->rxmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i+64] = OFS(brm->rtmem->rxmode_msgs[i]);
- }
+ }
/* TX mode code 0 - 31 */
for (i = 0; i < 32; i++) {
brm->rtmem->txmodes[i].ctrl = 0x0060; /* Interrupt: IWA and IBRD */
@@ -474,7 +474,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->rtmem->txmodes[i].bot = OFS(brm->rtmem->txmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i+96] = OFS(brm->rtmem->txmode_msgs[i]);
}
-
+
brm->mode = BRM_MODE_RT;
return RTEMS_SUCCESSFUL;
@@ -489,14 +489,14 @@ static rtems_device_driver bc_init(brm_priv *brm){
if ( brm->rt_event )
free(brm->rt_event);
brm->rt_event = NULL;
-
+
brm->bcmem = (void *)brm->mem;
brm->rtmem = NULL;
brm->irq_log = (struct irq_log_list *)&brm->bcmem->irq_logs[0];
-
+
brm->head = brm->tail = 0;
brm->rx_blocking = brm->tx_blocking = 1;
-
+
brm->regs->ctrl = 0x0006; /* ping pong enable and enable interrupt log */
brm->regs->oper = 0x0800; /* configure as BC */
brm->regs->imask = BRM_EOL_IRQ|BRM_BC_ILLCMD_IRQ|BRM_ILLOP_IRQ|BRM_DMAF_IRQ|BRM_WRAPF_IRQ|BRM_MERR_IRQ;
@@ -507,11 +507,11 @@ static rtems_device_driver bc_init(brm_priv *brm){
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
-
+
clr_int_logs(brm->irq_log);
-
+
brm->mode = BRM_MODE_BC;
-
+
return RTEMS_SUCCESSFUL;
}
@@ -527,12 +527,12 @@ static rtems_device_driver bm_init(brm_priv *brm) {
if ( brm->bm_event )
free(brm->bm_event);
-
+
brm->bcmem = NULL;
brm->rtmem = NULL;
-
+
brm->bm_event = (struct bm_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct bm_msg));
-
+
if (brm->bm_event == NULL) {
DBG("BRM driver failed to allocated memory.");
return RTEMS_NO_MEMORY;
@@ -553,11 +553,11 @@ static rtems_device_driver bm_init(brm_priv *brm) {
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
-
+
clr_int_logs(brm->irq_log);
-
+
brm->mode = BRM_MODE_BM;
-
+
return RTEMS_SUCCESSFUL;
}
@@ -570,12 +570,12 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
brm_priv *brm;
amba_ahb_device ambadev;
char *mem;
-
+
FUNCDBG("brm_initialize\n");
brm_cores = 0;
strcpy(fs_name,B1553BRM_DEVNAME);
-
+
/* Find all BRM devices */
dev_cnt = amba_get_number_ahbslv_devices(amba_bus,VENDOR_GAISLER,GAISLER_BRM);
if ( dev_cnt < 1 ){
@@ -583,16 +583,16 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
printk("BRM: Failed to find any BRM cores\n\r");
return -1;
}
-
+
/* allocate & zero memory for the brm devices */
brms = (brm_priv *)malloc(sizeof(*brms)*dev_cnt);
if ( !brms ){
printk("BRM: Failed to allocate SW memory\n\r");
return -1;
}
- memset(brms,0,sizeof(*brms)*dev_cnt);
-
- /* Allocate memory for all device's descriptors,
+ memset(brms,0,sizeof(*brms)*dev_cnt);
+
+ /* Allocate memory for all device's descriptors,
* they must be aligned to a XXX byte boundary.
*/
#define BRM_DESCS_PER_CTRL 128
@@ -606,7 +606,7 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
printk("BRM: Failed to allocate HW memory\n\r");
return -1;
}
-
+
/* align memory to 128k boundary */
mem = (char *)(((unsigned int)mem+0x1ffff) & ~0x1ffff);
}
@@ -617,34 +617,34 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* initialize each brm device, one at a time */
for(minor=0; minor<dev_cnt; minor++){
brm = &brms[minor];
-
+
/* Get AMBA AHB device info from Plug&Play */
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_BRM,&ambadev,minor);
-
+
/* Copy Basic HW info */
brm->regs = (void *)ambadev.start[0];
brm->irqno = ambadev.irq;
brm->minor = minor;
brm->irq = 0;
#ifdef DEBUG
- brm->log_i = 0;
+ brm->log_i = 0;
memset(brm->log,0,sizeof(brm->log));
#endif
-
+
/* Set unique name */
B1553BRM_DEVNAME_NO(fs_name,minor);
-
+
DBG("Registering BRM core at [0x%x] irq %d, minor %d as %s\n",brm->regs,brm->irqno,minor,fs_name);
-
+
/* Bind filesystem name to device number (minor) */
status = rtems_io_register_name(fs_name, major, minor);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
-
+
/* RX Semaphore created with count = 0 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'R', '0'+minor),
0,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&brm->rx_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create rx semaphore\n");
@@ -654,7 +654,7 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* TX Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'T', '0'+minor),
1,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&brm->tx_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create tx semaphore\n");
@@ -664,69 +664,69 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* Device Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'D', '0'+minor),
1,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&brm->dev_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create device semaphore\n");
return RTEMS_INTERNAL_ERROR;
}
-
+
/* Set base address of all descriptors */
brm->memarea_base = (unsigned int)&mem[(128*1024) * minor];
brm->desc = (struct desc_table *) brm->memarea_base;
brm->mem = (volatile unsigned short *) brm->memarea_base;
brm->irq_log = (struct irq_log_list *)(brm->memarea_base + (0xFFE0<<1)); /* last 64byte */
-
+
brm->bm_event = NULL;
brm->rt_event = NULL;
-
+
/* Sel clock so that we can write to BRM's registers */
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5);
/* Reset BRM core */
brm->regs->w_ctrl = 1<<10 | READ_REG(&brm->regs->w_ctrl);
-
+
/* Register interrupt handler */
B1553BRM_REG_INT(B1553BRM_PREFIX(_interrupt_handler), brm->irqno, brm);
-
+
rt_init(brm);
-
+
DBG("BRM: LOG: 0x%lx, 0x%lx\n\r",brm->log,brm);
}
-
+
/* save number of BRM cores found */
brm_cores = dev_cnt;
-
+
DBG("BRM initialisation done.\n");
-
+
return RTEMS_SUCCESSFUL;
}
static rtems_device_driver brm_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) {
brm_priv *brm;
-
+
FUNCDBG("brm_open\n");
if (minor >= brm_cores) {
DBG("Wrong minor %d\n", minor);
return RTEMS_UNSATISFIED; /* ENODEV */
}
-
+
brm = &brms[minor];
-
+
if (rtems_semaphore_obtain(brm->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) {
DBG("brm_open: resource in use\n");
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
}
-
+
/* Set defaults */
brm->event_id = 0;
-
+
start_operation(brm);
-
+
return RTEMS_SUCCESSFUL;
}
-
+
static rtems_device_driver brm_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
brm_priv *brm = &brms[minor];
@@ -737,7 +737,7 @@ static rtems_device_driver brm_close(rtems_device_major_number major, rtems_devi
return RTEMS_SUCCESSFUL;
}
-
+
static int get_rt_messages(brm_priv *brm, void *buf, unsigned int msg_count) {
struct rt_msg *dest = (struct rt_msg *) buf;
@@ -784,13 +784,13 @@ static rtems_device_driver brm_read(rtems_device_major_number major, rtems_devic
int count = 0;
brm_priv *brm = &brms[minor];
int (*get_messages)(brm_priv *brm, void *buf, unsigned int count);
-
+
if ( ! (brm->mode & (BRM_MODE_RT | BRM_MODE_BM)) ){
return RTEMS_INVALID_NAME;
}
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
-
+
if ( ((READ_REG(&brm->regs->oper)>>8) & 3) == 1 ) { /* RT */
get_messages = get_rt_messages;
}
@@ -815,7 +815,7 @@ static rtems_device_driver brm_read(rtems_device_major_number major, rtems_devic
rw_args->bytes_moved = count;
return RTEMS_SUCCESSFUL;
-
+
}
@@ -825,16 +825,16 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
struct rt_msg *source;
unsigned int count=0, current, next, descriptor, wc, suba;
brm_priv *brm = &brms[minor];
-
+
if ( ! (brm->mode & BRM_MODE_RT) ){
return RTEMS_INVALID_NAME;
}
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
source = (struct rt_msg *) rw_args->buffer;
FUNCDBG("brm_write [%i,%i]: buf: 0x%x len: %i\n",major, minor, (unsigned int)rw_args->buffer,rw_args->count);
-
+
do {
descriptor = source[count].desc & 0x7F;
@@ -846,14 +846,14 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
if (descriptor < 32 || descriptor >= 64)
return RTEMS_INVALID_NAME;
- current = brm->desc[descriptor].cur;
+ current = brm->desc[descriptor].cur;
next = brm->written[suba] + 2 + wc;
if (brm->written[suba] < current) {
-
+
if (next > current) {
- /* No room in transmission buffer */
+ /* No room in transmission buffer */
if (brm->tx_blocking && count == 0) {
rtems_semaphore_obtain(brm->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
@@ -862,7 +862,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
/* return the number of messages sent so far */
break;
}
- else {
+ else {
/* Translates to posix EBUSY */
return RTEMS_RESOURCE_IN_USE;
}
@@ -870,7 +870,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
}
memcpy((void *)&brm->mem[brm->written[suba]], &source[count], (2+wc)*2);
-
+
count++;
if (next >= brm->desc[descriptor].bot) {
@@ -879,8 +879,8 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
brm->written[suba] = next;
} while (count < rw_args->count);
-
- rw_args->bytes_moved = count;
+
+ rw_args->bytes_moved = count;
if (count >= 0) {
return RTEMS_SUCCESSFUL;
@@ -890,7 +890,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
static rtems_device_driver brm_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
-
+
unsigned int i=0;
unsigned short ctrl, oper, cw1, cw2;
rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t *) arg;
@@ -899,9 +899,9 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm_priv *brm = &brms[minor];
rtems_device_driver ret;
int len;
-
+
FUNCDBG("brm_control[%d]: [%i,%i]\n",minor,major, minor);
-
+
if (!ioarg) {
DBG("brm_control: invalid argument\n");
return RTEMS_INVALID_NAME;
@@ -917,17 +917,17 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
if (data[0] == 0) {
ret = bc_init(brm);
}
- else if (data[0] == 1) {
- ret = rt_init(brm);
- }
- else if (data[0] == 2) {
- ret = bm_init(brm);
+ else if (data[0] == 1) {
+ ret = rt_init(brm);
+ }
+ else if (data[0] == 2) {
+ ret = bm_init(brm);
}else
ret = RTEMS_INVALID_NAME;
if ( ret != RTEMS_SUCCESSFUL)
return ret;
-
+
if ( brm->mode & (BRM_MODE_RT | BRM_MODE_BM ) )
start_operation(brm);
break;
@@ -950,7 +950,7 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
start_operation(brm);
break;
- case BRM_SET_RT_ADDR:
+ case BRM_SET_RT_ADDR:
stop_operation(brm);
oper = READ_REG(&brm->regs->oper);
oper &= 0x03FF; /* Clear bit 15-10 ... */
@@ -959,8 +959,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->regs->oper = oper;
start_operation(brm);
break;
-
- case BRM_SET_STD:
+
+ case BRM_SET_STD:
stop_operation(brm);
ctrl = READ_REG(&brm->regs->ctrl);
ctrl &= 0xFF7F; /* Clear bit 7 ... */
@@ -979,12 +979,12 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
break;
case BRM_TX_BLOCK:
- brm->tx_blocking = data[0];
+ brm->tx_blocking = data[0];
break;
- case BRM_RX_BLOCK:
- brm->rx_blocking = data[0];
- break;
+ case BRM_RX_BLOCK:
+ brm->rx_blocking = data[0];
+ break;
case BRM_DO_LIST:
@@ -1029,7 +1029,7 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->bcmem->descs[i].cw1 = cw1;
brm->bcmem->descs[i].cw2 = cw2;
/* data pointer:
- * (&brm->bcmem->msg_data[i].data[0] & 0x1ffff) / 2
+ * (&brm->bcmem->msg_data[i].data[0] & 0x1ffff) / 2
*/
brm->bcmem->descs[i].dptr = 1024+i*32; /* data pointer */
brm->bcmem->descs[i].tsw[0] = 0;
@@ -1038,27 +1038,27 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->bcmem->descs[i].timer = 0;
memcpy((void *)&brm->bcmem->msg_data[i].data[0], &cmd_list[i].data[0], cmd_list[i].wc*2);
-
+
i++;
}
brm->bcmem->descs[i].ctrl = 0; /* end of list */
- start_operation(brm);
+ start_operation(brm);
- break;
+ break;
case BRM_LIST_DONE:
if ( brm->mode != BRM_MODE_BC ){
return RTEMS_INVALID_NAME;
}
-
+
/* Check if we are bus controller */
if ( ((READ_REG(&brm->regs->oper)>>8) & 3) != 0 ) {
return RTEMS_INVALID_NAME;
}
-
+
if (is_executing(brm)) {
data[0] = 0;
@@ -1071,8 +1071,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
}else{
return RTEMS_RESOURCE_IN_USE;
}
-
-
+
+
}
else {
data[0] = 1; /* done */
@@ -1083,8 +1083,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
while ( (brm->cur_list[i].ctrl & BC_EOL) == 0) {
if (READ_DMA(&brm->bcmem->descs[i].ctrl) & 1) {
- brm->cur_list[i].ctrl |= 0x8000; /* Set BAME */
- }
+ brm->cur_list[i].ctrl |= 0x8000; /* Set BAME */
+ }
if (brm->cur_list[i].ctrl & BC_TR) {
/* RT Transmit command, copy received data */
len = brm->cur_list[i].wc;
@@ -1103,15 +1103,15 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
case BRM_CLR_STATUS:
brm->status = 0;
break;
-
+
case BRM_GET_STATUS: /* copy status */
if ( !ioarg->buffer )
return RTEMS_INVALID_NAME;
-
+
*(unsigned int *)ioarg->buffer = brm->status;
break;
-
+
case BRM_SET_EVENTID:
brm->event_id = (rtems_id)ioarg->buffer;
break;
@@ -1142,10 +1142,10 @@ static void brm_interrupt(brm_priv *brm) {
int signal_event=0;
unsigned int event_status=0;
#define SET_ERROR_DESCRIPTOR(descriptor) (event_status = (event_status & 0x0000ffff) | descriptor<<16)
-
+
while( (iiw=READ_REG(&brm->irq_log[brm->irq].iiw)) != 0xffff ){
iaw=READ_REG(&brm->irq_log[brm->irq].iaw);
-
+
/* indicate that the interrupt log entry has been processed */
brm->irq_log[brm->irq].iiw = 0xffff;
@@ -1153,17 +1153,17 @@ static void brm_interrupt(brm_priv *brm) {
descriptor = iaw >> 2;
pending = iiw;
brm->irq = (brm->irq + 1) % 16;
-
+
/* Clear the log so that we */
-
-
- /* Subaddress accessed irq (RT only)
+
+
+ /* Subaddress accessed irq (RT only)
*
* Can be either a receive or transmit command
* as well as a mode code.
*/
if (pending & BRM_SUBAD_IRQ) {
-
+
/* Pointer to next free message in circular buffer */
current = READ_DMA(&brm->desc[descriptor].cur);
@@ -1177,29 +1177,29 @@ static void brm_interrupt(brm_priv *brm) {
if (descriptor < 32) {
wc = wc ? wc : 32;
}
- /* Data transmitted */
+ /* Data transmitted */
else if (descriptor < 64) {
- wc = wc ? wc : 32;
+ wc = wc ? wc : 32;
rtems_semaphore_release(brm->tx_sem);
}
/* RX Mode code */
else if (descriptor < 96) {
wc = (wc>>4);
- }
+ }
/* TX Mode code */
else if (descriptor < 128) {
wc = (wc>>4);
}
-#ifdef DEBUG
- brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = (descriptor << 16) | wc;
+#ifdef DEBUG
+ brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = (descriptor << 16) | wc;
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = current;
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = msgadr;
#endif
/* If there is room in the event queue, copy the event there */
if (brm->head - brm->tail != EVENT_QUEUE_SIZE) {
-
+
/* Copy to event queue */
brm->rt_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[msgadr]);
brm->rt_event[INDEX(brm->head)].time = READ_DMA(&brm->mem[msgadr+1]);
@@ -1229,12 +1229,12 @@ static void brm_interrupt(brm_priv *brm) {
/* Wake any blocked rx thread */
rtems_semaphore_release(brm->rx_sem);
-
+
}
-
+
}
- if (pending & BRM_EOL_IRQ) {
+ if (pending & BRM_EOL_IRQ) {
rtems_semaphore_release(brm->tx_sem);
}
@@ -1246,17 +1246,17 @@ static void brm_interrupt(brm_priv *brm) {
}
/* Monitor irq */
- if (pending & BRM_MBC_IRQ) {
-
+ if (pending & BRM_MBC_IRQ) {
+
stop_operation(brm);
brm->regs->mbc = 1;
start_operation(brm);
-
+
/* If there is room in the event queue, copy the event there */
if (brm->head - brm->tail != EVENT_QUEUE_SIZE) {
-
+
/* Copy to event queue */
-
+
brm->bm_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[0]);
brm->bm_event[INDEX(brm->head)].cw1 = READ_DMA(&brm->mem[1]);
brm->bm_event[INDEX(brm->head)].cw2 = READ_DMA(&brm->mem[2]);
@@ -1276,7 +1276,7 @@ static void brm_interrupt(brm_priv *brm) {
}
/* memcpy((void *)brm->bm_event[INDEX(brm->head)].data, &brm->mem[0x100], 32);*/
-#ifdef DEBUG
+#ifdef DEBUG
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_REG(&brm->regs->mbc);
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[0]);
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[1]);
@@ -1284,19 +1284,19 @@ static void brm_interrupt(brm_priv *brm) {
#endif
brm->head++;
-
+
}
else {
/* Indicate overrun */
brm->rt_event[INDEX(brm->head)].miw |= 0x8000;
}
-
+
/* Wake any blocking thread */
rtems_semaphore_release(brm->rx_sem);
}
-
- /* The reset of the interrupts
+
+ /* The reset of the interrupts
* cause a event to be signalled
* so that user can handle error.
*/
@@ -1307,59 +1307,59 @@ static void brm_interrupt(brm_priv *brm) {
SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1;
}
-
+
if ( pending & BRM_ILLOP_IRQ){
FUNCDBG("BRM: BRM_ILLOP_IRQ\n\r");
brm->bc_list_fail = 1;
rtems_semaphore_release(brm->tx_sem);
event_status |= BRM_ILLOP_IRQ;
- SET_ERROR_DESCRIPTOR(descriptor);
+ SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1;
}
-
+
if ( pending & BRM_MERR_IRQ){
FUNCDBG("BRM: BRM_MERR_IRQ\n\r");
event_status |= BRM_MERR_IRQ;
SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1;
}
- /* Clear Block Accessed Bit */
+ /* Clear Block Accessed Bit */
tmp = READ_REG(&brm->desc[descriptor].ctrl);
brm->desc[descriptor].ctrl = tmp & ~0x10;
-
+
} /* While */
-
+
/* clear interrupt flags & handle Hardware errors */
pending = READ_REG(&brm->regs->ipend);
-
+
if ( pending & BRM_DMAF_IRQ){
FUNCDBG("BRM: BRM_DMAF_IRQ\n\r");
event_status |= BRM_DMAF_IRQ;
signal_event=1;
}
-
+
if ( pending & BRM_WRAPF_IRQ){
FUNCDBG("BRM: BRM_WRAPF_IRQ\n\r");
event_status |= BRM_WRAPF_IRQ;
signal_event=1;
}
-
+
if ( pending & BRM_TAPF_IRQ){
FUNCDBG("BRM: BRM_TAPF_IRQ\n\r");
event_status |= BRM_TAPF_IRQ;
signal_event=1;
}
-
+
/* Copy current mask to status mask */
if ( event_status ){
if ( event_status & 0xffff0000 )
brm->status &= 0x0000ffff;
brm->status |= event_status;
}
-
+
/* signal event once */
if ( signal_event && (brm->event_id!=0) ){
rtems_event_send(brm->event_id, event_status);
}
-
+
}
diff --git a/c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c b/c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c
index 82e09e8abe..76c9f2e56a 100644
--- a/c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c
+++ b/c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c
@@ -21,7 +21,7 @@ unsigned int brmpci_memarea_address;
/* We have custom address tranlation for HW addresses */
#define B1553BRM_ADR_TO
-/* No custom MEMAREA=>CPU used since BRM Core work with offsets
+/* No custom MEMAREA=>CPU used since BRM Core work with offsets
* in it's descriptors.
*/
#undef B1553BRM_ADR_FROM
@@ -33,7 +33,7 @@ unsigned int brmpci_memarea_address;
/* Any non-static function will begin with */
#define B1553BRM_PREFIX(name) b1553brmpci##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler.
*/
#define B1553BRM_REG_INT(handler,irq,arg) \
@@ -82,16 +82,16 @@ static void b1553brmpci_interrupt_handler(int irq, void *arg);
*/
int b1553brm_pci_register(
- amba_confarea_type *bus,
- unsigned int clksel,
- unsigned int clkdiv,
+ amba_confarea_type *bus,
+ unsigned int clksel,
+ unsigned int clkdiv,
unsigned int brm_freq,
unsigned int memarea,
unsigned int hw_address
)
{
/* Setup configuration */
-
+
/* if zero malloc will be used */
brmpci_memarea_address = memarea;
@@ -100,14 +100,14 @@ int b1553brm_pci_register(
#ifdef B1553BRM_ADR_FROM
brmpci_cpu_address = memarea & 0xf0000000;
#endif
-
+
/* Register the driver */
return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
}
-/* Call this from PCI interrupt handler
+/* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
static void b1553brmpci_interrupt_handler(int irq, void *arg){
brm_interrupt(arg);
diff --git a/c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c b/c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c
index 45e619fb0d..10adb0aec5 100644
--- a/c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c
+++ b/c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c
@@ -21,7 +21,7 @@ unsigned int brmrasta_memarea_address;
/* We have custom address tranlation for HW addresses */
#define B1553BRM_ADR_TO
-/* No custom MEMAREA=>CPU used since BRM Core work with offsets
+/* No custom MEMAREA=>CPU used since BRM Core work with offsets
* in it's descriptors.
*/
#undef B1553BRM_ADR_FROM
@@ -33,7 +33,7 @@ unsigned int brmrasta_memarea_address;
/* Any non-static function will begin with */
#define B1553BRM_PREFIX(name) b1553brmrasta##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler.
*/
#define B1553BRM_REG_INT(handler,irq,arg) \
@@ -82,16 +82,16 @@ static void b1553brmrasta_interrupt_handler(int irq, void *arg);
*/
int b1553brm_rasta_register(
- amba_confarea_type *bus,
- unsigned int clksel,
- unsigned int clkdiv,
+ amba_confarea_type *bus,
+ unsigned int clksel,
+ unsigned int clkdiv,
unsigned int brm_freq,
unsigned int memarea,
unsigned int hw_address
)
{
/* Setup configuration */
-
+
/* if zero the malloc will be used */
brmrasta_memarea_address = memarea;
@@ -100,14 +100,14 @@ int b1553brm_rasta_register(
#ifdef B1553BRM_ADR_FROM
brmrasta_cpu_address = memarea & 0xf0000000;
#endif
-
+
/* Register the driver */
return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
}
-/* Call this from RASTA interrupt handler
+/* Call this from RASTA interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
static void b1553brmrasta_interrupt_handler(int irq, void *arg){
brm_interrupt(arg);
diff --git a/c/src/lib/libbsp/sparc/shared/amba/ambapp.c b/c/src/lib/libbsp/sparc/shared/amba/ambapp.c
index d030fcef1b..814ee8c28e 100644
--- a/c/src/lib/libbsp/sparc/shared/amba/ambapp.c
+++ b/c/src/lib/libbsp/sparc/shared/amba/ambapp.c
@@ -91,7 +91,7 @@ amba_scan (amba_confarea_type * amba_conf, unsigned int ioarea,
* Custom config 1 contain ioarea.
*/
custom = amba_ahb_get_custom(amba_conf->ahbslv,i,1);
-
+
if ( amba_ver(conf) && amba_conf->next ){
amba_conf->next->notroot = 1;
amba_scan(amba_conf->next,custom,mmaps);
@@ -122,7 +122,7 @@ amba_print_dev(int devno, unsigned int conf){
}
}
-void
+void
amba_apb_print_dev(int devno, unsigned int conf, unsigned int address){
int irq = amba_irq(conf);
if ( irq > 0 ){
@@ -139,14 +139,14 @@ amba_print_conf (amba_confarea_type * amba_conf)
int i,base=0;
unsigned int conf, iobar, address;
unsigned int apbmst;
-
+
/* print all ahb masters */
printk("--- AMBA AHB Masters ---\n");
for(i=0; i<amba_conf->ahbmst.devnr; i++){
conf = amba_get_confword(amba_conf->ahbmst, i, 0);
amba_print_dev(i,conf);
}
-
+
/* print all ahb slaves */
printk("--- AMBA AHB Slaves ---\n");
for(i=0; i<amba_conf->ahbslv.devnr; i++){
@@ -167,7 +167,7 @@ amba_print_conf (amba_confarea_type * amba_conf)
address = amba_iobar_start(amba_conf->apbslv.apbmst[i], iobar);
amba_apb_print_dev(i-base,conf,address);
}
-
+
}
/**** APB Slaves ****/
diff --git a/c/src/lib/libbsp/sparc/shared/bspgetworkarea.c b/c/src/lib/libbsp/sparc/shared/bspgetworkarea.c
index d4cd779267..a9fe1603a1 100644
--- a/c/src/lib/libbsp/sparc/shared/bspgetworkarea.c
+++ b/c/src/lib/libbsp/sparc/shared/bspgetworkarea.c
@@ -47,7 +47,7 @@ void bsp_get_work_area(
* you are allocating the Work Area in a new BSP.
*/
#ifdef BSP_GET_WORK_AREA_DEBUG
- {
+ {
void *sp = __builtin_frame_address(0);
void *end = *work_area_start + *work_area_size;
printk(
diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan.c b/c/src/lib/libbsp/sparc/shared/can/grcan.c
index 0eb08585be..c176490c68 100644
--- a/c/src/lib/libbsp/sparc/shared/can/grcan.c
+++ b/c/src/lib/libbsp/sparc/shared/can/grcan.c
@@ -1,5 +1,5 @@
/*
- * GRCAN driver
+ * GRCAN driver
*
* COPYRIGHT (c) 2007.
* Gaisler Research.
@@ -55,15 +55,15 @@
#endif
#ifndef IRQ_CLEAR_PENDING
- #define IRQ_CLEAR_PENDING(irqno)
+ #define IRQ_CLEAR_PENDING(irqno)
#endif
#ifndef IRQ_UNMASK
- #define IRQ_UNMASK(irqno)
+ #define IRQ_UNMASK(irqno)
#endif
#ifndef IRQ_MASK
- #define IRQ_MASK(irqno)
+ #define IRQ_MASK(irqno)
#endif
#ifndef GRCAN_PREFIX
@@ -116,53 +116,53 @@
#define BUFFER_ALIGNMENT_NEEDS 1024
#ifdef STATICALLY_ALLOCATED_TX_BUFFER
-static unsigned int tx_circbuf[GRCAN_MAX_CORES][TX_BUF_SIZE]
+static unsigned int tx_circbuf[GRCAN_MAX_CORES][TX_BUF_SIZE]
__attribute__ ((aligned(BUFFER_ALIGNMENT_NEEDS)));
#define STATIC_TX_BUF_SIZE TX_BUF_SIZE
#define STATIC_TX_BUF_ADDR(core) (&tx_circbuf[(core)][0])
#endif
#ifdef STATICALLY_ALLOCATED_RX_BUFFER
-static unsigned int rx_circbuf[GRCAN_MAX_CORES][RX_BUF_SIZE]
+static unsigned int rx_circbuf[GRCAN_MAX_CORES][RX_BUF_SIZE]
__attribute__ ((aligned(BUFFER_ALIGNMENT_NEEDS)));
#define STATIC_RX_BUF_SIZE RX_BUF_SIZE
#define STATIC_RX_BUF_ADDR(core) (&rx_circbuf[(core)][0])
#endif
-/*
+/*
* If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram).
* USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO.
*
* RASTA_PCI_BASE is the base address of the GRPCI AHB slave
- *
+ *
* GRCAN_BUF_SIZE must be set to the size (in bytes) of the GRCAN DMA buffers.
*
- * RX_QUEUE_SIZE defines the number of messages that fits in the RX message queue. On RX interrupts the messages in the DMA buffer
+ * RX_QUEUE_SIZE defines the number of messages that fits in the RX message queue. On RX interrupts the messages in the DMA buffer
* are copied into the message queue (using dma if the rx buf is not in the AT697 ram).
*/
/*#define USE_AT697_RAM 1 */
-#define USE_AT697_DMA 1
-#define RASTA_PCI_BASE 0xe0000000
-#define GRCAN_BUF_SIZE 4096
-#define RX_QUEUE_SIZE 1024
+#define USE_AT697_DMA 1
+#define RASTA_PCI_BASE 0xe0000000
+#define GRCAN_BUF_SIZE 4096
+#define RX_QUEUE_SIZE 1024
#define INDEX(x) ( x&(RX_QUEUE_SIZE-1) )
-/* pa(x)
+/* pa(x)
*
* x: address in AT697 address space
- *
+ *
* returns the address in the RASTA address space that can be used to access x with dma.
- *
+ *
*/
#ifdef USE_AT697_RAM
static inline unsigned int pa(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
+ return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
}
#else
static inline unsigned int pa(unsigned int addr) {
- return ((addr & 0x0fffffff) | 0x40000000);
+ return ((addr & 0x0fffffff) | 0x40000000);
}
#endif
@@ -188,7 +188,7 @@ struct grcan_priv {
unsigned int channel;
int flushing;
unsigned int corefreq_hz;
-
+
/* Circular DMA buffers */
void *_rx;
void *_tx;
@@ -200,13 +200,13 @@ struct grcan_priv {
int txblock, rxblock;
int txcomplete, rxcomplete;
int txerror, rxerror;
-
+
struct grcan_filter sfilter;
struct grcan_filter afilter;
int config_changed; /* 0=no changes, 1=changes ==> a Core reset is needed */
struct grcan_config config;
struct grcan_stats stats;
-
+
rtems_id rx_sem, tx_sem, txempty_sem, dev_sem;
};
@@ -238,9 +238,9 @@ static unsigned int grcan_hw_write_try(
int count);
static void grcan_hw_config(
- struct grcan_regs *regs,
+ struct grcan_regs *regs,
struct grcan_config *conf);
-
+
static void grcan_hw_accept(
struct grcan_regs *regs,
struct grcan_filter *afilter);
@@ -302,13 +302,13 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
{
unsigned int tmp;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
-
+
/* Check that memory has been allocated successfully */
if ( !pDev->tx || !pDev->rx )
return RTEMS_NO_MEMORY;
-
+
/* Configure FIFO configuration register
* and Setup timing
*/
@@ -320,37 +320,37 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
/* Setup receiver */
pDev->regs->rx0addr = MEMAREA_TO_HW((unsigned int)pDev->rx);
pDev->regs->rx0size = pDev->rxbuf_size;
-
+
/* Setup Transmitter */
pDev->regs->tx0addr = MEMAREA_TO_HW((unsigned int)pDev->tx);
pDev->regs->tx0size = pDev->txbuf_size;
-
+
/* Setup acceptance filters */
grcan_hw_accept(pDev->regs,&pDev->afilter);
-
+
/* Sync filters */
grcan_hw_sync(pDev->regs,&pDev->sfilter);
-
+
/* Clear status bits */
tmp = READ_REG(&pDev->regs->stat);
pDev->regs->stat = 0;
-
+
/* Setup IRQ handling */
-
- /* Clear all IRQs */
+
+ /* Clear all IRQs */
tmp = READ_REG(&pDev->regs->pir);
pDev->regs->picr = 0x1ffff;
-
+
/* unmask TxLoss|TxErrCntr|RxErrCntr|TxAHBErr|RxAHBErr|OR|OFF|PASS */
pDev->regs->imr = 0x1601f;
-
+
/* Enable routing of the IRQs */
IRQ_GLOBAL_DISABLE(oldLevel);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_TXSYNC);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_RXSYNC);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_IRQ);
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Reset some software data */
/*pDev->txerror = 0;
pDev->rxerror = 0;*/
@@ -358,11 +358,11 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
/* Enable receiver/transmitter */
pDev->regs->rx0ctrl = GRCAN_RXCTRL_ENABLE;
pDev->regs->tx0ctrl = GRCAN_TXCTRL_ENABLE;
-
+
/* Enable HurriCANe core */
pDev->regs->ctrl = GRCAN_CTRL_ENABLE;
-
- /* Leave transmitter disabled, it is enabled when
+
+ /* Leave transmitter disabled, it is enabled when
* trying to send something.
*/
return RTEMS_SUCCESSFUL;
@@ -371,19 +371,19 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
static void grcan_stop(struct grcan_priv *pDev)
{
FUNCDBG();
-
+
/* Mask all IRQs */
pDev->regs->imr = 0;
IRQ_MASK(pDev->irq+GRCAN_IRQ_TXSYNC);
IRQ_MASK(pDev->irq+GRCAN_IRQ_RXSYNC);
IRQ_MASK(pDev->irq+GRCAN_IRQ_IRQ);
-
+
/* Disable receiver & transmitter */
pDev->regs->rx0ctrl = 0;
pDev->regs->tx0ctrl = 0;
-
+
/* Reset semaphores to the initial state and wakeing
- * all threads waiting for an IRQ. The threads that
+ * all threads waiting for an IRQ. The threads that
* get woken up must check for RTEMS_UNSATISFIED in
* order to determine that they should return to
* user space with error status.
@@ -394,40 +394,40 @@ static void grcan_stop(struct grcan_priv *pDev)
}
static void grcan_hw_config(
- struct grcan_regs *regs,
+ struct grcan_regs *regs,
struct grcan_config *conf
)
{
unsigned int config=0;
-
+
/* Reset HurriCANe Core */
regs->ctrl = 0;
-
+
if ( conf->silent )
config |= GRCAN_CFG_SILENT;
-
+
if ( conf->abort )
config |= GRCAN_CFG_ABORT;
-
+
if ( conf->selection.selection )
config |= GRCAN_CFG_SELECTION;
-
+
if ( conf->selection.enable0 )
config |= GRCAN_CFG_ENABLE0;
-
+
if ( conf->selection.enable1 )
config |= GRCAN_CFG_ENABLE1;
-
+
/* Timing */
config |= (conf->timing.bpr<<GRCAN_CFG_BPR_BIT) & GRCAN_CFG_BPR;
config |= (conf->timing.rsj<<GRCAN_CFG_RSJ_BIT) & GRCAN_CFG_RSJ;
config |= (conf->timing.ps1<<GRCAN_CFG_PS1_BIT) & GRCAN_CFG_PS1;
config |= (conf->timing.ps2<<GRCAN_CFG_PS2_BIT) & GRCAN_CFG_PS2;
config |= (conf->timing.scaler<<GRCAN_CFG_SCALER_BIT) & GRCAN_CFG_SCALER;
-
+
/* Write configuration */
regs->conf = config;
-
+
/* Enable HurriCANe Core */
regs->ctrl = GRCAN_CTRL_ENABLE;
}
@@ -439,9 +439,9 @@ static void grcan_hw_accept(
{
/* Disable Sync mask totaly (if we change scode or smask
* in an unfortunate way we may trigger a sync match)
- */
+ */
regs->rx0mask = 0xffffffff;
-
+
/* Set Sync Filter in a controlled way */
regs->rx0code = afilter->code;
regs->rx0mask = afilter->mask;
@@ -454,9 +454,9 @@ static void grcan_hw_sync(
{
/* Disable Sync mask totaly (if we change scode or smask
* in an unfortunate way we may trigger a sync match)
- */
+ */
regs->smask = 0xffffffff;
-
+
/* Set Sync Filter in a controlled way */
regs->scode = sfilter->code;
regs->smask = sfilter->mask;
@@ -467,14 +467,14 @@ static unsigned int grcan_hw_rxavail(
unsigned int wp,
unsigned int size
)
-{
+{
if ( rp == wp ) {
- /* read pointer and write pointer is equal only
+ /* read pointer and write pointer is equal only
* when RX buffer is empty.
*/
return 0;
}
-
+
if ( wp > rp ) {
return (wp-rp)/GRCAN_MSG_SIZE;
}else{
@@ -489,21 +489,21 @@ static unsigned int grcan_hw_txspace(
)
{
unsigned int left;
-
+
if ( rp == wp ) {
- /* read pointer and write pointer is equal only
+ /* read pointer and write pointer is equal only
* when TX buffer is empty.
*/
return size/GRCAN_MSG_SIZE-WRAP_AROUND_TX_MSGS;
}
-
+
/* size - 4 - abs(read-write) */
if ( wp > rp ) {
left = size-(wp-rp);
}else{
left = rp-wp;
}
-
+
return left/GRCAN_MSG_SIZE-WRAP_AROUND_TX_MSGS;
}
@@ -535,7 +535,7 @@ static int grcan_calc_timing(
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
int sjw = 1;
-
+
/* Default to 90% */
if ( (sampl_pt < 50) || (sampl_pt>99) ){
sampl_pt = GRCAN_SAMPLING_POINT;
@@ -545,8 +545,8 @@ static int grcan_calc_timing(
/* invalid speed mode */
return -1;
}
-
- /* find best match, return -2 if no good reg
+
+ /* find best match, return -2 if no good reg
* combination is available for this frequency
*/
@@ -563,7 +563,7 @@ static int grcan_calc_timing(
tseg++)
{
brp = core_hz / ((1 + tseg / 2) * baud) + tseg % 2;
- if ((brp <= 0) ||
+ if ((brp <= 0) ||
( (brp > 256*1) && (brp <= 256*2) && (brp&0x1) ) ||
( (brp > 256*2) && (brp <= 256*4) && (brp&0x3) ) ||
( (brp > 256*4) && (brp <= 256*8) && (brp&0x7) ) ||
@@ -611,7 +611,7 @@ static int grcan_calc_timing(
tseg1 = MAX_TSEG1;
tseg2 = best_tseg - tseg1 - 2;
}
-
+
/* Get scaler and BRP from pseudo BRP */
if ( best_brp <= 256 ){
timing->scaler = best_brp;
@@ -626,7 +626,7 @@ static int grcan_calc_timing(
timing->scaler = ((best_brp+1)>>3) -1;
timing->bpr = 3;
}
-
+
timing->ps1 = tseg1+1;
timing->ps2 = tseg2;
timing->rsj = sjw;
@@ -637,7 +637,7 @@ static int grcan_calc_timing(
static unsigned int grcan_hw_read_try(
struct grcan_priv *pDev,
struct grcan_regs *regs,
- CANMsg *buffer,
+ CANMsg *buffer,
int max
)
{
@@ -645,14 +645,14 @@ static unsigned int grcan_hw_read_try(
CANMsg *dest;
struct grcan_msg *source,tmp;
unsigned int wp,rp,size,rxmax,addr,trunk_msg_cnt;
-
+
FUNCDBG();
-
+
wp = READ_REG(&regs->rx0wr);
rp = READ_REG(&regs->rx0rd);
-
+
/*
- * Due to hardware wrap around simplification write pointer will
+ * Due to hardware wrap around simplification write pointer will
* never reach the read pointer, at least a gap of 8 bytes.
* The only time they are equal is when the read pointer has
* reached the write pointer (empty buffer)
@@ -663,24 +663,24 @@ static unsigned int grcan_hw_read_try(
* Read as much as possible from DMA buffer
*/
size = READ_REG(&regs->rx0size);
-
+
/* Get number of bytes available in RX buffer */
trunk_msg_cnt = grcan_hw_rxavail(rp,wp,size);
-
- /* truncate size if user space buffer hasn't room for
+
+ /* truncate size if user space buffer hasn't room for
* all received chars.
*/
if ( trunk_msg_cnt > max )
trunk_msg_cnt = max;
-
+
/* Read until i is 0 */
i=trunk_msg_cnt;
-
+
addr = (unsigned int)pDev->rx;
source = (struct grcan_msg *)(addr + rp);
dest = buffer;
rxmax = addr + (size-GRCAN_MSG_SIZE);
-
+
/* Read as many can messages as possible */
while(i>0){
/* Read CAN message from DMA buffer */
@@ -697,14 +697,14 @@ static unsigned int grcan_hw_read_try(
dest->len = tmp.head[1] >> 28;
for(j=0; j<dest->len; j++)
dest->data[j] = READ_DMA_BYTE(&source->data[j]);
-
+
/* wrap around if neccessary */
source = ( (unsigned int)source >= rxmax ) ? (struct grcan_msg *)addr : source+1;
dest++; /* straight user buffer */
i--;
}
/* Increment Hardware READ pointer (mark read byte as read)
- * ! wait for registers to be safely re-configurable
+ * ! wait for registers to be safely re-configurable
*/
regs->rx0ctrl = 0; /* DISABLE RX CHANNEL */
i=0;
@@ -731,31 +731,31 @@ static unsigned int grcan_hw_write_try(
int space_left;
unsigned int tmp;
int i;
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
rp = READ_REG(&regs->tx0rd);
wp = READ_REG(&regs->tx0wr);
size = READ_REG(&regs->tx0size);
-
+
space_left = grcan_hw_txspace(rp,wp,size);
-
+
/* is circular fifo full? */
if ( space_left < 1 )
return 0;
-
+
/* Truncate size */
if ( space_left > count )
space_left = count;
ret = space_left;
-
+
addr = (unsigned int)pDev->tx;
-
+
dest = (struct grcan_msg *)(addr + wp);
source = (CANMsg *)buffer;
txmax = addr + (size-GRCAN_MSG_SIZE);
-
+
while ( space_left>0 ) {
/* Convert and write CAN message to DMA buffer */
if ( source->extended ){
@@ -773,9 +773,9 @@ static unsigned int grcan_hw_write_try(
dest = ((unsigned int)dest >= txmax) ? (struct grcan_msg *)addr : dest+1;
space_left--;
}
-
- /* Update write pointer
- * ! wait for registers to be safely re-configurable
+
+ /* Update write pointer
+ * ! wait for registers to be safely re-configurable
*/
regs->tx0ctrl = 0; /* DISABLE TX CHANNEL */
i=0;
@@ -796,19 +796,19 @@ static int grcan_wait_rxdata(
unsigned int irq_trunk, dataavail;
int wait;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
- /*** block until receive IRQ received
- * Set up a valid IRQ point so that an IRQ is received
+ /*** block until receive IRQ received
+ * Set up a valid IRQ point so that an IRQ is received
* when one or more messages are received
*/
IRQ_GLOBAL_DISABLE(oldLevel);
-
+
size = READ_REG(&pDev->regs->rx0size);
rp = READ_REG(&pDev->regs->rx0rd);
wp = READ_REG(&pDev->regs->rx0wr);
-
+
/**** Calculate IRQ Pointer ****/
irq = wp + min*GRCAN_MSG_SIZE;
/* wrap irq around */
@@ -816,18 +816,18 @@ static int grcan_wait_rxdata(
irq_trunk = irq-size;
}else
irq_trunk = irq;
-
+
/* init IRQ HW */
pDev->regs->rx0irq = irq_trunk;
-
+
/* Clear pending Rx IRQ */
pDev->regs->picr = GRCAN_RXIRQ_IRQ;
-
+
wp = READ_REG(&pDev->regs->rx0wr);
-
+
/* Calculate messages available */
dataavail = grcan_hw_rxavail(rp,wp,size);
-
+
if ( dataavail < min ){
/* Still empty, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_RXIRQ_IRQ;
@@ -837,20 +837,20 @@ static int grcan_wait_rxdata(
wait=0;
}
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Wait for IRQ to fire only if has been triggered */
if ( wait ){
if ( rtems_semaphore_obtain(pDev->rx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT) == RTEMS_UNSATISFIED )
return -1; /* Device driver has been closed or stopped, return with error status */
}
-
+
return 0;
}
/* Wait until min bytes available in TX circular buffer.
* The IRQ RxIrq is used to pin point the location of
- *
- * min must be at least WRAP_AROUND_TX_BYTES bytes less
+ *
+ * min must be at least WRAP_AROUND_TX_BYTES bytes less
* than max buffer for this algo to work.
*
*/
@@ -863,19 +863,19 @@ static int grcan_wait_txspace(
unsigned int irq, rp, wp, size, space_left;
unsigned int irq_trunk;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
IRQ_GLOBAL_DISABLE(oldLevel);
/*pDev->regs->tx0ctrl = GRCAN_TXCTRL_ENABLE;*/
-
+
size = READ_REG(&pDev->regs->tx0size);
- wp = READ_REG(&pDev->regs->tx0wr);
-
+ wp = READ_REG(&pDev->regs->tx0wr);
+
rp = READ_REG(&pDev->regs->tx0rd);
-
+
/**** Calculate IRQ Pointer ****/
irq = rp + min*GRCAN_MSG_SIZE;
/* wrap irq around */
@@ -883,24 +883,24 @@ static int grcan_wait_txspace(
irq_trunk = irq - size;
}else
irq_trunk = irq;
-
+
/* trigger HW to do a IRQ when enough room in buffer */
pDev->regs->tx0irq = irq_trunk;
-
+
/* Clear pending Tx IRQ */
pDev->regs->picr = GRCAN_TXIRQ_IRQ;
-
- /* One problem, if HW already gone past IRQ place the IRQ will
+
+ /* One problem, if HW already gone past IRQ place the IRQ will
* never be received resulting in a thread hang. We check if so
* before proceeding.
- *
- * has the HW already gone past the IRQ generation place?
+ *
+ * has the HW already gone past the IRQ generation place?
* == does min fit info tx buffer?
*/
rp = READ_REG(&pDev->regs->tx0rd);
-
+
space_left = grcan_hw_txspace(rp,wp,size);
-
+
if ( space_left < min ){
/* Still too full, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_TXIRQ_IRQ;
@@ -910,17 +910,17 @@ static int grcan_wait_txspace(
wait=0;
}
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Wait for IRQ to fire only if it has been triggered */
if ( wait ){
if ( rtems_semaphore_obtain(pDev->tx_sem, RTEMS_WAIT, 100) ==
RTEMS_UNSATISFIED ){
- /* Device driver has flushed us, this may be due to another thread has
+ /* Device driver has flushed us, this may be due to another thread has
* closed the device, this is to avoid deadlock */
return -1;
}
}
-
+
/* At this point the TxIRQ has been masked, we ned not to mask it */
return 0;
}
@@ -931,10 +931,10 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
unsigned int rp, wp;
IRQ_GLOBAL_PREPARE(oldLevel);
FUNCDBG();
-
+
/* loop until all data in circular buffer has been read by hw.
* (write pointer != read pointer )
- *
+ *
* Hardware doesn't update write pointer - we do
*/
while ( (wp=READ_REG(&pDev->regs->tx0wr)) != (rp=READ_REG(&pDev->regs->tx0rd)) ) {
@@ -942,7 +942,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
IRQ_GLOBAL_DISABLE(oldLevel);
/* Clear pending TXEmpty IRQ */
pDev->regs->picr = GRCAN_TXEMPTY_IRQ;
-
+
if ( wp != READ_REG(&pDev->regs->tx0rd) ) {
/* Still not empty, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_TXEMPTY_IRQ;
@@ -954,7 +954,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
IRQ_GLOBAL_ENABLE(oldLevel);
if ( !wait )
break;
-
+
/* Wait for IRQ to wake us */
if ( rtems_semaphore_obtain(pDev->txempty_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT) ==
RTEMS_UNSATISFIED ) {
@@ -967,7 +967,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
{
FUNCDBG();
-
+
if ( tx ) {
#ifdef STATIC_TX_BUF_ADDR
pDev->_tx = STATIC_TX_BUF_ADDR(pDev->minor);
@@ -984,11 +984,11 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
/* Align TX buffer */
pDev->tx = (struct grcan_msg *)
- (((unsigned int)pDev->_tx + (BUFFER_ALIGNMENT_NEEDS-1)) &
+ (((unsigned int)pDev->_tx + (BUFFER_ALIGNMENT_NEEDS-1)) &
~(BUFFER_ALIGNMENT_NEEDS-1));
#endif
}
-
+
if ( rx ) {
#ifdef STATIC_RX_BUF_ADDR
pDev->_rx = STATIC_RX_BUF_ADDR(pDev->minor);
@@ -1004,8 +1004,8 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
return -1;
/* Align TX buffer */
- pDev->rx = (struct grcan_msg *)
- (((unsigned int)pDev->_rx + (BUFFER_ALIGNMENT_NEEDS-1)) &
+ pDev->rx = (struct grcan_msg *)
+ (((unsigned int)pDev->_rx + (BUFFER_ALIGNMENT_NEEDS-1)) &
~(BUFFER_ALIGNMENT_NEEDS-1));
#endif
}
@@ -1015,7 +1015,7 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
static void grcan_free_buffers(struct grcan_priv *pDev, int rx, int tx)
{
FUNCDBG();
-
+
#ifndef STATIC_TX_BUF_ADDR
if ( tx && pDev->_tx ){
free(pDev->_tx);
@@ -1043,7 +1043,7 @@ static char *almalloc(int sz)
#endif
static rtems_device_driver grcan_initialize(
- rtems_device_major_number major,
+ rtems_device_major_number major,
rtems_device_minor_number unused,
void *arg
)
@@ -1059,9 +1059,9 @@ static rtems_device_driver grcan_initialize(
printk("grcan_initialize()\n\r");
FUNCDBG();
-
+
/* find GRCAN cores */
- if ( !grcan_cores ) {
+ if ( !grcan_cores ) {
grcan_core_cnt = amba_get_number_apbslv_devices(amba_bus,VENDOR_GAISLER,deviceid);
if ( grcan_core_cnt < 1 ){
deviceid = GAISLER_GRCAN;
@@ -1129,7 +1129,7 @@ static rtems_device_driver grcan_initialize(
pDev->open = 0;
pDev->corefreq_hz = sys_freq_hz;
GRCAN_DEVNAME_NO(fs_name,minor);
-
+
/* Find core address & IRQ */
if ( !grcan_cores ) {
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,deviceid,&dev,minor);
@@ -1139,28 +1139,28 @@ static rtems_device_driver grcan_initialize(
pDev->irq = grcan_cores[minor].irq;
pDev->regs = (struct grcan_regs *)grcan_cores[minor].base_address;
}
-
+
printk("Registering GRCAN core at [0x%x] irq %d, minor %d as %s\n\r",pDev->regs,pDev->irq,minor,fs_name);
-
+
status = rtems_io_register_name(fs_name, major, 0);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
-
+
/* Reset Hardware before attaching IRQ handler */
grcan_hw_reset(pDev->regs);
-
+
/* Register interrupt handler */
GRCAN_REG_INT(GRCAN_PREFIX(_interrupt_handler), pDev->irq+GRCAN_IRQ_IRQ, pDev);
/*
GRCAN_REG_INT(grcan_interrupt_handler, pDev->irq+GRCAN_IRQ_TXSYNC, pDev);
GRCAN_REG_INT(grcan_interrupt_handler, pDev->irq+GRCAN_IRQ_RXSYNC, pDev);
*/
-
+
/* RX Semaphore created with count = 0 */
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'R', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->rx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1169,7 +1169,7 @@ static rtems_device_driver grcan_initialize(
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'T', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->tx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1178,7 +1178,7 @@ static rtems_device_driver grcan_initialize(
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'E', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->txempty_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1199,14 +1199,14 @@ static rtems_device_driver grcan_initialize(
static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) {
struct grcan_priv *pDev;
rtems_device_driver ret;
-
+
FUNCDBG();
if ( (minor < 0) || (minor>=grcan_core_cnt) ) {
DBG("Wrong minor %d\n", minor);
return RTEMS_INVALID_NUMBER;
}
-
+
pDev = &grcans[minor];
/* Wait until we get semaphore */
@@ -1214,7 +1214,7 @@ static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_dev
RTEMS_SUCCESSFUL ){
return RTEMS_INTERNAL_ERROR;
}
-
+
/* is device busy/taken? */
if ( pDev->open ) {
ret=RTEMS_RESOURCE_IN_USE;
@@ -1239,26 +1239,26 @@ static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_dev
pDev->txbuf_size = TX_BUF_SIZE;
pDev->rxbuf_size = RX_BUF_SIZE;
printk("Defaulting to rxbufsize: %d, txbufsize: %d\n",RX_BUF_SIZE,TX_BUF_SIZE);
-
+
/* Default to accept all messages */
pDev->afilter.mask = 0x00000000;
pDev->afilter.code = 0x00000000;
-
+
/* Default to disable sync messages (only trigger when id is set to all ones) */
pDev->sfilter.mask = 0xffffffff;
pDev->sfilter.code = 0x00000000;
-
+
/* Calculate default timing register values */
grcan_calc_timing(GRCAN_DEFAULT_BAUD,pDev->corefreq_hz,GRCAN_SAMPLING_POINT,&pDev->config.timing);
-
+
if ( grcan_alloc_buffers(pDev,1,1) ) {
ret=RTEMS_NO_MEMORY;
goto out;
}
-
+
/* Clear statistics */
memset(&pDev->stats,0,sizeof(struct grcan_stats));
-
+
ret = RTEMS_SUCCESSFUL;
out:
rtems_semaphore_release(pDev->dev_sem);
@@ -1268,16 +1268,16 @@ out:
static rtems_device_driver grcan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
-
+
FUNCDBG();
-
+
if ( pDev->started )
grcan_stop(pDev);
-
+
grcan_hw_reset(pDev->regs);
-
+
grcan_free_buffers(pDev,1,1);
-
+
/* Mark Device as closed */
pDev->open = 0;
@@ -1287,25 +1287,25 @@ static rtems_device_driver grcan_close(rtems_device_major_number major, rtems_de
static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
- rtems_libio_rw_args_t *rw_args;
+ rtems_libio_rw_args_t *rw_args;
CANMsg *dest;
unsigned int count, left;
int req_cnt;
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
dest = (CANMsg *) rw_args->buffer;
req_cnt = rw_args->count / sizeof(CANMsg);
FUNCDBG();
-
+
if ( (!dest) || (req_cnt<1) )
return RTEMS_INVALID_NAME;
-
+
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
/* FUNCDBG("grcan_read [%i,%i]: buf: 0x%x len: %i\n",major, minor, (unsigned int)rw_args->buffer,rw_args->count);*/
-
+
count = grcan_hw_read_try(pDev,pDev->regs,dest,req_cnt);
if ( !( pDev->rxblock && pDev->rxcomplete && (count!=req_cnt) ) ){
if ( count > 0 ) {
@@ -1313,7 +1313,7 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
/* nothing read, shall we block? */
if ( !pDev->rxblock ) {
/* non-blocking mode */
@@ -1323,13 +1323,13 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
}
while(count == 0 || (pDev->rxcomplete && (count!=req_cnt)) ){
-
+
if ( !pDev->rxcomplete ){
left = 1; /* return as soon as there is one message available */
}else{
left = req_cnt - count; /* return as soon as all data are available */
- /* never wait for more than the half the maximum size of the receive buffer
+ /* never wait for more than the half the maximum size of the receive buffer
* Why? We need some time to copy buffer before to catch up with hw, otherwise
* we would have to copy everything when the data has been received.
*/
@@ -1339,14 +1339,14 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
}
if ( grcan_wait_rxdata(pDev,left) ) {
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread.
*/
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_UNSATISFIED;
}
-
+
/* Try read bytes from circular buffer */
count += grcan_hw_read_try(
pDev,
@@ -1358,7 +1358,7 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
@@ -1366,22 +1366,22 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
CANMsg *source;
unsigned int count, left;
int req_cnt;
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
if ( !pDev->started || pDev->config.silent || pDev->flushing )
return RTEMS_RESOURCE_IN_USE;
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
req_cnt = rw_args->count / sizeof(CANMsg);
source = (CANMsg *) rw_args->buffer;
-
+
/* check proper length and buffer pointer */
if (( req_cnt < 1) || (source == NULL) ){
return RTEMS_INVALID_NAME;
}
-
+
count = grcan_hw_write_try(pDev,pDev->regs,source,req_cnt);
if ( !(pDev->txblock && pDev->txcomplete && (count!=req_cnt)) ) {
if ( count > 0 ) {
@@ -1389,7 +1389,7 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
/* nothing written, shall we block? */
if ( !pDev->txblock ) {
/* non-blocking mode */
@@ -1397,29 +1397,29 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
return RTEMS_TIMEOUT;
}
}
-
+
/* if in txcomplete mode we need to transmit all chars */
while((count == 0) || (pDev->txcomplete && (count!=req_cnt)) ){
/*** block until room to fit all or as much of transmit buffer as possible IRQ comes
- * Set up a valid IRQ point so that an IRQ is received
+ * Set up a valid IRQ point so that an IRQ is received
* when we can put a chunk of data into transmit fifo
*/
if ( !pDev->txcomplete ){
left = 1; /* wait for anything to fit buffer */
}else{
left = req_cnt - count; /* wait for all data to fit in buffer */
-
- /* never wait for more than the half the maximum size of the transmitt buffer
+
+ /* never wait for more than the half the maximum size of the transmitt buffer
* Why? We need some time to fill buffer before hw catches up.
*/
if ( left > ((pDev->txbuf_size/GRCAN_MSG_SIZE)/2) ){
left = (pDev->txbuf_size/GRCAN_MSG_SIZE)/2;
}
}
-
+
/* Wait until more room in transmit buffer */
if ( grcan_wait_txspace(pDev,left) ){
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread. To avoid deadlock we return directly
* with error status.
@@ -1427,15 +1427,15 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_UNSATISFIED;
}
-
+
if ( pDev->txerror ){
/* Return number of bytes sent, compare write pointers */
pDev->txerror = 0;
-#if 0
+#if 0
#error HANDLE AMBA error
#endif
}
-
+
/* Try read bytes from circular buffer */
count += grcan_hw_write_try(
pDev,
@@ -1444,7 +1444,7 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
req_cnt-count);
}
/* no need to unmask IRQ as IRQ Handler do that for us. */
-
+
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
@@ -1462,9 +1462,9 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
struct grcan_stats *stats;
struct grcan_filter *filter;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
-
+
if (!ioarg)
return RTEMS_INVALID_NAME;
@@ -1473,50 +1473,50 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
case GRCAN_IOC_START:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( (status=grcan_start(pDev)) != RTEMS_SUCCESSFUL ){
return status;
}
/* Read and write are now open... */
pDev->started = 1;
break;
-
+
case GRCAN_IOC_STOP:
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
-
+
grcan_stop(pDev);
pDev->started = 0;
break;
-
+
case GRCAN_IOC_ISSTARTED:
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
break;
-
+
case GRCAN_IOC_FLUSH:
if ( !pDev->started || pDev->flushing || pDev->config.silent )
return RTEMS_RESOURCE_IN_USE;
-
+
pDev->flushing = 1;
tmp = grcan_tx_flush(pDev);
pDev->flushing = 0;
if ( tmp ) {
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread.
*/
return RTEMS_UNSATISFIED;
}
break;
-
-#if 0
+
+#if 0
/* Set physical link */
case GRCAN_IOC_SET_LINK:
#ifdef REDUNDANT_CHANNELS
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* switch HW channel */
pDev->channel = (unsigned int)ioargs->buffer;
#else
@@ -1530,17 +1530,17 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
return RTEMS_RESOURCE_IN_USE;
pDev->config.silent = (int)ioarg->buffer;
pDev->config_changed = 1;
- break;
+ break;
case GRCAN_IOC_SET_ABORT:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE;
pDev->config.abort = (int)ioarg->buffer;
- /* This Configuration parameter doesn't need HurriCANe reset
+ /* This Configuration parameter doesn't need HurriCANe reset
* ==> no pDev->config_changed = 1;
*/
break;
-
+
case GRCAN_IOC_SET_SELECTION:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE;
@@ -1548,19 +1548,19 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
selection = (struct grcan_selection *)ioarg->buffer;
if ( !selection )
return RTEMS_INVALID_NAME;
-
+
pDev->config.selection = *selection;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_RXBLOCK:
pDev->rxblock = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_SET_TXBLOCK:
pDev->txblock = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_SET_TXCOMPLETE:
pDev->txcomplete = (int)ioarg->buffer;
break;
@@ -1568,14 +1568,14 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
case GRCAN_IOC_SET_RXCOMPLETE:
pDev->rxcomplete = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_GET_STATS:
stats = (struct grcan_stats *)ioarg->buffer;
if ( !stats )
return RTEMS_INVALID_NAME;
*stats = pDev->stats;
break;
-
+
case GRCAN_IOC_CLR_STATS:
IRQ_GLOBAL_DISABLE(oldLevel);
memset(&pDev->stats,0,sizeof(struct grcan_stats));
@@ -1583,36 +1583,36 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
break;
case GRCAN_IOC_SET_SPEED:
-
+
/* cannot change speed during run mode */
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* get speed rate from argument */
speed = (unsigned int)ioarg->buffer;
ret = grcan_calc_timing(speed,pDev->corefreq_hz,GRCAN_SAMPLING_POINT,&timing);
if ( ret )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* save timing/speed */
pDev->config.timing = timing;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_BTRS:
- /* Set BTR registers manually
+ /* Set BTR registers manually
* Read GRCAN/HurriCANe Manual.
*/
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( !ioarg->buffer )
return RTEMS_INVALID_NAME;
-
+
pDev->config.timing = *(struct grcan_timing *)ioarg->buffer;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_AFILTER:
filter = (struct grcan_filter *)ioarg->buffer;
if ( !filter ){
@@ -1623,23 +1623,23 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
/* Save filter */
pDev->afilter = *filter;
}
- /* Set hardware acceptance filter */
+ /* Set hardware acceptance filter */
grcan_hw_accept(pDev->regs,&pDev->afilter);
break;
-
+
case GRCAN_IOC_SET_SFILTER:
filter = (struct grcan_filter *)ioarg->buffer;
if ( !filter ){
/* disable TX/RX SYNC filtering */
- pDev->sfilter.mask = 0xffffffff;
+ pDev->sfilter.mask = 0xffffffff;
pDev->sfilter.mask = 0;
-
+
/* disable Sync interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~(GRCAN_RXSYNC_IRQ|GRCAN_TXSYNC_IRQ);
}else{
/* Save filter */
pDev->sfilter = *filter;
-
+
/* Enable Sync interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | (GRCAN_RXSYNC_IRQ|GRCAN_TXSYNC_IRQ);
}
@@ -1653,7 +1653,7 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
/* Read out the statsu register from the GRCAN core */
data[0] = READ_REG(&pDev->regs->stat);
break;
-
+
default:
return RTEMS_NOT_DEFINED;
}
@@ -1679,23 +1679,23 @@ static void grcan_interrupt(struct grcan_priv *pDev)
{
unsigned int status = READ_REG(&pDev->regs->pimsr);
unsigned int canstat = READ_REG(&pDev->regs->stat);
-
+
/* Spurious IRQ call? */
if ( !status && !canstat )
return;
-
+
FUNCDBG();
-
+
/* Increment number of interrupts counter */
pDev->stats.ints++;
-
+
if ( (status & GRCAN_ERR_IRQ) || (canstat & GRCAN_STAT_PASS) ){
/* Error-Passive interrupt */
pDev->stats.passive_cnt++;
}
if ( (status & GRCAN_OFF_IRQ) || (canstat & GRCAN_STAT_OFF) ){
- /* Bus-off condition interrupt
+ /* Bus-off condition interrupt
* The link is brought down by hardware, we wake all threads
* that is blocked in read/write calls and stop futher calls
* to read/write until user has called ioctl(fd,START,0).
@@ -1705,12 +1705,12 @@ static void grcan_interrupt(struct grcan_priv *pDev)
status=0x1ffff; /* clear all interrupts */
goto out;
}
-
+
if ( (status & GRCAN_OR_IRQ) || (canstat & GRCAN_STAT_OR) ){
/* Over-run during reception interrupt */
pDev->stats.overrun_cnt++;
}
-
+
if ( (status & GRCAN_RXAHBERR_IRQ) ||
(status & GRCAN_TXAHBERR_IRQ) ||
(canstat & GRCAN_STAT_AHBERR) ){
@@ -1718,40 +1718,40 @@ static void grcan_interrupt(struct grcan_priv *pDev)
printk("AHBERROR: status: 0x%x, canstat: 0x%x\n",status,canstat);
pDev->stats.ahberr_cnt++;
}
-
+
if ( status & GRCAN_TXLOSS_IRQ ) {
pDev->stats.txloss_cnt++;
}
-
+
if ( status & GRCAN_RXIRQ_IRQ ){
/* RX IRQ pointer interrupt */
/*printk("RxIrq 0x%x\n",status);*/
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_RXIRQ_IRQ;
rtems_semaphore_release(pDev->rx_sem);
}
-
+
if ( status & GRCAN_TXIRQ_IRQ ){
/* TX IRQ pointer interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_TXIRQ_IRQ;
rtems_semaphore_release(pDev->tx_sem);
}
-
+
if ( status & GRCAN_TXSYNC_IRQ ){
/* TxSync message transmitted interrupt */
pDev->stats.txsync_cnt++;
}
-
+
if ( status & GRCAN_RXSYNC_IRQ ){
/* RxSync message received interrupt */
pDev->stats.rxsync_cnt++;
}
-
+
if ( status & GRCAN_TXEMPTY_IRQ ){
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_TXEMPTY_IRQ;
rtems_semaphore_release(pDev->txempty_sem);
}
-
-out:
+
+out:
/* Clear IRQs */
pDev->regs->picr = status;
}
@@ -1760,21 +1760,21 @@ static int grcan_register_internal(void)
{
rtems_status_code r;
rtems_device_major_number m;
-
- if ((r = rtems_io_register_driver(0, &grcan_driver, &m)) !=
+
+ if ((r = rtems_io_register_driver(0, &grcan_driver, &m)) !=
RTEMS_SUCCESSFUL) {
switch(r) {
case RTEMS_TOO_MANY:
- DBG2("failed RTEMS_TOO_MANY\n");
+ DBG2("failed RTEMS_TOO_MANY\n");
break;
case RTEMS_INVALID_NUMBER:
- DBG2("failed RTEMS_INVALID_NUMBER\n");
+ DBG2("failed RTEMS_INVALID_NUMBER\n");
break;
case RTEMS_RESOURCE_IN_USE:
- DBG2("failed RTEMS_RESOURCE_IN_USE\n");
+ DBG2("failed RTEMS_RESOURCE_IN_USE\n");
break;
default:
- DBG("failed %i\n",r);
+ DBG("failed %i\n",r);
break;
}
return 1;
@@ -1788,7 +1788,7 @@ static int grcan_register_internal(void)
int GRCAN_PREFIX(_register_abs)(struct grcan_device_info *devices, int dev_cnt)
{
FUNCDBG();
-
+
if ( !devices || (dev_cnt<0) )
return 1;
grcan_cores = devices;
@@ -1802,7 +1802,7 @@ int GRCAN_PREFIX(_register_abs)(struct grcan_device_info *devices, int dev_cnt)
int GRCAN_PREFIX(_register)(amba_confarea_type *abus)
{
FUNCDBG();
-
+
if ( !abus )
return 1;
amba_bus = abus;
diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
index 96755547fb..f9b126f552 100644
--- a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
+++ b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
@@ -6,28 +6,28 @@
/*#define USE_AT697_RAM 1 */
-/* memarea_to_hw(x)
+/* memarea_to_hw(x)
*
* x: address in AT697 address space
- *
+ *
* returns the address in the RASTA address space that can be used to access x with dma.
- *
+ *
*/
#ifdef USE_AT697_RAM
static inline unsigned int memarea_to_hw(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
+ return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
}
#else
static inline unsigned int memarea_to_hw(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
+ return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
}
#endif
#define MEMAREA_TO_HW(x) memarea_to_hw(x)
#define IRQ_CLEAR_PENDING(irqno)
-#define IRQ_UNMASK(irqno)
-#define IRQ_MASK(irqno)
+#define IRQ_UNMASK(irqno)
+#define IRQ_MASK(irqno)
#define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level
#define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level)
@@ -65,8 +65,8 @@ void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
#define STATIC_RX_BUF_ADDR(core) \
((unsigned int *) \
(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE))
-
-
+
+
#define GRCAN_DEVNAME "/dev/grcan0"
#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))
diff --git a/c/src/lib/libbsp/sparc/shared/can/occan.c b/c/src/lib/libbsp/sparc/shared/can/occan.c
index 2a62f586f5..8b6dbfd32a 100644
--- a/c/src/lib/libbsp/sparc/shared/can/occan.c
+++ b/c/src/lib/libbsp/sparc/shared/can/occan.c
@@ -18,11 +18,11 @@
#include <rtems/bspIo.h> /* printk */
#include <leon.h>
-#include <ambapp.h>
+#include <ambapp.h>
#include <occan.h>
/* RTEMS -> ERRNO decoding table
-
+
rtems_assoc_t errno_assoc[] = {
{ "OK", RTEMS_SUCCESSFUL, 0 },
{ "BUSY", RTEMS_RESOURCE_IN_USE, EBUSY },
@@ -88,7 +88,7 @@ rtems_assoc_t errno_assoc[] = {
#ifdef DEBUG
#define DBG(fmt, vargs...) printk(fmt, ## vargs )
#else
- #define DBG(fmt, vargs...)
+ #define DBG(fmt, vargs...)
#endif
/* fifo interface */
@@ -104,7 +104,7 @@ typedef struct {
/* PELICAN */
#ifdef OCCAN_BYTE_REGS
typedef struct {
- unsigned char
+ unsigned char
mode,
cmd,
status,
@@ -120,7 +120,7 @@ typedef struct {
errwarn,
rx_err_cnt,
tx_err_cnt,
- rx_fi_xff; /* this is also acceptance code 0 in reset mode */
+ rx_fi_xff; /* this is also acceptance code 0 in reset mode */
union{
struct {
unsigned char id[2];
@@ -151,7 +151,7 @@ typedef struct {
} pelican_regs;
#else
typedef struct {
- unsigned char
+ unsigned char
mode, unused0[3],
cmd, unused1[3],
status, unused2[3],
@@ -167,7 +167,7 @@ typedef struct {
errwarn,unused12[3],
rx_err_cnt,unused13[3],
tx_err_cnt,unused14[3],
- rx_fi_xff, unused15[3]; /* this is also acceptance code 0 in reset mode */
+ rx_fi_xff, unused15[3]; /* this is also acceptance code 0 in reset mode */
/* make sure to use pointers when writing (byte access) to these registers */
union{
struct {
@@ -216,13 +216,13 @@ typedef struct {
} occan_speed_regs;
typedef struct {
- /* hardware shortcuts */
+ /* hardware shortcuts */
pelican_regs *regs;
int irq;
occan_speed_regs timing;
int channel; /* 0=default, 1=second bus */
int single_mode;
-
+
/* driver state */
rtems_id devsem;
rtems_id txsem;
@@ -233,11 +233,11 @@ typedef struct {
int txblk;
unsigned int status;
occan_stats stats;
-
+
/* rx&tx fifos */
occan_fifo *rxfifo;
occan_fifo *txfifo;
-
+
/* Config */
unsigned int speed; /* speed in HZ */
unsigned char acode[4];
@@ -393,7 +393,7 @@ static unsigned int sys_freq_hz;
static void pelican_init(occan_priv *priv){
/* Reset core */
priv->regs->mode = PELICAN_MOD_RESET;
-
+
/* wait for core to reset complete */
/*usleep(1);*/
}
@@ -414,21 +414,21 @@ static void pelican_open(occan_priv *priv){
priv->amask[1] = 0xff;
priv->amask[2] = 0xff;
priv->amask[3] = 0xff;
-
+
/* Set clock divider to extended mode, clkdiv not connected
*/
priv->regs->clkdiv = (1<<PELICAN_CDR_MODE_BITS) | (DEFAULT_CLKDIV & PELICAN_CDR_DIV);
-
+
ret = occan_calc_speedregs(sys_freq_hz,priv->speed,&priv->timing);
if ( ret ){
/* failed to set speed for this system freq, try with 50K instead */
priv->speed = OCCAN_SPEED_50K;
occan_calc_speedregs(sys_freq_hz,priv->speed,&priv->timing);
}
-
+
/* disable all interrupts */
priv->regs->inten = 0;
-
+
/* clear pending interrupts by reading */
tmp = READ_REG(&priv->regs->intflags);
}
@@ -436,22 +436,22 @@ static void pelican_open(occan_priv *priv){
static int pelican_start(occan_priv *priv){
unsigned char tmp;
/* Start HW communication */
-
+
if ( !priv->rxfifo || !priv->txfifo )
return -1;
/* In case we were started before and stopped we
- * should empty the TX fifo or try to resend those
+ * should empty the TX fifo or try to resend those
* messages. We make it simple...
*/
occan_fifo_clr(priv->txfifo);
-
+
/* Clear status bits */
priv->status = 0;
-
+
/* clear pending interrupts */
tmp = READ_REG(&priv->regs->intflags);
-
+
/* clear error counters */
priv->regs->rx_err_cnt = 0;
priv->regs->tx_err_cnt = 0;
@@ -467,28 +467,28 @@ static int pelican_start(occan_priv *priv){
#endif
/* set the speed regs of the CAN core */
occan_set_speedregs(priv,&priv->timing);
-
+
DBG("OCCAN: start: set timing regs btr0: 0x%x, btr1: 0x%x\n\r",READ_REG(&priv->regs->bustim0),READ_REG(&priv->regs->bustim1));
-
+
/* Set default acceptance filter */
pelican_set_accept(priv,priv->acode,priv->amask);
/* turn on interrupts */
priv->regs->inten = PELICAN_IE_RX | PELICAN_IE_TX | PELICAN_IE_ERRW |
PELICAN_IE_ERRP | PELICAN_IE_BUS;
-
+
#ifdef DEBUG
/* print setup before starting */
pelican_regs_print(priv->regs);
occan_stat_print(&priv->stats);
#endif
-
- /* core already in reset mode,
- * ¤ Exit reset mode
+
+ /* core already in reset mode,
+ * ¤ Exit reset mode
* ¤ Enter Single/Dual mode filtering.
*/
priv->regs->mode = (priv->single_mode << 3);
-
+
return 0;
}
@@ -500,38 +500,38 @@ static void pelican_stop(occan_priv *priv){
pelican_regs_print(priv->regs);
occan_stat_print(&priv->stats);
#endif
-
+
/* put core in reset mode */
priv->regs->mode = PELICAN_MOD_RESET;
/* turn off interrupts */
priv->regs->inten = 0;
-
+
priv->status |= OCCAN_STATUS_RESET;
}
-/* Try to send message "msg", if hardware txfifo is
+/* Try to send message "msg", if hardware txfifo is
* full, then -1 is returned.
*
- * Be sure to have disabled CAN interrupts when
+ * Be sure to have disabled CAN interrupts when
* entering this function.
*/
static int pelican_send(occan_priv *can, CANMsg *msg){
unsigned char tmp,status;
pelican_regs *regs = can->regs;
-
+
/* is there room in send buffer? */
status = READ_REG(&regs->status);
if ( !(status & PELICAN_STAT_TXBUF) ){
/* tx fifo taken, we have to wait */
return -1;
}
-
+
tmp = msg->len & 0xf;
if ( msg->rtr )
tmp |= 0x40;
-
+
if ( msg->extended ){
/* Extended Frame */
regs->rx_fi_xff = 0x80 | tmp;
@@ -553,7 +553,7 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
WRITE_REG(&regs->msg.tx_sff.data[tmp],msg->data[tmp]);
}
}
-
+
/* let HW know of new message */
if ( msg->sshot ){
regs->cmd = PELICAN_CMD_TXREQ | PELICAN_CMD_ABORT;
@@ -561,7 +561,7 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
/* normal case -- try resend until sent */
regs->cmd = PELICAN_CMD_TXREQ;
}
-
+
return 0;
}
@@ -569,17 +569,17 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
static void pelican_set_accept(occan_priv *priv, unsigned char *acode, unsigned char *amask){
unsigned char *acode0, *acode1, *acode2, *acode3;
unsigned char *amask0, *amask1, *amask2, *amask3;
-
+
acode0 = &priv->regs->rx_fi_xff;
acode1 = (unsigned char *)&priv->regs->msg.rst_accept.code[0];
acode2 = (unsigned char *)&priv->regs->msg.rst_accept.code[1];
acode3 = (unsigned char *)&priv->regs->msg.rst_accept.code[2];
-
+
amask0 = (unsigned char *)&priv->regs->msg.rst_accept.mask[0];
amask1 = (unsigned char *)&priv->regs->msg.rst_accept.mask[1];
amask2 = (unsigned char *)&priv->regs->msg.rst_accept.mask[2];
amask3 = (unsigned char *)&priv->regs->msg.rst_accept.mask[3];
-
+
/* Set new mask & code */
*acode0 = acode[0];
*acode1 = acode[1];
@@ -617,7 +617,7 @@ static void pelican_regs_print(pelican_regs *regs){
printk(" AMR1: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[1]),(unsigned int)&regs->msg.rst_accept.mask[1]);
printk(" AMR2: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[2]),(unsigned int)&regs->msg.rst_accept.mask[2]);
printk(" AMR3: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[3]),(unsigned int)&regs->msg.rst_accept.mask[3]);
-
+
}else{
printk(" RXFI_XFF: 0x%02x\n\r",READ_REG(&regs->rx_fi_xff));
}
@@ -645,7 +645,7 @@ static void pelican_regadr_print(pelican_regs *regs){
/* in reset mode it is possible to read acceptance filters */
printk(" RXFI_XFF: 0x%lx\n\r",(unsigned int)&regs->rx_fi_xff);
-
+
/* reset registers */
printk(" ACR0: 0x%lx\n\r",(unsigned int)&regs->rx_fi_xff);
printk(" ACR1: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.code[0]);
@@ -655,7 +655,7 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" AMR1: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[1]);
printk(" AMR2: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[2]);
printk(" AMR3: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[3]);
-
+
/* TX Extended */
printk(" EFFTX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.id[0]);
printk(" EFFTX_ID[1]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.id[1]);
@@ -664,12 +664,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" EFFTX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[0]);
printk(" EFFTX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[1]);
- printk(" EFFTX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[2]);
- printk(" EFFTX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[3]);
- printk(" EFFTX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[4]);
- printk(" EFFTX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[5]);
- printk(" EFFTX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[6]);
- printk(" EFFTX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[7]);
+ printk(" EFFTX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[2]);
+ printk(" EFFTX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[3]);
+ printk(" EFFTX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[4]);
+ printk(" EFFTX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[5]);
+ printk(" EFFTX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[6]);
+ printk(" EFFTX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[7]);
/* RX Extended */
printk(" EFFRX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.id[0]);
@@ -679,12 +679,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" EFFRX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[0]);
printk(" EFFRX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[1]);
- printk(" EFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[2]);
- printk(" EFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[3]);
- printk(" EFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[4]);
- printk(" EFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[5]);
- printk(" EFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[6]);
- printk(" EFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[7]);
+ printk(" EFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[2]);
+ printk(" EFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[3]);
+ printk(" EFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[4]);
+ printk(" EFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[5]);
+ printk(" EFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[6]);
+ printk(" EFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[7]);
/* RX Extended */
@@ -693,12 +693,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" SFFRX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[0]);
printk(" SFFRX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[1]);
- printk(" SFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[2]);
- printk(" SFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[3]);
- printk(" SFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[4]);
- printk(" SFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[5]);
- printk(" SFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[6]);
- printk(" SFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[7]);
+ printk(" SFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[2]);
+ printk(" SFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[3]);
+ printk(" SFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[4]);
+ printk(" SFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[5]);
+ printk(" SFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[6]);
+ printk(" SFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[7]);
/* TX Extended */
printk(" SFFTX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_sff.id[0]);
@@ -756,8 +756,8 @@ static int occan_calc_speedregs(unsigned int clock_hz, unsigned int rate, occan_
/* invalid speed mode */
return -1;
}
-
- /* find best match, return -2 if no good reg
+
+ /* find best match, return -2 if no good reg
* combination is available for this frequency */
/* some heuristic specials */
@@ -823,14 +823,14 @@ static int occan_calc_speedregs(unsigned int clock_hz, unsigned int rate, occan_
result->btr0 = (sjw<<OCCAN_BUSTIM_SJW_BIT) | (best_brp&OCCAN_BUSTIM_BRP);
result->btr1 = (0<<7) | (tseg2<<OCCAN_BUSTIM_TSEG2_BIT) | tseg1;
-
+
return 0;
}
static int occan_set_speedregs(occan_priv *priv, occan_speed_regs *timing){
if ( !timing || !priv || !priv->regs)
return -1;
-
+
priv->regs->bustim0 = timing->btr0;
priv->regs->bustim1 = timing->btr1;
return 0;
@@ -851,27 +851,27 @@ static unsigned int pelican_speed_auto_steplist [] = {
static int pelican_speed_auto(occan_priv *priv){
return -1;
-
-#if 0
+
+#if 0
int i=0;
occan_speed_regs timing;
unsigned int speed;
unsigned char tmp;
while ( (speed=pelican_speed_auto_steplist[i]) > 0){
-
+
/* Reset core */
priv->regs->mode = PELICAN_MOD_RESET;
-
+
/* tell int handler about the auto speed detection test */
-
-
+
+
/* wait for a moment (10ms) */
/*usleep(10000);*/
-
+
/* No acceptance filter */
pelican_set_accept(priv);
-
+
/* calc timing params for this */
if ( occan_calc_speedregs(sys_freq_hz,speed,&timing) ){
/* failed to get good timings for this frequency
@@ -879,34 +879,34 @@ static int pelican_speed_auto(occan_priv *priv){
*/
continue;
}
-
+
timing.sam = 0;
-
+
/* set timing params for this speed */
occan_set_speedregs(priv,&timing);
-
+
/* Empty previous messages in hardware RX fifo */
/*
while( READ_REG(&priv->regs->) ){
-
+
}
*/
-
+
/* Clear pending interrupts */
tmp = READ_REG(&priv->regs->intflags);
-
+
/* enable RX & ERR interrupt */
- priv->regs->inten =
-
+ priv->regs->inten =
+
/* Get out of reset state */
priv->regs->mode = PELICAN_MOD_LISTEN;
-
+
/* wait for frames or errors */
while(1){
/* sleep 10ms */
-
+
}
-
+
}
#endif
}
@@ -918,9 +918,9 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
occan_priv *can;
char fs_name[20];
rtems_status_code status;
-
+
strcpy(fs_name,OCCAN_DEVNAME);
-
+
/* find device on amba bus */
dev_cnt = amba_get_number_ahbslv_devices(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN);
if ( dev_cnt < 1 ){
@@ -932,11 +932,11 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
/* Detect System Frequency from initialized timer */
#ifndef SYS_FREQ_HZ
#if defined(LEON3)
- /* LEON3: find timer address via AMBA Plug&Play info */
+ /* LEON3: find timer address via AMBA Plug&Play info */
{
amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs;
-
+
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){
tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
@@ -945,7 +945,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
sys_freq_hz = 40000000; /* Default to 40MHz */
printk("OCCAN: Failed to detect system frequency\n\r");
}
-
+
}
#elif defined(LEON2)
/* LEON2: use hardcoded address to get to timer */
@@ -960,9 +960,9 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
/* Use hardcoded frequency */
sys_freq_hz = SYS_FREQ_HZ;
#endif
-
+
DBG("OCCAN: Detected %dHz system frequency\n\r",sys_freq_hz);
-
+
/* OCCAN speciality:
* Mulitple cores are supported through the same amba AHB interface.
* The number of "sub cores" can be detected by decoding the AMBA
@@ -971,48 +971,48 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
*
* Now, lets detect sub cores.
*/
-
+
for(subcore_cnt=devi=0; devi<dev_cnt; devi++){
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN,&ambadev,devi);
subcore_cnt += (ambadev.ver & 0x7)+1;
}
-
+
printk("OCCAN: Found %d devs, totally %d sub cores\n\r",dev_cnt,subcore_cnt);
-
+
/* allocate memory for cores */
can_cores = subcore_cnt;
cans = calloc(subcore_cnt*sizeof(occan_priv),1);
-
+
minor=0;
for(devi=0; devi<dev_cnt; devi++){
-
+
/* Get AHB device info */
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN,&ambadev,devi);
subcores = (ambadev.ver & 0x7)+1;
DBG("OCCAN: on dev %d found %d sub cores\n\r",devi,subcores);
-
+
/* loop all subcores, at least 1 */
for(subi=0; subi<subcores; subi++){
can = &cans[minor];
#ifdef OCCAN_BYTE_REGS
- /* regs is byte regs */
+ /* regs is byte regs */
can->regs = (void *)(ambadev.start[0] + OCCAN_NCORE_OFS*subi);
#else
/* regs is word regs, accessed 0x100 from base address */
can->regs = (void *)(ambadev.start[0] + OCCAN_NCORE_OFS*subi+ OCCAN_WORD_REG_OFS);
#endif
-
+
/* remember IRQ number */
can->irq = ambadev.irq+subi;
-
+
/* bind filesystem name to device */
OCCAN_DEVNAME_NO(fs_name,minor);
printk("OCCAN: Registering %s to [%d %d] @ 0x%lx irq %d\n\r",fs_name,major,minor,(unsigned int)can->regs,can->irq);
status = rtems_io_register_name(fs_name, major, minor);
if (RTEMS_SUCCESSFUL != status )
rtems_fatal_error_occurred(status);
-
+
/* initialize software */
can->open = 0;
can->rxfifo = NULL;
@@ -1022,7 +1022,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
1,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
- 0,
+ 0,
&can->devsem);
if ( status != RTEMS_SUCCESSFUL ){
printk("OCCAN: Failed to create dev semaphore for minor %d, (%d)\n\r",minor,status);
@@ -1030,10 +1030,10 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
}
status = rtems_semaphore_create(
rtems_build_name('C', 't', 'x', '0'+minor),
- 0,
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
- 0,
+ 0,
&can->txsem);
if ( status != RTEMS_SUCCESSFUL ){
printk("OCCAN: Failed to create tx semaphore for minor %d, (%d)\n\r",minor,status);
@@ -1041,7 +1041,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
}
status = rtems_semaphore_create(
rtems_build_name('C', 'r', 'x', '0'+minor),
- 0,
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
0,
@@ -1050,34 +1050,34 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
printk("OCCAN: Failed to create rx semaphore for minor %d, (%d)\n\r",minor,status);
return RTEMS_UNSATISFIED;
}
-
+
/* hardware init/reset */
pelican_init(can);
-
+
/* Setup interrupt handler for each channel */
OCCAN_REG_INT(OCCAN_PREFIX(_interrupt_handler), can->irq, can);
-
+
minor++;
#ifdef DEBUG_PRINT_REGMAP
pelican_regadr_print(can->regs);
#endif
}
}
-
+
return RTEMS_SUCCESSFUL;
}
static rtems_device_driver occan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg){
occan_priv *can;
-
+
DBG("OCCAN: Opening %d\n\r",minor);
-
+
if ( minor >= can_cores )
return RTEMS_UNSATISFIED; /* NODEV */
-
+
/* get can device */
can = &cans[minor];
-
+
/* already opened? */
rtems_semaphore_obtain(can->devsem,RTEMS_WAIT, RTEMS_NO_TIMEOUT);
if ( can->open ){
@@ -1093,7 +1093,7 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->open = 0;
return RTEMS_NO_MEMORY; /* ENOMEM */
}
-
+
can->txfifo = occan_fifo_create(DEFAULT_TX_FIFO_LEN);
if ( !can->txfifo ){
occan_fifo_free(can->rxfifo);
@@ -1101,7 +1101,7 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->open = 0;
return RTEMS_NO_MEMORY; /* ENOMEM */
}
-
+
DBG("OCCAN: Opening %d success\n\r",minor);
can->started = 0;
@@ -1109,10 +1109,10 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->txblk = 1; /* Default to Blocking mode */
can->rxblk = 1; /* Default to Blocking mode */
can->single_mode = 1; /* single mode acceptance filter */
-
+
/* reset stat counters */
memset(&can->stats,0,sizeof(occan_stats));
-
+
/* HW must be in reset mode here (close and initializes resets core...)
*
* 1. set default modes/speeds
@@ -1124,23 +1124,23 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
static rtems_device_driver occan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg){
occan_priv *can = &cans[minor];
-
+
DBG("OCCAN: Closing %d\n\r",minor);
-
+
/* stop if running */
if ( can->started )
pelican_stop(can);
-
+
/* Enter Reset Mode */
can->regs->mode = PELICAN_MOD_RESET;
-
+
/* free fifo memory */
occan_fifo_free(can->rxfifo);
occan_fifo_free(can->txfifo);
-
+
can->rxfifo = NULL;
can->txfifo = NULL;
-
+
return RTEMS_SUCCESSFUL;
}
@@ -1150,31 +1150,31 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
CANMsg *dstmsg, *srcmsg;
rtems_interrupt_level oldLevel;
int left;
-
+
if ( !can->started ){
DBG("OCCAN: cannot read from minor %d when not started\n\r",minor);
return RTEMS_RESOURCE_IN_USE; /* -EBUSY*/
}
-
+
/* does at least one message fit */
left = rw_args->count;
if ( left < sizeof(CANMsg) ){
DBG("OCCAN: minor %d length of buffer must be at least %d, our is %d\n\r",minor,sizeof(CANMsg),left);
return RTEMS_INVALID_NAME; /* -EINVAL */
}
-
+
/* get pointer to start where to put CAN messages */
dstmsg = (CANMsg *)rw_args->buffer;
if ( !dstmsg ){
DBG("OCCAN: minor %d read: input buffer is NULL\n\r",minor);
return RTEMS_INVALID_NAME; /* -EINVAL */
- }
+ }
while (left >= sizeof(CANMsg) ){
-
+
/* turn off interrupts */
rtems_interrupt_disable(oldLevel);
-
+
/* A bus off interrupt may have occured after checking can->started */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
rtems_interrupt_enable(oldLevel);
@@ -1182,7 +1182,7 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
srcmsg = occan_fifo_claim_get(can->rxfifo);
if ( !srcmsg ){
/* no more messages in reception fifo.
@@ -1195,41 +1195,41 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
rtems_interrupt_enable(oldLevel);
break;
}
-
+
/* turn on interrupts again */
rtems_interrupt_enable(oldLevel);
-
+
DBG("OCCAN: Waiting for RX int\n\r");
-
+
/* wait for incomming messages */
rtems_semaphore_obtain(can->rxsem,RTEMS_WAIT,RTEMS_NO_TIMEOUT);
-
+
/* did we get woken up by a BUS OFF error? */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
DBG("OCCAN: Blocking read got woken up by BUS OFF error\n\r");
/* At this point it should not matter how many messages we handled */
- rw_args->bytes_moved = rw_args->count-left;
+ rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
/* no errors detected, it must be a message */
continue;
}
-
+
/* got message, copy it to userspace buffer */
*dstmsg = *srcmsg;
-
+
/* Return borrowed message, RX interrupt can use it again */
occan_fifo_get(can->rxfifo);
-
+
/* turn on interrupts again */
rtems_interrupt_enable(oldLevel);
-
+
/* increase pointers */
left -= sizeof(CANMsg);
dstmsg++;
}
-
+
/* save number of read bytes. */
rw_args->bytes_moved = rw_args->count-left;
if ( rw_args->bytes_moved == 0 ){
@@ -1245,22 +1245,22 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
CANMsg *msg,*fifo_msg;
rtems_interrupt_level oldLevel;
int left;
-
+
DBG("OCCAN: Writing %d bytes from 0x%lx (%d)\n\r",rw_args->count,rw_args->buffer,sizeof(CANMsg));
-
+
if ( !can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
- left = rw_args->count;
+
+ left = rw_args->count;
if ( (left < sizeof(CANMsg)) || (!rw_args->buffer) ){
return RTEMS_INVALID_NAME; /* EINVAL */
}
-
+
msg = (CANMsg *)rw_args->buffer;
-
+
/* limit CAN message length to 8 */
msg->len = (msg->len > 8) ? 8 : msg->len;
-
+
#ifdef DEBUG_VERBOSE
pelican_regs_print(can->regs);
occan_stat_print(&can->stats);
@@ -1268,7 +1268,7 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
/* turn off interrupts */
rtems_interrupt_disable(oldLevel);
-
+
/* A bus off interrupt may have occured after checking can->started */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
rtems_interrupt_enable(oldLevel);
@@ -1283,35 +1283,35 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
if ( occan_fifo_empty(can->txfifo) ){
/*pelican_regs_print(cans[minor+1].regs);*/
if ( !pelican_send(can,msg) ) {
- /* First message put directly into HW TX fifo
+ /* First message put directly into HW TX fifo
* This will turn TX interrupt on.
*/
left -= sizeof(CANMsg);
msg++;
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
DBG("OCCAN: Sending direct via HW\n\r");
}
}
/* Put messages into software fifo */
while ( left >= sizeof(CANMsg) ){
-
+
/* limit CAN message length to 8 */
msg->len = (msg->len > 8) ? 8 : msg->len;
-
+
fifo_msg = occan_fifo_put_claim(can->txfifo,0);
if ( !fifo_msg ){
-
+
DBG("OCCAN: FIFO is full\n\r");
/* Block only if no messages previously sent
* and no in blocking mode
*/
if ( !can->txblk || (left != rw_args->count) )
break;
-
+
/* turn on interupts again and wait
INT_ON
WAIT FOR FREE BUF;
@@ -1319,11 +1319,11 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
CHECK_IF_FIFO_EMPTY ==> SEND DIRECT VIA HW;
*/
rtems_interrupt_enable(oldLevel);
-
+
DBG("OCCAN: Waiting for tx int\n\r");
-
+
rtems_semaphore_obtain(can->txsem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-
+
/* did we get woken up by a BUS OFF error? */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
DBG("OCCAN: Blocking write got woken up by BUS OFF error or RESET event\n\r");
@@ -1331,44 +1331,44 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
rtems_interrupt_disable(oldLevel);
-
+
if ( occan_fifo_empty(can->txfifo) ){
if ( !pelican_send(can,msg) ) {
- /* First message put directly into HW TX fifo
+ /* First message put directly into HW TX fifo
* This will turn TX interrupt on.
*/
left -= sizeof(CANMsg);
msg++;
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
DBG("OCCAN: Sending direct2 via HW\n\r");
}
}
continue;
}
-
+
/* copy message into fifo area */
*fifo_msg = *msg;
-
+
/* tell interrupt handler about the message */
occan_fifo_put(can->txfifo);
-
+
DBG("OCCAN: Put info fifo SW\n\r");
-
+
/* Prepare insert of next message */
msg++;
left-=sizeof(CANMsg);
}
-
+
rtems_interrupt_enable(oldLevel);
-
+
rw_args->bytes_moved = rw_args->count-left;
DBG("OCCAN: Sent %d\n\r",rw_args->bytes_moved);
-
+
if ( left == rw_args->count )
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
return RTEMS_SUCCESSFUL;
@@ -1383,38 +1383,38 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
struct occan_afilter *afilter;
occan_stats *dststats;
unsigned int rxcnt,txcnt;
-
+
DBG("OCCAN: IOCTL %d\n\r",ioarg->command);
-
+
ioarg->ioctl_return = 0;
switch(ioarg->command){
case OCCAN_IOC_SET_SPEED:
-
+
/* cannot change speed during run mode */
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* get speed rate from argument */
speed = (unsigned int)ioarg->buffer;
ret = occan_calc_speedregs(sys_freq_hz,speed,&timing);
if ( ret )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* set the speed regs of the CAN core */
/* occan_set_speedregs(can,timing); */
-
+
/* save timing/speed */
can->speed = speed;
can->timing = timing;
break;
-
+
case OCCAN_IOC_SET_BTRS:
- /* Set BTR registers manually
+ /* Set BTR registers manually
* Read OCCAN Manual.
*/
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
can->speed = 0; /* custom */
can->timing.btr1 = (unsigned int)ioarg->buffer & 0xff;
can->timing.btr0 = ((unsigned int)ioarg->buffer>>8) & 0xff;
@@ -1426,114 +1426,114 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
can->timing.sam = (btr1 >> 7) & 0x1;
*/
break;
-
+
case OCCAN_IOC_SPEED_AUTO:
return RTEMS_NOT_IMPLEMENTED;
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( (speed=pelican_speed_auto(can)) < 0 ){
/* failed */
return RTEMS_IO_ERROR;
}
-
+
/* set new speed */
can->speed = speed;
-
+
if ( (int *)ioarg->buffer ){
*(int *)ioarg->buffer = speed;
}
return RTEMS_SUCCESSFUL;
break;
-
+
case OCCAN_IOC_SET_BUFLEN:
/* set rx & tx fifo buffer length */
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
rxcnt = (unsigned int)ioarg->buffer & 0x0000ffff;
txcnt = (unsigned int)ioarg->buffer >> 16;
-
+
occan_fifo_free(can->rxfifo);
occan_fifo_free(can->txfifo);
-
+
/* allocate new buffers */
can->rxfifo = occan_fifo_create(rxcnt);
can->txfifo = occan_fifo_create(txcnt);
-
+
if ( !can->rxfifo || !can->txfifo )
return RTEMS_NO_MEMORY; /* ENOMEM */
break;
-
+
case OCCAN_IOC_GET_CONF:
return RTEMS_NOT_IMPLEMENTED;
break;
-
+
case OCCAN_IOC_GET_STATS:
dststats = (occan_stats *)ioarg->buffer;
if ( !dststats )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* copy data stats into userspace buffer */
if ( can->rxfifo )
can->stats.rx_sw_dovr = can->rxfifo->ovcnt;
*dststats = can->stats;
break;
-
+
case OCCAN_IOC_GET_STATUS:
/* return the status of the */
if ( !ioarg->buffer )
return RTEMS_INVALID_NAME;
-
+
*(unsigned int *)ioarg->buffer = can->status;
break;
-
+
/* Set physical link */
case OCCAN_IOC_SET_LINK:
#ifdef REDUNDANT_CHANNELS
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* switch HW channel */
can->channel = (unsigned int)ioargs->buffer;
#else
return RTEMS_NOT_IMPLEMENTED;
#endif
break;
-
+
case OCCAN_IOC_SET_FILTER:
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
afilter = (struct occan_afilter *)ioarg->buffer;
-
+
if ( !afilter )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* copy acceptance filter */
can->acode[0] = afilter->code[0];
can->acode[1] = afilter->code[1];
can->acode[2] = afilter->code[2];
can->acode[3] = afilter->code[3];
-
+
can->amask[0] = afilter->mask[0];
can->amask[1] = afilter->mask[1];
can->amask[2] = afilter->mask[2];
- can->amask[3] = afilter->mask[3];
-
+ can->amask[3] = afilter->mask[3];
+
can->single_mode = ( afilter->single_mode ) ? 1 : 0;
-
- /* Acceptance filter is written to hardware
+
+ /* Acceptance filter is written to hardware
* when starting.
*/
/* pelican_set_accept(can,can->acode,can->amask);*/
break;
-
+
case OCCAN_IOC_SET_BLK_MODE:
can->rxblk = (unsigned int)ioarg->buffer & OCCAN_BLK_MODE_RX;
can->txblk = ((unsigned int)ioarg->buffer & OCCAN_BLK_MODE_TX) >> 1;
break;
-
+
case OCCAN_IOC_START:
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
@@ -1541,7 +1541,7 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
return RTEMS_NO_MEMORY; /* failed because of no memory, can happen if SET_BUFLEN failed */
can->started = 1;
break;
-
+
case OCCAN_IOC_STOP:
if ( !can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
@@ -1562,29 +1562,29 @@ static void occan_interrupt(occan_priv *can){
int signal_rx=0, signal_tx=0;
unsigned char tmp, errcode, arbcode;
int tx_error_cnt,rx_error_cnt;
-
+
can->stats.ints++;
-
+
while ( (iflags = READ_REG(&can->regs->intflags)) != 0 ){
/* still interrupts to handle */
-
+
if ( iflags & PELICAN_IF_RX ){
/* the rx fifo is not empty
- * put 1 message into rxfifo for later use
+ * put 1 message into rxfifo for later use
*/
-
+
/* get empty (or make room) message */
msg = occan_fifo_put_claim(can->rxfifo,1);
tmp = READ_REG(&regs->rx_fi_xff);
msg->extended = tmp >> 7;
msg->rtr = (tmp >> 6) & 1;
msg->len = tmp = tmp & 0x0f;
-
+
if ( msg->extended ){
/* extended message */
- msg->id = READ_REG(&regs->msg.rx_eff.id[0])<<(5+8+8) |
- READ_REG(&regs->msg.rx_eff.id[1])<<(5+8) |
- READ_REG(&regs->msg.rx_eff.id[2])<<5 |
+ msg->id = READ_REG(&regs->msg.rx_eff.id[0])<<(5+8+8) |
+ READ_REG(&regs->msg.rx_eff.id[1])<<(5+8) |
+ READ_REG(&regs->msg.rx_eff.id[2])<<5 |
READ_REG(&regs->msg.rx_eff.id[3])>>3;
while(tmp--){
msg->data[tmp] = READ_REG(&regs->msg.rx_eff.data[tmp]);
@@ -1601,9 +1601,9 @@ static void occan_interrupt(occan_priv *can){
*/
}else{
/* standard message */
- msg->id = READ_REG(&regs->msg.rx_sff.id[0])<<3 |
+ msg->id = READ_REG(&regs->msg.rx_sff.id[0])<<3 |
READ_REG(&regs->msg.rx_sff.id[1])>>5;
-
+
while(tmp--){
msg->data[tmp] = READ_REG(&regs->msg.rx_sff.data[tmp]);
}
@@ -1618,29 +1618,29 @@ static void occan_interrupt(occan_priv *can){
msg->data[7] = READ_REG(&regs->msg.rx_sff.data[7]);
*/
}
-
+
/* Re-Enable RX buffer for a new message */
regs->cmd = PELICAN_CMD_RELRXBUF;
-
+
/* make message available to the user */
occan_fifo_put(can->rxfifo);
-
+
/* bump stat counters */
can->stats.rx_msgs++;
-
+
/* signal the semaphore only once */
signal_rx = 1;
}
-
+
if ( iflags & PELICAN_IF_TX ){
/* there is room in tx fifo of HW */
-
+
if ( !occan_fifo_empty(can->txfifo) ){
/* send 1 more messages */
msg = occan_fifo_claim_get(can->txfifo);
-
+
if ( pelican_send(can,msg) ){
- /* ERROR! We got an TX interrupt telling us
+ /* ERROR! We got an TX interrupt telling us
* tx fifo is empty, yet it is not.
*
* Complain about this max 10 times
@@ -1651,86 +1651,86 @@ static void occan_interrupt(occan_priv *can){
can->status |= OCCAN_STATUS_QUEUE_ERROR;
can->stats.tx_buf_error++;
}
-
+
/* free software-fifo space taken by sent message */
occan_fifo_get(can->txfifo);
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
/* wake any sleeping thread waiting for "fifo not full" */
signal_tx = 1;
}
}
-
+
if ( iflags & PELICAN_IF_ERRW ){
tx_error_cnt = READ_REG(&regs->tx_err_cnt);
rx_error_cnt = READ_REG(&regs->rx_err_cnt);
-
+
/* 1. if bus off tx error counter = 127 */
if ( (tx_error_cnt > 96) || (rx_error_cnt > 96) ){
/* in Error Active Warning area or BUS OFF */
can->status |= OCCAN_STATUS_WARN;
-
+
/* check reset bit for reset mode */
if ( READ_REG(&regs->mode) & PELICAN_MOD_RESET ){
/* in reset mode ==> bus off */
can->status |= OCCAN_STATUS_ERR_BUSOFF | OCCAN_STATUS_RESET;
-
+
/***** pelican_stop(can) ******
* turn off interrupts
* enter reset mode (HW already done that for us)
*/
regs->inten = 0;
-
+
/* Indicate that we are not started any more.
- * This will make write/read return with EBUSY
+ * This will make write/read return with EBUSY
* on read/write attempts.
*
* User must issue a ioctl(START) to get going again.
*/
can->started = 0;
-
- /* signal any waiting read/write threads, so that they
+
+ /* signal any waiting read/write threads, so that they
* can handle the bus error.
*/
signal_rx = 1;
signal_tx = 1;
-
+
/* ingnore any old pending interrupt */
break;
}
-
+
}else{
/* not in Upper Error Active area any more */
can->status &= ~(OCCAN_STATUS_WARN);
}
can->stats.err_warn++;
}
-
+
if ( iflags & PELICAN_IF_DOVR){
can->status |= OCCAN_STATUS_OVERRUN;
can->stats.err_dovr++;
DBG("OCCAN_INT: DOVR\n\r");
}
-
+
if ( iflags & PELICAN_IF_ERRP){
- /* Let the error counters decide what kind of
+ /* Let the error counters decide what kind of
* interrupt it was. In/Out of EPassive area.
*/
tx_error_cnt = READ_REG(&regs->tx_err_cnt);
rx_error_cnt = READ_REG(&regs->rx_err_cnt);
-
+
if ( (tx_error_cnt > 127) || (rx_error_cnt > 127) ){
can->status |= OCCAN_STATUS_ERR_PASSIVE;
}else{
can->status &= ~(OCCAN_STATUS_ERR_PASSIVE);
}
-
+
/* increase Error Passive In/out interrupt counter */
can->stats.err_errp++;
}
-
+
if ( iflags & PELICAN_IF_ARB){
arbcode = READ_REG(&regs->arbcode);
can->stats.err_arb_bitnum[arbcode & PELICAN_ARB_BITS]++;
@@ -1739,7 +1739,7 @@ static void occan_interrupt(occan_priv *can){
}
if ( iflags & PELICAN_IF_BUS){
- /* Some kind of BUS error, only used for
+ /* Some kind of BUS error, only used for
* statistics. Error Register is decoded
* and put into can->stats.
*/
@@ -1758,27 +1758,27 @@ static void occan_interrupt(occan_priv *can){
can->stats.err_bus_other++;
break;
}
-
+
/* Get Direction (TX/RX) */
if ( errcode & PELICAN_ECC_DIR ){
can->stats.err_bus_rx++;
}else{
can->stats.err_bus_tx++;
}
-
+
/* Get Segment in frame that went wrong */
can->stats.err_bus_segs[errcode & PELICAN_ECC_SEG]++;
-
+
/* total number of bus errors */
can->stats.err_bus++;
}
}
-
+
/* signal Binary semaphore, messages available! */
if ( signal_rx ){
rtems_semaphore_release(can->rxsem);
}
-
+
if ( signal_tx ){
rtems_semaphore_release(can->txsem);
}
@@ -1787,7 +1787,7 @@ static void occan_interrupt(occan_priv *can){
#ifdef OCCAN_DEFINE_INTHANDLER
static void occan_interrupt_handler(rtems_vector_number v){
int minor;
-
+
/* convert to */
for(minor = 0; minor < can_cores; minor++) {
if ( v == (cans[minor].irq+0x10) ) {
@@ -1805,7 +1805,7 @@ static rtems_driver_address_table occan_driver = OCCAN_DRIVER_TABLE_ENTRY;
int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
rtems_status_code r;
rtems_device_major_number m;
-
+
amba_bus = bus;
if ( !bus )
return 1;
@@ -1816,7 +1816,7 @@ int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
switch(r) {
case RTEMS_TOO_MANY:
printk("OCCAN rtems_io_register_driver failed: RTEMS_TOO_MANY\n\r"); break;
- case RTEMS_INVALID_NUMBER:
+ case RTEMS_INVALID_NUMBER:
printk("OCCAN rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n\r"); break;
case RTEMS_RESOURCE_IN_USE:
printk("OCCAN rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n\r"); break;
@@ -1830,7 +1830,7 @@ int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
/*******************************************************************************
- * FIFO IMPLEMENTATION
+ * FIFO IMPLEMENTATION
*/
static occan_fifo *occan_fifo_create(int cnt){
@@ -1865,17 +1865,17 @@ static int occan_fifo_empty(occan_fifo *fifo){
static CANMsg *occan_fifo_put_claim(occan_fifo *fifo, int force){
if ( !fifo )
return NULL;
-
+
if ( occan_fifo_full(fifo) ){
-
+
if ( !force )
return NULL;
-
+
/* all buffers already used ==> overwrite the oldest */
fifo->ovcnt++;
occan_fifo_get(fifo);
}
-
+
return fifo->head;
}
@@ -1883,10 +1883,10 @@ static CANMsg *occan_fifo_put_claim(occan_fifo *fifo, int force){
static void occan_fifo_put(occan_fifo *fifo){
if ( occan_fifo_full(fifo) )
return;
-
+
/* wrap around */
fifo->head = (fifo->head >= &fifo->base[fifo->cnt-1])? fifo->base : fifo->head+1;
-
+
if ( fifo->head == fifo->tail )
fifo->full = 1;
}
@@ -1894,7 +1894,7 @@ static void occan_fifo_put(occan_fifo *fifo){
static CANMsg *occan_fifo_claim_get(occan_fifo *fifo){
if ( occan_fifo_empty(fifo) )
return NULL;
-
+
/* return oldest message */
return fifo->tail;
}
@@ -1906,7 +1906,7 @@ static void occan_fifo_get(occan_fifo *fifo){
if ( occan_fifo_empty(fifo) )
return;
-
+
/* increment indexes */
fifo->tail = (fifo->tail >= &fifo->base[fifo->cnt-1])? fifo->base : fifo->tail+1;
fifo->full = 0;
diff --git a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c b/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
index f68d04e9ca..2dd2e5be21 100644
--- a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
+++ b/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
@@ -7,11 +7,11 @@
/* Set registered device name */
#define OCCAN_DEVNAME "/dev/occanpci0"
#define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
-
+
/* Any non-static function will begin with */
#define OCCAN_PREFIX(name) occanpci##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler.
*/
#define OCCAN_REG_INT(handler,irq,arg) \
@@ -32,7 +32,7 @@ void occanpci_interrupt_handler(int irq, void *arg);
#include "occan.c"
-/* Define method that sets redundant channel
+/* Define method that sets redundant channel
* The channel select register:
* 0x00 = byte regs
* 0x40 = channel select
@@ -49,15 +49,15 @@ static void inline occanpci_set_channel(occan_priv *priv, int channel){
int occan_pci_register(amba_confarea_type *bus)
{
/* Setup configuration */
-
+
/* Register the driver */
return OCCAN_PREFIX(_register)(bus);
}
-/* Call this from PCI interrupt handler
+/* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
void occanpci_interrupt_handler(int irq, void *arg){
occan_interrupt(arg);
diff --git a/c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c b/c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c
index 2a59d32879..fb6a573763 100644
--- a/c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c
+++ b/c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c
@@ -106,8 +106,8 @@ static rtems_status_code gr_i2cmst_send_start(rtems_libi2c_bus_t *bushdl)
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
#if defined(DEBUG)
printk("gr_i2cmst_send_start called...");
-#endif
-
+#endif
+
/* The OC I2C core does not work with stand alone START events,
instead the event is buffered */
prv_ptr->sendstart = GRI2C_CMD_STA;
@@ -123,7 +123,7 @@ static rtems_status_code gr_i2cmst_send_stop(rtems_libi2c_bus_t *bushdl)
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
#if defined(DEBUG)
printk("gr_i2cmst_send_stop called...");
-#endif
+#endif
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_STO;
@@ -140,14 +140,14 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
uint8_t addr_byte;
rtems_status_code rc;
#if defined(DEBUG)
- printk("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...",
+ printk("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...",
addr, rw);
#endif
/* Check if long address is needed */
if (addr > 0x7f) {
addr_byte = ((addr >> 7) & 0x06) | (rw ? 1 : 0);
-
+
prv_ptr->reg_ptr->tdrd = addr_byte;
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart;
prv_ptr->sendstart = 0;
@@ -189,7 +189,7 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
}
-static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
+static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
unsigned char *bytes, int nbytes)
{
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
@@ -207,7 +207,7 @@ static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
prv_ptr->sendstart);
expected_sts = GRI2C_STS_RXACK;
} else {
- prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_RD | prv_ptr->sendstart;
+ prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_RD | prv_ptr->sendstart;
}
prv_ptr->sendstart = 0;
/* Wait until end of transfer */
@@ -227,7 +227,7 @@ static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
return buf - bytes;
}
-static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
+static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
unsigned char *bytes, int nbytes)
{
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
@@ -235,19 +235,19 @@ static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
rtems_status_code rc;
#if defined(DEBUG)
printk("gr_i2cmst_write_bytes called, nbytes = %d...", nbytes);
-#endif
+#endif
while (nbytes-- > 0) {
#if defined(DEBUG)
printk("writing byte 0x%02X...", *buf);
-#endif
+#endif
prv_ptr->reg_ptr->tdrd = *buf++;
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart;
prv_ptr->sendstart = 0;
/* Wait for transfer to complete */
rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE);
-
+
if (rc != RTEMS_SUCCESSFUL) {
#if defined(DEBUG)
printk("exited with error\n");
@@ -275,13 +275,13 @@ static rtems_libi2c_bus_ops_t gr_i2cmst_ops = {
static gr_i2cmst_desc_t gr_i2cmst_desc = {
{ /* rtems_libi2c_bus_t */
ops : &gr_i2cmst_ops,
- size : sizeof(gr_i2cmst_ops),
+ size : sizeof(gr_i2cmst_ops),
},
{ /* gr_i2cmst_prv_t, private data */
reg_ptr : NULL,
sysfreq : 40000,
}
-
+
};
/* Scans for I2CMST core and initalizes i2c library */
@@ -294,13 +294,13 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
int rc;
int device_found = 0;
amba_apb_device apbi2cmst;
-
+
/* Scan AMBA bus for I2CMST core */
device_found = amba_find_apbslv(abus, VENDOR_GAISLER, GAISLER_I2CMST,
&apbi2cmst);
if (device_found == 1) {
-
+
/* Initialize i2c library */
rc = rtems_libi2c_initialize();
if (rc < 0) {
@@ -311,21 +311,21 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
}
gr_i2cmst_desc.prv.reg_ptr = (gr_i2cmst_regs_t *)apbi2cmst.start;
-
+
/* Detect system frequency, same as in apbuart_initialize */
#ifndef SYS_FREQ_kHZ
#if defined(LEON3)
- /* LEON3: find timer address via AMBA Plug&Play info */
+ /* LEON3: find timer address via AMBA Plug&Play info */
{
amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs;
-
+
if (amba_find_apbslv(abus,VENDOR_GAISLER,
GAISLER_GPTIMER,&gptimer) == 1 ) {
tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
gr_i2cmst_desc.prv.sysfreq = (tregs->scaler_reload+1)*1000;
} else {
- gr_i2cmst_desc.prv.sysfreq = 40000; /* Default to 40MHz */
+ gr_i2cmst_desc.prv.sysfreq = 40000; /* Default to 40MHz */
}
}
#elif defined(LEON2)
@@ -350,7 +350,7 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
return -rc;
}
}
-
+
#if defined(DEBUG)
printk("exited\n");
#endif
diff --git a/c/src/lib/libbsp/sparc/shared/include/ambapp.h b/c/src/lib/libbsp/sparc/shared/include/ambapp.h
index 4e76331c64..e2b557d85e 100644
--- a/c/src/lib/libbsp/sparc/shared/include/ambapp.h
+++ b/c/src/lib/libbsp/sparc/shared/include/ambapp.h
@@ -80,9 +80,9 @@ extern "C" {
#define OPENCORES_PCIBR 0x4
#define OPENCORES_ETHMAC 0x5
-/*
+/*
*
- * Macros for manipulating Configuration registers
+ * Macros for manipulating Configuration registers
*
*/
#define amba_get_confword(tab, index, word) (*((tab).addr[(index)]+(word)))
@@ -114,7 +114,7 @@ extern "C" {
#define AMBA_TYPE_AHBIO_ADDR(addr,base_ioarea) ((unsigned int)(base_ioarea) | ((addr) >> 12))
/*
- * Types and structure used for AMBA Plug & Play bus scanning
+ * Types and structure used for AMBA Plug & Play bus scanning
*
*/
typedef struct amba_device_table {
@@ -164,7 +164,7 @@ typedef struct {
* \param amba_conf AMBA P&P device info is placed here.
* \param ioarea address of AMBA Plug&Play information,
* on LEON3 systems default is 0xfff00000
- * \param mmaps Memory mmap specific to this amba bus,
+ * \param mmaps Memory mmap specific to this amba bus,
* if NULL no translation will be made (default).
* A array of maps, ending with a entry with size=0.
*/
diff --git a/c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h b/c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h
index ac3a548912..e8064297c8 100644
--- a/c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h
+++ b/c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h
@@ -21,16 +21,16 @@ extern "C" {
/* Register APBUART driver, if APBUART devices are found.
* bus = pointer to AMBA bus description used to search for APBUART(s).
- *
+ *
*/
int apbuart_pci_register (amba_confarea_type * bus);
/* This function must be called on APBUART interrupt. Called from the
- * PCI interrupt handler.
- * irq = AMBA IRQ assigned to the APBUART device, is found by reading
+ * PCI interrupt handler.
+ * irq = AMBA IRQ assigned to the APBUART device, is found by reading
* pending register on IRQMP connected to the APBUART device.
- *
+ *
*/
void apbuartpci_interrupt_handler (int irq, void *arg);
diff --git a/c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h b/c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h
index 183ceec781..1edf6f98d3 100644
--- a/c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h
+++ b/c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h
@@ -21,16 +21,16 @@ extern "C" {
/* Register APBUART driver, if APBUART devices are found.
* bus = pointer to AMBA bus description used to search for APBUART(s).
- *
+ *
*/
int apbuart_rasta_register(amba_confarea_type *bus);
/* This function must be called on APBUART interrupt. Called from the
- * RASTA interrupt handler.
- * irq = AMBA IRQ assigned to the APBUART device, is found by reading
+ * RASTA interrupt handler.
+ * irq = AMBA IRQ assigned to the APBUART device, is found by reading
* pending register on IRQMP connected to the APBUART device.
- *
+ *
*/
void apbuartrasta_interrupt_handler(int irq, void *arg);
diff --git a/c/src/lib/libbsp/sparc/shared/include/b1553brm.h b/c/src/lib/libbsp/sparc/shared/include/b1553brm.h
index e2d8a29242..f5fd343078 100644
--- a/c/src/lib/libbsp/sparc/shared/include/b1553brm.h
+++ b/c/src/lib/libbsp/sparc/shared/include/b1553brm.h
@@ -38,9 +38,9 @@ struct brm_reg {
volatile unsigned int mfiltb; /* 0x3C */
volatile unsigned int rt_cmd_leg[16]; /* 0x40-0x80 */
volatile unsigned int enhanced; /* 0x84 */
-
+
volatile unsigned int dummy[31];
-
+
volatile unsigned int w_ctrl; /* 0x100 */
volatile unsigned int w_irqctrl; /* 0x104 */
volatile unsigned int w_ahbaddr; /* 0x108 */
@@ -63,7 +63,7 @@ struct rt_msg {
unsigned short desc;
};
-/*
+/*
* rtaddr[0] and subaddr[0] : RT address and subaddress (for rt-rt receive addresses)
* rtaddr[1] and subaddr[1] : Only for RT-RT. Transmit addresses.
*
@@ -71,9 +71,9 @@ struct rt_msg {
*
* ctrl, bit 0 (TR) : 1 - transmit, 0 - receive. Ignored for rt-rt
* bit 1 (RTRT) : 1 - rt to rt, 0 - normal
- * bit 2 (AB) : 1 - Bus B, 0 - Bus A
+ * bit 2 (AB) : 1 - Bus B, 0 - Bus A
* bit 4:3 (Retry) : 1 - 1, 2 - 2, 3 - 3, 0 - 4
- * bit 5 (END) : End of list
+ * bit 5 (END) : End of list
* bit 15 (BAME) : Message error. Set by BRM if protocol error is detected
*
* tsw[0] : status word
@@ -83,7 +83,7 @@ struct rt_msg {
*
*/
struct bc_msg {
- unsigned char rtaddr[2];
+ unsigned char rtaddr[2];
unsigned char subaddr[2];
unsigned short wc;
unsigned short ctrl;
@@ -155,7 +155,7 @@ int brm_register_leon3_ramon_asic(void);
#define CLKSEL_MASK 0x7
-/* Register BRM driver
+/* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)
diff --git a/c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h b/c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h
index 5e47e462f0..74f9d321de 100644
--- a/c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h
+++ b/c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h
@@ -19,25 +19,25 @@
extern "C" {
#endif
-/* Register BRM driver
+/* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)
- *
+ *
* Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process)
*/
int b1553brm_pci_register(
- amba_confarea_type *bus,
- unsigned int clksel,
- unsigned int clkdiv,
+ amba_confarea_type *bus,
+ unsigned int clksel,
+ unsigned int clkdiv,
unsigned int brm_freq,
unsigned int memarea,
unsigned int hw_address
);
-
+
/* This function must be called on BRM interrupt. Called from the
* PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device,
diff --git a/c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h b/c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h
index 9f77bc855d..cd5165801c 100644
--- a/c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h
+++ b/c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h
@@ -19,25 +19,25 @@
extern "C" {
#endif
-/* Register BRM driver
+/* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)
- *
+ *
* Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process)
*/
int b1553brm_rasta_register(
- amba_confarea_type *bus,
- unsigned int clksel,
- unsigned int clkdiv,
+ amba_confarea_type *bus,
+ unsigned int clksel,
+ unsigned int clkdiv,
unsigned int brm_freq,
unsigned int memarea,
unsigned int hw_address
);
-
+
/* This function must be called on BRM interrupt. Called from the
* PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device,
diff --git a/c/src/lib/libbsp/sparc/shared/include/debug_defs.h b/c/src/lib/libbsp/sparc/shared/include/debug_defs.h
index 414734ddfd..2adea2af54 100644
--- a/c/src/lib/libbsp/sparc/shared/include/debug_defs.h
+++ b/c/src/lib/libbsp/sparc/shared/include/debug_defs.h
@@ -14,15 +14,15 @@ extern "C" {
#endif
#define DBG(fmt, args...) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); } while(0)
- #define DBG2(fmt) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__); } while(0)
+ #define DBG2(fmt) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__); } while(0)
#define DBGC(c,fmt, args...) do { if (DEBUG_FLAGS & c) { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); }} while(0)
#else
#define DBG(fmt, args...)
- #define DBG2(fmt, args...)
+ #define DBG2(fmt, args...)
#define DBGC(c, fmt, args...)
-
+
#endif
#ifdef DEBUGFUNCS
diff --git a/c/src/lib/libbsp/sparc/shared/include/grcan.h b/c/src/lib/libbsp/sparc/shared/include/grcan.h
index 88c15c1282..8b3ed15e55 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grcan.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grcan.h
@@ -1,5 +1,5 @@
/*
- * Macros used for grcan controller
+ * Macros used for grcan controller
*
* COPYRIGHT (c) 2007.
* Gaisler Research
@@ -41,7 +41,7 @@ struct grcan_regs {
volatile unsigned int tx0ctrl; /* 0x200 */
volatile unsigned int tx0addr; /* 0x204 */
volatile unsigned int tx0size; /* 0x208 */
- volatile unsigned int tx0wr; /* 0x20C */
+ volatile unsigned int tx0wr; /* 0x20C */
volatile unsigned int tx0rd; /* 0x210 */
volatile unsigned int tx0irq; /* 0x214 */
@@ -50,9 +50,9 @@ struct grcan_regs {
volatile unsigned int rx0ctrl; /* 0x300 */
volatile unsigned int rx0addr; /* 0x304 */
volatile unsigned int rx0size; /* 0x308 */
- volatile unsigned int rx0wr; /* 0x30C */
+ volatile unsigned int rx0wr; /* 0x30C */
volatile unsigned int rx0rd; /* 0x310 */
- volatile unsigned int rx0irq; /* 0x314 */
+ volatile unsigned int rx0irq; /* 0x314 */
volatile unsigned int rx0mask; /* 0x318 */
volatile unsigned int rx0code; /* 0x31C */
};
@@ -76,7 +76,7 @@ struct grcan_timing {
};
struct grcan_selection {
- int selection;
+ int selection;
int enable0;
int enable1;
};
diff --git a/c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h b/c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h
index d0b5b66853..1f96da6bef 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h
@@ -8,8 +8,8 @@
extern "C" {
#endif
-/* Registers the GRCAN for RASTA
- *
+/* Registers the GRCAN for RASTA
+ *
* rambase is address of the first GRCAN core has it's TX buffer, followed by
* it's RX buffer
*/
diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw.h b/c/src/lib/libbsp/sparc/shared/include/grspw.h
index 28260642db..4c6c869d61 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw.h
@@ -1,5 +1,5 @@
/*
- * Macros used for Spacewire bus
+ * Macros used for Spacewire bus
*
* COPYRIGHT (c) 2007.
* Gaisler Research
@@ -65,26 +65,26 @@ typedef struct {
unsigned int linkstart;
unsigned int check_rmap_err; /* check incoming packets for rmap errors */
- unsigned int rm_prot_id; /* remove protocol id from incoming packets */
+ unsigned int rm_prot_id; /* remove protocol id from incoming packets */
unsigned int tx_blocking; /* use blocking tx */
unsigned int tx_block_on_full; /* block when all tx_buffers are used */
unsigned int rx_blocking; /* block when no data is available */
unsigned int disable_err; /* disable link automatically when link error is detected */
- unsigned int link_err_irq; /* generate an interrupt when link error occurs */
+ unsigned int link_err_irq; /* generate an interrupt when link error occurs */
rtems_id event_id; /* task id that should receive link err irq event */
-
+
unsigned int is_rmap;
unsigned int is_rxunaligned;
unsigned int is_rmapcrc;
-
+
unsigned int nodemask;
} spw_config;
#define SPACEWIRE_IOCTRL_SET_NODEADDR 1
#define SPACEWIRE_IOCTRL_SET_RXBLOCK 2
-#define SPACEWIRE_IOCTRL_SET_DESTKEY 4
+#define SPACEWIRE_IOCTRL_SET_DESTKEY 4
#define SPACEWIRE_IOCTRL_SET_CLKDIV 5
-#define SPACEWIRE_IOCTRL_SET_TIMER 6
+#define SPACEWIRE_IOCTRL_SET_TIMER 6
#define SPACEWIRE_IOCTRL_SET_DISCONNECT 7
#define SPACEWIRE_IOCTRL_SET_PROMISCUOUS 8
#define SPACEWIRE_IOCTRL_SET_RMAPEN 9
@@ -114,7 +114,7 @@ typedef struct {
int grspw_register(amba_confarea_type *bus);
-#if 0
+#if 0
struct grspw_buf;
struct grspw_buf {
@@ -124,7 +124,7 @@ struct grspw_buf {
unsigned int dlen; /* data length of '*data' */
unsigned int max_dlen; /* allocated length of '*data' */
void *data; /* pointer to beginning of cargo data */
-
+
/* Only used when transmitting */
unsigned int hlen; /* length of header '*header' */
unsigned int max_hlen; /* allocated length of '*header' */
diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pci.h b/c/src/lib/libbsp/sparc/shared/include/grspw_pci.h
index 7266f1398d..aea50f3791 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pci.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pci.h
@@ -21,7 +21,7 @@ extern "C" {
/* Register GRSPW Driver
* bus = &amba_conf for LEON3
- *
+ *
* Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process)
diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h b/c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h
index 2f6f2bd81e..0e4e5bee4d 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h
@@ -21,7 +21,7 @@ extern "C" {
/* Register GRSPW Driver
* bus = &amba_conf for LEON3
- *
+ *
* Memory setup:
* ram_base = 128k aligned pointer to memory (as the CPU sees it)
*/
diff --git a/c/src/lib/libbsp/sparc/shared/include/i2cmst.h b/c/src/lib/libbsp/sparc/shared/include/i2cmst.h
index 63942a45e6..21780ee143 100644
--- a/c/src/lib/libbsp/sparc/shared/include/i2cmst.h
+++ b/c/src/lib/libbsp/sparc/shared/include/i2cmst.h
@@ -47,7 +47,7 @@ typedef struct gr_i2cmst_regs {
#define GRI2C_STS_AL 0x00000020 /* Arbitration lost */
#define GRI2C_STS_TIP 0x00000002 /* Transfer in progress */
#define GRI2C_STS_IF 0x00000001 /* Interrupt flag */
-
+
#define GRI2C_STATUS_IDLE 0x00000000
/* The OC I2C core will perform a write after a start unless the RD bit
@@ -57,7 +57,7 @@ typedef struct gr_i2cmst_regs {
typedef struct gr_i2cmst_prv {
gr_i2cmst_regs_t *reg_ptr;
unsigned int sysfreq; /* System clock frequency in kHz */
- unsigned char sendstart; /* START events are buffered here */
+ unsigned char sendstart; /* START events are buffered here */
/* rtems_irq_number irq_number; */
/* rtems_id irq_sema_id; */
} gr_i2cmst_prv_t;
diff --git a/c/src/lib/libbsp/sparc/shared/include/occan.h b/c/src/lib/libbsp/sparc/shared/include/occan.h
index 227b56f8fb..12ec42a01c 100644
--- a/c/src/lib/libbsp/sparc/shared/include/occan.h
+++ b/c/src/lib/libbsp/sparc/shared/include/occan.h
@@ -24,7 +24,7 @@ extern "C" {
typedef struct {
char extended; /* 1= Extended Frame (29-bit id), 0= STD Frame (11-bit id) */
char rtr; /* RTR - Remote Transmission Request */
- char sshot; /* single shot */
+ char sshot; /* single shot */
unsigned char len;
unsigned char data[8];
unsigned int id;
@@ -34,50 +34,50 @@ typedef struct {
/* tx/rx stats */
unsigned int rx_msgs;
unsigned int tx_msgs;
-
+
/* Error Interrupt counters */
unsigned int err_warn;
unsigned int err_dovr;
unsigned int err_errp;
unsigned int err_arb;
unsigned int err_bus;
-
+
/**** BUS ERRORS (err_arb) ****/
-
+
/* ALC 4-0 */
unsigned int err_arb_bitnum[32]; /* At what bit arbitration is lost */
-
+
/******************************/
-
+
/**** BUS ERRORS (err_bus) ****/
-
+
/* ECC 7-6 */
unsigned int err_bus_bit; /* Bit error */
unsigned int err_bus_form; /* Form Error */
unsigned int err_bus_stuff; /* Stuff Error */
unsigned int err_bus_other; /* Other Error */
-
+
/* ECC 5 */
unsigned int err_bus_rx; /* Errors during Reception */
unsigned int err_bus_tx; /* Errors during Transmission */
-
+
/* ECC 4:0 */
unsigned int err_bus_segs[32]; /* Segment (Where in frame error occured)
* See OCCAN_SEG_* defines for indexes
*/
-
+
/******************************/
-
-
+
+
/* total number of interrupts */
unsigned int ints;
-
+
/* software monitoring hw errors */
unsigned int tx_buf_error;
-
+
/* Software fifo overrun */
unsigned int rx_sw_dovr;
-
+
} occan_stats;
/* indexes into occan_stats.err_bus_segs[index] */
diff --git a/c/src/lib/libbsp/sparc/shared/include/occan_pci.h b/c/src/lib/libbsp/sparc/shared/include/occan_pci.h
index f5da14c679..2f46293af2 100644
--- a/c/src/lib/libbsp/sparc/shared/include/occan_pci.h
+++ b/c/src/lib/libbsp/sparc/shared/include/occan_pci.h
@@ -29,7 +29,7 @@ int occan_pci_register(amba_confarea_type *bus);
* PCI interrupt handler. irq = AMBA IRQ assigned to the OC_CAN device,
* is found by reading pending register on IRQMP connected to the OC_CAN
* device.
- *
+ *
*/
void occanpci_interrupt_handler(int irq, void *arg);
diff --git a/c/src/lib/libbsp/sparc/shared/include/pci.h b/c/src/lib/libbsp/sparc/shared/include/pci.h
index 65c5b9335a..4416f0a2b4 100644
--- a/c/src/lib/libbsp/sparc/shared/include/pci.h
+++ b/c/src/lib/libbsp/sparc/shared/include/pci.h
@@ -47,7 +47,7 @@ extern "C" {
#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
#define PCI_STATUS_PARITY 0x100 /* Detected parity error */
#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */
-#define PCI_STATUS_DEVSEL_FAST 0x000
+#define PCI_STATUS_DEVSEL_FAST 0x000
#define PCI_STATUS_DEVSEL_MEDIUM 0x200
#define PCI_STATUS_DEVSEL_SLOW 0x400
#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
@@ -76,8 +76,8 @@ extern "C" {
/*
* Base addresses specify locations in memory or I/O space.
- * Decoded size can be determined by writing a value of
- * 0xffffffff to the register, and reading it back. Only
+ * Decoded size can be determined by writing a value of
+ * 0xffffffff to the register, and reading it back. Only
* 1 bits are decoded.
*/
#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
@@ -101,7 +101,7 @@ extern "C" {
/* Header type 0 (normal devices) */
#define PCI_CARDBUS_CIS 0x28
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
-#define PCI_SUBSYSTEM_ID 0x2e
+#define PCI_SUBSYSTEM_ID 0x2e
#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE 0x01
#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
@@ -460,8 +460,8 @@ extern "C" {
#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
-#define PCI_VENDOR_ID_DPT 0x1044
-#define PCI_DEVICE_ID_DPT 0xa400
+#define PCI_VENDOR_ID_DPT 0x1044
+#define PCI_DEVICE_ID_DPT 0xa400
#define PCI_VENDOR_ID_OPTI 0x1045
#define PCI_DEVICE_ID_OPTI_92C178 0xc178
@@ -1116,37 +1116,37 @@ typedef struct {
extern pci_config BSP_pci_configuration;
extern inline int
-pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
+pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned char * val) {
return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val);
}
extern inline int
-pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
+pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned short * val) {
return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val);
}
extern inline int
-pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
+pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned int * val) {
return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
}
extern inline int
-pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
+pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned char val) {
return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val);
}
extern inline int
-pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
+pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned short val) {
return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val);
}
extern inline int
-pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
+pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned int val) {
return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val);
}
diff --git a/c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c b/c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c
index f5a21fc07e..0047d07784 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c
@@ -28,7 +28,7 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid,
hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
for (fun=0; fun<hd; fun++) {
- /*
+ /*
* The last devfn id/slot is special; must skip it
*/
if (PCI_MAX_DEVICES-1==dev && PCI_MAX_FUNCTIONS-1 == fun)
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw.c b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
index aa93cf5bdf..cd6c801cb6 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
@@ -9,7 +9,7 @@
* http://www.rtems.com/license/LICENSE.
*
* Changes:
- *
+ *
* 2007-09-27, Daniel Hellstrom <daniel@gaisler.com>
* Added basic support for GRSPW2 core.
*
@@ -23,23 +23,23 @@
* Typical LEON3 register: grspw_register(&amba_conf);
*
* 2007-05-28, Daniel Hellstrom <daniel@gaisler.com>
- * Changed errno return values, compatible with RASTA
+ * Changed errno return values, compatible with RASTA
* Spacewire driver
*
* 2007-05-25, Daniel Hellstrom <daniel@gaisler.com>
- * Changed name from /dev/spacewire,/dev/spacewire_b...
+ * Changed name from /dev/spacewire,/dev/spacewire_b...
* to /dev/grspw0,/dev/grspw1...
*
* 2007-05-24, Daniel Hellstrom <daniel@gaisler.com>
* Merged LEON3, LEON2 and RASTA driver to one - this.
- * The driver is included and configured from grspw_pci.c
+ * The driver is included and configured from grspw_pci.c
* and grspw_rasta.c.
*
* 2007-05-23, Daniel Hellstrom <daniel@gaisler.com>
* Changed open call, now one need to first call open
* and then ioctl(fd,START,timeout) in order to setup
* hardware for communication.
- *
+ *
* 2007-05-23, Daniel Hellstrom <daniel@gaisler.com>
* Added ioctl(fd,SET_COREFREQ,freq_arg), the command
* can autodetect the register values disconnect and
@@ -93,7 +93,7 @@
#define DEBUG_SPACEWIRE_FLAGS (DBGSPW_IOCALLS | DBGSPW_TX | DBGSPW_RX )
/* #define DEBUG_SPACEWIRE_ONOFF */
-
+
#ifdef DEBUG_SPACEWIRE_ONOFF
#define SPACEWIRE_DBG(fmt, args...) do { { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); }} while(0)
#define SPACEWIRE_DBG2(fmt) do { { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__); }} while(0)
@@ -113,15 +113,15 @@ typedef struct {
volatile unsigned int time;
volatile unsigned int timer;
volatile unsigned int pad;
-
- volatile unsigned int dma0ctrl;
+
+ volatile unsigned int dma0ctrl;
volatile unsigned int dma0rxmax;
volatile unsigned int dma0txdesc;
volatile unsigned int dma0rxdesc;
-
+
/* For GRSPW core 2 and onwards */
volatile unsigned int dma0addr;
-
+
} LEON3_SPACEWIRE_Regs_Map;
typedef struct {
@@ -149,7 +149,7 @@ typedef struct {
#define SPW_ALIGN(p,c) ((((unsigned int)(p))+((c)-1))&~((c)-1))
typedef struct {
- /* configuration parameters */
+ /* configuration parameters */
spw_config config;
unsigned int tx_all_in_use;
@@ -165,7 +165,7 @@ typedef struct {
/* statistics */
spw_stats stat;
-
+
char *ptr_rxbuf0;
char *ptr_txdbuf0;
char *ptr_txhbuf0;
@@ -176,12 +176,12 @@ typedef struct {
int open;
int running;
unsigned int core_freq_khz;
-
+
/* semaphores*/
rtems_id txsp;
rtems_id rxsp;
-
+
SPACEWIRE_RXBD *rx;
SPACEWIRE_TXBD *tx;
@@ -219,7 +219,7 @@ static unsigned int _MEM_READ(void *addr) {
: "=r"(tmp)
: "r"(addr)
);
- return tmp;
+ return tmp;
}
#endif
@@ -376,22 +376,22 @@ int GRSPW_PREFIX(_register)(amba_confarea_type *bus)
{
rtems_status_code r;
rtems_device_major_number m;
-
+
/* Get System clock frequency */
sys_freq_khz = 0;
-
+
amba_bus = bus;
-
+
/* Auto Detect the GRSPW core frequency by assuming that the system frequency is
* is the same as the GRSPW core frequency.
*/
#ifndef SYS_FREQ_KHZ
#ifdef LEON3
- /* LEON3: find timer address via AMBA Plug&Play info */
+ /* LEON3: find timer address via AMBA Plug&Play info */
{
amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs;
-
+
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){
tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
sys_freq_khz = (tregs->scaler_reload+1)*1000;
@@ -400,7 +400,7 @@ int GRSPW_PREFIX(_register)(amba_confarea_type *bus)
sys_freq_khz = 40000; /* Default to 40MHz */
printk("GRSPW: Failed to detect system frequency\n\r");
}
-
+
}
#elif defined(LEON2)
/* LEON2: use hardcoded address to get to timer */
@@ -414,8 +414,8 @@ int GRSPW_PREFIX(_register)(amba_confarea_type *bus)
#else
/* Use hardcoded frequency */
sys_freq_khz = SYS_FREQ_KHZ;
-#endif
-
+#endif
+
SPACEWIRE_DBG2("register driver\n");
if ((r = rtems_io_register_driver(0, &grspw_driver, &m)) == RTEMS_SUCCESSFUL) {
SPACEWIRE_DBG2("success\n");
@@ -423,21 +423,21 @@ int GRSPW_PREFIX(_register)(amba_confarea_type *bus)
} else {
switch(r) {
case RTEMS_TOO_MANY:
- SPACEWIRE_DBG2("failed RTEMS_TOO_MANY\n");
+ SPACEWIRE_DBG2("failed RTEMS_TOO_MANY\n");
break;
case RTEMS_INVALID_NUMBER:
- SPACEWIRE_DBG2("failed RTEMS_INVALID_NUMBER\n");
+ SPACEWIRE_DBG2("failed RTEMS_INVALID_NUMBER\n");
break;
case RTEMS_RESOURCE_IN_USE:
- SPACEWIRE_DBG2("failed RTEMS_RESOURCE_IN_USE\n");
+ SPACEWIRE_DBG2("failed RTEMS_RESOURCE_IN_USE\n");
break;
default:
- SPACEWIRE_DBG("failed %i\n",r);
+ SPACEWIRE_DBG("failed %i\n",r);
break;
}
return 1;
}
-
+
}
/* Get a value at least 6.4us in number of clock cycles */
@@ -466,7 +466,7 @@ static int grspw_buffer_alloc(GRSPW_DEV *pDev) {
pDev->ptr_rxbuf0 = (char *) malloc(pDev->rxbufsize * pDev->rxbufcnt);
pDev->ptr_txdbuf0 = (char *) malloc(pDev->txdbufsize * pDev->txbufcnt);
pDev->ptr_txhbuf0 = (char *) malloc(pDev->txhbufsize * pDev->txbufcnt);
- if ((pDev->ptr_rxbuf0 == NULL) ||
+ if ((pDev->ptr_rxbuf0 == NULL) ||
(pDev->ptr_txdbuf0 == NULL) || (pDev->ptr_txhbuf0 == NULL)) {
return 1;
} else {
@@ -487,11 +487,11 @@ static int grspw_buffer_alloc(GRSPW_DEV *pDev)
if (pDev->ptr_txhbuf0) {
free(pDev->ptr_txhbuf0);
}
-
+
pDev->ptr_rxbuf0 = (char *) malloc(pDev->rxbufsize * pDev->rxbufcnt);
pDev->ptr_txdbuf0 = (char *) malloc(pDev->txdbufsize * pDev->txbufcnt);
pDev->ptr_txhbuf0 = (char *) malloc(pDev->txhbufsize * pDev->txbufcnt);
- if ((pDev->ptr_rxbuf0 == NULL) ||
+ if ((pDev->ptr_rxbuf0 == NULL) ||
(pDev->ptr_txdbuf0 == NULL) || (pDev->ptr_txhbuf0 == NULL)) {
return 1;
} else {
@@ -513,7 +513,7 @@ static int grspw_buffer_alloc(GRSPW_DEV *pDev)
/*
* Standard Interrupt handler
*/
-static rtems_isr grspw_interrupt_handler(rtems_vector_number v)
+static rtems_isr grspw_interrupt_handler(rtems_vector_number v)
{
int minor;
@@ -530,12 +530,12 @@ static void grspw_interrupt(GRSPW_DEV *pDev){
int dmactrl;
int status;
int ctrl;
-
+
status = SPW_STATUS_READ(pDev);
SPW_STATUS_WRITE(pDev, SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE);
dmactrl = SPW_READ(&pDev->regs->dma0ctrl);
SPW_WRITE(&pDev->regs->dma0ctrl, dmactrl | SPW_DMACTRL_PR);
- /* If linkinterrupts are enabled check if it was a linkerror irq and then send an event to the
+ /* If linkinterrupts are enabled check if it was a linkerror irq and then send an event to the
process set in the config */
if (pDev->config.link_err_irq) {
if (status & (SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | SPW_STATUS_WE)) {
@@ -570,7 +570,7 @@ static void grspw_interrupt(GRSPW_DEV *pDev){
if (status & SPW_STATUS_EE) {
pDev->stat.early_ep++;
}
-
+
/* Check for tx interrupts */
while( (pDev->tx_sent != pDev->tx_cur) || pDev->tx_all_in_use) {
/* Has this descriptor been sent? */
@@ -580,18 +580,18 @@ static void grspw_interrupt(GRSPW_DEV *pDev){
}
/* Yes, increment status counters & tx_sent so we can use this descriptor to send more packets with */
pDev->stat.packets_sent++;
-
+
rtems_semaphore_release(pDev->txsp);
-
+
if ( ctrl & SPW_TXBD_LE ) {
pDev->stat.tx_link_err++;
}
-
+
/* step to next descriptor */
pDev->tx_sent = (pDev->tx_sent + 1) % pDev->txbufcnt;
pDev->tx_all_in_use = 0; /* not all of the descriptors can be in use since we just freed one. */
}
-
+
/* Check for rx interrupts */
if (dmactrl & SPW_DMACTRL_PR) {
rtems_semaphore_release(pDev->rxsp);
@@ -610,12 +610,12 @@ static rtems_device_driver grspw_initialize(
GRSPW_DEV *pDev;
char console_name[20];
amba_apb_device dev;
-
- SPACEWIRE_DBG2("spacewire driver initialization\n");
-
+
+ SPACEWIRE_DBG2("spacewire driver initialization\n");
+
/* Copy device name */
strcpy(console_name,GRSPW_DEVNAME);
-
+
/* Get the number of GRSPW cores */
i=0; spw_cores = 0; spw_cores2 = 0;
@@ -633,24 +633,24 @@ static rtems_device_driver grspw_initialize(
i++;
}
#endif
-
+
if ( (spw_cores+spw_cores2) < 1 ){
/* No GRSPW cores around... */
return RTEMS_SUCCESSFUL;
}
-
+
/* Allocate memory for all spacewire cores */
grspw_devs = (GRSPW_DEV *)malloc((spw_cores+spw_cores2) * sizeof(GRSPW_DEV));
-
+
/* Zero out all memory */
memset(grspw_devs,0,(spw_cores+spw_cores2) * sizeof(GRSPW_DEV));
-
+
/* loop all found spacewire cores */
i = 0;
for(minor=0; minor<(spw_cores+spw_cores2); minor++){
pDev = &grspw_devs[minor];
-
+
/* Get device */
if ( spw_cores > minor ) {
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,GAISLER_SPACEWIRE,&dev,minor);
@@ -659,7 +659,7 @@ static rtems_device_driver grspw_initialize(
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,GAISLER_GRSPW2,&dev,minor-spw_cores);
pDev->core_ver = 2;
}
-
+
pDev->regs = (LEON3_SPACEWIRE_Regs_Map *)dev.start;
pDev->irq = dev.irq;
pDev->minor = minor;
@@ -667,7 +667,7 @@ static rtems_device_driver grspw_initialize(
/* register interrupt routine */
GRSPW_REG_INT(GRSPW_PREFIX(_interrupt_handler), pDev->irq, pDev);
-
+
SPACEWIRE_DBG("spacewire core at [0x%x]\n", (unsigned int) pDev->regs);
/* initialize the code with some resonable values,
@@ -684,22 +684,22 @@ static rtems_device_driver grspw_initialize(
pDev->config.tx_block_on_full = 0;
pDev->config.rx_blocking = 0;
pDev->config.disable_err = 0;
- pDev->config.link_err_irq = 0;
- pDev->config.event_id = 0;
-
+ pDev->config.link_err_irq = 0;
+ pDev->config.event_id = 0;
+
pDev->ptr_rxbuf0 = 0;
pDev->ptr_txdbuf0 = 0;
pDev->ptr_txhbuf0 = 0;
-
+
#ifdef GRSPW_STATIC_MEM
GRSPW_CALC_MEMOFS(spw_cores,minor,&pDev->membase,&pDev->memend,&pDev->mem_bdtable);
#endif
-
- if (grspw_buffer_alloc(pDev))
+
+ if (grspw_buffer_alloc(pDev))
return RTEMS_NO_MEMORY;
-
+
}
-
+
/* Register Device Names, /dev/grspw0, /dev/grspw1 ... */
for (i = 0; i < spw_cores+spw_cores2; i++) {
GRSPW_DEVNAME_NO(console_name,i);
@@ -709,29 +709,29 @@ static rtems_device_driver grspw_initialize(
rtems_fatal_error_occurred(status);
}
}
-
+
/* Initialize Hardware and semaphores*/
c = 'a';
for (i = 0; i < spw_cores+spw_cores2; i++) {
pDev = &grspw_devs[i];
rtems_semaphore_create(
- rtems_build_name('T', 'x', 'S', c),
- 0,
+ rtems_build_name('T', 'x', 'S', c),
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
- RTEMS_NO_PRIORITY_CEILING,
- 0,
+ RTEMS_NO_PRIORITY_CEILING,
+ 0,
&(pDev->txsp));
rtems_semaphore_create(
- rtems_build_name('R', 'x', 'S', c),
- 0,
+ rtems_build_name('R', 'x', 'S', c),
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
- RTEMS_NO_PRIORITY_CEILING,
- 0,
+ RTEMS_NO_PRIORITY_CEILING,
+ 0,
&(pDev->rxsp));
c++;
grspw_hw_init(pDev);
}
-
+
return RTEMS_SUCCESSFUL;
}
@@ -739,7 +739,7 @@ static rtems_device_driver grspw_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
- )
+ )
{
GRSPW_DEV *pDev;
SPACEWIRE_DBGC(DBGSPW_IOCALLS, "open [%i,%i]\n", major, minor);
@@ -748,13 +748,13 @@ static rtems_device_driver grspw_open(
return RTEMS_INVALID_NAME;
}
pDev = &grspw_devs[minor];
-
+
if ( pDev->open )
return RTEMS_RESOURCE_IN_USE;
-
+
/* Mark device open */
pDev->open = 1;
-
+
pDev->stat.tx_link_err = 0;
pDev->stat.rx_rmap_header_crc_err = 0;
pDev->stat.rx_rmap_data_crc_err = 0;
@@ -769,16 +769,16 @@ static rtems_device_driver grspw_open(
pDev->stat.invalid_address = 0;
pDev->stat.packets_sent = 0;
pDev->stat.packets_received = 0;
-
+
pDev->running = 0;
pDev->core_freq_khz = 0;
-
+
/* Reset Core */
grspw_hw_reset(pDev);
-
+
/* Read default configuration */
grspw_hw_read_config(pDev);
-
+
return RTEMS_SUCCESSFUL;
}
@@ -787,20 +787,20 @@ static rtems_device_driver grspw_close(
rtems_device_minor_number minor,
void * arg
)
-{
+{
GRSPW_DEV *pDev = &grspw_devs[minor];
-
- SPACEWIRE_DBGC(DBGSPW_IOCALLS, "close [%i,%i]\n", major, minor);
+
+ SPACEWIRE_DBGC(DBGSPW_IOCALLS, "close [%i,%i]\n", major, minor);
rtems_semaphore_delete(pDev->txsp);
rtems_semaphore_delete(pDev->rxsp);
grspw_hw_stop(pDev,1,1);
-
+
grspw_hw_reset(pDev);
-
+
/* Mark device closed - not open */
pDev->open = 0;
-
+
return RTEMS_SUCCESSFUL;
}
@@ -814,21 +814,21 @@ static rtems_device_driver grspw_read(
rtems_libio_rw_args_t *rw_args;
unsigned int count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
-
+
/* is link up? */
if ( !pDev->running ) {
return RTEMS_INVALID_NAME;
}
-
+
if ((rw_args->count < 1) || (rw_args->buffer == NULL)) {
return RTEMS_INVALID_NAME;
}
-
+
SPACEWIRE_DBGC(DBGSPW_IOCALLS, "read [%i,%i]: buf:0x%x len:%i \n", major, minor, (unsigned int)rw_args->buffer, rw_args->count);
-
+
while ( (count = grspw_hw_receive(pDev, rw_args->buffer, rw_args->count)) == 0) {
- /* wait a moment for any descriptors to get available
- *
+ /* wait a moment for any descriptors to get available
+ *
* Semaphore is signaled by interrupt handler
*/
if (pDev->config.rx_blocking) {
@@ -839,8 +839,8 @@ static rtems_device_driver grspw_read(
return RTEMS_RESOURCE_IN_USE;
}
}
-
-#ifdef DEBUG_SPACEWIRE_ONOFF
+
+#ifdef DEBUG_SPACEWIRE_ONOFF
if (DEBUG_SPACEWIRE_FLAGS & DBGSPW_DUMP) {
int k;
for (k = 0; k < count; k++){
@@ -852,10 +852,10 @@ static rtems_device_driver grspw_read(
printf ("\n");
}
#endif
-
+
rw_args->bytes_moved = count;
return RTEMS_SUCCESSFUL;
-
+
}
static rtems_device_driver grspw_write(
@@ -879,7 +879,7 @@ static rtems_device_driver grspw_write(
}
while ((rw_args->bytes_moved = grspw_hw_send(pDev, 0, NULL, rw_args->count, rw_args->buffer)) == 0) {
- if (pDev->config.tx_block_on_full == 1) {
+ if (pDev->config.tx_block_on_full == 1) {
SPACEWIRE_DBG2("Tx Block on full \n");
rtems_semaphore_obtain(pDev->txsp, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
} else {
@@ -905,11 +905,11 @@ static rtems_device_driver grspw_control(
rtems_device_driver ret;
rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t *) arg;
SPACEWIRE_DBGC(DBGSPW_IOCALLS, "ctrl [%i,%i]\n", major, minor);
-
+
if (!ioarg)
return RTEMS_INVALID_NAME;
-
+
ioarg->ioctl_return = 0;
switch(ioarg->command) {
case SPACEWIRE_IOCTRL_SET_NODEADDR:
@@ -996,7 +996,7 @@ static rtems_device_driver grspw_control(
return RTEMS_IO_ERROR;
}
pDev->config.clkdiv = tmp;
- break;
+ break;
case SPACEWIRE_IOCTRL_SET_TIMER:
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_SET_TIMER %i\n", (unsigned int)ioarg->buffer);
if ( pDev->core_ver <= 1 ) {
@@ -1027,7 +1027,7 @@ static rtems_device_driver grspw_control(
SPACEWIRE_DBG("SPACEWIRE_IOCTRL_SET_DISCONNECT: not implemented for GRSPW2\n");
}
break;
- case SPACEWIRE_IOCTRL_SET_PROMISCUOUS:
+ case SPACEWIRE_IOCTRL_SET_PROMISCUOUS:
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_SET_PROMISCUOUS %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
@@ -1049,7 +1049,7 @@ static rtems_device_driver grspw_control(
}
pDev->config.rmapen = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_RMAPBUFDIS:
+ case SPACEWIRE_IOCTRL_SET_RMAPBUFDIS:
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_SET_RMAPBUFDIS %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
@@ -1060,42 +1060,42 @@ static rtems_device_driver grspw_control(
}
pDev->config.rmapbufdis = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_CHECK_RMAP:
+ case SPACEWIRE_IOCTRL_SET_CHECK_RMAP:
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_SET_CHECK_RMAP %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
}
pDev->config.check_rmap_err = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_RM_PROT_ID:
+ case SPACEWIRE_IOCTRL_SET_RM_PROT_ID:
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "SPACEWIRE_IOCTRL_SET_RM_PROT_ID %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
}
pDev->config.rm_prot_id = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_TXBLOCK:
+ case SPACEWIRE_IOCTRL_SET_TXBLOCK:
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "SPACEWIRE_IOCTRL_SET_TXBLOCK %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
}
pDev->config.tx_blocking = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_TXBLOCK_ON_FULL:
+ case SPACEWIRE_IOCTRL_SET_TXBLOCK_ON_FULL:
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "SPACEWIRE_IOCTRL_SET_TXBLOCK_ON_FULL %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
}
pDev->config.tx_block_on_full = (unsigned int)ioarg->buffer;
- break;
- case SPACEWIRE_IOCTRL_SET_DISABLE_ERR:
+ break;
+ case SPACEWIRE_IOCTRL_SET_DISABLE_ERR:
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "SPACEWIRE_IOCTRL_SET_DISABLE_ERR %i \n", (unsigned int)ioarg->buffer);
if ((unsigned int)ioarg->buffer > 1) {
return RTEMS_INVALID_NAME;
}
pDev->config.disable_err = (unsigned int)ioarg->buffer;
break;
- case SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ:
+ case SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ:
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ %i \n", (unsigned int)ioarg->buffer);
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "CTRL REG: %x\n", SPW_CTRL_READ(pDev));
if ((unsigned int)ioarg->buffer > 1) {
@@ -1113,7 +1113,7 @@ static rtems_device_driver grspw_control(
pDev->config.event_id = (rtems_id)ioarg->buffer;
SPACEWIRE_DBGC(DBGSPW_IOCTRL, "Event id: %i\n", pDev->config.event_id);
break;
-
+
/* Change MAX Packet size by:
* - stop RX/TX (if on)
* - wait for hw to complete RX DMA (if on)
@@ -1125,20 +1125,20 @@ static rtems_device_driver grspw_control(
return RTEMS_INVALID_NAME;
ps = (spw_ioctl_packetsize*) ioarg->buffer;
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_SET_RXPACKETSIZE %i \n", (unsigned int)ioarg->buffer);
-
+
tmp = pDev->running;
-
+
if ( pDev->running ){
/* Stop RX */
- grspw_hw_stop(pDev,1,1);
-
+ grspw_hw_stop(pDev,1,1);
+
/* If packetsize fails it is good to know if in running mode */
pDev->running = 0;
-
+
/* Wait for Receiver to finnish pending DMA transfers if any */
grspw_hw_wait_rx_inactive(pDev);
}
-
+
/* Save new buffer sizes */
pDev->rxbufsize = ps->rxsize;
pDev->txdbufsize = ps->txdsize;
@@ -1146,9 +1146,9 @@ static rtems_device_driver grspw_control(
pDev->config.rxmaxlen = pDev->rxbufsize;
/* Free previous buffers & allocate buffers with new size */
- if (grspw_buffer_alloc(pDev))
+ if (grspw_buffer_alloc(pDev))
return RTEMS_NO_MEMORY;
-
+
/* if RX was actived before, we reactive it again */
if ( tmp ) {
if ( (status = grspw_hw_startup(pDev,-1)) != RTEMS_SUCCESSFUL ) {
@@ -1199,7 +1199,7 @@ static rtems_device_driver grspw_control(
SPACEWIRE_DBGC(DBGSPW_IOCTRL,"SPACEWIRE_IOCTRL_GET_STATUS=%i \n", (unsigned int)((SPW_STATUS_READ(pDev) >> 21) & 0x7));
*(unsigned int *)ioarg->buffer = (unsigned int )((SPW_STATUS_READ(pDev) >> 21) & 0x7);
break;
- case SPACEWIRE_IOCTRL_GET_STATISTICS:
+ case SPACEWIRE_IOCTRL_GET_STATISTICS:
if (ioarg->buffer == NULL)
return RTEMS_INVALID_NAME;
SPACEWIRE_DBG2("SPACEWIRE_IOCTRL_GET_STATISTICS \n");
@@ -1240,22 +1240,22 @@ static rtems_device_driver grspw_control(
return RTEMS_INVALID_NAME;
args = (spw_ioctl_pkt_send *)ioarg->buffer;
args->sent = 0;
-
+
/* is link up? */
if ( !pDev->running ) {
return RTEMS_INVALID_NAME;
}
-
- SPACEWIRE_DBGC(DBGSPW_IOCALLS, "write [%i,%i]: hlen: %i hbuf:0x%x dlen:%i dbuf:0x%x\n", major, minor,
+
+ SPACEWIRE_DBGC(DBGSPW_IOCALLS, "write [%i,%i]: hlen: %i hbuf:0x%x dlen:%i dbuf:0x%x\n", major, minor,
(unsigned int)args->hlen, (int)args->hdr,(unsigned int)args->dlen, (int)args->data);
-
- if ((args->hlen > pDev->txhbufsize) || (args->dlen > pDev->txdbufsize) ||
- ((args->hlen+args->dlen) < 1) ||
+
+ if ((args->hlen > pDev->txhbufsize) || (args->dlen > pDev->txdbufsize) ||
+ ((args->hlen+args->dlen) < 1) ||
((args->hdr == NULL) && (args->hlen != 0)) || ((args->data == NULL) && (args->dlen != 0))) {
return RTEMS_INVALID_NAME;
}
while ((args->sent = grspw_hw_send(pDev, args->hlen, args->hdr, args->dlen, args->data)) == 0) {
- if (pDev->config.tx_block_on_full == 1) {
+ if (pDev->config.tx_block_on_full == 1) {
SPACEWIRE_DBG2("Tx Block on full \n");
rtems_semaphore_obtain(pDev->txsp, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
} else {
@@ -1283,8 +1283,8 @@ static rtems_device_driver grspw_control(
return RTEMS_IO_ERROR;
}
break;
-
- /* Calculate timer register from GRSPW Core frequency
+
+ /* Calculate timer register from GRSPW Core frequency
* Also possible to set disconnect and timer64 from
* - SPACEWIRE_IOCTRL_SET_DISCONNECT
* - SPACEWIRE_IOCTRL_SET_TIMER
@@ -1298,21 +1298,21 @@ static rtems_device_driver grspw_control(
*/
pDev->core_freq_khz = sys_freq_khz;
}
-
- /* Only GRSPW1 needs the Timer64 and Disconnect values
+
+ /* Only GRSPW1 needs the Timer64 and Disconnect values
* GRSPW2 and onwards doesn't have this register.
*/
if ( pDev->core_ver <= 1 ){
/* Calculate Timer64 & Disconnect */
pDev->config.timer = grspw_calc_timer64(pDev->core_freq_khz);
pDev->config.disconnect = grspw_calc_disconnect(pDev->core_freq_khz);
-
+
/* Set Timer64 & Disconnect Register */
- SPW_WRITE(&pDev->regs->timer,
+ SPW_WRITE(&pDev->regs->timer,
(SPW_READ(&pDev->regs->timer) & 0xFFC00000) |
((pDev->config.disconnect & 0x3FF)<<12) |
(pDev->config.timer & 0xFFF));
-
+
/* Check that the registers were written successfully */
tmp = SPW_READ(&pDev->regs->timer) & 0x003fffff;
if ( ((tmp & 0xFFF) != pDev->config.timer) ||
@@ -1321,42 +1321,42 @@ static rtems_device_driver grspw_control(
}
}
break;
-
+
case SPACEWIRE_IOCTRL_START:
if ( pDev->running ){
return RTEMS_INVALID_NAME;
}
-
+
/* Get timeout from userspace
* timeout:
* ¤ -1 = Default timeout
* ¤ less than -1 = forever
* ¤ 0 = no wait, proceed if link is up
- * ¤ positive = specifies number of system clock ticks that
+ * ¤ positive = specifies number of system clock ticks that
* startup will wait for link to enter ready mode.
*/
timeout = (int)ioarg->buffer;
-
+
if ( (ret=grspw_hw_startup(pDev,timeout)) != RTEMS_SUCCESSFUL ) {
return ret;
}
pDev->running = 1;
break;
-
+
case SPACEWIRE_IOCTRL_STOP:
if ( !pDev->running ){
return RTEMS_INVALID_NAME;
}
pDev->running = 0;
-
+
/* Stop Receiver and transmitter */
grspw_hw_stop(pDev,1,1);
break;
-
+
default:
return RTEMS_NOT_IMPLEMENTED;
}
-
+
SPACEWIRE_DBGC(DBGSPW_IOCALLS, "SPW_IOCTRL Return\n");
return RTEMS_SUCCESSFUL;
}
@@ -1375,7 +1375,7 @@ static int grspw_set_rxmaxlen(GRSPW_DEV *pDev) {
static int grspw_hw_init(GRSPW_DEV *pDev) {
unsigned int ctrl;
-
+
ctrl = SPW_CTRL_READ(pDev);
#ifdef GRSPW_STATIC_MEM
@@ -1386,22 +1386,22 @@ static int grspw_hw_init(GRSPW_DEV *pDev) {
pDev->tx = (SPACEWIRE_TXBD *) SPW_ALIGN(&pDev->_txtable, SPACEWIRE_BDTABLE_SIZE);
#endif
SPACEWIRE_DBG("hw_init [minor %i]\n", pDev->minor);
-
+
pDev->config.is_rmap = ctrl & SPW_CTRL_RA;
pDev->config.is_rxunaligned = ctrl & SPW_CTRL_RX;
pDev->config.is_rmapcrc = ctrl & SPW_CTRL_RC;
return 0;
}
-static int grspw_hw_waitlink (GRSPW_DEV *pDev, int timeout)
+static int grspw_hw_waitlink (GRSPW_DEV *pDev, int timeout)
{
int j;
-
+
if ( timeout == -1 ){
/* Wait default timeout */
timeout = SPACEWIRE_INIT_TIMEOUT;
}
-
+
j=0;
while (SPW_LINKSTATE(SPW_STATUS_READ(pDev)) != 5) {
if ( timeout < -1 ) {
@@ -1410,7 +1410,7 @@ static int grspw_hw_waitlink (GRSPW_DEV *pDev, int timeout)
/* timeout reached, return fail */
return 1;
}
-
+
/* Sleep for 10 ticks */
rtems_task_wake_after(10);
j+=10;
@@ -1421,7 +1421,7 @@ static int grspw_hw_waitlink (GRSPW_DEV *pDev, int timeout)
static void grspw_hw_reset(GRSPW_DEV *pDev)
{
SPW_CTRL_WRITE(pDev, SPW_CTRL_RESET); /*reset core*/
- SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE |
+ SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE |
SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/
SPW_CTRL_WRITE(pDev, SPW_CTRL_LINKSTART); /*start link core*/
}
@@ -1429,13 +1429,13 @@ static void grspw_hw_reset(GRSPW_DEV *pDev)
static void grspw_hw_read_config(GRSPW_DEV *pDev)
{
unsigned int tmp;
-
+
tmp = SPW_READ(&pDev->regs->nodeaddr);
pDev->config.nodeaddr = 0xFF & tmp;
pDev->config.nodemask = 0xFF & (tmp>>8);
pDev->config.destkey = 0xFF & SPW_READ(&pDev->regs->destkey);
pDev->config.clkdiv = 0xFFFF & SPW_READ(&pDev->regs->clkdiv);
-
+
tmp = SPW_CTRL_READ(pDev);
pDev->config.promiscuous = 1 & (tmp >> 5);
pDev->config.rmapen = 1 & (tmp >> 16);
@@ -1445,7 +1445,7 @@ static void grspw_hw_read_config(GRSPW_DEV *pDev)
pDev->config.is_rmapcrc = 1 & (tmp >> 29);
pDev->config.linkdisabled = 1 & tmp;
pDev->config.linkstart = 1 & (tmp >> 1);
-
+
if ( pDev->core_ver <= 1 ){
tmp = SPW_READ(&pDev->regs->timer);
pDev->config.timer = 0xFFF & tmp;
@@ -1454,7 +1454,7 @@ static void grspw_hw_read_config(GRSPW_DEV *pDev)
pDev->config.timer = 0;
pDev->config.disconnect = 0;
}
-
+
return;
}
@@ -1463,17 +1463,17 @@ static int grspw_hw_startup (GRSPW_DEV *pDev, int timeout)
{
int i;
unsigned int dmactrl;
-
+
SPW_WRITE(&pDev->regs->status, (SPW_STATUS_TO|SPW_STATUS_CE|SPW_STATUS_ER|SPW_STATUS_DE|SPW_STATUS_PE|SPW_STATUS_WE|SPW_STATUS_IA|SPW_STATUS_EE)); /*clear status*/
-
+
if (grspw_hw_waitlink(pDev,timeout)) {
SPACEWIRE_DBG2("Device open. Link is not up\n");
return RTEMS_TIMEOUT;
}
-
+
SPW_WRITE(&pDev->regs->dma0ctrl, SPW_DMACTRL_PS | SPW_DMACTRL_PR | SPW_DMACTRL_TA | SPW_DMACTRL_RA); /*clear status, set ctrl*/
-
-
+
+
if ((dmactrl = SPW_READ(&pDev->regs->dma0ctrl)) != 0) {
SPACEWIRE_DBG2("DMACtrl is not cleared\n");
return RTEMS_IO_ERROR;
@@ -1488,7 +1488,7 @@ static int grspw_hw_startup (GRSPW_DEV *pDev, int timeout)
pDev->tx_cur = 0;
pDev->tx_sent = 0;
pDev->tx_all_in_use = 0;
-
+
/* prepare receive buffers */
for (i = 0; i < pDev->rxbufcnt; i++) {
if (i+1 == pDev->rxbufcnt) {
@@ -1501,14 +1501,14 @@ static int grspw_hw_startup (GRSPW_DEV *pDev, int timeout)
pDev->rxcur = 0;
pDev->rxbufcur = -1;
grspw_set_rxmaxlen(pDev);
-
+
SPW_WRITE(&pDev->regs->dma0txdesc, memarea_to_hw((unsigned int) pDev->tx));
SPW_WRITE(&pDev->regs->dma0rxdesc, memarea_to_hw((unsigned int) pDev->rx));
-
+
/* start RX */
dmactrl = SPW_READ(&pDev->regs->dma0ctrl);
SPW_WRITE(&pDev->regs->dma0ctrl, (dmactrl & SPW_PREPAREMASK_RX) | SPW_DMACTRL_RD | SPW_DMACTRL_RXEN | SPW_DMACTRL_NS | SPW_DMACTRL_TXIE | SPW_DMACTRL_RXIE);
-
+
SPACEWIRE_DBGC(DBGSPW_TX,"0x%x: setup complete\n", (unsigned int)pDev->regs);
return RTEMS_SUCCESSFUL;
}
@@ -1517,8 +1517,8 @@ static int grspw_hw_startup (GRSPW_DEV *pDev, int timeout)
static void grspw_hw_wait_rx_inactive(GRSPW_DEV *pDev)
{
while( SPW_READ(&pDev->regs->dma0ctrl) & SPW_DMACTRL_RX ){
- /* switching may be needed:
- * - low frequency GRSPW
+ /* switching may be needed:
+ * - low frequency GRSPW
* - mega packet incoming
*/
rtems_task_wake_after(1);
@@ -1526,10 +1526,10 @@ static void grspw_hw_wait_rx_inactive(GRSPW_DEV *pDev)
}
/* Stop the rx or/and tx by disabling the receiver/transmitter */
-static int grspw_hw_stop (GRSPW_DEV *pDev, int rx, int tx)
+static int grspw_hw_stop (GRSPW_DEV *pDev, int rx, int tx)
{
unsigned int dmactrl;
-
+
/* stop rx and/or tx */
dmactrl = SPW_READ(&pDev->regs->dma0ctrl);
if ( rx ) {
@@ -1539,16 +1539,16 @@ static int grspw_hw_stop (GRSPW_DEV *pDev, int rx, int tx)
dmactrl &= ~(SPW_DMACTRL_TXEN|SPW_DMACTRL_TXIE);
}
/*SPW_WRITE(&pDev->regs->dma0ctrl, (dmactrl & SPW_PREPAREMASK_RX) & ~(SPW_DMACTRL_RD | SPW_DMACTRL_RXEN) & ~(SPW_DMACTRL_TXEN));*/
-
+
/* don't clear status flags */
dmactrl &= ~(SPW_DMACTRL_RA|SPW_DMACTRL_PR|SPW_DMACTRL_AI);
SPW_WRITE(&pDev->regs->dma0ctrl, dmactrl);
return RTEMS_SUCCESSFUL;
}
-int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dlen, char *data)
+int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dlen, char *data)
{
-
+
unsigned int dmactrl, ctrl;
#ifdef DEBUG_SPACEWIRE_ONOFF
unsigned int k;
@@ -1557,17 +1557,17 @@ int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dl
unsigned int cur = pDev->tx_cur;
char *txh = pDev->ptr_txhbuf0 + (cur * pDev->txhbufsize);
char *txd = pDev->ptr_txdbuf0 + (cur * pDev->txdbufsize);
-
+
ctrl = SPW_READ((volatile void *)&pDev->tx[cur].ctrl);
if (ctrl & SPW_TXBD_EN) {
return 0;
}
-
+
memcpy(&txd[0], data, dlen);
memcpy(&txh[0], hdr, hlen);
-#ifdef DEBUG_SPACEWIRE_ONOFF
+#ifdef DEBUG_SPACEWIRE_ONOFF
if (DEBUG_SPACEWIRE_FLAGS & DBGSPW_DUMP) {
for (k = 0; k < hlen; k++){
if (k % 16 == 0) {
@@ -1587,7 +1587,7 @@ int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dl
printf ("\n");
}
#endif
-
+
pDev->tx[cur].addr_header = memarea_to_hw((unsigned int)txh);
pDev->tx[cur].len = dlen;
pDev->tx[cur].addr_data = memarea_to_hw((unsigned int)txd);
@@ -1596,19 +1596,19 @@ int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dl
} else {
pDev->tx[cur].ctrl = SPW_TXBD_IE | SPW_TXBD_EN | hlen;
}
-
+
dmactrl = SPW_READ(&pDev->regs->dma0ctrl);
SPW_WRITE(&pDev->regs->dma0ctrl, (dmactrl & SPW_PREPAREMASK_TX) | SPW_DMACTRL_TXEN | SPW_DMACTRL_TXIE);
-
+
/* Update counters */
rtems_interrupt_disable(level);
-
+
pDev->tx_cur = (pDev->tx_cur + 1) % pDev->txbufcnt;
if (pDev->tx_cur == pDev->tx_sent) {
pDev->tx_all_in_use = 1;
}
rtems_interrupt_enable(level);
-
+
/* In blocking mode wait until message is sent */
if (pDev->config.tx_blocking) {
while ( SPW_READ(&pDev->regs->dma0ctrl) & SPW_DMACTRL_TXEN) {
@@ -1623,12 +1623,12 @@ int grspw_hw_send(GRSPW_DEV *pDev, unsigned int hlen, char *hdr, unsigned int dl
static int grspw_hw_receive(GRSPW_DEV *pDev, char *b, int c) {
unsigned int len, rxlen, ctrl;
- unsigned int cur;
+ unsigned int cur;
unsigned int tmp;
unsigned int dump_start_len;
int i;
- char *rxb;
-
+ char *rxb;
+
if ( pDev->config.promiscuous ) {
dump_start_len = 0; /* make sure address and prot can be read in promiscuous mode */
} else if (pDev->config.rm_prot_id) {
@@ -1636,19 +1636,19 @@ static int grspw_hw_receive(GRSPW_DEV *pDev, char *b, int c) {
} else {
dump_start_len = 1; /* default: skip only source address */
}
-
+
rxlen = 0;
cur = pDev->rxcur;
rxb = pDev->ptr_rxbuf0 + (cur * pDev->rxbufsize);
SPACEWIRE_DBGC(DBGSPW_RX, "0x%x: waitin packet at pos %i\n", (unsigned int) pDev->regs, cur);
-
+
ctrl = SPW_READ((volatile void *)&pDev->rx[cur].ctrl);
if (ctrl & SPW_RXBD_EN) {
return rxlen;
}
SPACEWIRE_DBGC(DBGSPW_RX, "checking packet\n");
-
+
len = SPW_RXBD_LENGTH & ctrl;
if (!((ctrl & SPW_RXBD_ERROR) || (pDev->config.check_rmap_err && (ctrl & SPW_RXBD_RMAPERROR)))) {
if (pDev->rxbufcur == -1) {
@@ -1671,7 +1671,7 @@ static int grspw_hw_receive(GRSPW_DEV *pDev, char *b, int c) {
b[i] = MEM_READ(rxb+pDev->rxbufcur);
}
}
-
+
pDev->rxbufcur += rxlen;
if (c >= tmp) {
SPACEWIRE_DBGC(DBGSPW_RX, "Next descriptor\n");
@@ -1683,7 +1683,7 @@ static int grspw_hw_receive(GRSPW_DEV *pDev, char *b, int c) {
return rxlen;
}
-static void grspw_rxnext(GRSPW_DEV *pDev)
+static void grspw_rxnext(GRSPW_DEV *pDev)
{
unsigned int dmactrl;
unsigned int cur = pDev->rxcur;
@@ -1695,17 +1695,17 @@ static void grspw_rxnext(GRSPW_DEV *pDev)
pDev->rx[cur].ctrl = ctrl | SPW_RXBD_EN | SPW_RXBD_IE;
cur++;
}
-
+
pDev->rxcur = cur;
pDev->rxbufcur = -1;
-
+
/* start RX */
dmactrl = SPW_READ(&pDev->regs->dma0ctrl);
SPW_WRITE(&pDev->regs->dma0ctrl, (dmactrl & SPW_PREPAREMASK_RX) | SPW_DMACTRL_RD | SPW_DMACTRL_RXEN | SPW_DMACTRL_RXIE | SPW_DMACTRL_NS);
-
+
}
-static void check_rx_errors(GRSPW_DEV *pDev, int ctrl)
+static void check_rx_errors(GRSPW_DEV *pDev, int ctrl)
{
if (ctrl & SPW_RXBD_EEP) {
pDev->stat.rx_eep_err++;
@@ -1714,7 +1714,7 @@ static void check_rx_errors(GRSPW_DEV *pDev, int ctrl)
if (pDev->config.check_rmap_err) {
pDev->stat.rx_rmap_header_crc_err++;
}
- }
+ }
if (ctrl & SPW_RXBD_EDC) {
if (pDev->config.check_rmap_err) {
pDev->stat.rx_rmap_data_crc_err++;
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c
index 112a324ace..a8003be8f9 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c
@@ -29,9 +29,9 @@ unsigned int grspwpci_memarea_address;
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
/* Any non-static function will begin with */
-#define GRSPW_PREFIX(name) grspwpci##name
+#define GRSPW_PREFIX(name) grspwpci##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler.
*/
#define GRSPW_REG_INT(handler,irq,arg) \
@@ -40,7 +40,7 @@ unsigned int grspwpci_memarea_address;
void (*grspw_pci_int_reg)(void *handler, int irq, void *arg) = 0;
-
+
#ifdef GRSPW_ADR_TO
/* Translate an address within the Memory Region (memarea) into an Hardware
* device address. This address is put into hardware registers or descriptors
@@ -79,13 +79,13 @@ int grspwpci_interrupt_handler(int irq, void *arg);
*/
int grspw_pci_register(
- amba_confarea_type *bus,
+ amba_confarea_type *bus,
unsigned int memarea,
unsigned int hw_address
)
{
/* Setup configuration */
-
+
/* if zero the malloc will be used */
grspwpci_memarea_address = memarea;
@@ -94,14 +94,14 @@ int grspw_pci_register(
#ifdef GRSPW_ADR_FROM
grspwpci_cpu_address = memarea & 0xf0000000;
#endif
-
+
/* Register the driver */
return GRSPW_PREFIX(_register)(bus);
}
-/* Call this from PCI interrupt handler
+/* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
int grspwpci_interrupt_handler(int irq, void *arg){
grspw_interrupt( (GRSPW_DEV *)arg );
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
index 646f86c6e1..756a51b1d5 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
@@ -4,12 +4,12 @@
#undef GRSPW_MAXDEVS
#undef DEBUG_SPACEWIRE_ONOFF
/*#define DEBUG_SPACEWIRE_ONOFF*/
-/*
+/*
* If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram).
* USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO.
*
* RASTA_PCI_BASE is the base address of the GRPCI AHB slave
- *
+ *
*/
#define USE_AT697_RAM 1
@@ -44,9 +44,9 @@
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[15]='0'+(no))
/* Any non-static function will begin with */
-#define GRSPW_PREFIX(name) grspwrasta##name
+#define GRSPW_PREFIX(name) grspwrasta##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling grspw_interrupt_handler.
*/
#define GRSPW_REG_INT(handler,irq,arg) \
@@ -54,7 +54,7 @@
grspw_rasta_int_reg(handler,irq,arg);
#define GRSPW_DONT_BYPASS_CACHE
-
+
#ifdef GRSPW_ADR_TO
/* Translate a address within the Memory Region (memarea) into an Hardware
* device address. This address is put into hardware registers or descriptors
@@ -86,12 +86,12 @@ unsigned int grspw_rasta_memarea_address;
*/
int grspw_rasta_register(
- amba_confarea_type *bus,
+ amba_confarea_type *bus,
unsigned int ram_base
)
{
/* Setup configuration */
-
+
/* if zero the malloc will be used */
grspw_rasta_memarea_address = ram_base + GRSPW_RASTA_MEM_OFF;
@@ -124,30 +124,30 @@ void GRSPW_PREFIX(_interrupt_handler)(int irq, void *pDev)
#ifdef GRSPW_STATIC_MEM
/*
- * --------------------------------------- <-
+ * --------------------------------------- <-
* | Core1: BD TABLE 1 and 2 |
* | Core2: BD TABLE 1 and 2 |
* | Core3: BD TABLE 1 and 2 |
- * |-------------------------------------|
- * | Core1: rx data buf + rx header buf |
+ * |-------------------------------------|
+ * | Core1: rx data buf + rx header buf |
* | Core2: rx data buf + rx header buf |
* | Core3: rx data buf + rx header buf |
* ---------------------------------------
*/
static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base)
-{
+{
if ( maxcores > 3 )
return -1;
-
+
if ( bdtable_base )
*bdtable_base = grspw_rasta_memarea_address + corenum*2*SPACEWIRE_BDTABLE_SIZE;
-
+
if ( mem_base )
*mem_base = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + corenum*BUFMEM_PER_LINK;
-
+
if ( mem_end )
*mem_end = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + (corenum+1)*BUFMEM_PER_LINK;
-
+
return 0;
}
#endif
diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S
index 820df67901..0d5b30e33e 100644
--- a/c/src/lib/libbsp/sparc/shared/start.S
+++ b/c/src/lib/libbsp/sparc/shared/start.S
@@ -56,7 +56,7 @@ start:
SYM(trap_table):
RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
- BAD_TRAP; ! 01 instruction access
+ BAD_TRAP; ! 01 instruction access
! exception
BAD_TRAP; ! 02 illegal instruction
BAD_TRAP; ! 03 privileged instruction
@@ -231,21 +231,21 @@ SYM(hard_reset):
#if ENABLE_SIS_QUIRKS==1
#include <erc32.h>
-
+
/* Check if MEC is initialised. If not, this means that we are
running on the simulator. Initiate some of the parameters
that are done by the boot-prom otherwise.
*/
set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals
- ld [%g3], %g2
+ ld [%g3], %g2
set 0xfe080000, %g1
andcc %g1, %g2, %g0
bne 2f
-
+
/* Set the correct memory size in MEC memory config register */
-
- set SYM(PROM_SIZE), %l0
+
+ set SYM(PROM_SIZE), %l0
set 0, %l1
srl %l0, 18, %l0
1:
@@ -254,8 +254,8 @@ SYM(hard_reset):
bne,a 1b
inc %l1
sll %l1, 8, %l1
-
- set SYM(RAM_SIZE), %l0
+
+ set SYM(RAM_SIZE), %l0
srl %l0, 19, %l0
1:
tst %l0
@@ -263,26 +263,26 @@ SYM(hard_reset):
bne,a 1b
inc %l1
sll %l1, 10, %l1
-
+
! set the Memory Configuration
st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
!DISABLE THE HARDWARE WATCHDOG
st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ]
!Reduce the number of wait states to 0 for all memory areas.
st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ]
-
+
set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker
set SYM(RAM_SIZE), %l2
add %l1, %l2, %sp
- st %sp, [%g6]
+ st %sp, [%g6]
set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1
st %g1, [%g6]
-
-2:
-#endif
+
+2:
+#endif
/*
* Copy the initialized data to RAM
diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart.c b/c/src/lib/libbsp/sparc/shared/uart/apbuart.c
index 144d394182..58d0eab4dc 100644
--- a/c/src/lib/libbsp/sparc/shared/uart/apbuart.c
+++ b/c/src/lib/libbsp/sparc/shared/uart/apbuart.c
@@ -83,27 +83,27 @@ typedef struct {
int irq;
int minor;
int scaler;
- unsigned int baud;
+ unsigned int baud;
- int txblk; /* Make write block until at least 1 char has
+ int txblk; /* Make write block until at least 1 char has
* been put into software send fifo
*/
- int tx_flush; /* Set this to block until all data has
- * placed into the hardware send fifo
+ int tx_flush; /* Set this to block until all data has
+ * placed into the hardware send fifo
*/
- int rxblk; /* Make read block until at least 1 char has
+ int rxblk; /* Make read block until at least 1 char has
* been received (or taken from software fifo).
*/
- int started; /* Set to 1 when in running mode */
-
+ int started; /* Set to 1 when in running mode */
+
int ascii_mode; /* Set to 1 to make \n be printed as \r\n */
-
+
/* TX/RX software FIFO Buffers */
apbuart_fifo *txfifo;
apbuart_fifo *rxfifo;
-
+
apbuart_stats stats;
-
+
rtems_id dev_sem;
rtems_id rx_sem;
rtems_id tx_sem;
@@ -126,18 +126,18 @@ static void apbuart_hw_close(apbuart_priv *uart);
static void apbuart_hw_open(apbuart_priv *uart);
/* Uncomment for debug output */
-/* #define DEBUG 1
+/* #define DEBUG 1
#define FUNCDEBUG 1 */
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
-#define DBG(x...)
+#define DBG(x...)
#endif
#ifdef FUNCDEBUG
#define FUNCDBG(x...) printk(x)
#else
-#define FUNCDBG(x...)
+#define FUNCDBG(x...)
#endif
#ifndef READ_REG
@@ -157,7 +157,7 @@ static int apbuart_outbyte_try(ambapp_apb_uart *regs, unsigned char ch)
{
if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_THE) == 0 )
return -1; /* Failed */
-
+
/* There is room in fifo, put ch in it */
regs->data = (unsigned int) ch;
return 0;
@@ -167,15 +167,15 @@ static int apbuart_outbyte_try(ambapp_apb_uart *regs, unsigned char ch)
static int apbuart_inbyte_try(ambapp_apb_uart *regs)
{
unsigned int status;
- /* Clear errors if any */
+ /* Clear errors if any */
if ( (status=READ_REG(&regs->status)) & LEON_REG_UART_STATUS_ERR) {
regs->status = status & ~LEON_REG_UART_STATUS_ERR;
}
-
+
/* Is Data available? */
if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_DR) == 0 )
return -1; /* No data avail */
-
+
/* Return Data */
return (int)READ_REG(&regs->data);
}
@@ -187,7 +187,7 @@ static int apbuart_write_support(apbuart_priv *uart, const char *buf, int len)
while (nwrite < len) {
if ( apbuart_outbyte_try(minor, *buf++) ){
/* TX Fifo full */
-
+
}
nwrite++;
}
@@ -197,17 +197,17 @@ static int apbuart_write_support(apbuart_priv *uart, const char *buf, int len)
static void apbuart_hw_open(apbuart_priv *uart){
unsigned int scaler;
-
+
/* Calculate Baudrate */
if ( uart->scaler > 0 ) {
scaler = uart->scaler;
}else{
scaler = (((sys_freq_hz*10)/(uart->baud*8))-5)/10;
}
-
+
/* Set new baud rate */
uart->regs->scaler = scaler;
-
+
/* Enable receiver & Transmitter */
uart->regs->ctrl = APBUART_CTRL_RE | APBUART_CTRL_RF | APBUART_CTRL_RI | APBUART_CTRL_TI;
}
@@ -221,7 +221,7 @@ static void apbuart_hw_close(apbuart_priv *uart){
/* interrupt handler */
static void apbuart_interrupt_handler(rtems_vector_number v){
int minor;
-
+
/* convert to */
for(minor = 0; minor < dev_cnt; minor++) {
if ( v == (apbuarts[minor].irq+0x10) ) {
@@ -232,7 +232,7 @@ static void apbuart_interrupt_handler(rtems_vector_number v){
}
#endif
-/* The interrupt handler, taking care of the
+/* The interrupt handler, taking care of the
* APBUART hardware
*/
static void apbuart_interrupt(apbuart_priv *uart){
@@ -240,7 +240,7 @@ static void apbuart_interrupt(apbuart_priv *uart){
int empty;
unsigned char c, *next_char = NULL;
int signal;
-
+
/* Clear & record any error */
status = READ_REG(&uart->regs->status);
if ( status & (APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE) ){
@@ -258,7 +258,7 @@ static void apbuart_interrupt(apbuart_priv *uart){
}
uart->regs->status = status & ~(APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE);
}
-
+
/* Empty RX fifo into software fifo */
signal = 0;
while ( (status=READ_REG(&uart->regs->status)) & APBUART_STATUS_DR ){
@@ -270,20 +270,20 @@ static void apbuart_interrupt(apbuart_priv *uart){
}
/* put into fifo */
apbuart_fifo_put(uart->rxfifo,c);
-
+
/* bump RX counter */
uart->stats.rx_cnt++;
-
+
signal = 1;
}
-
+
/* Wake RX thread if any */
if ( signal )
rtems_semaphore_release(uart->rx_sem);
-
+
/* If room in HW fifo and we got more chars to be sent */
if ( !(status & APBUART_STATUS_TF) ){
-
+
if ( apbuart_fifo_isEmpty(uart->txfifo) ){
/* Turn off TX interrupt when no data is to be sent */
if ( status & APBUART_STATUS_TE ){
@@ -292,11 +292,11 @@ static void apbuart_interrupt(apbuart_priv *uart){
}
return;
}
-
+
/* signal when there will be more room in SW fifo */
if ( apbuart_fifo_isFull(uart->txfifo) )
signal = 1;
-
+
do{
/* Put data into HW TX fifo */
apbuart_fifo_peek(uart->txfifo,&next_char);
@@ -310,9 +310,9 @@ static void apbuart_interrupt(apbuart_priv *uart){
}
uart->regs->ctrl = READ_REG(&uart->regs->ctrl) | APBUART_CTRL_TE | APBUART_CTRL_TF;
DBG("!");
- }while(!(empty=apbuart_fifo_isEmpty(uart->txfifo)) &&
+ }while(!(empty=apbuart_fifo_isEmpty(uart->txfifo)) &&
!((status=READ_REG(&uart->regs->status))&APBUART_STATUS_TF) );
-
+
/* Wake userspace thread, on empty or full fifo
* This makes tx_flush and block work.
*/
@@ -336,7 +336,7 @@ int APBUART_PREFIX(_register)(amba_confarea_type *bus) {
switch(r) {
case RTEMS_TOO_MANY:
printk("APBUART rtems_io_register_driver failed: RTEMS_TOO_MANY\n"); return -1;
- case RTEMS_INVALID_NUMBER:
+ case RTEMS_INVALID_NUMBER:
printk("APBUART rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n"); return -1;
case RTEMS_RESOURCE_IN_USE:
printk("APBUART rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n"); return -1;
@@ -350,7 +350,7 @@ int APBUART_PREFIX(_register)(amba_confarea_type *bus) {
static rtems_device_driver apbuart_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
-
+
rtems_status_code status;
int i;
amba_apb_device dev;
@@ -365,28 +365,28 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
printk("APBUART: Failed to find any APBUART cores\n\r");
return -1;
}
-
+
strcpy(fs_name,APBUART_DEVNAME);
-
+
DBG("Found %d APBUART(s)\n\r",dev_cnt);
-
+
/* Allocate memory for device structures */
apbuarts = malloc(sizeof(apbuart_priv) * dev_cnt);
if ( !apbuarts ){
printk("APBUART: Failed to allocate SW memory\n\r");
return -1;
}
-
+
memset(apbuarts,0,sizeof(sizeof(apbuart_priv) * dev_cnt));
-
+
/* Detect System Frequency from initialized timer */
#ifndef SYS_FREQ_HZ
#if defined(LEON3)
- /* LEON3: find timer address via AMBA Plug&Play info */
+ /* LEON3: find timer address via AMBA Plug&Play info */
{
amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs;
-
+
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){
tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
@@ -395,7 +395,7 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
sys_freq_hz = 40000000; /* Default to 40MHz */
printk("APBUART: Failed to detect system frequency\n\r");
}
-
+
}
#elif defined(LEON2)
/* LEON2: use hardcoded address to get to timer */
@@ -410,27 +410,27 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
/* Use hardcoded frequency */
sys_freq_hz = SYS_FREQ_HZ;
#endif
-
+
for(i=0; i<dev_cnt; i++){
/* Get AMBA AHB device info from Plug&Play */
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,GAISLER_APBUART,&dev,i);
-
+
printk("APBUART[%d]: at 0x%x irq %d (0x%x)\n\r",i,dev.start,dev.irq,(unsigned int)&apbuarts[i]);
-
+
apbuarts[i].regs = (ambapp_apb_uart *)dev.start;
apbuarts[i].irq = dev.irq;
apbuarts[i].minor = i;
-
+
/* Clear HW regs */
apbuarts[i].regs->status = 0;
- apbuarts[i].regs->ctrl = 0;
-
+ apbuarts[i].regs->ctrl = 0;
+
/* Allocate default software buffers */
- apbuarts[i].txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE);
+ apbuarts[i].txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE);
apbuarts[i].rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE);
if ( !apbuarts[i].txfifo || !apbuarts[i].rxfifo )
rtems_fatal_error_occurred(RTEMS_NO_MEMORY);
-
+
APBUART_DEVNAME_NO(fs_name,i);
/* Bind name to device */
@@ -438,28 +438,28 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
status = rtems_io_register_name(fs_name, major, i);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
-
+
/* Setup interrupt handler for each channel */
APBUART_REG_INT(APBUART_PREFIX(_interrupt_handler), apbuarts[i].irq, &apbuarts[i]);
-
+
/* Device A Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'D', '0'+i),
1,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&apbuarts[i].dev_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
-
+
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'T', '0'+i),
1,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&apbuarts[i].tx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
-
+
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'R', '0'+i),
1,
- RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&apbuarts[i].rx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -469,95 +469,95 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
}
static rtems_device_driver apbuart_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
-{
+{
apbuart_priv *uart;
-
+
FUNCDBG("apbuart_open: major %d, minor %d\n", major, minor);
if ( (minor < 0) || (minor >= dev_cnt) ) {
DBG("Wrong minor %d\n", minor);
return RTEMS_INVALID_NAME;
}
-
+
uart = &apbuarts[minor];
if (rtems_semaphore_obtain(uart->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) {
DBG("apbuart_open: resource in use\n");
return RTEMS_RESOURCE_IN_USE;
}
-
+
/* Clear HW regs */
uart->regs->status = 0;
uart->regs->ctrl = 0;
-
+
/* Set Defaults */
-
+
/* 38400 baudrate */
uart->scaler = 0; /* use uart->baud */
uart->baud = 38400;
-
+
/* Default to Blocking mode */
uart->txblk = 1;
uart->rxblk = 1;
-
+
/* Default to no flush mode */
uart->tx_flush = 0;
/* non-ascii mode */
uart->ascii_mode = 0;
-
+
/* not started */
uart->started = 0;
-
+
if ( !uart->txfifo || (uart->txfifo->size!=DEFAULT_TXBUF_SIZE) ){
apbuart_fifo_free(uart->txfifo);
uart->txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE);
}
-
+
if ( !uart->rxfifo || (uart->rxfifo->size!=DEFAULT_RXBUF_SIZE) ){
apbuart_fifo_free(uart->rxfifo);
uart->rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE);
}
-
+
if ( !uart->rxfifo || !uart->txfifo ){
/* Failed to get memory */
return RTEMS_NO_MEMORY;
}
-
+
/* Now user must call ioctl(START,0) to begin */
-
+
return RTEMS_SUCCESSFUL;
}
static rtems_device_driver apbuart_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
apbuart_priv *uart = &apbuarts[minor];
-
+
FUNCDBG("apbuart_close[%d]:\n",minor);
-
+
apbuart_hw_close(uart);
/* Software state will be set when open is called again */
rtems_semaphore_release(uart->rx_sem);
rtems_semaphore_release(uart->tx_sem);
uart->started = 0;
-
+
rtems_semaphore_release(uart->dev_sem);
-
+
return RTEMS_SUCCESSFUL;
}
-
+
static rtems_device_driver apbuart_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
rtems_libio_rw_args_t *rw_args;
unsigned int count = 0, oldLevel;
unsigned char *buf;
apbuart_priv *uart = &apbuarts[minor];
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
FUNCDBG("apbuart_read\n");
-
+
buf = (unsigned char *)rw_args->buffer;
if ( (rw_args->count < 1) || !buf )
return RTEMS_INVALID_NAME; /* EINVAL */
@@ -568,35 +568,35 @@ static rtems_device_driver apbuart_read(rtems_device_major_number major, rtems_d
printk("UART %x is screwed\n",uart);
}
/* Read from SW fifo */
- if ( apbuart_fifo_get(uart->rxfifo,&buf[count]) != 0 ){
+ if ( apbuart_fifo_get(uart->rxfifo,&buf[count]) != 0 ){
/* non blocking or read at least 1 byte */
if ( (count > 0) || (!uart->rxblk) )
break; /* Return */
-
+
rtems_interrupt_enable(oldLevel);
/* Block thread until a char is received */
rtems_semaphore_obtain(uart->rx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-
+
rtems_interrupt_disable(oldLevel);
continue;
}
-
+
/* Got char from SW FIFO */
count++;
-
+
} while (count < rw_args->count );
-
+
rtems_interrupt_enable(oldLevel);
rw_args->bytes_moved = count;
-
+
if (count == 0)
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
return RTEMS_SUCCESSFUL;
}
-
+
static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
rtems_libio_rw_args_t *rw_args;
@@ -604,26 +604,26 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
char *buf;
apbuart_priv *uart = &apbuarts[minor];
int direct=0;
-
-
+
+
rw_args = (rtems_libio_rw_args_t *) arg;
-
+
FUNCDBG("apbuart_write\n");
-
+
buf = rw_args->buffer;
-
+
if ( rw_args->count < 1 || !buf )
- return RTEMS_INVALID_NAME; /* EINVAL */
-
+ return RTEMS_INVALID_NAME; /* EINVAL */
+
count = 0;
rtems_interrupt_disable(oldLevel);
/* Do we need to start to send first char direct via HW
* to get IRQ going.
*/
-
+
ctrl = READ_REG(&uart->regs->ctrl);
if ( (ctrl & APBUART_CTRL_TF) == 0 ){
- /* TX interrupt is disabled ==>
+ /* TX interrupt is disabled ==>
* SW FIFO is empty and,
* HW FIFO empty
*/
@@ -637,7 +637,7 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
uart->regs->ctrl = ctrl | APBUART_CTRL_TE | APBUART_CTRL_TF;
direct = 1;
}
-
+
while( count < rw_args->count ) {
/* write to HW FIFO direct skipping SW FIFO */
if ( direct && ((READ_REG(&uart->regs->status) & APBUART_STATUS_TF) == 0) ){
@@ -647,23 +647,23 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
else if ( apbuart_fifo_put(uart->txfifo,buf[count]) ){
direct = 0;
DBG("APBUART[%d]: write: SW FIFO Full\n\r",minor);
-
+
/* is full, block? */
if ( ((count < 1) && uart->txblk) || uart->tx_flush ){
-
+
rtems_interrupt_enable(oldLevel);
-
+
rtems_semaphore_obtain(uart->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-
+
rtems_interrupt_disable(oldLevel);
-
+
/* Do we need to start to send first char direct via HW
* to get IRQ going.
*/
-
+
ctrl = READ_REG(&uart->regs->ctrl);
if ( (ctrl & APBUART_CTRL_TF) == 0 ){
- /* TX interrupt is disabled ==>
+ /* TX interrupt is disabled ==>
* SW FIFO is empty and,
* HW FIFO empty
*/
@@ -677,7 +677,7 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
uart->regs->ctrl = ctrl | APBUART_CTRL_TF | APBUART_CTRL_TE;
direct = 1;
}
-
+
continue;
}
/* don't block, return current status */
@@ -685,18 +685,18 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
}else{
direct = 0;
}
-
+
count++;
-
+
}
rtems_interrupt_enable(oldLevel);
-
+
rw_args->bytes_moved = count;
-
+
if (count == 0)
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
-
+
return RTEMS_SUCCESSFUL;
}
@@ -710,13 +710,13 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_stats *stats;
FUNCDBG("apbuart_control [%i,%i]\n",major, minor);
-
+
if (!ioarg)
return RTEMS_INVALID_NAME;
ioarg->ioctl_return = 0;
switch(ioarg->command) {
-
+
/* Enable Receiver & transmitter */
case APBUART_START:
if ( uart->started )
@@ -724,7 +724,7 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_hw_open(uart);
uart->started = 1;
break;
-
+
/* Close Receiver & transmitter */
case APBUART_STOP:
if ( !uart->started )
@@ -732,49 +732,49 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_hw_close(uart);
uart->started = 0;
break;
-
- /* Set RX FIFO Software buffer length
+
+ /* Set RX FIFO Software buffer length
* It is only possible to change buffer size in
* non-running mode.
*/
case APBUART_SET_RXFIFO_LEN:
if ( uart->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
size = (int)ioarg->buffer;
- if ( size < 1 )
+ if ( size < 1 )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* Free old buffer */
apbuart_fifo_free(uart->rxfifo);
-
+
/* Allocate new buffer & init it */
uart->rxfifo = apbuart_fifo_create(size);
if ( !uart->rxfifo )
return RTEMS_NO_MEMORY;
break;
- /* Set TX FIFO Software buffer length
- * It is only possible to change buffer size
+ /* Set TX FIFO Software buffer length
+ * It is only possible to change buffer size
* while in non-running mode.
*/
case APBUART_SET_TXFIFO_LEN:
if ( uart->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
size = (int)ioarg->buffer;
- if ( size < 1 )
+ if ( size < 1 )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* Free old buffer */
apbuart_fifo_free(uart->txfifo);
-
+
/* Allocate new buffer & init it */
uart->txfifo = apbuart_fifo_create(size);
if ( !uart->txfifo )
return RTEMS_NO_MEMORY;
break;
-
+
case APBUART_SET_BAUDRATE:
/* Set baud rate of */
baudrate = (int)ioarg->buffer;
@@ -784,37 +784,37 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
uart->scaler = 0; /* use uart->baud */
uart->baud = baudrate;
break;
-
+
case APBUART_SET_SCALER:
/* use uart->scaler not uart->baud */
uart->scaler = data[0];
break;
-
+
case APBUART_SET_BLOCKING:
blocking = (unsigned int)ioarg->buffer;
uart->rxblk = ( blocking & APBUART_BLK_RX );
uart->txblk = ( blocking & APBUART_BLK_TX );
uart->tx_flush = ( blocking & APBUART_BLK_FLUSH );
break;
-
+
case APBUART_GET_STATS:
stats = (void *)ioarg->buffer;
if ( !stats )
return RTEMS_INVALID_NAME;
-
+
/* Copy Stats */
*stats = uart->stats;
break;
-
+
case APBUART_CLR_STATS:
/* Clear/reset Stats */
memset(&uart->stats,0,sizeof(uart->stats));
break;
-
+
case APBUART_SET_ASCII_MODE:
uart->ascii_mode = (int)ioarg->buffer;
break;
-
+
default:
return RTEMS_NOT_DEFINED;
}
diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c b/c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c
index ad2effa065..54d14ce459 100644
--- a/c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c
+++ b/c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c
@@ -8,7 +8,7 @@
/* Any non-static function will begin with */
#define APBUART_PREFIX(name) apbuartpci##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling apbuartpci_interrupt_handler.
*/
#define APBUART_REG_INT(handler,irq,arg) \
@@ -27,15 +27,15 @@ void apbuartpci_interrupt_handler(int irq, void *arg);
int apbuart_pci_register(amba_confarea_type *bus)
{
/* Setup configuration */
-
+
/* Register the driver */
return APBUART_PREFIX(_register)(bus);
}
-/* Call this from PCI interrupt handler
+/* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
void apbuartpci_interrupt_handler(int irq, void *arg){
apbuart_interrupt(arg);
diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c b/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
index a5c365eb77..4b8734fdb6 100644
--- a/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
+++ b/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
@@ -8,7 +8,7 @@
/* Any non-static function will begin with */
#define APBUART_PREFIX(name) apbuartrasta##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling apbuartrasta_interrupt_handler.
*/
#define APBUART_REG_INT(handler,irq,arg) \
@@ -27,15 +27,15 @@ void apbuartrasta_interrupt_handler(int irq, void *arg);
int apbuart_rasta_register(amba_confarea_type *bus)
{
/* Setup configuration */
-
+
/* Register the driver */
return APBUART_PREFIX(_register)(bus);
}
-/* Call this from RASTA interrupt handler
+/* Call this from RASTA interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
void apbuartrasta_interrupt_handler(int irq, void *arg){
apbuart_interrupt(arg);