diff options
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/include/pci.h')
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/include/pci.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/include/pci.h b/c/src/lib/libbsp/sparc/shared/include/pci.h index 65c5b9335a..4416f0a2b4 100644 --- a/c/src/lib/libbsp/sparc/shared/include/pci.h +++ b/c/src/lib/libbsp/sparc/shared/include/pci.h @@ -47,7 +47,7 @@ extern "C" { #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ #define PCI_STATUS_PARITY 0x100 /* Detected parity error */ #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ -#define PCI_STATUS_DEVSEL_FAST 0x000 +#define PCI_STATUS_DEVSEL_FAST 0x000 #define PCI_STATUS_DEVSEL_MEDIUM 0x200 #define PCI_STATUS_DEVSEL_SLOW 0x400 #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ @@ -76,8 +76,8 @@ extern "C" { /* * Base addresses specify locations in memory or I/O space. - * Decoded size can be determined by writing a value of - * 0xffffffff to the register, and reading it back. Only + * Decoded size can be determined by writing a value of + * 0xffffffff to the register, and reading it back. Only * 1 bits are decoded. */ #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ @@ -101,7 +101,7 @@ extern "C" { /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c -#define PCI_SUBSYSTEM_ID 0x2e +#define PCI_SUBSYSTEM_ID 0x2e #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL) @@ -460,8 +460,8 @@ extern "C" { #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 -#define PCI_VENDOR_ID_DPT 0x1044 -#define PCI_DEVICE_ID_DPT 0xa400 +#define PCI_VENDOR_ID_DPT 0x1044 +#define PCI_DEVICE_ID_DPT 0xa400 #define PCI_VENDOR_ID_OPTI 0x1045 #define PCI_DEVICE_ID_OPTI_92C178 0xc178 @@ -1116,37 +1116,37 @@ typedef struct { extern pci_config BSP_pci_configuration; extern inline int -pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned char * val) { return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val); } extern inline int -pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned short * val) { return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val); } extern inline int -pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned int * val) { return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); } extern inline int -pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned char val) { return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val); } extern inline int -pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned short val) { return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val); } extern inline int -pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned int val) { return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val); } |