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author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
commit | 6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch) | |
tree | af53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/sparc/erc32/startup | |
parent | 2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
download | rtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2 |
Remove stray white spaces.
Diffstat (limited to 'c/src/lib/libbsp/sparc/erc32/startup')
-rw-r--r-- | c/src/lib/libbsp/sparc/erc32/startup/boardinit.S | 16 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/erc32/startup/setvec.c | 8 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/erc32/startup/spurious.c | 26 |
4 files changed, 26 insertions, 26 deletions
diff --git a/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S b/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S index 7866c4700a..acdda46cc2 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S +++ b/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S @@ -19,11 +19,11 @@ __bsp_board_init: */ set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals - ld [%g3], %g2 + ld [%g3], %g2 set 0xfe080000, %g1 andcc %g1, %g2, %g0 bne 2f - + /* Stop the watchdog */ st %g0, [%g3 + SYM(ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET)] @@ -33,8 +33,8 @@ __bsp_board_init: st %g0, [%g3 + SYM(ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET)] /* Set the correct memory size in MEC memory config register */ - - set SYM(PROM_SIZE), %l0 + + set SYM(PROM_SIZE), %l0 set 0, %l1 srl %l0, 18, %l0 1: @@ -43,8 +43,8 @@ __bsp_board_init: bne,a 1b inc %l1 sll %l1, 8, %l1 - - set SYM(RAM_SIZE), %l0 + + set SYM(RAM_SIZE), %l0 srl %l0, 19, %l0 1: tst %l0 @@ -52,10 +52,10 @@ __bsp_board_init: bne,a 1b inc %l1 sll %l1, 10, %l1 - + ! set the Memory Configuration st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ] - + set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker set SYM(RAM_SIZE), %l2 add %l1, %l2, %sp diff --git a/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c b/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c index a49662831b..f3d4e3fbc5 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c @@ -13,5 +13,5 @@ #include <rtems.h> #include <bsp.h> - + ERC32_Register_Map ERC32_MEC; diff --git a/c/src/lib/libbsp/sparc/erc32/startup/setvec.c b/c/src/lib/libbsp/sparc/erc32/startup/setvec.c index 2bd9ad95b6..bd6f2f65e9 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/setvec.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/setvec.c @@ -21,10 +21,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */ if ( type ) rtems_interrupt_catch( handler, vector, &previous_isr ); - else + else _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); real_trap = SPARC_REAL_TRAP_NUMBER( vector ); if ( ERC32_Is_MEC_Trap( real_trap ) ) { - + source = ERC32_TRAP_SOURCE( real_trap ); ERC32_Clear_interrupt( source ); diff --git a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c index a3d3936df0..6f4d46d37e 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c @@ -1,11 +1,11 @@ /* * ERC32 Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * - * Developed as part of the port of RTEMS to the ERC32 implementation - * of the SPARC by On-Line Applications Research Corporation (OAR) + * Developed as part of the port of RTEMS to the ERC32 implementation + * of the SPARC by On-Line Applications Research Corporation (OAR) * under contract to the European Space Agency (ESA). * * COPYRIGHT (c) 1995. European Space Agency. @@ -60,33 +60,33 @@ rtems_isr bsp_spurious_handler( * First the ones defined by the basic architecture */ - case 0x00: + case 0x00: DEBUG_puts( "reset" ); break; - case 0x01: + case 0x01: DEBUG_puts( "instruction access exception" ); break; - case 0x02: + case 0x02: DEBUG_puts( "illegal instruction" ); break; - case 0x03: + case 0x03: DEBUG_puts( "privileged instruction" ); break; - case 0x04: + case 0x04: DEBUG_puts( "fp disabled" ); break; - case 0x07: + case 0x07: DEBUG_puts( "memory address not aligned" ); break; - case 0x08: + case 0x08: DEBUG_puts( "fp exception" ); break; - case 0x09: + case 0x09: strcpy(line, "data access exception at 0x " ); itos(ERC32_MEC.First_Failing_Address, &line[27]); DEBUG_puts( line ); break; - case 0x0A: + case 0x0A: DEBUG_puts( "tag overflow" ); break; @@ -178,7 +178,7 @@ void bsp_spurious_initialize() */ if (( trap == 5 || trap == 6 ) || - (( trap >= 0x11 ) && ( trap <= 0x1f )) || + (( trap >= 0x11 ) && ( trap <= 0x1f )) || (( trap >= 0x70 ) && ( trap <= 0x83 ))) continue; |