diff options
| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
| commit | 6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch) | |
| tree | af53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib | |
| parent | 2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
| download | rtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2 | |
Remove stray white spaces.
Diffstat (limited to 'c/src/lib')
575 files changed, 8067 insertions, 7964 deletions
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h b/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h index 119c7c133c..761b5f3604 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| bsp.h - ARM BSP +| bsp.h - ARM BSP +--------------------------------------------------------------------------+ | This include file contains definitions related to the ARM BSP. +--------------------------------------------------------------------------+ @@ -10,7 +10,7 @@ | The license and distribution terms for this file may be | found in found in the file LICENSE in this distribution or at | http://www.rtems.com/license/LICENSE. -| +| | $Id$ +--------------------------------------------------------------------------*/ @@ -28,7 +28,7 @@ extern "C" { #include <rtems/iosupp.h> #include <rtems/console.h> #include <rtems/clockdrv.h> - + /* * Define the interrupt mechanism for Time Test 27 * @@ -38,11 +38,11 @@ extern "C" { #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h b/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h index ca720a04f2..3b11c3856f 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h @@ -12,10 +12,10 @@ #ifndef __REGS_H__ -#define __REGS_H__ +#define __REGS_H__ /* - * VARIABLE DECLARATION + * VARIABLE DECLARATION */ #ifndef __asm__ diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S index 7ff7abb785..311578d50e 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S @@ -15,33 +15,33 @@ #define __asm__ #include <registers.h> - -/* - * Function to obtain, execute an IT handler and acknowledge the IT + +/* + * Function to obtain, execute an IT handler and acknowledge the IT */ .globl ExecuteITHandler - -ExecuteITHandler : + +ExecuteITHandler : /* - * Here is the code to execute the appropriate INT handler + * Here is the code to execute the appropriate INT handler */ - + mov pc, r0 -#if 0 -/* - * Function to acknowledge the IT controller +#if 0 +/* + * Function to acknowledge the IT controller */ .globl AckControler - -AckControler: + +AckControler: /* * Here is the code to acknowledge the PIC */ - + b ReturnFromAck /* return to ISR handler */ #endif diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c index c981def87b..f307a4171c 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c @@ -23,5 +23,5 @@ void BSP_rtems_irq_mngt_init() { * Here is the code to initialize the INT for * the specified BSP */ - + } diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c index 5b662fb1ee..7a0c222110 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c @@ -40,7 +40,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) if (*(HdlTable + irq->name) != default_int_handler) { return 0; } - + _CPU_ISR_Disable(level); /* @@ -74,7 +74,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -97,7 +97,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ *(HdlTable + irq->name) = default_int_handler; - + _CPU_ISR_Enable(level); return 1; diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h index 50e35fe0bc..d773e43161 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h @@ -22,7 +22,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> extern void default_int_handler(); @@ -39,9 +39,9 @@ typedef enum { } rtems_irq_symbolic_name; /* define that can be useful (the values are just examples) */ -#define INTMASK 0x01 +#define INTMASK 0x01 #define VECTOR_TABLE 0x00 - + /* * Type definition for RTEMS managed interrupts */ @@ -71,9 +71,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -143,7 +143,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S index c68fcfb076..6e9db56afe 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S @@ -14,7 +14,7 @@ .equ IRQ_Stack, 0x100 .equ FIQ_Stack, 0x200 .equ SVC_Stack, 0x300 - + /* Some standard definitions...*/ .equ Mode_USR, 0x10 @@ -33,20 +33,20 @@ .text .globl _start - + _start: /* * Here is the code to initialize the low-level BSP environment * (Chip Select, PLL, ....?) - + /* Copy data from FLASH to RAM */ LDR r0, =_initdata /* load address of region */ LDR r1, =0x400000 /* execution address of region */ LDR r2, =_edata /* copy execution address into r2 */ -copy: +copy: CMP r1, r2 /* loop whilst r1 < r2 */ LDRLO r3, [r0], #4 STRLO r3, [r1], #4 @@ -55,15 +55,15 @@ copy: /* zero the bss */ LDR r1, =__bss_end__ /* get end of ZI region */ LDR r0, =__bss_start__ /* load base address of ZI region */ -zi_init: +zi_init: MOV r2, #0 CMP r0, r1 /* loop whilst r0 < r1 */ STRLOT r2, [r0], #4 - BLO zi_init + BLO zi_init + - /* Load basic ARM7 interrupt table */ -VectorInit: +VectorInit: MOV R8, #0 ADR R9, Vector_Init_Block LDMIA R9!, {R0-R7} /* Copy the Vectors (8 words) */ @@ -75,10 +75,10 @@ VectorInit: /******************************************************* standard exception vectors table - *** Must be located at address 0 -********************************************************/ + *** Must be located at address 0 +********************************************************/ -Vector_Init_Block: +Vector_Init_Block: LDR PC, Reset_Addr LDR PC, Undefined_Addr LDR PC, SWI_Addr @@ -89,36 +89,36 @@ Vector_Init_Block: LDR PC, FIQ_Addr .globl Reset_Addr -Reset_Addr: .long _start +Reset_Addr: .long _start Undefined_Addr: .long Undefined_Handler SWI_Addr: .long SWI_Handler Prefetch_Addr: .long Prefetch_Handler Abort_Addr: .long Abort_Handler - .long 0 + .long 0 IRQ_Addr: .long IRQ_Handler FIQ_Addr: .long FIQ_Handler - + /* The following handlers do not do anything useful */ .globl Undefined_Handler -Undefined_Handler: +Undefined_Handler: B Undefined_Handler .globl SWI_Handler -SWI_Handler: - B SWI_Handler +SWI_Handler: + B SWI_Handler .globl Prefetch_Handler -Prefetch_Handler: +Prefetch_Handler: B Prefetch_Handler .globl Abort_Handler -Abort_Handler: +Abort_Handler: B Abort_Handler .globl IRQ_Handler -IRQ_Handler: +IRQ_Handler: B IRQ_Handler .globl FIQ_Handler -FIQ_Handler: +FIQ_Handler: B FIQ_Handler -init2 : +init2 : /* --- Initialise stack pointer registers Set up the ABORT stack pointer last and stay in SVC mode */ MOV r0, #(Mode_ABORT | I_Bit | F_Bit) /* No interrupts */ diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c index a5e4099bcd..ecef2a0d96 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | This file contains the ARM BSP startup package. It includes application, | board, and monitor specific initialization and configuration. The generic CPU -| dependent initialization has been performed before this routine is invoked. +| dependent initialization has been performed before this routine is invoked. +--------------------------------------------------------------------------+ | | Copyright (c) 2000 Canon Research Centre France SA. @@ -30,11 +30,11 @@ volatile unsigned long *Regs = (unsigned long*)0xdeadbeef; /* Chip registers */ extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */ -/* - * Size of heap if it is 0 it will be dynamically defined by memory size, - * otherwise the value should be changed by binary patch +/* + * Size of heap if it is 0 it will be dynamically defined by memory size, + * otherwise the value should be changed by binary patch */ -uint32_t _heap_size = 0; +uint32_t _heap_size = 0; /* Size of stack used during initialization. Defined in 'start.s'. */ extern uint32_t _stack_size; @@ -67,7 +67,7 @@ void bsp_postdriver_hook(void); | since drivers are not yet initialized. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_pretasking_hook(void) { @@ -76,9 +76,9 @@ void bsp_pretasking_hook(void) { _heap_size = 0x420000 - rtemsFreeMemStart; } - + bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0); - + rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */ @@ -89,14 +89,14 @@ void bsp_pretasking_hook(void) #endif /* RTEMS_DEBUG */ } /* bsp_pretasking_hook */ - + /*-------------------------------------------------------------------------+ | Function: bsp_start | Description: Called before main is invoked. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_start_default( void ) { @@ -116,7 +116,7 @@ void bsp_start_default( void ) /* Place RTEMS workspace at beginning of free memory. */ BSP_Configuration.work_space_start = (void *)rtemsFreeMemStart; - + rtemsFreeMemStart += BSP_Configuration.work_space_size; /* diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c index 447a34301e..a99faeb9ba 100644 --- a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c +++ b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| exit.c - ARM BSP +| exit.c - ARM BSP +--------------------------------------------------------------------------+ | Routines to shutdown and reboot the BSP. +--------------------------------------------------------------------------+ diff --git a/c/src/lib/libbsp/arm/armulator/console/console-io.c b/c/src/lib/libbsp/arm/armulator/console/console-io.c index cf844d1c79..3151e3fe20 100644 --- a/c/src/lib/libbsp/arm/armulator/console/console-io.c +++ b/c/src/lib/libbsp/arm/armulator/console/console-io.c @@ -55,7 +55,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ diff --git a/c/src/lib/libbsp/arm/armulator/include/bsp.h b/c/src/lib/libbsp/arm/armulator/include/bsp.h index 02aae789f6..680bec84b8 100644 --- a/c/src/lib/libbsp/arm/armulator/include/bsp.h +++ b/c/src/lib/libbsp/arm/armulator/include/bsp.h @@ -68,7 +68,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/arm/armulator/start/start.S b/c/src/lib/libbsp/arm/armulator/start/start.S index 191aa8d436..bd725115f1 100644 --- a/c/src/lib/libbsp/arm/armulator/start/start.S +++ b/c/src/lib/libbsp/arm/armulator/start/start.S @@ -59,11 +59,11 @@ _mainCRTStartup: mov a2, #0 /* Second arg: fill value */ mov fp, a2 /* Null frame pointer */ mov r7, a2 /* Null frame pointer for Thumb */ - + ldr a1, .LC1 /* First arg: start of memory block */ - ldr a3, .LC2 + ldr a3, .LC2 sub a3, a3, a1 /* Third arg: length of block */ - + #ifdef __thumb__ /* Enter Thumb mode.... */ @@ -73,9 +73,9 @@ _mainCRTStartup: .code 16 .global __change_mode .thumb_func -__change_mode: +__change_mode: #endif - + bl FUNCTION (memset) #if !defined (ARM_RDP_MONITOR) && !defined (ARM_RDI_MONITOR) mov r0, #0 /* no arguments */ @@ -83,9 +83,9 @@ __change_mode: #else /* Need to set up standard file handles */ bl FUNCTION (initialize_monitor_handles) - + /* XXX for now let's just get the code up :) */ -#if 0 +#if 0 #ifdef ARM_RDP_MONITOR swi SWI_GetEnv /* sets r0 to point to the command line */ mov r1, r0 @@ -171,7 +171,7 @@ __change_mode: str r4, [r3] add r3, #4 b .LC15 -.LC14: +.LC14: #else add r2, sp, r0, LSL #2 /* End of args */ mov r3, sp /* Start of args */ @@ -206,10 +206,10 @@ change_back: */ swi SWI_Exit #endif - - /* For Thumb, constants must be after the code since only + + /* For Thumb, constants must be after the code since only positive offsets are supported for PC relative addresses. */ - + .align 0 .LC0: #ifdef ARM_RDI_MONITOR @@ -241,9 +241,9 @@ StackLimit: .word 0 CommandLine: .space 256,0 /* Maximum length of 255 chars handled */ #endif .globl SWI_Handler -SWI_Handler: - B SWI_Handler - +SWI_Handler: + B SWI_Handler + #ifdef __pe__ .section .idata$3 .long 0,0,0,0,0,0,0,0 diff --git a/c/src/lib/libbsp/arm/armulator/startup/bspstart.c b/c/src/lib/libbsp/arm/armulator/startup/bspstart.c index 424a90c49a..8fc4230681 100644 --- a/c/src/lib/libbsp/arm/armulator/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/armulator/startup/bspstart.c @@ -15,11 +15,11 @@ */ #include <string.h> - + #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int HeapBase; @@ -68,7 +68,7 @@ void bsp_pretasking_hook(void) #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c b/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c index 1eb8f7034b..09714436dd 100644 --- a/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c +++ b/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c @@ -1,7 +1,7 @@ /* Support files for GNU libc. Files in the C namespace go here. Files in the system namespace (ie those that start with an underscore) go in syscalls.c. - + Note: These functions are in a seperate file so that OS providers can overrride the system call stubs (defined in syscalls.c) without having to provide libc funcitons as well. */ diff --git a/c/src/lib/libbsp/arm/armulator/startup/syscalls.c b/c/src/lib/libbsp/arm/armulator/startup/syscalls.c index 801e3d7aa1..9af21c352a 100644 --- a/c/src/lib/libbsp/arm/armulator/startup/syscalls.c +++ b/c/src/lib/libbsp/arm/armulator/startup/syscalls.c @@ -40,7 +40,7 @@ initialize_monitor_handles (void) { #ifdef ARM_RDI_MONITOR int volatile block[3]; - + block[0] = (int) ":tt"; block[2] = 3; /* length of filename */ block[1] = 0; /* mode "r" */ @@ -80,11 +80,11 @@ _swiread (int file, int fh = file; #ifdef ARM_RDI_MONITOR int block[3]; - + block[0] = fh; block[1] = (int) ptr; block[2] = len; - + return do_AngelSWI (AngelSWI_Reason_Read, block); #else asm ("mov r0, %1; mov r1, %2;mov r2, %3; swi %a0" @@ -104,11 +104,11 @@ _swiwrite ( int fh = file; #ifdef ARM_RDI_MONITOR int block[3]; - + block[0] = fh; block[1] = (int) ptr; block[2] = len; - + return do_AngelSWI (AngelSWI_Reason_Write, block); #else asm ("mov r0, %1; mov r1, %2;mov r2, %3; swi %a0" @@ -119,14 +119,14 @@ _swiwrite ( } /* - * Move me + * Move me */ void bsp_cleanup (void ) { /* FIXME: return code is thrown away */ - + #ifdef ARM_RDI_MONITOR do_AngelSWI (AngelSWI_Reason_ReportException, (void *) ADP_Stopped_ApplicationExit); diff --git a/c/src/lib/libbsp/arm/armulator/startup/trap.S b/c/src/lib/libbsp/arm/armulator/startup/trap.S index 328fabca5c..4021ea1d18 100644 --- a/c/src/lib/libbsp/arm/armulator/startup/trap.S +++ b/c/src/lib/libbsp/arm/armulator/startup/trap.S @@ -78,7 +78,7 @@ __rt_stkovf_split_big: @ dummy space on the stack and passing in a "phantom" arg1 into @ the function. This means that we do not need to worry about @ preserving the stack under "sp" even on function return. - @ + @ @ Code should never poke values beneath sp. The sp register @ should always be "dropped" first to cover the data. This @ protects the data against any events that may try and use diff --git a/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c b/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c index 5e2898affe..5850436de3 100644 --- a/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c +++ b/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c @@ -44,7 +44,7 @@ rtems_irq_connect_data clock_isr_data = {BSP_TC1OI, } while(0) -/* +/* * Set up the clock hardware */ #define Clock_driver_support_initialize_hardware() \ diff --git a/c/src/lib/libbsp/arm/edb7312/console/uart.c b/c/src/lib/libbsp/arm/edb7312/console/uart.c index 4bb897a0d4..c2628756e0 100644 --- a/c/src/lib/libbsp/arm/edb7312/console/uart.c +++ b/c/src/lib/libbsp/arm/edb7312/console/uart.c @@ -34,8 +34,8 @@ static int uart_set_attributes(int minor, const struct termios *t); unsigned long Console_Port_Count = NUM_DEVS; console_data Console_Port_Data[NUM_DEVS]; rtems_device_minor_number Console_Port_Minor = 0; -console_fns uart_fns = -{ +console_fns uart_fns = +{ libchip_serial_default_probe, uart_first_open, uart_last_close, @@ -69,7 +69,7 @@ console_tbl Console_Port_Tbl[] = { static int uart_first_open(int major, int minor, void *arg) {return 0;} static int uart_last_close(int major, int minor, void *arg) {return 0;} -static int uart_read(int minor) +static int uart_read(int minor) { return uart_poll_read(minor); } @@ -79,7 +79,7 @@ static void uart_write_polled(int minor, char c) uart_write(minor, &c, 1); } -static int uart_set_attributes(int minor, const struct termios *t) +static int uart_set_attributes(int minor, const struct termios *t) { return 0; } @@ -100,7 +100,7 @@ int uart_poll_read(int minor) return -1; } - + err = *data_reg; c = err & 0xff; @@ -133,7 +133,7 @@ static int uart_write(int minor, const char *buf, int len) c = (char) buf[i]; *data_reg = c; } - + return 1; } @@ -142,7 +142,7 @@ static void uart_init(int minor) volatile uint32_t *data_reg; volatile uint32_t *ctrl_reg1; volatile uint32_t *ctrl_reg2; - + data_reg = (uint32_t*)Console_Port_Tbl[minor].ulDataPort; ctrl_reg1 = (uint32_t*)Console_Port_Tbl[minor].ulCtrlPort1; ctrl_reg2 = (uint32_t*)Console_Port_Tbl[minor].ulCtrlPort2; @@ -156,6 +156,6 @@ static void uart_init(int minor) *ctrl_reg1 = (EP7312_UART_WRDLEN8 | EP7312_UART_FIFOEN | 0x17); /* 9600 baud */ - + } diff --git a/c/src/lib/libbsp/arm/edb7312/include/bsp.h b/c/src/lib/libbsp/arm/edb7312/include/bsp.h index 181d4702bc..1c86164ced 100644 --- a/c/src/lib/libbsp/arm/edb7312/include/bsp.h +++ b/c/src/lib/libbsp/arm/edb7312/include/bsp.h @@ -24,7 +24,7 @@ extern "C" { #include <rtems/iosupp.h> #include <rtems/console.h> #include <rtems/clockdrv.h> - + /* * Define the interrupt mechanism for Time Test 27 * @@ -42,16 +42,16 @@ extern rtems_configuration_table BSP_Configuration; #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() - + /* * Network driver configuration */ diff --git a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h index b2e0b9f806..13bcc3b7bf 100644 --- a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h +++ b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h @@ -2,7 +2,7 @@ * Cirrus EP7312 register declarations * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> - * + * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> * * The license and distribution terms for this file may be diff --git a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S index 8540b68294..69a41828b7 100644 --- a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S +++ b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S @@ -2,7 +2,7 @@ * Cirrus EP7312 Intererrupt handler * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> * * The license and distribution terms for this file may be @@ -15,11 +15,11 @@ */ #define __asm__ #include "irq.h" - + #define VECTOR_TABLE 0x40 - -/* - * Function to obtain, execute an IT handler and acknowledge the IT + +/* + * Function to obtain, execute an IT handler and acknowledge the IT */ .globl ExecuteITHandler diff --git a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c index f55b7baf1a..c8c3c7154f 100644 --- a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c +++ b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c @@ -2,7 +2,7 @@ * Cirrus EP7312 Intererrupt handler * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> * * The license and distribution terms for this file may be diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.c b/c/src/lib/libbsp/arm/edb7312/irq/irq.c index e48c2cb999..31f24fc82a 100644 --- a/c/src/lib/libbsp/arm/edb7312/irq/irq.c +++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.c @@ -2,7 +2,7 @@ * Cirrus EP7312 Intererrupt handler * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> * * The license and distribution terms for this file may be @@ -39,7 +39,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -50,7 +50,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) if (*(HdlTable + irq->name) != default_int_handler) { return 0; } - + _CPU_ISR_Disable(level); /* @@ -81,7 +81,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) /* interrupt managed by INTMR3 and INTSR3 */ *EP7312_INTMR3 |= (1 << (irq->name - 21)); } - + /* * Enable interrupt on device */ @@ -89,9 +89,9 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { irq->on(irq); } - + _CPU_ISR_Enable(level); - + return 1; } @@ -99,7 +99,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -135,18 +135,18 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* interrupt managed by INTMR3 and INTSR3 */ *EP7312_INTMR3 &= ~(1 << (irq->name - 21)); } - + /* * Disable interrupt on device */ if(irq->off) irq->off(irq); - + /* * restore the default irq value */ *(HdlTable + irq->name) = default_int_handler; - + _CPU_ISR_Enable(level); return 1; diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.h b/c/src/lib/libbsp/arm/edb7312/irq/irq.h index 58189b462e..b87586f459 100644 --- a/c/src/lib/libbsp/arm/edb7312/irq/irq.h +++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.h @@ -2,7 +2,7 @@ * Cirrus EP7312 Intererrupt handler * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> * * The license and distribution terms for this file may be @@ -29,7 +29,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> extern void default_int_handler(); @@ -68,7 +68,7 @@ typedef enum { } rtems_irq_symbolic_name; - + /* * Type definition for RTEMS managed interrupts */ @@ -98,9 +98,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -170,7 +170,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libbsp/arm/edb7312/network/network.c b/c/src/lib/libbsp/arm/edb7312/network/network.c index e8a02019fb..a622722020 100644 --- a/c/src/lib/libbsp/arm/edb7312/network/network.c +++ b/c/src/lib/libbsp/arm/edb7312/network/network.c @@ -28,8 +28,8 @@ void cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data) { /* works the same for all values of dev */ /* - printf("cs8900_io_set_reg: reg: %#6x, val %#6x\n", - CS8900_BASE + reg, + printf("cs8900_io_set_reg: reg: %#6x, val %#6x\n", + CS8900_BASE + reg, data); */ *(unsigned short *)(CS8900_BASE + reg) = data; @@ -47,7 +47,7 @@ unsigned short cs8900_io_get_reg (int dev, unsigned short reg) return val; } -/* cs8900_mem_set_reg - sets one of the registers mapped through +/* cs8900_mem_set_reg - sets one of the registers mapped through * PacketPage */ void cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data) @@ -57,7 +57,7 @@ void cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data) cs8900_io_set_reg(dev, CS8900_IO_PP_DATA_PORT0, data); } -/* cs8900_mem_get_reg - reads one of the registers mapped through +/* cs8900_mem_get_reg - reads one of the registers mapped through * PacketPage */ unsigned short cs8900_mem_get_reg (int dev, unsigned long reg) @@ -96,7 +96,7 @@ unsigned short cs8900_get_data_block (int dev, unsigned char *data) len = cs8900_mem_get_reg(dev, CS8900_PP_RxLength); for (i = 0; i < ((len + 1) / 2); i++) { - ((short *)data)[i] = cs8900_io_get_reg(dev, + ((short *)data)[i] = cs8900_io_get_reg(dev, CS8900_IO_RX_TX_DATA_PORT0); } return len; @@ -115,10 +115,10 @@ void cs8900_tx_load (int dev, struct mbuf *m) len += m->m_len; m = m->m_next; } while (m != 0); - + data = (unsigned short *) &g_enetbuf[0]; for (i = 0; i < ((len + 1) / 2); i++) { - cs8900_io_set_reg(dev, + cs8900_io_set_reg(dev, CS8900_IO_RX_TX_DATA_PORT0, data[i]); } diff --git a/c/src/lib/libbsp/arm/edb7312/start/start.S b/c/src/lib/libbsp/arm/edb7312/start/start.S index b7db4d4d42..95b3bc88fa 100644 --- a/c/src/lib/libbsp/arm/edb7312/start/start.S +++ b/c/src/lib/libbsp/arm/edb7312/start/start.S @@ -2,7 +2,7 @@ * Cirrus EP7312 Startup code * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> * * The license and distribution terms for this file may be @@ -14,7 +14,7 @@ * $Id$ */ - + /* Some standard definitions...*/ .equ Mode_USR, 0x10 @@ -33,7 +33,7 @@ .text .globl _start - + _start: /* store the sp */ mov r12, sp @@ -41,19 +41,19 @@ _start: * Here is the code to initialize the low-level BSP environment * (Chip Select, PLL, ....?) */ - + /* zero the bss */ LDR r1, =_bss_end_ /* get end of ZI region */ LDR r0, =_bss_start_ /* load base address of ZI region */ -zi_init: +zi_init: MOV r2, #0 CMP r0, r1 /* loop whilst r0 < r1 */ STRLOT r2, [r0], #4 - BLO zi_init - + BLO zi_init + /* Load basic ARM7 interrupt table */ -VectorInit: +VectorInit: MOV R0, #0 ADR R1, Vector_Init_Block LDMIA R1!, {R2, r3} /* Copy the Vectors (8 words) */ @@ -78,10 +78,10 @@ VectorInit: /******************************************************* standard exception vectors table - *** Must be located at address 0 -********************************************************/ + *** Must be located at address 0 +********************************************************/ -Vector_Init_Block: +Vector_Init_Block: LDR PC, Reset_Addr LDR PC, Undefined_Addr LDR PC, SWI_Addr @@ -92,45 +92,45 @@ Vector_Init_Block: LDR PC, FIQ_Addr .globl Reset_Addr -Reset_Addr: .long _start +Reset_Addr: .long _start Undefined_Addr: .long Undefined_Handler SWI_Addr: .long SWI_Handler Prefetch_Addr: .long Prefetch_Handler Abort_Addr: .long Abort_Handler - .long 0 + .long 0 IRQ_Addr: .long IRQ_Handler FIQ_Addr: .long FIQ_Handler - + /* The following handlers do not do anything useful */ .globl Undefined_Handler -Undefined_Handler: +Undefined_Handler: B Undefined_Handler .globl SWI_Handler -SWI_Handler: - B SWI_Handler +SWI_Handler: + B SWI_Handler .globl Prefetch_Handler -Prefetch_Handler: +Prefetch_Handler: B Prefetch_Handler .globl Abort_Handler -Abort_Handler: +Abort_Handler: B Abort_Handler .globl IRQ_Handler -IRQ_Handler: +IRQ_Handler: B IRQ_Handler .globl FIQ_Handler -FIQ_Handler: +FIQ_Handler: B FIQ_Handler -init2 : +init2 : /* --- Initialise stack pointer registers */ - + /* Enter IRQ mode and set up the IRQ stack pointer */ MOV r0, #Mode_IRQ | I_Bit | F_Bit /* No interrupts */ MSR cpsr, r0 ldr r1, =_irq_stack_size LDR sp, =_irq_stack add sp, sp, r1 - sub sp, sp, #0x64 + sub sp, sp, #0x64 /* Enter FIQ mode and set up the FIQ stack pointer */ MOV r0, #Mode_FIQ | I_Bit | F_Bit /* No interrupts */ @@ -138,7 +138,7 @@ init2 : ldr r1, =_fiq_stack_size LDR sp, =_fiq_stack add sp, sp, r1 - sub sp, sp, #0x64 + sub sp, sp, #0x64 /* Enter ABT mode and set up the ABT stack pointer */ MOV r0, #Mode_ABT | I_Bit | F_Bit /* No interrupts */ @@ -146,15 +146,15 @@ init2 : ldr r1, =_abt_stack_size LDR sp, =_abt_stack add sp, sp, r1 - sub sp, sp, #0x64 - + sub sp, sp, #0x64 + /* Set up the SVC stack pointer last and stay in SVC mode */ MOV r0, #Mode_SVC | I_Bit | F_Bit /* No interrupts */ MSR cpsr, r0 ldr r1, =_svc_stack_size LDR sp, =_svc_stack add sp, sp, r1 - sub sp, sp, #0x64 + sub sp, sp, #0x64 /* save the original registers */ stmdb sp!, {r4-r12, lr} diff --git a/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c b/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c index 62ba300662..714a134d26 100644 --- a/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c @@ -2,7 +2,7 @@ * Cirrus EP7312 Startup code * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -79,12 +79,12 @@ void bsp_pretasking_hook(void) uint32_t heap_size; - /* + /* * Set up the heap. It uses all free SDRAM except that reserved * for non-cached uses. */ heap_start = free_mem_start; - + /* heap_size = (free_mem_end - heap_start - MEM_NOCACHE_SIZE); */ heap_size = 0x200000; @@ -97,7 +97,7 @@ void bsp_pretasking_hook(void) #endif /* RTEMS_DEBUG */ } /* bsp_pretasking_hook */ - + /**************************************************************************/ /* */ @@ -133,26 +133,26 @@ void bsp_start_default( void ) Cpu_table.pretasking_hook = bsp_pretasking_hook; Cpu_table.postdriver_hook = bsp_postdriver_hook; Cpu_table.do_zero_of_workspace = TRUE; - + /* Place RTEMS workspace at beginning of free memory. */ BSP_Configuration.work_space_start = (void *)&_bss_free_start; - - free_mem_start = ((uint32_t)&_bss_free_start + + + free_mem_start = ((uint32_t)&_bss_free_start + BSP_Configuration.work_space_size); - + free_mem_end = ((uint32_t)&_sdram_base + (uint32_t)&_sdram_size); - + /* * Init rtems exceptions management */ rtems_exception_init_mngt(); - + /* * Init rtems interrupt management */ - rtems_irq_mngt_init(); - - + rtems_irq_mngt_init(); + + /* * The following information is very useful when debugging. */ @@ -168,7 +168,7 @@ void bsp_start_default( void ) BSP_Configuration.number_of_device_drivers ); printk( "Device_driver_table = 0x%x\n", BSP_Configuration.Device_driver_table ); - + /* printk( "_stack_size = 0x%x\n", _stack_size );*/ printk( "work_space_start = 0x%x\n", BSP_Configuration.work_space_start ); printk( "work_space_size = 0x%x\n", BSP_Configuration.work_space_size ); diff --git a/c/src/lib/libbsp/arm/edb7312/startup/exit.c b/c/src/lib/libbsp/arm/edb7312/startup/exit.c index 23e12fa54b..abdbed15a8 100644 --- a/c/src/lib/libbsp/arm/edb7312/startup/exit.c +++ b/c/src/lib/libbsp/arm/edb7312/startup/exit.c @@ -2,7 +2,7 @@ * Cirrus EP7312 BSP Shutdown code * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libbsp/arm/edb7312/timer/timer.c b/c/src/lib/libbsp/arm/edb7312/timer/timer.c index efc59beeed..9acacb89d6 100644 --- a/c/src/lib/libbsp/arm/edb7312/timer/timer.c +++ b/c/src/lib/libbsp/arm/edb7312/timer/timer.c @@ -2,7 +2,7 @@ * Cirrus EP7312 Timer driver * * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -14,7 +14,7 @@ * Timer_initialize() and Read_timer(). Read_timer() usually returns * the number of microseconds since Timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ diff --git a/c/src/lib/libbsp/arm/shared/comm/console.c b/c/src/lib/libbsp/arm/shared/comm/console.c index a6c4c58cca..fc6cec3f31 100644 --- a/c/src/lib/libbsp/arm/shared/comm/console.c +++ b/c/src/lib/libbsp/arm/shared/comm/console.c @@ -1,11 +1,11 @@ /*-------------------------------------------------------------------------+ -| console.c - ARM BSP +| console.c - ARM BSP +--------------------------------------------------------------------------+ | This file contains the ARM console I/O package. +--------------------------------------------------------------------------+ | COPYRIGHT (c) 2000 Canon Research France SA. | Emmanuel Raguet, mailto:raguet@crf.canon.fr -| +| | The license and distribution terms for this file may be | found in found in the file LICENSE in this distribution or at | http://www.rtems.com/license/LICENSE. @@ -65,9 +65,9 @@ static int isr_is_on(const rtems_irq_connect_data *); */ /* for printk support */ -BSP_output_char_function_type BSP_output_char = +BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) BSP_output_char_via_serial; -BSP_polling_getchar_function_type BSP_poll_char = +BSP_polling_getchar_function_type BSP_poll_char = (BSP_polling_getchar_function_type) BSP_poll_char_via_serial; @@ -82,7 +82,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -102,9 +102,9 @@ void __assert (const char *file, int line, const char *msg) { static char exit_msg[] = "EXECUTIVE SHUTDOWN! Any key to reboot..."; unsigned char ch; - + /* - * Note we cannot call exit or printf from here, + * Note we cannot call exit or printf from here, * assert can fail inside ISR too */ @@ -121,7 +121,7 @@ void __assert (const char *file, int line, const char *msg) printk(exit_msg); ch = BSP_poll_char(); printk("\n\n"); - rtemsReboot(); + rtemsReboot(); } @@ -142,21 +142,21 @@ console_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize (); - + /* * Do device-specific initialization */ - + /* 38400-8-N-1 */ BSP_uart_init(BSPConsolePort, 38400, 0); - - + + /* Set interrupt handler */ console_isr_data.name = BSP_UART; console_isr_data.hdl = BSP_uart_termios_isr_com1; console_isr_data.irqLevel = 3; console_isr_data.irqTrigger = 0; - + status = BSP_install_rtems_irq_handler(&console_isr_data); if (!status){ @@ -196,7 +196,7 @@ console_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ console_last_close, /* lastClose */ @@ -219,9 +219,9 @@ console_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set(BSPConsolePort, + BSP_uart_termios_set(BSPConsolePort, ((rtems_libio_open_close_args_t *)arg)->iop->data1); - + /* Enable interrupts on channel */ BSP_uart_intr_ctrl(BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS); @@ -243,7 +243,7 @@ console_close(rtems_device_major_number major, return res; } /* console_close */ - + /*-------------------------------------------------------------------------+ | Console device driver READ entry point. +--------------------------------------------------------------------------+ @@ -256,9 +256,9 @@ console_read(rtems_device_major_number major, { return rtems_termios_read (arg); - + } /* console_read */ - + /*-------------------------------------------------------------------------+ | Console device driver WRITE entry point. @@ -272,20 +272,20 @@ console_write(rtems_device_major_number major, { return rtems_termios_write (arg); - + } /* console_write */ - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return rtems_termios_ioctl (arg); } @@ -294,45 +294,45 @@ conSetAttr(int minor, const struct termios *t) { int baud; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -341,7 +341,7 @@ conSetAttr(int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: diff --git a/c/src/lib/libbsp/arm/shared/comm/uart.c b/c/src/lib/libbsp/arm/shared/comm/uart.c index 5b57e923a1..21ba31dcdf 100644 --- a/c/src/lib/libbsp/arm/shared/comm/uart.c +++ b/c/src/lib/libbsp/arm/shared/comm/uart.c @@ -33,10 +33,10 @@ struct uart_data static struct uart_data uart_data[2]; -/* +/* * Macros to read/wirte register of uart, if configuration is * different just rewrite these macros - */ + */ static inline unsigned char uread(int uart, unsigned int reg) @@ -44,11 +44,11 @@ uread(int uart, unsigned int reg) register unsigned char val; val = Regs[reg]; - + return val; } -static inline void +static inline void uwrite(int uart, int reg, unsigned int val) { @@ -81,13 +81,13 @@ uartError(int uart) inline void uartError(int uart) { unsigned char uartStatus; - + uartStatus = uread(uart, LSR); uartStatus = uread(uart, RBR); } #endif -/* +/* * Uart initialization, it is hardcoded to 8 bit, no parity, * one stop bit, FIFO, things to be changed * are baud rate and nad hw flow control, @@ -97,10 +97,10 @@ void BSP_uart_init(int uart, int baud, int hwFlow) { unsigned char tmp; - + /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + switch(baud) { case 50: @@ -121,20 +121,20 @@ BSP_uart_init(int uart, int baud, int hwFlow) assert(0); return; } - + /* Enable UART block */ uwrite(uart, CNT, UART_ENABLE | PAD_ENABLE); /* Set DLAB bit to 1 */ uwrite(uart, LCR, DLAB); - + /* Set baud rate */ - uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); - uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); + uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); + uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); /* 8-bit, no parity , 1 stop */ uwrite(uart, LCR, CHR_8_BITS); - + /* Enable FIFO */ uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); @@ -151,7 +151,7 @@ BSP_uart_init(int uart, int baud, int hwFlow) return; } -/* +/* * Set baud */ void @@ -161,10 +161,10 @@ BSP_uart_set_baud(int uart, int baud) /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - - /* + + /* * This function may be called whenever TERMIOS parameters - * are changed, so we have to make sure that baud change is + * are changed, so we have to make sure that baud change is * indeed required */ @@ -178,14 +178,14 @@ BSP_uart_set_baud(int uart, int baud) BSP_uart_init(uart, baud, uart_data[uart].hwFlow); uwrite(uart, IER, ier); - + return; } /* - * Enable/disable interrupts + * Enable/disable interrupts */ -void +void BSP_uart_intr_ctrl(int uart, int cmd) { @@ -218,7 +218,7 @@ BSP_uart_intr_ctrl(int uart, int cmd) assert(0); break; } - + return; } @@ -227,12 +227,12 @@ BSP_uart_intr_ctrl(int uart, int cmd) * Status function, -1 if error * detected, 0 if no received chars available, * 1 if received char available, 2 if break - * is detected, it will eat break and error - * chars. It ignores overruns - we cannot do + * is detected, it will eat break and error + * chars. It ignores overruns - we cannot do * anything about - it execpt count statistics * and we are not counting it. */ -int +int BSP_uart_polled_status(int uart) { unsigned char val; @@ -250,7 +250,7 @@ BSP_uart_polled_status(int uart) if((val & (DR | OE | FE)) == 1) { - /* No error, character present */ + /* No error, character present */ return BSP_UART_STATUS_CHAR; } @@ -260,12 +260,12 @@ BSP_uart_polled_status(int uart) return BSP_UART_STATUS_NOCHAR; } - /* + /* * Framing or parity error * eat character */ uread(uart, RBR); - + return BSP_UART_STATUS_ERROR; } @@ -273,24 +273,24 @@ BSP_uart_polled_status(int uart) /* * Polled mode write function */ -void +void BSP_uart_polled_write(int uart, int val) { unsigned char val1; - + /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + for(;;) { - if((val1=uread(uart, LSR)) & THRE) + if((val1=uread(uart, LSR)) & THRE) { break; } } uwrite(uart, THR, val & 0xff); - + return; } @@ -301,16 +301,16 @@ BSP_output_char_via_serial(int val) if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); } -/* +/* * Polled mode read function */ -int +int BSP_uart_polled_read(int uart) { unsigned char val; assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + for(;;) { if(uread(uart, LSR) & DR) @@ -318,13 +318,13 @@ BSP_uart_polled_read(int uart) break; } } - + val = uread(uart, RBR); return (int)(val & 0xff); } -unsigned +unsigned BSP_poll_char_via_serial() { return BSP_uart_polled_read(BSPConsolePort); @@ -346,19 +346,19 @@ static char termios_tx_hold_com2 = 0; static volatile char termios_tx_hold_valid_com2 = 0; /* - * Set channel parameters + * Set channel parameters */ void BSP_uart_termios_set(int uart, void *ttyp) { assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + if(uart == BSP_UART_COM1) { termios_stopped_com1 = 0; termios_tx_active_com1 = 0; termios_ttyp_com1 = ttyp; - termios_tx_hold_com1 = 0; + termios_tx_hold_com1 = 0; termios_tx_hold_valid_com1 = 0; } else @@ -366,7 +366,7 @@ BSP_uart_termios_set(int uart, void *ttyp) termios_stopped_com2 = 0; termios_tx_active_com2 = 0; termios_ttyp_com2 = ttyp; - termios_tx_hold_com2 = 0; + termios_tx_hold_com2 = 0; termios_tx_hold_valid_com2 = 0; } @@ -384,7 +384,7 @@ BSP_uart_termios_write_com1(int minor, const char *buf, int len) } /* If there TX buffer is busy - something is royally screwed up */ - assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); + assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); if(termios_stopped_com1) { @@ -401,7 +401,7 @@ BSP_uart_termios_write_com1(int minor, const char *buf, int len) if(!termios_tx_active_com1) { termios_tx_active_com1 = 1; - uwrite(BSP_UART_COM1, IER, + uwrite(BSP_UART_COM1, IER, (RECEIVE_ENABLE | TRANSMIT_ENABLE | RECEIVER_LINE_ST_ENABLE @@ -465,7 +465,7 @@ BSP_uart_termios_isr_com1(void) for(;;) { vect = uread(BSP_UART_COM1, IIR) & 0xf; - + switch(vect) { case NO_MORE_INTR : @@ -479,9 +479,9 @@ BSP_uart_termios_isr_com1(void) } return; case TRANSMITTER_HODING_REGISTER_EMPTY : - /* - * TX holding empty: we have to disable these interrupts - * if there is nothing more to send. + /* + * TX holding empty: we have to disable these interrupts + * if there is nothing more to send. */ ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1); @@ -514,7 +514,7 @@ BSP_uart_termios_isr_com1(void) } } } - + void BSP_uart_termios_isr_com2() { @@ -526,7 +526,7 @@ BSP_uart_termios_isr_com2() for(;;) { vect = uread(BSP_UART_COM2, IIR) & 0xf; - + switch(vect) { case NO_MORE_INTR : @@ -540,8 +540,8 @@ BSP_uart_termios_isr_com2() } return; case TRANSMITTER_HODING_REGISTER_EMPTY : - /* - * TX holding empty: we have to disable these interrupts + /* + * TX holding empty: we have to disable these interrupts * if there is nothing more to send. */ diff --git a/c/src/lib/libbsp/arm/shared/comm/uart.h b/c/src/lib/libbsp/arm/shared/comm/uart.h index c472d8296e..18322cedee 100644 --- a/c/src/lib/libbsp/arm/shared/comm/uart.h +++ b/c/src/lib/libbsp/arm/shared/comm/uart.h @@ -38,7 +38,7 @@ extern int BSPConsolePort; extern int BSPBaseBaud; /* * Command values for BSP_uart_intr_ctrl(), - * values are strange in order to catch errors + * values are strange in order to catch errors * with assert */ #define BSP_UART_INTR_CTRL_DISABLE (0) @@ -71,20 +71,20 @@ extern int BSPBaseBaud; #define RBR RSRBR /* Rx Buffer Register (read) */ #define THR RSTHR /* Tx Buffer Register (write) */ #define IER RSIER /* Interrupt Enable Register */ - + /* DLAB X */ #define IIR RSIIR /* Interrupt Ident Register (read) */ #define FCR RSFCR /* FIFO Control Register (write) */ #define LCR RSLCR /* Line Control Register */ #define LSR RSLSR /* Line Status Register */ - + /* DLAB 1 */ #define DLL RSDLL /* Divisor Latch, LSB */ #define DLM RSDLH /* Divisor Latch, MSB */ - + /* Uart control */ #define CNT RSCNT /* General Control register */ - + /* * define bit for CNT */ diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S index 348533e385..52a1692819 100644 --- a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S @@ -25,16 +25,16 @@ _ISR_Handler: stmdb sp!, {r0, r1, r2, r3, r12} /* save regs on INT stack */ stmdb sp!, {lr} /* now safe to call C funcs */ - + /* one nest level deeper */ - ldr r0, =_ISR_Nest_level + ldr r0, =_ISR_Nest_level ldr r1, [r0] add r1, r1,#1 str r1, [r0] - + /* disable multitasking */ - ldr r0, =_Thread_Dispatch_disable_level + ldr r0, =_Thread_Dispatch_disable_level ldr r1, [r0] add r1, r1,#1 str r1, [r0] @@ -42,14 +42,14 @@ _ISR_Handler: /* BSP specific function to INT handler */ /* FIXME: I'm not sure why I can't save just r12. I'm also */ /* not sure which of r1-r3 are important. */ - bl ExecuteITHandler + bl ExecuteITHandler -/* one less nest level */ +/* one less nest level */ ldr r0, =_ISR_Nest_level ldr r1, [r0] sub r1, r1,#1 str r1, [r0] - + /* unnest multitasking */ ldr r0, =_Thread_Dispatch_disable_level ldr r1, [r0] @@ -59,7 +59,7 @@ _ISR_Handler: /* check to see if we interrupted nd INT (with FIQ?) */ mrs r0, spsr and r0, r0, #0x1f - cmp r0, #0x12 /* is it INT mode? */ + cmp r0, #0x12 /* is it INT mode? */ beq exitit /* If thread dispatching is disabled, exit */ @@ -70,18 +70,18 @@ _ISR_Handler: ldr r0, =_Context_Switch_necessary ldr r1, [r0] cmp r1, #0 - + /* since bframe is going to clear _ISR_Signals_to_thread_executing, */ /* we need to load it here */ - ldr r0, =_ISR_Signals_to_thread_executing + ldr r0, =_ISR_Signals_to_thread_executing ldr r1, [r0] bne bframe - + /* If a signals to be sent (_ISR_Signals_to_thread_executing != 0), */ /* call scheduler */ cmp r1, #0 beq exitit - + /* _ISR_Signals_to_thread_executing = FALSE */ mov r1, #0 str r1, [r0] @@ -94,7 +94,7 @@ bframe: mrs r0, spsr ldmia sp!, {r1} /* get lr off stack */ stmdb sp!, {r1} - mrs r2, cpsr + mrs r2, cpsr orr r3, r2, #0x1 /* change to SVC mode */ msr cpsr_c, r3 @@ -111,10 +111,10 @@ bframe: ldmia sp!, {r1} /* out with the old */ stmdb sp!, {lr} /* in with the new (lr) */ - + orr r0, r0, #0xc0 msr spsr, r0 - + exitit: ldmia sp!, {lr} /* restore regs from INT stack */ ldmia sp!, {r0, r1, r2, r3, r12} /* restore regs from INT stack */ @@ -122,7 +122,7 @@ exitit: - /* on entry to _ISR_Dispatch, we're in SVC mode */ + /* on entry to _ISR_Dispatch, we're in SVC mode */ .globl _ISR_Dispatch _ISR_Dispatch: stmdb sp!, {r0-r3, r12,lr} /* save regs on SVC stack */ @@ -130,15 +130,15 @@ _ISR_Dispatch: /* we don't save lr, since */ /* it's just going to get */ /* overwritten */ -_ISR_Dispatch_p_4: +_ISR_Dispatch_p_4: bl _Thread_Dispatch ldmia sp!, {r0-r3, r12, lr} stmdb sp!, {r0-r2} /* Now we have to screw with the stack */ mov r0, sp /* copy the SVC stack pointer */ - - mrs r1, cpsr + + mrs r1, cpsr bic r2, r1, #0x1 /* change to INT mode */ orr r2, r2, #0xc0 /* disable interrupts */ msr cpsr_c, r2 @@ -147,7 +147,7 @@ _ISR_Dispatch_p_4: stmdb sp!, {r4, r5, r6} /* save temp vars on INT stack */ ldmia r0!, {r4, r5, r6} /* Get r0-r3 from SVC stack */ stmdb sp!, {r4, r5, r6} /* and save them on INT stack */ - + ldmia r0!, {r4, r5} /* get saved values from SVC stack */ /* r4=spsr, r5=lr */ mov lr, r5 /* restore lr_int */ diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_init.c b/c/src/lib/libbsp/arm/shared/irq/irq_init.c index b92bcac7e5..7e60fbd032 100644 --- a/c/src/lib/libbsp/arm/shared/irq/irq_init.c +++ b/c/src/lib/libbsp/arm/shared/irq/irq_init.c @@ -32,14 +32,14 @@ void rtems_irq_mngt_init() int i; long *vectorTable; rtems_interrupt_level level; - + vectorTable = (long *) VECTOR_TABLE; - + _CPU_ISR_Disable(level); /* First, connect the ISR_Handler for IRQ and FIQ interrupts */ - _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL); /* Initialize the vector table contents with default handler */ for (i=0; i<BSP_MAX_INT; i++) diff --git a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h index 119c7c133c..761b5f3604 100644 --- a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h +++ b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| bsp.h - ARM BSP +| bsp.h - ARM BSP +--------------------------------------------------------------------------+ | This include file contains definitions related to the ARM BSP. +--------------------------------------------------------------------------+ @@ -10,7 +10,7 @@ | The license and distribution terms for this file may be | found in found in the file LICENSE in this distribution or at | http://www.rtems.com/license/LICENSE. -| +| | $Id$ +--------------------------------------------------------------------------*/ @@ -28,7 +28,7 @@ extern "C" { #include <rtems/iosupp.h> #include <rtems/console.h> #include <rtems/clockdrv.h> - + /* * Define the interrupt mechanism for Time Test 27 * @@ -38,11 +38,11 @@ extern "C" { #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() diff --git a/c/src/lib/libbsp/arm/vegaplus/include/registers.h b/c/src/lib/libbsp/arm/vegaplus/include/registers.h index 2c11582194..2a153fd8d9 100644 --- a/c/src/lib/libbsp/arm/vegaplus/include/registers.h +++ b/c/src/lib/libbsp/arm/vegaplus/include/registers.h @@ -12,15 +12,15 @@ #ifndef __LMREGS_H__ -#define __LMREGS_H__ +#define __LMREGS_H__ /* - * VARIABLE DECLARATION + * VARIABLE DECLARATION ****************************************************************************** */ /* register area size */ -#define LM_REG_AREA_SIZ (0x4000/4) +#define LM_REG_AREA_SIZ (0x4000/4) /*** Register mapping : defined by indexes in an array ***/ /*** NOTE : only 1 register every 4 byte address location (+ some holes) */ @@ -216,7 +216,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define RINGCNTL ((MISC_BASE+0x90)/4) #define RINGFREQ ((MISC_BASE+0x94)/4) #define RSCNTL ((MISC_BASE+0xA0)/4) -/*#ifndef PRODUCT_VERSION*/ +/*#ifndef PRODUCT_VERSION*/ #define RSRXD ((MISC_BASE+0xA4)/4) #define RSTXD ((MISC_BASE+0xA8)/4) /*#endif*/ @@ -235,7 +235,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define CLKCNTL ((MISC_BASE+0xF4)/4) #define OSCCOR ((MISC_BASE+0xF8)/4) -/* PRODUCT_VERSION */ +/* PRODUCT_VERSION */ /* Added 30/08/99 : New Control register for UART control */ #define UART_BASE 0x3000 #define RSRBR ((UART_BASE+0x00)/4) @@ -248,7 +248,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define RSDLL ((UART_BASE+0x00)/4) #define RSDLH ((UART_BASE+0x04)/4) #define RSCNT ((UART_BASE+0x20)/4) -/*PRODUCT_VERSION*/ +/*PRODUCT_VERSION*/ /** THUMB and INTERFACES BLOCK 0x3400 - 0x4FFF */ @@ -830,12 +830,12 @@ extern volatile unsigned long *Regs; /* Chip registers */ /* DCC register */ -/* bit ENABLE=0x80 already defined */ +/* bit ENABLE=0x80 already defined */ #define DCC_ENABLE 0x80 /* TIMERCNTL[0:1] register */ -/* bit ENABLE=0x80 already defined */ +/* bit ENABLE=0x80 already defined */ #define TIMER_ENABLE 0x80 #define RELOAD 0x0040 #define MSK_FREQ 0x0003 /* mask on FREQ field */ @@ -882,7 +882,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ /****************************************************************************** - * Memory Mapping definition + * Memory Mapping definition ****************************************************************************** */ @@ -901,7 +901,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ /****************************************************************************** - * Slot Control bloc + * Slot Control bloc ****************************************************************************** */ @@ -915,7 +915,7 @@ typedef volatile struct /* normal Slot Control Block */ unsigned char CNTL0; unsigned char CNTL1; unsigned char CNTL2; - unsigned char STAT0; + unsigned char STAT0; unsigned char STAT1; unsigned char STAT2; unsigned char CRYPT; @@ -1051,7 +1051,7 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */ #define ZFIELD 0x01 /* AMSG parameter */ -#define PP_FP 0x80 +#define PP_FP 0x80 #define CT 0x40 #define NT 0x20 /* NT/CTSEND mapped on same bit */ #define CTSEND 0x20 @@ -1071,8 +1071,8 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */ -/* - * Some macros to mask the VEGA+ interrupt sources +/* + * Some macros to mask the VEGA+ interrupt sources ****************************************************************************** */ diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S index 7d31234c53..6cca55980b 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S +++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S @@ -14,16 +14,16 @@ #define __asm__ #include <registers.h> - -/* - * Function to obtain, execute an IT handler and acknowledge the IT + +/* + * Function to obtain, execute an IT handler and acknowledge the IT */ .globl ExecuteITHandler - -ExecuteITHandler : + +ExecuteITHandler : ldr r0, =INTPHAI3 /* read the vector number */ - ldr r0, [r0] + ldr r0, [r0] ldr r0, [r0] /* extract the IT handler @ */ /* @@ -52,14 +52,14 @@ IRQ_return: msr cpsr, r0 mov pc, lr - -/* - * Function to acknowledge the IT controller + +/* + * Function to acknowledge the IT controller */ .globl AckControler -#if 0 -AckControler: +#if 0 +AckControler: ldr r0, =INTEOI3 mov r1, #EOI str r1, [r0] diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c index 4a220e1462..7807d89181 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c +++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c @@ -21,7 +21,7 @@ void BSP_rtems_irq_mngt_init() { /* Initialize the vector table address in internal RAM */ Regs[INTTAB] = VECTOR_TABLE; - + /* Initialize the GLOBAL INT CONTROL register */ Regs[INTGCNTL] = 0x00; @@ -33,7 +33,7 @@ void BSP_rtems_irq_mngt_init() { /* Ack pending interrupt */ while ( ( Regs[INTSTAT] & 0xF433 ) != 0 ) { - Regs[INTACK] = 0xFFFF; + Regs[INTACK] = 0xFFFF; Regs[INTEOI] = EOI; } } diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c index 453ccf3d95..55c1590bdf 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c +++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c @@ -40,7 +40,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) if (*(HdlTable + irq->name) != default_int_handler) { return 0; } - + _CPU_ISR_Disable(level); /* @@ -60,7 +60,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) *(HdlTable + irq->name) = irq->hdl; /* - * initialize the control register for the concerned interrupt + * initialize the control register for the concerned interrupt */ Regs[(INTCNTL0 + irq->name)] = (long)(irq->irqTrigger) | (long)(irq->irqLevel) ; @@ -68,17 +68,17 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * ack pending interrupt */ Regs[INTACK] |= (long)(1 << irq->name); - + /* * unmask at INT controler level level */ Regs[INTMASK] &= ~(long)(1 << irq->name); - + /* * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -88,7 +88,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -115,7 +115,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ *(HdlTable + irq->name) = default_int_handler; - + _CPU_ISR_Enable(level); return 1; diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h index 116f528640..5857792ebe 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h +++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h @@ -22,7 +22,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> extern void default_int_handler(); @@ -62,11 +62,11 @@ typedef enum { #define MASKIRQ 0x80 #define MASKFIQ 0x40 - + #define END_OF_INT 0x80 #define VECTOR_TABLE 0x40 - + /* * Type definition for RTEMS managed interrupts */ @@ -96,9 +96,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -168,7 +168,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libbsp/arm/vegaplus/start/start.S b/c/src/lib/libbsp/arm/vegaplus/start/start.S index e811d1cac8..6c3c2ab141 100644 --- a/c/src/lib/libbsp/arm/vegaplus/start/start.S +++ b/c/src/lib/libbsp/arm/vegaplus/start/start.S @@ -9,7 +9,7 @@ * http://www.rtems.com/license/LICENSE. * */ - + /* Register definition */ .equ CNTL_BASE_ADR, 0xF3000 /* Base address of registers */ @@ -22,7 +22,7 @@ .equ CSCNTL1_2, 0x0C28 /* Offset of CS0CNTL */ .equ CNTL_CLK_ADR, 0xF2000 /* Base address of registers */ .equ CLKCNTL, 0x08F4 /* Offset of CS0CNTL */ -.equ INTHPAI, 0x0800 +.equ INTHPAI, 0x0800 .equ INTEOI, 0x0808 .equ EOI, 0x80 @@ -47,37 +47,37 @@ .equ MARK_STACK, 0 /*Fill every stack with a pattern for debug (0 or 1)*/ - + /*----------------------------------------------------------------------------- * Definitions ----------------------------------------------------------------------------*/ .equ PID_RAM_Limit, 0x1800 /* stack size definition */ -.equ FIQ_StackSize, 0x400 /* FIQ stack size */ -.equ IRQ_StackSize, 0xE00 /* IRQ stack size */ -.equ SVC_StackSize, 0x200 /* SVC stack size */ -.equ ABORT_StackSize, 0x100 /* ABORT stack size */ -.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */ +.equ FIQ_StackSize, 0x400 /* FIQ stack size */ +.equ IRQ_StackSize, 0xE00 /* IRQ stack size */ +.equ SVC_StackSize, 0x200 /* SVC stack size */ +.equ ABORT_StackSize, 0x100 /* ABORT stack size */ +.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */ /* sack size address */ -.equ Stack_Limit, PID_RAM_Limit +.equ Stack_Limit, PID_RAM_Limit .equ SVC_Stack, Stack_Limit -.equ ABORT_Stack, Stack_Limit - SVC_StackSize -.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize -.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize -.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize +.equ ABORT_Stack, Stack_Limit - SVC_StackSize +.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize +.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize +.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize .equ END_FIQ, FIQ_Stack - FIQ_StackSize .text .globl _start -/* +/* * This "strange" code is used to switch the memory access - * from 8 bits to 16 bits, because the vega plus accesses + * from 8 bits to 16 bits, because the vega plus accesses * the memory via 8 bits at reset time */ - + _start: .long 0x00300010 /*LDR r3,0x18*/ .long 0x00E5009F @@ -106,7 +106,7 @@ _start: .code 32 /* --- Initialise external bus*/ -Real_start: +Real_start: MOV r0,#CNTL_BASE_ADR /*Load timing configuration of CS0*/ @@ -116,7 +116,7 @@ Real_start: STR r1, [r0,#CSCNTL1_0] /* Load timing configuration and access mode of CS1 - NOTE : Important for macro REGION_INIT of Region_init.s + NOTE : Important for macro REGION_INIT of Region_init.s if initialisation of data in external RAM */ LDR r1, =0x2200 STR r1, [r0,#CSCNTL0_1] @@ -128,7 +128,7 @@ Real_start: STR r1, [r0,#CSCNTL0_2] LDR r1, =0xA2 STR r1, [r0,#CSCNTL1_2] - + MOV r0,#CNTL_CLK_ADR /* Load clock mode 55 MHz */ @@ -140,7 +140,7 @@ Real_start: LDR r1, =0x400000 /* execution address of region */ LDR r2, =_edata /* copy execution address into r2 */ -copy: +copy: CMP r1, r2 /* loop whilst r1 < r2 */ LDRLO r3, [r0], #4 STRLO r3, [r1], #4 @@ -149,15 +149,15 @@ copy: /* zero the bss */ LDR r1, =__bss_end__ /* get end of ZI region */ LDR r0, =__bss_start__ /* load base address of ZI region */ -zi_init: +zi_init: MOV r2, #0 CMP r0, r1 /* loop whilst r0 < r1 */ STRLOT r2, [r0], #4 - BLO zi_init + BLO zi_init + - /* Load basic ARM7 interrupt table */ -VectorInit: +VectorInit: MOV R8, #0 ADR R9, Vector_Init_Block LDMIA R9!, {R0-R7} /* Copy the Vectors (8 words) */ @@ -169,10 +169,10 @@ VectorInit: /******************************************************* standard exception vectors table - *** Must be located at address 0 -********************************************************/ + *** Must be located at address 0 +********************************************************/ -Vector_Init_Block: +Vector_Init_Block: LDR PC, Reset_Addr LDR PC, Undefined_Addr LDR PC, SWI_Addr @@ -183,36 +183,36 @@ Vector_Init_Block: LDR PC, FIQ_Addr .globl Reset_Addr -Reset_Addr: .long _start +Reset_Addr: .long _start Undefined_Addr: .long Undefined_Handler SWI_Addr: .long SWI_Handler Prefetch_Addr: .long Prefetch_Handler Abort_Addr: .long Abort_Handler - .long 0 + .long 0 IRQ_Addr: .long IRQ_Handler FIQ_Addr: .long FIQ_Handler - + /* The following handlers do not do anything useful */ .globl Undefined_Handler -Undefined_Handler: +Undefined_Handler: B Undefined_Handler .globl SWI_Handler -SWI_Handler: - B SWI_Handler +SWI_Handler: + B SWI_Handler .globl Prefetch_Handler -Prefetch_Handler: +Prefetch_Handler: B Prefetch_Handler .globl Abort_Handler -Abort_Handler: +Abort_Handler: B Abort_Handler .globl IRQ_Handler -IRQ_Handler: +IRQ_Handler: B IRQ_Handler .globl FIQ_Handler -FIQ_Handler: +FIQ_Handler: B FIQ_Handler -init2 : +init2 : /* --- Initialise stack pointer registers Set up the ABORT stack pointer last and stay in SVC mode */ MOV r0, #(Mode_ABORT | I_Bit | F_Bit) /* No interrupts */ diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c index fdeb345b53..3af8289599 100644 --- a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | This file contains the ARM BSP startup package. It includes application, | board, and monitor specific initialization and configuration. The generic CPU -| dependent initialization has been performed before this routine is invoked. +| dependent initialization has been performed before this routine is invoked. +--------------------------------------------------------------------------+ | | Copyright (c) 2000 Canon Research Centre France SA. @@ -26,11 +26,11 @@ volatile unsigned long *Regs = (unsigned long*)0xF0000; /* Chip registers */ extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */ -/* - * Size of heap if it is 0 it will be dynamically defined by memory size, - * otherwise the value should be changed by binary patch +/* + * Size of heap if it is 0 it will be dynamically defined by memory size, + * otherwise the value should be changed by binary patch */ -uint32_t _heap_size = 0; +uint32_t _heap_size = 0; /* Size of stack used during initialization. Defined in 'start.s'. */ extern uint32_t _stack_size; @@ -63,7 +63,7 @@ void bsp_postdriver_hook(void); | since drivers are not yet initialized. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_pretasking_hook(void) { @@ -72,9 +72,9 @@ void bsp_pretasking_hook(void) { _heap_size = 0x420000 - rtemsFreeMemStart; } - + bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0); - + rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */ @@ -85,14 +85,14 @@ void bsp_pretasking_hook(void) #endif /* RTEMS_DEBUG */ } /* bsp_pretasking_hook */ - + /*-------------------------------------------------------------------------+ | Function: bsp_start | Description: Called before main is invoked. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_start_default( void ) { @@ -112,7 +112,7 @@ void bsp_start_default( void ) /* Place RTEMS workspace at beginning of free memory. */ BSP_Configuration.work_space_start = (void *)rtemsFreeMemStart; - + rtemsFreeMemStart += BSP_Configuration.work_space_size; /* diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c index 447a34301e..a99faeb9ba 100644 --- a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c +++ b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| exit.c - ARM BSP +| exit.c - ARM BSP +--------------------------------------------------------------------------+ | Routines to shutdown and reboot the BSP. +--------------------------------------------------------------------------+ diff --git a/c/src/lib/libbsp/bare/include/bsp.h b/c/src/lib/libbsp/bare/include/bsp.h index 45204b12f1..7591dc0cd3 100644 --- a/c/src/lib/libbsp/bare/include/bsp.h +++ b/c/src/lib/libbsp/bare/include/bsp.h @@ -11,7 +11,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id$ + * $Id$ */ #ifndef __BARE_BSP_h @@ -53,7 +53,7 @@ extern "C" { #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) #define Cause_tm27_intr() @@ -81,7 +81,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/bsp.am b/c/src/lib/libbsp/bsp.am index 2f145cad8b..197e665dce 100644 --- a/c/src/lib/libbsp/bsp.am +++ b/c/src/lib/libbsp/bsp.am @@ -3,7 +3,7 @@ ## ## Explicitly set CPPASCOMPILE -# to be able to use it for compilation of *.S even if automake -# doesn't generate this variable. (automake-1.8.2+ only generates +# to be able to use it for compilation of *.S even if automake +# doesn't generate this variable. (automake-1.8.2+ only generates # this rule if *_SOURCES contain *.S.) CPPASCOMPILE = $(CCAS) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) diff --git a/c/src/lib/libbsp/bspstart.am b/c/src/lib/libbsp/bspstart.am index 9a58fcd3e2..962676a04d 100644 --- a/c/src/lib/libbsp/bspstart.am +++ b/c/src/lib/libbsp/bspstart.am @@ -5,4 +5,3 @@ $(ARCH)/%$(LIB_VARIANT).$(OBJEXT): %.c $(ARCH)/$(dirstamp) ${COMPILE} -o $@ -c $< $(ARCH)/%$(LIB_VARIANT).$(OBJEXT): %.S $(ARCH)/$(dirstamp) ${CCASCOMPILE} -DASM -o $@ -c $< - diff --git a/c/src/lib/libbsp/c4x/c4xsim/clock/clock.c b/c/src/lib/libbsp/c4x/c4xsim/clock/clock.c index 8cc97f0768..c17716953b 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/clock/clock.c +++ b/c/src/lib/libbsp/c4x/c4xsim/clock/clock.c @@ -41,7 +41,7 @@ volatile uint32_t Clock_driver_ticks; /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -68,7 +68,7 @@ rtems_isr Clock_isr( ) { /* - * The counter register gets reset automatically as well as the + * The counter register gets reset automatically as well as the * interrupt occurred flag so we should not have to do anything * with the hardware. */ @@ -127,7 +127,7 @@ void Install_clock( Clock_counter_register_value = (unsigned int) tmp; #if 0 - Clock_counter_register_value = + Clock_counter_register_value = (uint32_t) ((float) BSP_Configuration.microseconds_per_tick / ((float)_ClockFrequency / 2.0))); #endif @@ -185,14 +185,14 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -204,15 +204,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -223,7 +223,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/c4x/c4xsim/console/console.c b/c/src/lib/libbsp/c4x/c4xsim/console/console.c index b0f3c9daeb..00272b8576 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/console/console.c +++ b/c/src/lib/libbsp/c4x/c4xsim/console/console.c @@ -31,7 +31,7 @@ void console_outbyte_polled( ); /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -67,7 +67,7 @@ int console_write_support ( * Console Device Driver Entry Points * */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -111,12 +111,12 @@ rtems_device_driver console_open( assert( minor <= 1 ); if ( minor > 2 ) return RTEMS_INVALID_NUMBER; - + sc = rtems_termios_open (major, minor, arg, &pollCallbacks ); return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -125,7 +125,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -134,7 +134,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -143,7 +143,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/c4x/c4xsim/console/debugio.c b/c/src/lib/libbsp/c4x/c4xsim/console/debugio.c index c6d50f34d0..a8bcf206c0 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/console/debugio.c +++ b/c/src/lib/libbsp/c4x/c4xsim/console/debugio.c @@ -43,7 +43,7 @@ C4X_BSP_output_char( int c ) } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ diff --git a/c/src/lib/libbsp/c4x/c4xsim/include/bsp.h b/c/src/lib/libbsp/c4x/c4xsim/include/bsp.h index 85e65cd7d9..b021d2be01 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/include/bsp.h +++ b/c/src/lib/libbsp/c4x/c4xsim/include/bsp.h @@ -74,15 +74,15 @@ extern "C" { /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* * Information placed in the linkcmds file. diff --git a/c/src/lib/libbsp/c4x/c4xsim/start/start.S b/c/src/lib/libbsp/c4x/c4xsim/start/start.S index 2123fc24c3..710e2514f1 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/start/start.S +++ b/c/src/lib/libbsp/c4x/c4xsim/start/start.S @@ -22,7 +22,7 @@ _start: ldi 0800h,st ldp @mem_control ldi @mem_control,ar0 - ldp @mem_data + ldp @mem_data ldi @mem_data,r0 sti r0,*+ar0(0) sti r0,*+ar0(4) @@ -42,7 +42,7 @@ _start: ldi 0800h,st ldp @mem_control ldi @mem_control,ar0 - ldp @mem_data + ldp @mem_data ldi @mem_data,r0 sti r0,*+ar0(0) sti r0,*+ar0(4) diff --git a/c/src/lib/libbsp/c4x/c4xsim/startup/bspstart.c b/c/src/lib/libbsp/c4x/c4xsim/startup/bspstart.c index c38664cdce..6db1c3f47b 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/startup/bspstart.c +++ b/c/src/lib/libbsp/c4x/c4xsim/startup/bspstart.c @@ -24,7 +24,7 @@ * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; @@ -33,7 +33,7 @@ rtems_cpu_table Cpu_table; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); extern void bsp_spurious_initialize(); @@ -102,7 +102,7 @@ void bsp_start( void ) if ( BSP_Configuration.work_space_size > (int) &_WorkspaceMax ) rtems_fatal_error_occurred( 0x43218765 ); - + BSP_output_char = C4X_BSP_output_char; BSP_poll_char = (BSP_polling_getchar_function_type) NULL; } diff --git a/c/src/lib/libbsp/c4x/c4xsim/startup/spurious.c b/c/src/lib/libbsp/c4x/c4xsim/startup/spurious.c index 68094db74e..2eefe2ecf5 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/startup/spurious.c +++ b/c/src/lib/libbsp/c4x/c4xsim/startup/spurious.c @@ -1,7 +1,7 @@ /* * CXX Simulator Spurious Trap Handler Assistant * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/c4x/c4xsim/timer/timer.c b/c/src/lib/libbsp/c4x/c4xsim/timer/timer.c index fb347f31b3..d1b5925644 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/timer/timer.c +++ b/c/src/lib/libbsp/c4x/c4xsim/timer/timer.c @@ -35,7 +35,7 @@ void Timer_initialize( void ) * implemenations of timer but .... */ - + c4x_timer_stop(C4X_TIMER_0); c4x_timer_set_period(C4X_TIMER_0, 0xffffffff); /* so no interupts */ c4x_timer_start(C4X_TIMER_0); diff --git a/c/src/lib/libbsp/c4x/shared/bspspuriousinit.c b/c/src/lib/libbsp/c4x/shared/bspspuriousinit.c index f241861cf6..6e2d92c929 100644 --- a/c/src/lib/libbsp/c4x/shared/bspspuriousinit.c +++ b/c/src/lib/libbsp/c4x/shared/bspspuriousinit.c @@ -1,7 +1,7 @@ /* * CXX Spurious Trap Handler Install Routine * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. @@ -20,7 +20,7 @@ /* * bsp_spurious_initialize * - * Install the spurious handler for most vectors. + * Install the spurious handler for most vectors. */ rtems_isr bsp_spurious_handler( diff --git a/c/src/lib/libbsp/c4x/shared/c3xspurious.c b/c/src/lib/libbsp/c4x/shared/c3xspurious.c index 6cee9cc027..2a87e80670 100644 --- a/c/src/lib/libbsp/c4x/shared/c3xspurious.c +++ b/c/src/lib/libbsp/c4x/shared/c3xspurious.c @@ -1,7 +1,7 @@ /* * C3X Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/c4x/shared/c4xspurious.c b/c/src/lib/libbsp/c4x/shared/c4xspurious.c index bd8905a759..2fc9396208 100644 --- a/c/src/lib/libbsp/c4x/shared/c4xspurious.c +++ b/c/src/lib/libbsp/c4x/shared/c4xspurious.c @@ -1,7 +1,7 @@ /* * C4X Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/h8300/h8sim/console/console-io.c b/c/src/lib/libbsp/h8300/h8sim/console/console-io.c index c363617f49..92df9de640 100644 --- a/c/src/lib/libbsp/h8300/h8sim/console/console-io.c +++ b/c/src/lib/libbsp/h8300/h8sim/console/console-io.c @@ -40,12 +40,12 @@ void console_outbyte_polled( char ch ) { - asm volatile( "mov.b #0,r1l ; mov.b %0l,r2l ; jsr @@0xc4" - : : "r" (ch) : "r1", "r2"); + asm volatile( "mov.b #0,r1l ; mov.b %0l,r2l ; jsr @@0xc4" + : : "r" (ch) : "r1", "r2"); } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ diff --git a/c/src/lib/libbsp/h8300/h8sim/include/bsp.h b/c/src/lib/libbsp/h8300/h8sim/include/bsp.h index ba28326161..9c4a656d67 100644 --- a/c/src/lib/libbsp/h8300/h8sim/include/bsp.h +++ b/c/src/lib/libbsp/h8300/h8sim/include/bsp.h @@ -85,7 +85,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/h8300/h8sim/start/start.S b/c/src/lib/libbsp/h8300/h8sim/start/start.S index 32b074f7bf..f162639fe4 100644 --- a/c/src/lib/libbsp/h8300/h8sim/start/start.S +++ b/c/src/lib/libbsp/h8300/h8sim/start/start.S @@ -20,7 +20,7 @@ _start: jmp @_start ; restart #else -#if defined(__H8300H__) +#if defined(__H8300H__) .h8300h #else /* must be __H300S__ */ .h8300s diff --git a/c/src/lib/libbsp/h8300/h8sim/startup/bspstart.c b/c/src/lib/libbsp/h8300/h8sim/startup/bspstart.c index fa4fe5c105..e86a3c61f4 100644 --- a/c/src/lib/libbsp/h8300/h8sim/startup/bspstart.c +++ b/c/src/lib/libbsp/h8300/h8sim/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { void *heapStart; @@ -72,7 +72,7 @@ void bsp_pretasking_hook(void) #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/i386/i386ex/clock/ckinit.c b/c/src/lib/libbsp/i386/i386ex/clock/ckinit.c index 0bece0732a..20d50a35e0 100644 --- a/c/src/lib/libbsp/i386/i386ex/clock/ckinit.c +++ b/c/src/lib/libbsp/i386/i386ex/clock/ckinit.c @@ -41,7 +41,7 @@ void Clock_exit( void ); /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_major_number rtems_clock_minor = 0; @@ -91,28 +91,28 @@ rtems_device_driver Clock_initialize( { unsigned timer_counter_init_value; unsigned char clock_lsb, clock_msb; - + Clock_driver_ticks = 0; - Clock_isrs = - Clock_initial_isr_value = + Clock_isrs = + Clock_initial_isr_value = BSP_Configuration.microseconds_per_tick / 1000; /* ticks per clock_isr */ - + /* * configure the counter timer ( should be based on microsecs/tick ) * NB. The divisor(Clock_isrs) resolves the is the same number that appears in confdefs.h * when setting the microseconds_per_tick value. */ ClockOff ( &clockIrqData ); - + timer_counter_init_value = BSP_Configuration.microseconds_per_tick / Clock_isrs; clock_lsb = (unsigned char)timer_counter_init_value; clock_msb = timer_counter_init_value >> 8; - - outport_byte ( TMRCON , 0x34 ); + + outport_byte ( TMRCON , 0x34 ); outport_byte ( TMR0 , clock_lsb ); /* load LSB first */ outport_byte ( TMR0 , clock_msb ); /* then MSB */ - + if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Unable to initialize system clock\n"); rtems_fatal_error_occurred(1); @@ -121,10 +121,10 @@ rtems_device_driver Clock_initialize( /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -135,15 +135,15 @@ rtems_device_driver Clock_control( ) { rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(); @@ -159,13 +159,13 @@ rtems_device_driver Clock_control( printk("Clock installed AGAIN\n"); #endif } - + done: return RTEMS_SUCCESSFUL; } void Clock_exit() { - ClockOff(&clockIrqData); + ClockOff(&clockIrqData); BSP_remove_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/i386/i386ex/console/console.c b/c/src/lib/libbsp/i386/i386ex/console/console.c index 651735cefa..628f0027b5 100644 --- a/c/src/lib/libbsp/i386/i386ex/console/console.c +++ b/c/src/lib/libbsp/i386/i386ex/console/console.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | console.c v1.1 - i386ex BSP - 1997/08/07 +--------------------------------------------------------------------------+ -| This file contains the i386ex console I/O package. It is just a termios +| This file contains the i386ex console I/O package. It is just a termios | wrapper. +--------------------------------------------------------------------------+ | (C) Copyright 1997 - @@ -48,7 +48,7 @@ * Possible value for console input/output : * BSP_UART_COM1 * BSP_UART_COM2 - * BSP_CONSOLE_PORT_CONSOLE is not valid in this BSP. + * BSP_CONSOLE_PORT_CONSOLE is not valid in this BSP. * All references to either keyboard or video handling have been removed. */ @@ -67,7 +67,7 @@ static int isr_is_on(const rtems_irq_connect_data *); * Change references to com2 if required. */ -static rtems_irq_connect_data console_isr_data = +static rtems_irq_connect_data console_isr_data = { BSP_UART_COM2_IRQ, BSP_uart_termios_isr_com2, isr_on, @@ -79,7 +79,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -108,21 +108,21 @@ console_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize (); - + /* * Do device-specific initialization */ - + /* 9600-8-N-1, no hardware flow control */ BSP_uart_init(BSPConsolePort, 9600, CHR_8_BITS, 0, 0, 0); - - + + /* Set interrupt handler */ if(BSPConsolePort == BSP_UART_COM1) { console_isr_data.name = BSP_UART_COM1_IRQ; console_isr_data.hdl = BSP_uart_termios_isr_com1; - + } else { @@ -130,9 +130,9 @@ console_initialize(rtems_device_major_number major, console_isr_data.name = BSP_UART_COM2_IRQ; console_isr_data.hdl = BSP_uart_termios_isr_com2; } - + status = BSP_install_rtems_irq_handler(&console_isr_data); - + if (!status){ printk("Error installing serial console interrupt handler!\n"); rtems_fatal_error_occurred(status); @@ -146,7 +146,7 @@ console_initialize(rtems_device_major_number major, printk("Error registering console device!\n"); rtems_fatal_error_occurred (status); } - + if(BSPConsolePort == BSP_UART_COM1) { printk("Initialized console on port COM1 9600-8-N-1\n\n"); @@ -176,7 +176,7 @@ console_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ console_last_close, /* lastClose */ @@ -204,9 +204,9 @@ console_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set(BSPConsolePort, + BSP_uart_termios_set(BSPConsolePort, ((rtems_libio_open_close_args_t *)arg)->iop->data1); - + /* Enable interrupts on channel */ BSP_uart_intr_ctrl(BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS); @@ -223,10 +223,10 @@ console_close(rtems_device_major_number major, { return (rtems_termios_close (arg)); - + } /* console_close */ - + /*-------------------------------------------------------------------------+ | Console device driver READ entry point. +--------------------------------------------------------------------------+ @@ -248,7 +248,7 @@ console_read(rtems_device_major_number major, return sc; } /* console_read */ - + /*-------------------------------------------------------------------------+ | Console device driver WRITE entry point. @@ -261,20 +261,20 @@ console_write(rtems_device_major_number major, void * arg) { return rtems_termios_write (arg); - + } /* console_write */ - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return rtems_termios_ioctl (arg); } @@ -283,45 +283,45 @@ conSetAttr(int minor, const struct termios *t) { int baud; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -330,7 +330,7 @@ conSetAttr(int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: @@ -351,13 +351,13 @@ conSetAttr(int minor, const struct termios *t) * BSP initialization */ -BSP_output_char_function_type BSP_output_char = +BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) BSP_output_char_via_serial; -BSP_polling_getchar_function_type BSP_poll_char = +BSP_polling_getchar_function_type BSP_poll_char = (BSP_polling_getchar_function_type) BSP_poll_char_via_serial; int BSP_poll_read(int ttyMinor){ - + return BSP_poll_char_via_serial(); } diff --git a/c/src/lib/libbsp/i386/i386ex/include/bsp.h b/c/src/lib/libbsp/i386/i386ex/include/bsp.h index c7c41dfa99..535bc1f3bd 100644 --- a/c/src/lib/libbsp/i386/i386ex/include/bsp.h +++ b/c/src/lib/libbsp/i386/i386ex/include/bsp.h @@ -27,7 +27,7 @@ extern "C" { #include <rtems/bspIo.h> #include <libcpu/cpu.h> #include <irq.h> - + /* * confdefs.h overrides for this BSP: * - number of termios serial ports (defaults to 1) @@ -120,15 +120,15 @@ extern "C" { /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* miscellaneous stuff assumed to exist */ extern rtems_configuration_table BSP_Configuration; diff --git a/c/src/lib/libbsp/i386/i386ex/network/netexterns.h b/c/src/lib/libbsp/i386/i386ex/network/netexterns.h index 76259b7bae..4ad43f2231 100644 --- a/c/src/lib/libbsp/i386/i386ex/network/netexterns.h +++ b/c/src/lib/libbsp/i386/i386ex/network/netexterns.h @@ -11,7 +11,7 @@ extern int uti596_attach(struct rtems_bsdnet_ifconfig *); extern int uti596dump(char * ); -extern void uti596reset(void); +extern void uti596reset(void); extern void uti596Diagnose(int); extern void uti596_request_reset(void); diff --git a/c/src/lib/libbsp/i386/i386ex/network/network.c b/c/src/lib/libbsp/i386/i386ex/network/network.c index dc30a97703..f15873928d 100644 --- a/c/src/lib/libbsp/i386/i386ex/network/network.c +++ b/c/src/lib/libbsp/i386/i386ex/network/network.c @@ -7,7 +7,7 @@ void dump_scb(void); void printk_time(void); #ifdef DBG_VERSION -#define BREAKPOINT() asm(" int $3"); +#define BREAKPOINT() asm(" int $3"); #else #define BREAKPOINT() #endif @@ -16,7 +16,7 @@ void printk_time(void); /* - + EII: Oct 16 : Version 0.0 */ @@ -25,9 +25,9 @@ void printk_time(void); #define DMA_MASK_REG 0x0A #define DMA_MODE_REG 0x0B #define DMA_ENABLE 0x0 -#define DMA_DISABLE 0x4 +#define DMA_DISABLE 0x4 -struct i596_rfd *pISR_Rfd; +struct i596_rfd *pISR_Rfd; void show_buffers (void); void show_queues(void); @@ -111,7 +111,7 @@ char uti596initSetup[] = { /* These are extern, and non-inline for testing purposes */ void uti596addCmd (struct i596_cmd *pCmd); -void uti596_initMem (struct uti596_softc *); +void uti596_initMem (struct uti596_softc *); void uti596_init (void * ); int uti596initRxBufs (int num); int uti596_initRFA (int num); @@ -139,7 +139,7 @@ void uti596addPolledCmd(struct i596_cmd *); void uti596supplyFD(struct i596_rfd *); struct i596_rfd * uti596dequeue( struct i596_rfd ** ); -void uti596append( struct i596_rfd ** , struct i596_rfd * ); +void uti596append( struct i596_rfd ** , struct i596_rfd * ); #ifdef DEBUG_INIT static void print_eth (unsigned char *); @@ -167,7 +167,7 @@ void send_packet(struct ifnet *, struct mbuf *); } /*************************************************************************/ -void +void uti596_request_reset(void){ rtems_status_code sc; @@ -225,7 +225,7 @@ int uti596_initRFA(int num) printf ("%s: uti596_initRFA %d.\n", num); #endif - /* + /* * Initialize the first rfd in the rfa */ pRfd = (struct i596_rfd *) calloc (1,sizeof (struct i596_rfd)); @@ -236,7 +236,7 @@ int uti596_initRFA(int num) else { uti596_softc.countRFD = 1; uti596_softc.pBeginRFA = uti596_softc.pEndRFA = pRfd; - printf ( "First Rfd allocated is: %p\n", + printf ( "First Rfd allocated is: %p\n", uti596_softc.pBeginRFA); } @@ -244,31 +244,31 @@ int uti596_initRFA(int num) pRfd = (struct i596_rfd *) calloc (1,sizeof (struct i596_rfd) ); if ( pRfd != NULL ) { uti596_softc.countRFD++; - uti596_softc.pEndRFA -> next = pRfd; /* link it in */ + uti596_softc.pEndRFA -> next = pRfd; /* link it in */ uti596_softc.pEndRFA = pRfd; /* move the end */ #ifdef DBG_596_RFA printf("Allocated RFD @ %p\n", pRfd); #endif } - else { + else { printf("Can't allocate all buffers: only %d allocated\n", i); break; } } /* end for */ - + uti596_softc.pEndRFA -> next = I596_NULL; - UTI_596_ASSERT(uti596_softc.countRFD == RX_BUF_COUNT,"INIT:WRONG RFD COUNT\n" ); - + UTI_596_ASSERT(uti596_softc.countRFD == RX_BUF_COUNT,"INIT:WRONG RFD COUNT\n" ); + #ifdef DBG_596_RFA - printf ( "Head of RFA is buffer %p\nEnd of RFA is buffer %p \n", - uti596_softc.pBeginRFA, + printf ( "Head of RFA is buffer %p\nEnd of RFA is buffer %p \n", + uti596_softc.pBeginRFA, uti596_softc.pEndRFA ); #endif /* initialize the Rfd's */ for ( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL; pRfd = pRfd -> next ) { - + pRfd->cmd = 0x0000; pRfd->stat = 0x0000; pRfd->pRbd = I596_NULL; @@ -278,7 +278,7 @@ int uti596_initRFA(int num) printf("Can't allocate the RFD data buffer\n"); } - /* mark the last FD */ + /* mark the last FD */ uti596_softc.pEndRFA -> cmd = CMD_EOL; /* moved jan 13 from before the init stuff */ #ifdef DBG_596_RFA @@ -286,15 +286,15 @@ int uti596_initRFA(int num) #endif - uti596_softc.pSavedRfdQueue = + uti596_softc.pSavedRfdQueue = uti596_softc.pEndSavedQueue = I596_NULL; /* initially empty */ - + uti596_softc.savedCount = 0; uti596_softc.nop.cmd.command = CmdNOp; /* initialize the nop command */ return (i); /* the number of allocated buffers */ - + } /*********************************************************************** * Function: uti596supplyFD @@ -316,10 +316,10 @@ void uti596supplyFD(struct i596_rfd * pRfd ) pRfd -> next = I596_NULL; pRfd -> stat = 0x0000; /* clear STAT_C and STAT_B bits */ - /* + /* * Check if the list is empty: */ - if ( uti596_softc.pBeginRFA == I596_NULL ) { + if ( uti596_softc.pBeginRFA == I596_NULL ) { /* Init a list w/ one entry */ uti596_softc.pBeginRFA = uti596_softc.pEndRFA = pRfd; UTI_596_ASSERT(uti596_softc.countRFD == 0, "Null begin, but non-zero count\n"); @@ -332,22 +332,22 @@ void uti596supplyFD(struct i596_rfd * pRfd ) * Check if the last RFD is used/read by the 596. */ pLastRfd = uti596_softc.pEndRFA; - - if ( pLastRfd != I596_NULL && + + if ( pLastRfd != I596_NULL && ! (pLastRfd -> stat & ( STAT_C | STAT_B ) )) { /* C = complete, B = busy (prefetched) */ - - /* - * Not yet too late to add it + + /* + * Not yet too late to add it */ pLastRfd -> next = pRfd; pLastRfd -> cmd &= ~CMD_EOL; /* RESET_EL : reset EL bit to 0 */ - uti596_softc.countRFD++; /* Lets assume we add it successfully + uti596_softc.countRFD++; /* Lets assume we add it successfully If not, the RFD may be used, and may decrement countRFD < 0 !!*/ /* * Check if the last RFD was used while appending. */ if ( pLastRfd -> stat & ( STAT_C | STAT_B ) ) { /* completed or was prefetched */ - /* + /* * Either the EL bit of the last rfd has been read by the 82596, * and it will stop after reception,( true when RESET_EL not reached ) or * the EL bit was NOT read by the 82596 and it will use the linked @@ -356,7 +356,7 @@ void uti596supplyFD(struct i596_rfd * pRfd ) * Therefore, the end of list CANNOT be updated. */ UTI_596_ASSERT ( uti596_softc.pLastUnkRFD == I596_NULL, "Too many Unk RFD's\n" ); - uti596_softc.pLastUnkRFD = pRfd; + uti596_softc.pLastUnkRFD = pRfd; return; } else { @@ -364,20 +364,20 @@ void uti596supplyFD(struct i596_rfd * pRfd ) * The RFD being added was not touched by the 82596 */ if (uti596_softc.pLastUnkRFD != I596_NULL ) { - + uti596append(&uti596_softc.pSavedRfdQueue, pRfd); /* Only here! saved Q */ uti596_softc.pEndSavedQueue = pRfd; uti596_softc.savedCount++; uti596_softc.countRFD--; - + } else { uti596_softc.pEndRFA = pRfd; /* the RFA has been extended */ - if ( ( uti596_softc.scb.status & SCB_STAT_RNR || + if ( ( uti596_softc.scb.status & SCB_STAT_RNR || uti596_softc.scb.status & RU_NO_RESOURCES ) && uti596_softc.countRFD > 1 ) { /* was == 2 */ uti596_softc.pBeginRFA -> cmd &= ~CMD_EOL; /* Ensure that beginRFA is not EOL */ - + UTI_596_ASSERT(uti596_softc.pEndRFA -> next == I596_NULL, "supply: List buggered\n"); UTI_596_ASSERT(uti596_softc.pEndRFA -> cmd & CMD_EOL, "supply: No EOL at end.\n"); UTI_596_ASSERT(uti596_softc.scb.command == 0, "Supply: scb command must be zero\n"); @@ -389,24 +389,24 @@ void uti596supplyFD(struct i596_rfd * pRfd ) uti596_softc.scb.pRfd = uti596_softc.pBeginRFA; uti596_softc.scb.command = RX_START | SCB_STAT_RNR; /* Don't ack RNR! The receiver should be stopped in this case */ UTI_596_ASSERT( !(uti596_softc.scb.status & SCB_STAT_FR),"FRAME RECEIVED INT COMING!\n"); - outport_byte(CHAN_ATTN, 0); + outport_byte(CHAN_ATTN, 0); } } return; - + } - } + } else { - /* - * too late , pLastRfd in use ( or NULL ), - * in either case, EL bit has been read, and RNR condition will occur + /* + * too late , pLastRfd in use ( or NULL ), + * in either case, EL bit has been read, and RNR condition will occur */ uti596append( &uti596_softc.pSavedRfdQueue, pRfd); /* save it for RNR */ - - uti596_softc.pEndSavedQueue = pRfd; /* reset end of saved queue */ + + uti596_softc.pEndSavedQueue = pRfd; /* reset end of saved queue */ uti596_softc.savedCount++; - - + + return; } } @@ -427,7 +427,7 @@ uti596_initialize_hardware(struct uti596_softc *sc) rtems_status_code status_code; printf("uti596_initialize_hardware\n"); - + /* reset the board */ outport_word( PORT_ADDR, 0 ); outport_word( PORT_ADDR, 0 ); @@ -442,12 +442,12 @@ uti596_initialize_hardware(struct uti596_softc *sc) #ifdef DBG_INIT printf("initialize_hardware:change scp address to : %p\n",sc->pScp); #endif - + /* change the scp address */ #ifdef DBG_INIT printf("Change the SCP address\n"); #endif - + /* * Set the DMA mode to enable the 82596 to become a bus-master */ @@ -458,37 +458,37 @@ uti596_initialize_hardware(struct uti596_softc *sc) /* reset the board */ outport_word( PORT_ADDR, 0 ); outport_word( PORT_ADDR, 0 ); - + outport_word(PORT_ADDR, ((((int)sc->pScp) & 0xffff) | 2 )); outport_word(PORT_ADDR, (( (int)sc->pScp) >> 16 ) & 0xffff ); - + /* This is linear mode, LOCK function is disabled */ - + sc->pScp->sysbus = 0x00540000; sc->pScp->iscp = &sc->iscp; sc->iscp.scb = &sc->scb; sc->iscp.stat = 0x0001; - + sc->pCmdHead = sc->scb.pCmd = I596_NULL; - + #ifdef DBG_596 printf("Starting i82596.\n"); #endif - + /* Pass the scb address to the 596 */ outport_word(CHAN_ATTN,0); - + while (sc->iscp.stat) if (--boguscnt == 0) { - printf("initialize_hardware: timed out with status %4.4lx\n", + printf("initialize_hardware: timed out with status %4.4lx\n", sc->iscp.stat ); break; } - + /* clear the command word */ sc->scb.command = 0; - + /* * Set up interrupts ( NEW irq style ) */ @@ -497,7 +497,7 @@ uti596_initialize_hardware(struct uti596_softc *sc) sc->irqInfo.on = uti596_maskOn; sc->irqInfo.off = uti596_maskOff; sc->irqInfo.isOn = uti596_isOn; - + status_code = BSP_install_rtems_irq_handler (&sc->irqInfo); if (!status_code) rtems_panic ("Can't attach uti596 interrupt handler for irq %d\n", @@ -505,7 +505,7 @@ uti596_initialize_hardware(struct uti596_softc *sc) /* Initialize the 82596 memory ( Transmit buffers ) */ uti596_initMem(sc); - + #ifdef DBG_INIT printf("After attach, status of board = 0x%x\n", sc->scb.status ); #endif @@ -519,11 +519,11 @@ uti596_reset_hardware(struct uti596_softc *sc) int boguscnt = 1000; rtems_status_code status_code; struct i596_cmd *pCmd; - + printf("uti596_reset_hardware\n"); pCmd = sc->pCmdHead; /* This is a tx command for sure (99.99999%) */ - + /* reset the board */ outport_word( PORT_ADDR, 0 ); outport_word( PORT_ADDR, 0 ); @@ -538,17 +538,17 @@ uti596_reset_hardware(struct uti596_softc *sc) #endif sc->pScp = (struct i596_scp *) ((((int)uti596_softc.pScp) + 0xf) & 0xfffffff0); - + #ifdef DBG_RESET printf("reset_hardware:change scp address to : %p\n",sc->pScp); #endif - + /* change the scp address */ #ifdef DBG_RESET printf("Change the SCP address\n"); #endif - + /* * Set the DMA mode to enable the 82596 to become a bus-master */ @@ -559,52 +559,52 @@ uti596_reset_hardware(struct uti596_softc *sc) /* reset the board */ outport_word( PORT_ADDR, 0 ); outport_word( PORT_ADDR, 0 ); - + /* outport_word(PORT_ADDR, ((((int)uti596_softc.pScp) & 0xffff) | 2 )); outport_word(PORT_ADDR, (( (int)uti596_softc.pScp) >> 16 ) & 0xffff ); */ - + outport_word(PORT_ADDR, ((((int)sc->pScp) & 0xffff) | 2 )); outport_word(PORT_ADDR, (( (int)sc->pScp) >> 16 ) & 0xffff ); - + /* This is linear mode, LOCK function is disabled */ - + sc->pScp->sysbus = 0x00540000; sc->pScp->iscp = &sc->iscp; sc->iscp.scb = &sc->scb; sc->iscp.stat = 0x0001; - + sc->pCmdHead = sc->scb.pCmd = I596_NULL; /* - * Wake the transmitter if needed. + * Wake the transmitter if needed. */ - if ( uti596_softc.txDaemonTid && pCmd != I596_NULL ){ + if ( uti596_softc.txDaemonTid && pCmd != I596_NULL ){ printf("****RESET: wakes transmitter!\n"); - status_code = rtems_event_send (uti596_softc.txDaemonTid, + status_code = rtems_event_send (uti596_softc.txDaemonTid, INTERRUPT_EVENT); - + if ( status_code != RTEMS_SUCCESSFUL ) printk("****ERROR:Could NOT send event to tid 0x%x : %s\n", uti596_softc.txDaemonTid, rtems_status_text (status_code) ); } - + #ifdef DBG_596 printf("reset_hardware: starting i82596.\n"); #endif - + /* Pass the scb address to the 596 */ outport_word(CHAN_ATTN,0); - + while (sc->iscp.stat) if (--boguscnt == 0) { - printf("reset_hardware: timed out with status %4.4lx\n", + printf("reset_hardware: timed out with status %4.4lx\n", sc->iscp.stat ); break; } - + /* clear the command word */ sc->scb.command = 0; - + #ifdef DBG_RESET printf("After reset_hardware, status of board = 0x%x\n", sc->scb.status ); #endif @@ -635,18 +635,18 @@ uti596_initMem(struct uti596_softc * sc) sc->resetDone = 0; /* ??? */ /* - * Set up receive frame area (RFA) + * Set up receive frame area (RFA) */ i = uti596_initRFA( sc->rxBdCount ); - if ( i < sc->rxBdCount ) + if ( i < sc->rxBdCount ) printf("init_rfd: only able to allocate %d receive frame descriptors\n", i); - - sc->scb.pRfd = sc->pBeginRFA; + + sc->scb.pRfd = sc->pBeginRFA; #ifdef DBG_INIT printf(" IRQ %d.\n", sc->irqInfo.name); -#endif - +#endif + /* * Diagnose the health of the board */ @@ -678,7 +678,7 @@ uti596_initMem(struct uti596_softc * sc) /*******/ - /* + /* * Create the IA setup command */ @@ -692,11 +692,11 @@ uti596_initMem(struct uti596_softc * sc) sc->cmdOk = 0; uti596addPolledCmd((struct i596_cmd *)&sc->set_add); /*******/ - + count = 2000; while( !(sc->set_add.cmd.status & STAT_C ) && --count) printf("."); - + if ( count ) printf ("Set Address OK, count= %d\n",count); else @@ -704,9 +704,9 @@ uti596_initMem(struct uti596_softc * sc) /*******/ #ifdef DBG_INIT - printf( "After initialization, status and command: 0x%x, 0x%x\n", + printf( "After initialization, status and command: 0x%x, 0x%x\n", sc->scb.status, sc->scb.status); - + #endif /* initialize transmit buffer descriptors*/ @@ -716,19 +716,19 @@ uti596_initMem(struct uti596_softc * sc) sc->pTxCmd -> pTbd = sc->pTbd; sc->pTxCmd->cmd.command = CMD_FLEX|CmdTx; sc->pTxCmd->pad = 0; - sc->pTxCmd->size = 0; /* all bytes are in list of TBD's */ + sc->pTxCmd->size = 0; /* all bytes are in list of TBD's */ pTbd = sc->pTbd; for ( i=0; i<sc->txBdCount; i++) pTbd = pTbd -> next = (struct i596_tbd *) calloc (1,sizeof (struct i596_tbd) ); - + pTbd -> next = I596_NULL; - memset ( &sc->zeroes, 0, 64); + memset ( &sc->zeroes, 0, 64); #ifdef DBG_596 - printf( "After receiver start, status and command: 0x%x, 0x%x\n", + printf( "After receiver start, status and command: 0x%x, 0x%x\n", sc->scb.status, sc->scb.status); #endif printf("uti596_initMem allows ISR's\n"); @@ -743,7 +743,7 @@ uti596_initMem(struct uti596_softc * sc) * * Description: Dump 596 registers * - * Algorithm: + * Algorithm: ***********************************************************************/ /* static */ int uti596dump(char * pDumpArea) @@ -752,7 +752,7 @@ uti596dump(char * pDumpArea) int boguscnt = 25000000; /* over a second! */ -#ifdef DBG_596 +#ifdef DBG_596 printf("uti596dump:\n"); #endif @@ -770,8 +770,8 @@ printf("uti596dump:\n"); if ( uti596_softc.cmdOk ) return 1; /* successful completion */ } - - + + } /*********************************************************************** @@ -779,7 +779,7 @@ printf("uti596dump:\n"); * * Description: Receiver task * - * Algorithm: Extract the packet from an RFD, and place into an + * Algorithm: Extract the packet from an RFD, and place into an * mbuf chain. Place the mbuf chain in the network task * queue. Assumes that the frame check sequence is removed * by the 82596. @@ -798,19 +798,19 @@ uti596_rxDaemon(void *arg) int tid; rtems_event_set events; struct ether_header *eh; - + int frames = 0; - + #ifdef DBG_596 printf ("uti596_rxDaemon\n"); printf("&scb = %p, pRfd = %p\n", &sc->scb,sc->scb.pRfd); -#endif +#endif rtems_task_ident (0, 0, &tid); #ifdef DBG_596 printf("RX tid = 0x%x\n", tid); -#endif +#endif for(;;) { /* @@ -824,16 +824,16 @@ uti596_rxDaemon(void *arg) RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); - + #ifdef DBG_596 printf("Receiver wakes\n"); #endif - /* + /* * While received frames are available. Note that the frame may be * a fragment, so it is NOT a complete packet. */ pRfd = uti596dequeue( &sc->pInboundFrameQueue); - while ( pRfd && + while ( pRfd && pRfd != I596_NULL && pRfd -> stat & STAT_C ) { @@ -852,12 +852,12 @@ uti596_rxDaemon(void *arg) #endif frames++; - - /* + + /* * Allocate an mbuf to give to the stack * The format of the data portion of the RFD is: - * <ethernet header, payload>. - * The FRAME CHECK SEQUENCE / CRC is stripped by the uti596. + * <ethernet header, payload>. + * The FRAME CHECK SEQUENCE / CRC is stripped by the uti596. * This is to be optimized later.... should not have to memcopy! */ MGETHDR(m, M_WAIT, MT_DATA); @@ -865,8 +865,8 @@ uti596_rxDaemon(void *arg) m->m_pkthdr.rcvif = ifp; /* move everything into an mbuf */ - memcpy(m->m_data, - pRfd->data, + memcpy(m->m_data, + pRfd->data, pkt_len); m->m_len = m->m_pkthdr.len = pkt_len - sizeof(struct ether_header) - 4; @@ -892,43 +892,43 @@ uti596_rxDaemon(void *arg) ether_input (ifp, eh, m); } /* end if STAT_OK */ - + else { - /* + /* * A bad frame is present: Note that this could be the last RFD! */ #ifdef DBG_596 printf("Bad frame\n"); #endif - /* + /* * FIX ME: use the statistics from the SCB */ sc->stats.rx_errors++; - if ((sc->scb.pRfd->stat) & 0x0001) + if ((sc->scb.pRfd->stat) & 0x0001) sc->stats.collisions++; - if ((sc->scb.pRfd->stat) & 0x0080) + if ((sc->scb.pRfd->stat) & 0x0080) sc->stats.rx_length_errors++; - if ((sc->scb.pRfd->stat) & 0x0100) + if ((sc->scb.pRfd->stat) & 0x0100) sc->stats.rx_over_errors++; - if ((sc->scb.pRfd->stat) & 0x0200) + if ((sc->scb.pRfd->stat) & 0x0200) sc->stats.rx_fifo_errors++; - if ((sc->scb.pRfd->stat) & 0x0400) + if ((sc->scb.pRfd->stat) & 0x0400) sc->stats.rx_frame_errors++; - if ((sc->scb.pRfd->stat) & 0x0800) + if ((sc->scb.pRfd->stat) & 0x0800) sc->stats.rx_crc_errors++; - if ((sc->scb.pRfd->stat) & 0x1000) + if ((sc->scb.pRfd->stat) & 0x1000) sc->stats.rx_length_errors++; } UTI_596_ASSERT(pRfd != I596_NULL, "Supplying NULL RFD\n"); -#ifdef DBG_SUPPLY_FD +#ifdef DBG_SUPPLY_FD printf("Supply FD Starting\n"); #endif _ISR_Disable(level); uti596supplyFD ( pRfd ); /* Return RFD to RFA. CAN WE REALLY?*/ _ISR_Enable(level); -#ifdef DBG_SUPPLY_FD +#ifdef DBG_SUPPLY_FD printf("Supply FD Complete\n"); #endif #ifdef DBG_VERSION @@ -936,14 +936,14 @@ uti596_rxDaemon(void *arg) #endif pRfd = uti596dequeue( &sc->pInboundFrameQueue); /* grab next frame */ - + } /* end while */ } /* end for(;;)*/ - + #ifdef DBG_596 printf ("frames %d\n", frames); #endif - + } /*********************************************************************** @@ -951,7 +951,7 @@ uti596_rxDaemon(void *arg) * * Description: * Clear the stat fields for all rfd's - * Algorithm: + * Algorithm: * ***********************************************************************/ @@ -961,7 +961,7 @@ uti596clearListStatus(struct i596_rfd *pRfd) while ( pRfd != I596_NULL ) { pRfd -> stat = 0; /* clear the status field */ - pRfd = pRfd-> next; + pRfd = pRfd-> next; } } @@ -978,15 +978,15 @@ void uti596reset(void) sc->resetDone = 0; sc->irqInfo.off(&sc->irqInfo); - UTI_WAIT_COMMAND_ACCEPTED(10000, "reset: wait for previous command complete"); + UTI_WAIT_COMMAND_ACCEPTED(10000, "reset: wait for previous command complete"); /* abort ALL of the current work */ - /* FEB 17 REMOVED + /* FEB 17 REMOVED >>>>> sc->scb.command = CUC_ABORT | RX_ABORT; outport_word(CHAN_ATTN,0); UTI_WAIT_COMMAND_ACCEPTED(4000, "reset: abort requested"); - <<<<< + <<<<< */ uti596_reset_hardware(&uti596_softc); /* reset the ethernet hardware. must re-config */ @@ -998,38 +998,38 @@ void uti596reset(void) sc->set_conf.cmd.command = CmdConfigure; memcpy (sc->set_conf.data, uti596initSetup, 14); uti596addPolledCmd( (struct i596_cmd *) &sc->set_conf); - + /**** * POLL ****/ - + count = 2000; while( !( sc->set_conf.cmd.status & STAT_C ) && --count ) printf("."); - + if ( count ) printf("Configure OK, count = %d\n",count); else printf("***reset: Configure failed\n"); - - /* + + /* * Create the IA setup command */ - + #ifdef DBG_RESET printf("reset: Setting Address\n"); #endif sc->set_add.cmd.command = CmdSASetup; for ( i=0; i<6; i++) sc->set_add.data[i]=sc->arpcom.ac_enaddr[i]; - + sc->cmdOk = 0; uti596addPolledCmd((struct i596_cmd *)&sc->set_add); - + count = 2000; while( !(sc->set_add.cmd.status & STAT_C ) && --count) printf("."); - + if ( count ) printf ("Reset Set Address OK, count= %d\n",count); else @@ -1039,11 +1039,11 @@ void uti596reset(void) sc->pCmdHead = sc->pCmdTail = sc->scb.pCmd = I596_NULL; /* Feb 17. clear these out */ #ifdef DBG_RESET - printf( "After reset, status and command: 0x%x, 0x%x\n", + printf( "After reset, status and command: 0x%x, 0x%x\n", sc->scb.status, sc->scb.status); - + #endif - + /* restore the RFA */ @@ -1051,9 +1051,9 @@ void uti596reset(void) if ( sc->pLastUnkRFD != I596_NULL ) { sc-> pEndRFA = sc->pLastUnkRFD; /* The end position can be updated */ - sc-> pLastUnkRFD = I596_NULL; + sc-> pLastUnkRFD = I596_NULL; } - + sc->pEndRFA->next = sc->pSavedRfdQueue; if ( sc->pSavedRfdQueue != I596_NULL ) { sc->pEndRFA = sc->pEndSavedQueue; @@ -1067,7 +1067,7 @@ void uti596reset(void) sc->pEndRFA -> next = sc->pInboundFrameQueue; sc->pInboundFrameQueue = pRfd; } while( pRfd != I596_NULL ) ; - + } */ @@ -1081,14 +1081,14 @@ void uti596reset(void) sc->scb.command = RX_START; sc->started = 1; /* we assume that the start works */ sc->resetDone = 1; /* moved here from after channel attn. */ - outport_word(CHAN_ATTN,0 ); + outport_word(CHAN_ATTN,0 ); UTI_WAIT_COMMAND_ACCEPTED(4000, "reset"); printf("Reset:Start complete \n"); UTI_596_ASSERT(sc->pCmdHead == I596_NULL, "Reset: CMD not cleared\n"); sc->irqInfo.on(&sc->irqInfo); /* moved back here. Tried it before RX command issued. */ - + /* uti596addCmd(&uti506_softc.nop); */ /* just for fun */ - + #ifdef DBG_RESET printf("reset: complete\n"); #endif @@ -1117,7 +1117,7 @@ void uti596reset(void) #endif #ifdef DEBUG_ADD - + switch ( pCmd -> command & 0x7 ){ /* check bottom 7 bits */ case CmdConfigure: printf("ADD: Configure Command 0x%x\n", pCmd->command); @@ -1146,7 +1146,7 @@ void uti596reset(void) printf("****Unknown Command encountered 0x%x\n", pCmd->command); break; } /* end switch */ - + #endif @@ -1159,7 +1159,7 @@ void uti596reset(void) _ISR_Disable(level); if (uti596_softc.pCmdHead == I596_NULL) { - uti596_softc.pCmdHead = + uti596_softc.pCmdHead = uti596_softc.pCmdTail = uti596_softc.scb.pCmd = pCmd; #ifdef DBG_596 @@ -1171,23 +1171,23 @@ void uti596reset(void) outport_word (CHAN_ATTN,0); _ISR_Enable(level); } - else + else { #ifdef DBG_596 printf("Chained Cmd\n"); #endif - uti596_softc.pCmdTail->next = pCmd; + uti596_softc.pCmdTail->next = pCmd; uti596_softc.pCmdTail = pCmd; /* added Jan 30 */ _ISR_Enable(level); } #ifdef DBG_596 - printf("Scb status & command 0x%x 0x%x\n", + printf("Scb status & command 0x%x 0x%x\n", uti596_softc.scb.status, uti596_softc.scb.command ); #endif - + } /*********************************************************************** @@ -1199,7 +1199,7 @@ void uti596reset(void) * * Algorithm: * Give the command to the driver. ( CUC_START is ALWAYS required ) - * Poll for completion. + * Poll for completion. * ***********************************************************************/ @@ -1211,7 +1211,7 @@ void uti596addPolledCmd(struct i596_cmd *pCmd) #endif #ifdef DBG_POLLED_CMD - + switch ( pCmd -> command & 0x7 ){ /* check bottom 7 bits */ case CmdConfigure: printf("PolledCMD: Configure Command 0x%x\n", pCmd->command); @@ -1240,7 +1240,7 @@ void uti596addPolledCmd(struct i596_cmd *pCmd) printf("PolledCMD: ****Unknown Command encountered 0x%x\n", pCmd->command); break; } /* end switch */ - + #endif pCmd->status = 0; @@ -1254,15 +1254,15 @@ void uti596addPolledCmd(struct i596_cmd *pCmd) uti596_softc.scb.command = CUC_START; outport_word (CHAN_ATTN,0); - UTI_WAIT_COMMAND_ACCEPTED(10000,"Add Polled command: start"); + UTI_WAIT_COMMAND_ACCEPTED(10000,"Add Polled command: start"); uti596_softc.pCmdHead = uti596_softc.pCmdTail = uti596_softc.scb.pCmd = I596_NULL; #ifdef DBG_POLLED_CMD - printf("Scb status & command 0x%x 0x%x\n", + printf("Scb status & command 0x%x 0x%x\n", uti596_softc.scb.status, uti596_softc.scb.command ); #endif - + } /* * Driver transmit daemon @@ -1279,15 +1279,15 @@ uti596_txDaemon (void *arg) /* * Wait for packet from stack */ - rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, + rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty. * Ensure that irq is on before sending. */ - for (;;) { + for (;;) { /* Feb 17: No need to make sure a reset is in progress, * Since reset daemon runs at same priority as this thread */ @@ -1297,7 +1297,7 @@ uti596_txDaemon (void *arg) IF_DEQUEUE(&ifp->if_snd, m); if (!m) break; - + send_packet (ifp, m); /* blocks */ } /* end for */ ifp->if_flags &= ~IFF_OACTIVE; /* no more to send, mark output inactive */ @@ -1321,8 +1321,8 @@ uti596_resetDaemon (void *arg) /* * Wait for reset event from ISR */ - rtems_bsdnet_event_receive (NIC_RESET_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, + rtems_bsdnet_event_receive (NIC_RESET_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); rtems_clock_get(RTEMS_CLOCK_GET_TOD, &tm_struct); @@ -1344,7 +1344,7 @@ uti596_resetDaemon (void *arg) * Function: send_packet * * Description: Send a raw ethernet packet - * + * * Algorithm: * increment some stats counters, * create the transmit command, @@ -1359,22 +1359,22 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) *pRemainingTbdList, *pTbd; struct mbuf *n, *input_m = m; - + struct uti596_softc *sc = ifp->if_softc; /* is this available from ifp ?*/ - struct mbuf *l = NULL; + struct mbuf *l = NULL; unsigned int length = 0; rtems_status_code status; int bd_count = 0; rtems_event_set events; - /* - * For all mbufs in the chain, + /* + * For all mbufs in the chain, * fill a transmit buffer descriptor */ pTbd = sc->pTxCmd->pTbd; - do { + do { if (m->m_len) { /* * Fill in the buffer descriptor @@ -1404,30 +1404,30 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) printf("TX ERROR:Too many mbufs in the packet!!!\n"); printf("Must coalesce!\n"); } - - + + if ( length < UTI_596_ETH_MIN_SIZE ) { pTbd->data = sc->zeroes; /* add padding to pTbd */ pTbd->size = UTI_596_ETH_MIN_SIZE - length; /* zeroes have no effect on the CRC */ } else pTbd = pPrev; /* Don't use pTbd in the send routine */ - + /* Disconnect the packet from the list of Tbd's */ pRemainingTbdList = pTbd->next; - pTbd->next = I596_NULL; - pTbd->size |= UTI_596_END_OF_FRAME; - + pTbd->next = I596_NULL; + pTbd->size |= UTI_596_END_OF_FRAME; + #ifdef DBG_RAW printf("RAW:Add cmd and sleep\n"); #endif - - sc->rawsndcnt++; - + + sc->rawsndcnt++; + #ifdef DBG_RAW printf ("sending packet\n"); #endif - + /* Sending Zero length packet: shouldn't happen */ if (pTbd->size <= 0) return ; @@ -1445,23 +1445,23 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) /* add the command to the output command queue */ uti596addCmd ( (struct i596_cmd *) sc->pTxCmd ); - + /* sleep until the command has been processed or Timeout encountered. */ status= rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); - + if ( status != RTEMS_SUCCESSFUL ) { - printf("Could not sleep %s\n", rtems_status_text(status)); + printf("Could not sleep %s\n", rtems_status_text(status)); } - + #ifdef DBG_RAW printf("RAW: wake\n"); #endif - + sc->txInterrupts++; - + #ifdef DEBUG_INIT printf("\nTransmitter issued packet\n"); print_hdr ( sc->pTxCmd->pTbd -> data ); /* print the first part */ @@ -1476,23 +1476,23 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) printf("******Driver Error 0x%x\n", sc->pTxCmd -> cmd.status ); #endif sc->stats.tx_errors++; - if ( sc->pTxCmd->cmd.status & 0x0020 ) + if ( sc->pTxCmd->cmd.status & 0x0020 ) sc->stats.tx_retries_exceeded++; - if (!(sc->pTxCmd->cmd.status & 0x0040)) + if (!(sc->pTxCmd->cmd.status & 0x0040)) sc->stats.tx_heartbeat_errors++; - if ( sc->pTxCmd->cmd.status & 0x0400 ) + if ( sc->pTxCmd->cmd.status & 0x0400 ) sc->stats.tx_carrier_errors++; - if ( sc->pTxCmd->cmd.status & 0x0800 ) + if ( sc->pTxCmd->cmd.status & 0x0800 ) sc->stats.collisions++; - if ( sc->pTxCmd->cmd.status & 0x1000 ) + if ( sc->pTxCmd->cmd.status & 0x1000 ) sc->stats.tx_aborted_errors++; - } /* end if stat_ok */ - - /* + } /* end if stat_ok */ + + /* * Restore the transmited buffer descriptor chain. */ pTbd -> next = pRemainingTbdList; - + /* * Free the mbufs used by the sender. */ @@ -1502,7 +1502,7 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) m = n; } - + } /*********************************************************************** @@ -1578,7 +1578,7 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) { /* an IP packet */ printf("*********************IP HEADER******************\n"); printf("IP version/IPhdr length: %2.2X TOS: %2.2X\n", add[14] , add[15]); - printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); + printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); printf("IP identification: %2.2X %2.2X, 3-bit flags and offset %2.2X %2.2X\n", add[18],add[19], add[20], add[21]); printf("IP TTL: %2.2X, protocol: %2.2X, checksum: %2.2X %2.2X \n", @@ -1706,7 +1706,7 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) { /* an IP packet */ printf("*********************IP HEADER******************\n"); printf("IP version/IPhdr length: %2.2X TOS: %2.2X\n", add[14] , add[15]); - printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); + printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); printf("IP identification: %2.2X %2.2X, 3-bit flags and offset %2.2X %2.2X\n", add[18],add[19], add[20], add[21]); printf("IP TTL: %2.2X, protocol: %2.2X, checksum: %2.2X %2.2X \n", @@ -1755,55 +1755,55 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) short int length; if ( add[12] == 0x08 && add[13] == 0x00 ){ /* an IP packet */ - + printf("Packet Location %p\n", add); - + printf ("Dest "); - + for (i = 0; i < 6; i++) printf(" %2.2X", add[i]); - + printf ("\n"); - + printf ("Source"); - + for (i = 6; i < 12; i++) printf(" %2.2X", add[i]); - + printf ("\n"); - + printf ("frame type %2.2X%2.2X\n", add[12], add[13]); - + printf("*********************IP HEADER******************\n"); printf("IP version/IPhdr length: %2.2X TOS: %2.2X\n", add[14] , add[15]); - printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); + printf("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] )); printf("IP identification: %2.2X %2.2X, 3-bit flags and offset %2.2X %2.2X\n", add[18],add[19], add[20], add[21]); printf("IP TTL: %2.2X, protocol: %2.2X, checksum: %2.2X %2.2X \n", add[22],add[23],add[24],add[25]); printf("IP packet type: %2.2X code %2.2X\n", add[34],add[35]); - + printf("Source IP address: "); for ( i=0; i< 3 ; i++) printf( "%u.", add[26 + i]); - + printf("%u\n", add[29]); - + printf("Destination IP address: "); for ( i=0; i< 3 ; i++) printf( "%u.", add[30 + i]); printf("%u\n", add[33]); - + printf("********************IP Packet Data*******************\n"); length -=20; for ( i=0; i < length ; i++) printf("0x%2.2x ", add[34+i]); printf("\n"); - + printf("ICMP checksum: %2.2x %2.2x\n", add[36], add[37]); printf("ICMP identifier: %2.2x %2.2x\n", add[38], add[39]); printf("ICMP sequence nbr: %2.2x %2.2x\n", add[40], add[41]); - } + } } #endif @@ -1823,7 +1823,7 @@ void send_packet(struct ifnet *ifp, struct mbuf *m) * initialize required rx and tx buffers * hook interrupt * issue start command and some diagnostics - * return + * return * ***********************************************************************/ @@ -1833,31 +1833,31 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) struct uti596_softc *sc = &uti596_softc; /* soft config */ struct ifnet * ifp = &sc->arpcom.ac_if; int i = 0; - + #ifdef DBG_ATTACH printf("attach"); #endif - + sc->started = 0; /* The NIC is not started yet */ sc->ioAddr = IO_ADDR; - /* Indicate to ULCS that this is initialized */ - ifp->if_softc = sc; + /* Indicate to ULCS that this is initialized */ + ifp->if_softc = sc; sc -> pScp = NULL; - + /* Assign the name */ ifp->if_name = "uti"; - + /* Assign the unit number */ ifp->if_unit = 1; - + /* Assign mtu */ if ( pConfig -> mtu ) ifp->if_mtu = pConfig -> mtu; else ifp->if_mtu = ETHERMTU; - + /* Assign and possibly override the hw address */ if ( !pConfig->hardware_address) { /* Read the ethernet address from the board */ @@ -1865,14 +1865,14 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) inport_byte(NIC_ADDR+i,sc->arpcom.ac_enaddr[i] ); } else { - /* hwaddr override */ + /* hwaddr override */ memcpy (sc->arpcom.ac_enaddr, pConfig->hardware_address, ETHER_ADDR_LEN); } - + /* Test for valid hwaddr */ if(memcmp(sc->arpcom.ac_enaddr,"\xAA\x55\x01",3)!= 0)/* b0 of byte 0 != 0 => multicast */ return ENODEV; - + /* Assign requested receive buffer descriptor count */ if (pConfig->rbuf_count) sc->rxBdCount = pConfig->rbuf_count; @@ -1894,15 +1894,15 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) /* to init_hardware */ sc->started = 1; sc->pInboundFrameQueue = I596_NULL; - - + + ifp->if_ioctl = uti596_ioctl; ifp->if_init = uti596_init; ifp->if_start = uti596_start; ifp->if_output = ether_output; - + sc->scb.command = 0; - + /* * Attach the interface */ @@ -1945,8 +1945,8 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) /* printk("***INFO: ACK %x\n", scbStatus);*/ uti596_softc.scb.command = scbStatus; outport_word(CHAN_ATTN, 0); - - if( uti596_softc.resetDone ) { + + if( uti596_softc.resetDone ) { /* stack is attached */ UTI_WAIT_COMMAND_ACCEPTED(20000, "****ERROR:ACK"); } @@ -1959,7 +1959,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) printk("\n***ERROR: Spurious interrupt. Resetting...\n"); uti596_softc.nic_reset = 1; } - + if ( (scbStatus & SCB_STAT_CX) && !(scbStatus & SCB_STAT_CNA) ){ printk_time(); printk("\n*****ERROR: Command Complete, and CNA available: 0x%x\nResetting...", scbStatus); @@ -1987,7 +1987,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) uti596_softc.nic_reset = 1; return; } - + if ( scbStatus & SCB_STAT_RNR ) { printk_time(); printk("\n*****WARNING: RNR %x\n",scbStatus); @@ -1995,13 +1995,13 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) uti596_softc.pBeginRFA -> cmd, uti596_softc.pBeginRFA -> stat); } - - /* + + /* * Receive Unit Control */ if ( scbStatus & SCB_STAT_FR ) { /* a frame has been received */ uti596_softc.rxInterrupts++; - + #ifdef DBG_FR printk("\nISR:FR\n"); #endif @@ -2010,9 +2010,9 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) uti596_softc.nic_reset = 1; } else - while ( uti596_softc.pBeginRFA != I596_NULL && + while ( uti596_softc.pBeginRFA != I596_NULL && ( uti596_softc.pBeginRFA -> stat & STAT_C)) { - + #ifdef DBG_ISR printk("ISR:pBeginRFA != NULL\n"); #endif @@ -2020,19 +2020,19 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) if ( count_rx > 1) printk("****WARNING: Received 2 frames on 1 interrupt \n"); - /* - * Give Received Frame to the ULCS - */ + /* + * Give Received Frame to the ULCS + */ uti596_softc.countRFD--; - + if ( uti596_softc.countRFD < 0 ) printk("Count < 0 !!!: count == %d, beginRFA = %p\n", uti596_softc.countRFD, uti596_softc.pBeginRFA); - + uti596_softc.stats.rx_packets++; pIsrRfd = uti596_softc.pBeginRFA -> next; /* the append destroys the link */ uti596append( &uti596_softc.pInboundFrameQueue , uti596_softc.pBeginRFA ); - + /* * if we have just received the a frame int he last unknown RFD, * then it is certain that the RFA is empty. @@ -2041,60 +2041,60 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) UTI_596_ASSERT(uti596_softc.pLastUnkRFD != I596_NULL,"****ERROR:LastUnk is NULL, begin ptr @ end!\n"); uti596_softc.pEndRFA = uti596_softc.pLastUnkRFD = I596_NULL; } - + #ifdef DBG_ISR printk("Wake %#x\n",uti596_softc.rxDaemonTid); #endif sc = rtems_event_send(uti596_softc.rxDaemonTid, INTERRUPT_EVENT); if ( sc != RTEMS_SUCCESSFUL ) - rtems_panic ("Can't notify rxDaemon: %s\n", - rtems_status_text (sc)); + rtems_panic ("Can't notify rxDaemon: %s\n", + rtems_status_text (sc)); #ifdef DBG_RAW_ISR else printk("Rx Wake: %#x\n",uti596_softc.rxDaemonTid); #endif - + uti596_softc.pBeginRFA = pIsrRfd; } /* end while */ - + if ( uti596_softc.pBeginRFA == I596_NULL ){ /* adjust the pEndRFA to reflect an empty list */ if ( uti596_softc.pLastUnkRFD == I596_NULL && uti596_softc.countRFD != 0 ) printk("Last Unk is NULL, BeginRFA is null, and count == %d\n",uti596_softc.countRFD); - + uti596_softc.pEndRFA = I596_NULL; if ( uti596_softc.countRFD != 0 ) { printk("****ERROR:Count is %d, but begin ptr is NULL\n",uti596_softc.countRFD ); } } - + } /* end scb_stat_fr */ - + /* * Check For Command Complete */ if ( scbStatus & SCB_STAT_CX ){ #ifdef DBG_ISR printk("ISR:CU\n"); -#endif - +#endif + pIsrCmd = uti596_softc.pCmdHead; - - /* + + /* * For ALL completed commands */ if ( pIsrCmd != I596_NULL && pIsrCmd->status & STAT_C ){ - + #ifdef DBG_RAW_ISR printk("ISR:pIsrCmd != NULL\n"); #endif - - /* - * Adjust the command block list + + /* + * Adjust the command block list */ uti596_softc.pCmdHead = pIsrCmd -> next; - + /* - * If there are MORE commands to process, + * If there are MORE commands to process, * the serialization in the raw routine has failed. * ( Perhaps AddCmd is bad? ) */ @@ -2110,9 +2110,9 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) /* printk("****INFO:Configure OK\n"); */ uti596_softc.cmdOk = 1; break; - + case CmdDump: - + #ifdef DBG_ISR printk("dump!\n"); #endif @@ -2120,13 +2120,13 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) break; case CmdDiagnose: - + #ifdef DBG_ISR printk("diagnose!\n"); #endif uti596_softc.cmdOk = 1; break; - + case CmdSASetup: /* printk("****INFO:Set address interrupt\n"); */ @@ -2135,7 +2135,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) else printk("****ERROR:SET ADD FAILED\n"); break; - + case CmdTx: { UTI_596_ASSERT(uti596_softc.txDaemonTid, "****ERROR:Null txDaemonTid\n"); @@ -2143,7 +2143,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) printk("wake TX:0x%x\n",uti596_softc.txDaemonTid); #endif if ( uti596_softc.txDaemonTid ){ /* Ensure that the transmitter is present */ - sc = rtems_event_send (uti596_softc.txDaemonTid, + sc = rtems_event_send (uti596_softc.txDaemonTid, INTERRUPT_EVENT); if ( sc != RTEMS_SUCCESSFUL ) @@ -2152,22 +2152,22 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) #ifdef DBG_RAW_ISR else printk("****INFO:Tx wake: %#x\n",uti596_softc.txDaemonTid); -#endif +#endif } } /* End case Cmd_Tx */ break; - + case CmdMulticastList: printk("***ERROR:Multicast?!\n"); pIsrCmd->next = I596_NULL; break; - + case CmdTDR: { unsigned long status = *( (unsigned long *)pIsrCmd)+1; printk("****ERROR:TDR?!\n"); - + if (status & STAT_C) { /* @@ -2183,47 +2183,47 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) printk("****WARNING:Termination problem.\n"); if (status & 0x1000) printk("****WARNING:Short circuit.\n"); - + /* printk("****INFO:Time %ld.\n", status & 0x07ff); */ } } break; - - default: - /* - * This should never be reached + + default: + /* + * This should never be reached */ printk("CX but NO known command\n"); } /* end switch */ - pIsrCmd = uti596_softc.pCmdHead; /* next command */ + pIsrCmd = uti596_softc.pCmdHead; /* next command */ if ( pIsrCmd != I596_NULL ) printk("****WARNING: more commands in list, but no start to NIC\n"); } /* end if pIsrCmd != NULL && pIsrCmd->stat & STAT_C */ else { if ( pIsrCmd != I596_NULL ) { /* The command MAY be NULL from a RESET */ - + /* Reset the ethernet card, and wake the transmitter (if necessary) */ printk_time(); printk("****INFO: Request board reset ( tx )\n"); uti596_softc.nic_reset = 1; if ( uti596_softc.txDaemonTid){ /* Ensure that a transmitter is present */ - sc = rtems_event_send (uti596_softc.txDaemonTid, + sc = rtems_event_send (uti596_softc.txDaemonTid, INTERRUPT_EVENT); - + if ( sc != RTEMS_SUCCESSFUL ) printk("****ERROR:Could NOT send event to tid 0x%x : %s\n",uti596_softc.txDaemonTid, rtems_status_text (sc) ); #ifdef DBG_RAW_ISR else printk("****INFO:Tx wake: %#x\n",uti596_softc.txDaemonTid); -#endif +#endif } } - } - } /* end if command complete */ - - - /* if the receiver has stopped, - * check if this is a No Resources scenario, + } + } /* end if command complete */ + + + /* if the receiver has stopped, + * check if this is a No Resources scenario, * Try to add more RFD's ( no RBDs are used ) */ if ( uti596_softc.started ) { @@ -2234,16 +2234,16 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) /* * THE RECEIVER IS OFF! */ - if ( uti596_softc.pLastUnkRFD != I596_NULL ){ /* We have an unknown RFD, it is not inbound*/ + if ( uti596_softc.pLastUnkRFD != I596_NULL ){ /* We have an unknown RFD, it is not inbound*/ if ( uti596_softc.pLastUnkRFD -> stat & (STAT_C | STAT_B )) /* in use */ uti596_softc.pEndRFA = uti596_softc.pLastUnkRFD; /* update end */ - else { - /* + else { + /* * It is NOT in use, and since RNR, we know EL bit of pEndRFA was read! * So, unlink it from the RFA and move it to the saved queue. * But pBegin can equal LastUnk! */ - + if ( uti596_softc.pEndRFA != I596_NULL ){ /* check added feb24. */ #ifdef DEBUG_RFA if (uti596_softc.pEndRFA -> next != uti596_softc.pLastUnkRFD){ @@ -2260,7 +2260,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) uti596_softc.savedCount++; uti596_softc.pEndSavedQueue = uti596_softc.pLastUnkRFD; uti596_softc.countRFD--; /* It was not in the RFA */ - /* + /* * The Begin pointer CAN advance this far. We must resynch the CPU side * with the chip. */ @@ -2277,11 +2277,11 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) } uti596_softc.pLastUnkRFD = I596_NULL; - + } /* end if exists UnkRFD */ - /* - * Append the saved queue to the RFA. + /* + * Append the saved queue to the RFA. * Any further RFD's being supplied will be added to * this new list. */ @@ -2292,11 +2292,11 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) printk("****ERROR:Begin pointer is NULL, but count == %d\n",uti596_softc.countRFD); } #endif - uti596_softc.pBeginRFA = uti596_softc.pSavedRfdQueue; + uti596_softc.pBeginRFA = uti596_softc.pSavedRfdQueue; uti596_softc.pEndRFA = uti596_softc.pEndSavedQueue; uti596_softc.pSavedRfdQueue = uti596_softc.pEndSavedQueue = I596_NULL; /* Reset the End */ } - else { + else { #ifdef DEBUG_RFA if ( uti596_softc.countRFD <= 0) { printk("****ERROR:Begin pointer is not NULL, but count == %d\n",uti596_softc.countRFD); @@ -2304,15 +2304,15 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) #endif UTI_596_ASSERT( uti596_softc.pEndRFA != I596_NULL, "****WARNING: END RFA IS NULL\n"); UTI_596_ASSERT( uti596_softc.pEndRFA->next == I596_NULL, "****ERROR:END RFA -> next must be NULL\n"); - - uti596_softc.pEndRFA->next = uti596_softc.pSavedRfdQueue; - uti596_softc.pEndRFA->cmd &= ~CMD_EOL; /* clear the end of list */ + + uti596_softc.pEndRFA->next = uti596_softc.pSavedRfdQueue; + uti596_softc.pEndRFA->cmd &= ~CMD_EOL; /* clear the end of list */ uti596_softc.pEndRFA = uti596_softc.pEndSavedQueue; uti596_softc.pSavedRfdQueue = uti596_softc.pEndSavedQueue = I596_NULL; /* Reset the End */ #ifdef DEBUG_ISR printk("count: %d, saved: %d \n", uti596_softc.countRFD , uti596_softc.savedCount); #endif - + } /* printk("Isr: countRFD = %d\n",uti596_softc.countRFD); */ uti596_softc.countRFD += uti596_softc.savedCount; @@ -2320,15 +2320,15 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) uti596_softc.savedCount = 0; } - + #ifdef DBG_596_RFD printk("The list starts here %p\n",uti596_softc.pBeginRFA ); #endif - + if ( uti596_softc.countRFD > 1) { /****REMOVED FEB 18. - && - !( uti596_softc.pBeginRFA -> stat & (STAT_C | STAT_B ))) { + && + !( uti596_softc.pBeginRFA -> stat & (STAT_C | STAT_B ))) { *****/ printk_time(); printk("****INFO: pBeginRFA -> stat = 0x%x\n",uti596_softc.pBeginRFA -> stat); @@ -2337,7 +2337,7 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) UTI_596_ASSERT(uti596_softc.scb.command == 0, "****ERROR:scb command must be zero\n"); uti596_softc.scb.pRfd = uti596_softc.pBeginRFA; /* start RX here */ - printk("****INFO: ISR Starting receiver\n"); + printk("****INFO: ISR Starting receiver\n"); uti596_softc.scb.command = RX_START; /* should this also be CU start? */ outport_word(CHAN_ATTN, 0); } @@ -2345,39 +2345,39 @@ int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig ) else { printk("****WARNING: Receiver NOT Started -- countRFD = %d\n", uti596_softc.countRFD); printk("82596 cmd: 0x%x, status: 0x%x RFA len: %d\n", - uti596_softc.scb.command, + uti596_softc.scb.command, uti596_softc.scb.status, uti596_softc.countRFD); - + printk("\nRFA: \n"); for ( pISR_Rfd = uti596_softc.pBeginRFA; pISR_Rfd != I596_NULL; - pISR_Rfd = pISR_Rfd->next) + pISR_Rfd = pISR_Rfd->next) printk("Frame @ %x, status: %x, cmd: %x\n", pISR_Rfd, pISR_Rfd->stat, pISR_Rfd->cmd); - + printk("\nInbound: \n"); for ( pISR_Rfd = uti596_softc.pInboundFrameQueue; pISR_Rfd != I596_NULL; - pISR_Rfd = pISR_Rfd->next) + pISR_Rfd = pISR_Rfd->next) printk("Frame @ %x, status: %x, cmd: %x\n", pISR_Rfd, pISR_Rfd->stat, pISR_Rfd->cmd); - - + + printk("\nSaved: \n"); for ( pISR_Rfd = uti596_softc.pSavedRfdQueue; pISR_Rfd != I596_NULL; - pISR_Rfd = pISR_Rfd->next) + pISR_Rfd = pISR_Rfd->next) printk("Frame @ %x, status: %x, cmd: %x\n", pISR_Rfd, pISR_Rfd->stat, pISR_Rfd->cmd); printk("\nUnknown: %p\n",uti596_softc.pLastUnkRFD); } *****/ - } /* end stat_rnr */ + } /* end stat_rnr */ } /* end if receiver started */ /* UTI_596_ASSERT(uti596_softc.scb.status == scbStatus, "****WARNING:scbStatus change!\n"); */ - + #ifdef DBG_ISR printk("X\n"); #endif @@ -2413,13 +2413,13 @@ struct i596_rfd * uti596dequeue( struct i596_rfd ** ppQ ) struct i596_rfd * pRfd; _ISR_Disable(level); - + /* invalid address, or empty queue or emptied queue */ if( ppQ == NULL || *ppQ == NULL || *ppQ == I596_NULL) { _ISR_Enable(level); return I596_NULL; } - + pRfd = *ppQ; /* The dequeued buffer */ *ppQ = pRfd->next; /* advance the queue pointer */ pRfd->next = I596_NULL; /* unlink the rfd being returned */ @@ -2427,7 +2427,7 @@ struct i596_rfd * uti596dequeue( struct i596_rfd ** ppQ ) _ISR_Enable(level); return pRfd; -} +} /*********************************************************************** * Function: void uti596append @@ -2435,13 +2435,13 @@ struct i596_rfd * uti596dequeue( struct i596_rfd ** ppQ ) * Description: * adds an RFD to the end of the received frame queue, * for processing by the rxproc. - * Also removes this RFD from the RFA + * Also removes this RFD from the RFA * * Algorithm: * ***********************************************************************/ -void uti596append( struct i596_rfd ** ppQ , struct i596_rfd * pRfd ) +void uti596append( struct i596_rfd ** ppQ , struct i596_rfd * pRfd ) { struct i596_rfd *p; @@ -2449,7 +2449,7 @@ void uti596append( struct i596_rfd ** ppQ , struct i596_rfd * pRfd ) if ( pRfd != NULL && pRfd != I596_NULL) { pRfd -> next = I596_NULL; pRfd -> cmd |= CMD_EOL; /* set EL bit */ - + if ( *ppQ == NULL || *ppQ == I596_NULL ) { /* Empty or emptied */ *ppQ = pRfd; @@ -2458,7 +2458,7 @@ void uti596append( struct i596_rfd ** ppQ , struct i596_rfd * pRfd ) { for ( p=*ppQ; p -> next != I596_NULL; p=p->next) ; - + p->cmd &= ~CMD_EOL; /* Clear EL bit at end */ p->next = pRfd; } @@ -2479,14 +2479,14 @@ void uti596append( struct i596_rfd ** ppQ , struct i596_rfd * pRfd ) * mark transmitter as busy * abort any transmissions/receptions * clean-up all buffers ( RFD's et. al. ) - * - * - * + * + * + * * ***********************************************************************/ -/* static */ +/* static */ void uti596_stop(struct uti596_softc *sc) { sc->started = 0; @@ -2546,7 +2546,7 @@ uti596_ioctl (struct ifnet *ifp, int command, caddr_t data) printk("show stats\n"); uti596_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -2571,7 +2571,7 @@ uti596_ioctl (struct ifnet *ifp, int command, caddr_t data) ***********************************************************************/ -void +void uti596_stats(struct uti596_softc *sc) { printf(" CPU Reports:\n"); @@ -2580,14 +2580,14 @@ uti596_stats(struct uti596_softc *sc) printf ("Tx Interrupts:%-8lu\n", sc->txInterrupts); printf ("Rx Packets:%-8u", sc->stats.rx_packets); printf ("Tx Attempts:%-u\n", sc->stats.tx_packets); - + printf ("Rx Dropped:%-8u", sc->stats.rx_dropped); printf ("Rx IP Packets:%-8u", sc->stats.rx_packets); printf ("Tx Errors:%-8u\n", sc->stats.tx_errors); printf ("Tx aborted:%-8u", sc->stats.tx_aborted_errors); printf ("Tx Dropped:%-8u\n", sc->stats.tx_dropped); printf ("Tx IP packets:%-8u", sc->stats.tx_packets); - + printf ("Collisions Detected:%-8u\n", sc->stats.collisions); printf ("Tx Heartbeat Errors:%-8u", sc->stats.tx_heartbeat_errors); printf ("Tx Carrier Errors:%-8u\n", sc->stats.tx_carrier_errors); @@ -2614,19 +2614,19 @@ void dumpQ(void) { printf("savedQ:\n"); for( pRfd = uti596_softc.pSavedRfdQueue; pRfd != I596_NULL; - pRfd = pRfd -> next) + pRfd = pRfd -> next) printf("pRfd: %p, stat: 0x%x cmd: 0x%x\n",pRfd,pRfd -> stat,pRfd -> cmd); printf("Inbound:\n"); for( pRfd = uti596_softc.pInboundFrameQueue; pRfd != I596_NULL; - pRfd = pRfd -> next) + pRfd = pRfd -> next) printf("pRfd: %p, stat: 0x%x cmd: 0x%x\n",pRfd,pRfd -> stat,pRfd -> cmd); printf("Last Unk: %p\n", uti596_softc.pLastUnkRFD ); - + printf("RFA:\n"); for( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL; - pRfd = pRfd -> next) + pRfd = pRfd -> next) printf("pRfd: %p, stat: 0x%x cmd: 0x%x\n",pRfd,pRfd -> stat,pRfd -> cmd); } @@ -2646,34 +2646,34 @@ void uti596Diagnose(int verbose){ printf("Status diagnostic: 0x%2.2x\n", diagnose.status); } -void show_buffers (void) +void show_buffers (void) { struct i596_rfd *pRfd; printf("82596 cmd: 0x%x, status: 0x%x RFA len: %d\n", - uti596_softc.scb.command, + uti596_softc.scb.command, uti596_softc.scb.status, uti596_softc.countRFD); - + printf("\nRFA: \n"); for ( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL; - pRfd = pRfd->next) + pRfd = pRfd->next) printf("Frame @ %p, status: %2.2x, cmd: %2.2x\n", pRfd, pRfd->stat, pRfd->cmd); - + printf("\nInbound: \n"); for ( pRfd = uti596_softc.pInboundFrameQueue; pRfd != I596_NULL; - pRfd = pRfd->next) + pRfd = pRfd->next) printf("Frame @ %p, status: %2.2x, cmd: %2.2x\n", pRfd, pRfd->stat, pRfd->cmd); - + printf("\nSaved: \n"); for ( pRfd = uti596_softc.pSavedRfdQueue; pRfd != I596_NULL; - pRfd = pRfd->next) + pRfd = pRfd->next) printf("Frame @ %p, status: %2.2x, cmd: %2.2x\n", pRfd, pRfd->stat, pRfd->cmd); printf("\nUnknown: %p\n",uti596_softc.pLastUnkRFD); @@ -2684,26 +2684,26 @@ void show_queues(void) struct i596_rfd *pRfd; - printf("CMD: 0x%x, Status: 0x%x\n", + printf("CMD: 0x%x, Status: 0x%x\n", uti596_softc.scb.command, uti596_softc.scb.status); printf("saved Q\n"); - + for ( pRfd = uti596_softc.pSavedRfdQueue; pRfd != I596_NULL && pRfd != NULL; pRfd = pRfd->next) printf("0x%p\n", pRfd); - + printf("End saved Q 0x%p\n", uti596_softc.pEndSavedQueue); - + printf("\nRFA:\n"); for ( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL && pRfd != NULL; pRfd = pRfd->next) printf("0x%p\n", pRfd); - + printf("uti596_softc.pEndRFA: %p\n",uti596_softc.pEndRFA); } @@ -2717,17 +2717,17 @@ void uti596_init(void * arg){ if (sc->txDaemonTid == 0) { uti596_initialize_hardware(sc); - + /* * Start driver tasks */ - + sc->txDaemonTid = rtems_bsdnet_newproc ("UTtx", 2*4096, uti596_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("UTrx", 2*4096, uti596_rxDaemon, sc); - sc->resetDaemonTid = rtems_bsdnet_newproc ("UTrt", 2*4096, + sc->resetDaemonTid = rtems_bsdnet_newproc ("UTrt", 2*4096, uti596_resetDaemon, sc); - - + + #ifdef DBG_INIT printf("After attach, status of board = 0x%x\n", sc->scb.status ); #endif @@ -2735,25 +2735,25 @@ void uti596_init(void * arg){ } - /* + /* * Enable receiver */ - UTI_WAIT_COMMAND_ACCEPTED(4000, "init:Before RX_START"); + UTI_WAIT_COMMAND_ACCEPTED(4000, "init:Before RX_START"); sc->scb.pRfd = sc -> pBeginRFA; sc->scb.command = RX_START; - outport_word(CHAN_ATTN,0 ); - UTI_WAIT_COMMAND_ACCEPTED(4000, "init:RX_START"); + outport_word(CHAN_ATTN,0 ); + UTI_WAIT_COMMAND_ACCEPTED(4000, "init:RX_START"); /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + } void dump_scb(void){ printk("status 0x%x\n",uti596_softc.scb.status); printk("command 0x%x\n",uti596_softc.scb.command); printk("cmd 0x%x\n",(int)uti596_softc.scb.pCmd); - printk("rfd 0x%x\n",(int)uti596_softc.scb.pRfd); + printk("rfd 0x%x\n",(int)uti596_softc.scb.pRfd); printk("crc_err 0x%x\n",uti596_softc.scb.crc_err); printk("align_err 0x%x\n",uti596_softc.scb.align_err); printk("resource_err 0x%x\n",uti596_softc.scb.resource_err ); @@ -2768,5 +2768,5 @@ void printk_time(void){ rtems_time_of_day tm_struct; rtems_clock_get(RTEMS_CLOCK_GET_TOD, &tm_struct); - printk("Current time: %d:%d:%d \n", tm_struct.hour, tm_struct.minute, tm_struct.second); + printk("Current time: %d:%d:%d \n", tm_struct.hour, tm_struct.minute, tm_struct.second); } diff --git a/c/src/lib/libbsp/i386/i386ex/network/uti596.h b/c/src/lib/libbsp/i386/i386ex/network/uti596.h index 5448362a22..8dc43cf86e 100644 --- a/c/src/lib/libbsp/i386/i386ex/network/uti596.h +++ b/c/src/lib/libbsp/i386/i386ex/network/uti596.h @@ -58,13 +58,13 @@ struct enet_statistics{ enum commands { - CmdNOp = 0, - CmdSASetup = 1, - CmdConfigure = 2, + CmdNOp = 0, + CmdSASetup = 1, + CmdConfigure = 2, CmdMulticastList = 3, - CmdTx = 4, - CmdTDR = 5, - CmdDump = 6, + CmdTx = 4, + CmdTDR = 5, + CmdDump = 6, CmdDiagnose = 7 }; @@ -142,7 +142,7 @@ struct i596_tbd { unsigned short size; unsigned short pad; struct i596_tbd *next; - char *data; + char *data; }; /* @@ -153,7 +153,7 @@ struct i596_rbd { unsigned short count; unsigned short offset; struct i596_rbd *next; - char *data; + char *data; unsigned short size; unsigned short pad; }; @@ -176,10 +176,10 @@ struct i596_rfd { volatile unsigned short stat; volatile unsigned short cmd; struct i596_rfd *next; - struct i596_rbd *pRbd; + struct i596_rbd *pRbd; unsigned short count; unsigned short size; - char data [1532 ]; + char data [1532 ]; } ; @@ -228,7 +228,7 @@ struct i596_scb { }; -/* +/* * Intermediate System Control Block */ struct i596_iscp { @@ -253,7 +253,7 @@ struct uti596_softc { struct i596_set_add set_add; struct i596_configure set_conf; struct i596_tdr tdr; - struct i596_nop nop; + struct i596_nop nop; unsigned long stat; struct tx_cmd *pTxCmd; struct i596_tbd *pTbd; diff --git a/c/src/lib/libbsp/i386/i386ex/start/80386ex.h b/c/src/lib/libbsp/i386/i386ex/start/80386ex.h index 8c2c5caeff..a62f08f425 100644 --- a/c/src/lib/libbsp/i386/i386ex/start/80386ex.h +++ b/c/src/lib/libbsp/i386/i386ex/start/80386ex.h @@ -8,7 +8,7 @@ * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/c/src/lib/libbsp/i386/i386ex/start/start.S b/c/src/lib/libbsp/i386/i386ex/start/start.S index 1e32e33718..999c161b9b 100644 --- a/c/src/lib/libbsp/i386/i386ex/start/start.S +++ b/c/src/lib/libbsp/i386/i386ex/start/start.S @@ -2,14 +2,14 @@ * This file is the main boot and configuration file for the i386ex. It is * solely responsible for initializing the internal register set to reflect * the proper board configuration. This version is the "generic" i386ex - * startup: + * startup: * * 1) 512K flask ROM @3f80000 * 2) 1 Mb RAM @ 0x0 * 3) Timer0 used as RTEMS clock ticker, 1 msec tick rate. * 4) READY# is generated by CPU * - * The file is a multi-section file, with sections as follows: + * The file is a multi-section file, with sections as follows: * 1) interrupt gates, in section "ints" * 2) interrupt descriptor table, in section "idt" * 3) global descriptor table, in section "gdt" @@ -28,11 +28,11 @@ * * $Id$ - -changes: + +changes: SetExRegByte(ICW3S , 0x02 ) # MUST be 0x02 according to intel SetExRegByte(ICW3M , 0x04 ) # IR2 is cascaded internally: was 0x02 => IR1 is cascaded - + */ @@ -43,56 +43,56 @@ changes: /* * NEW_GAS Needed for binutils 2.9.1.0.7 and higher - */ + */ - EXTERN (boot_card) /* exits to bspstart */ + EXTERN (boot_card) /* exits to bspstart */ EXTERN (stack_start) /* defined in startup/linkcmds */ EXTERN (Clock_exit) PUBLIC (Interrupt_descriptor_table) PUBLIC ( SYM(IDTR) ) /* PUBLIC( SYM(_initInternalRegisters) ) */ - -BEGIN_DATA + +BEGIN_DATA SYM(IDTR): DESC3( SYM(Interrupt_descriptor_table), 0x07ff ); - + SYM(Interrupt_descriptor_table): /* Now in data section */ .rept 256 .word 0,0,0,0 .endr -END_DATA - +END_DATA + BEGIN_DATA PUBLIC (_Global_descriptor_table) - + SYM(GDTR): DESC3( GDT_TABLE, 0x1f ); # one less than the size -SYM (_Global_descriptor_table): +SYM (_Global_descriptor_table): SYM(GDT_TABLE): DESC2(0,0,0,0,0,0); -SYM(GDT_ALIAS): DESC2(32,0x1000,0x0,0x93,0,0x0); +SYM(GDT_ALIAS): DESC2(32,0x1000,0x0,0x93,0,0x0); SYM(GDT_CODE): DESC2(0xffff,0,0x0,0x9B,0xDF,0x00); SYM(GDT_DATA): DESC2(0xffff,0,0x0,0x92,0xDF,0x00); # was CF SYM(GDT_END): END_DATA - + /* This section is the section that is used by the interrupt descriptor table. It is used to provide the IDT with the correct vector offsets. It is for symbol definition only. */ - + .code16 .section .reset, "ax" - PUBLIC ( SYM(reset) ) + PUBLIC ( SYM(reset) ) SYM(reset): nop cli -#ifdef NEW_GAS +#ifdef NEW_GAS data32 addr32 jmp SYM(_initInternalRegisters) /* different section in this file */ #else jmp SYM(_initInternalRegisters) /* different section in this file */ -#endif +#endif /* .code32 in case this section moves */ nop /* required by CHIP LAB to pad out size */ nop @@ -105,27 +105,27 @@ SYM(reset): nop nop nop - + .section .initial, "ax" /* nop */ /* required for linker -- initial jump is to "label - 2" */ - /* nop */ /* ie. _initInternalRegisters -2 ( which now == .initial ) */ + /* nop */ /* ie. _initInternalRegisters -2 ( which now == .initial ) */ /* * Enable access to peripheral register at expanded I/O addresses */ -SYM(_initInternalRegisters): +SYM(_initInternalRegisters): /* .code16 */ - movw $0x8000 , ax + movw $0x8000 , ax outb al , $REMAPCFGH xchg al , ah outb al,$REMAPCFGL outw ax, $REMAPCFG ; /* * Configure operation of the A20 Address Line - */ + */ SYM(A20): movw $PORT92 , dx - + inb dx , al # clear A20 port reset andb $0xfe , al # b0 Fast Reset(0)=disabled,(1)=reset triggered orb $0x02 , al # Bit 1 Fast A20 = 0 (always 0) else enabled. @@ -135,11 +135,11 @@ SYM(A20): SYM(Watchdog): movw $WDTSTATUS , dx # address the WDT status port inb dx , al # get the WDT status - orb $0x01 , al # set the CLKDIS bit + orb $0x01 , al # set the CLKDIS bit outb al , dx # disable the clock to the WDT /* - * Initialize Refresh Control Unit for: + * Initialize Refresh Control Unit for: * Refresh Address = 0x0000 * Refresh gate between rows is 15.6 uSec @@ -148,20 +148,20 @@ SYM(Watchdog): * The refresh pin is not used. */ -SYM(InitRCU): +SYM(InitRCU): SetExRegWord( RFSCIR , 390) # refresh interval was 390, tried 312 SetExRegWord( RFSBAD , 0x0) # base address SetExRegWord( RFSADD , 0x0) # address register SetExRegWord( RFSCON , 0x8000) # enable bit /* - * Initialize clock and power mgmt unit for: + * Initialize clock and power mgmt unit for: * Clock Frequency = 50 Mhz * Prescaled clock output = 1 Mhz * Normal halt instructions */ - -SYM(InitClk): + +SYM(InitClk): SetExRegByte( PWRCON, 0x0 ) SetExRegWord( CLKPRS, 0x17) # 0x13 for 1.19318 MHz. 0x17 for 1MHz. @@ -170,7 +170,7 @@ SYM(InitClk): *************************************************************/ /* - * Initialize I/O port 1 for: + * Initialize I/O port 1 for: * PIN 0 = 1, DCD0# to package pin * PIN 1 = 1, RTS0# to package pin * PIN 2 = 1, DTR0# to package pin @@ -181,15 +181,15 @@ SYM(InitClk): * PIN 7 = 0, Outport (P17_HOLD to 386ex option header JP7 pin 3) */ -SYM(InitPort1): +SYM(InitPort1): SetExRegByte( P1LTC , 0xff ) SetExRegByte( P1DIR , 0x0 ) SetExRegByte( P1CFG , 0x1f) - + /* - * Initialize I/O port 2 for: - * PIN 0 = 0, Outport (P20_CS0# to 386ex option header JP7 pin 11) - * PIN 1 = 0, Outport (P21_CS1# to 386ex option header JP7 pin 9) + * Initialize I/O port 2 for: + * PIN 0 = 0, Outport (P20_CS0# to 386ex option header JP7 pin 11) + * PIN 1 = 0, Outport (P21_CS1# to 386ex option header JP7 pin 9) * PIN 2 = 1, CS2# (SMRAM) If not using CS2 can be configured as.? * PIN 3 = 0, Outport ( no connect ) * PIN 4 = 1, CS#4 (DRAM) @@ -197,34 +197,34 @@ SYM(InitPort1): * PIN 6 = 1, TXD0 output. * PIN 7 = 1, CTS0# input. */ - -SYM(InitPort2): + +SYM(InitPort2): SetExRegByte( P2LTC , 0xff ) SetExRegByte( P2DIR , 0x0 ) SetExRegByte( P2CFG , 0xfe) - + /* - * Initialize I/O port 3 P3CFG + * Initialize I/O port 3 P3CFG * PIN 0 = 1, TMROUT0 to package pin - * PIN 1 = 0, (TMROUT1 to 386ex option header JP7 pin 23) - * PIN 2 = 0, INT0 (IR1) disabled, (P3.2 out to JP7 pin 21) - * PIN 3 = 0, INT1 (IR5) disbled (P3.3 to option header JP7 pin 19) - * PIN 4 = 0, INT2 (IR6) disbled (P3.4 to option header JP7 pin 17) - * PIN 5 = 0, INT2 (IR7) disabled (P3.5 to 386ex header JP7 pin 15) + * PIN 1 = 0, (TMROUT1 to 386ex option header JP7 pin 23) + * PIN 2 = 0, INT0 (IR1) disabled, (P3.2 out to JP7 pin 21) + * PIN 3 = 0, INT1 (IR5) disbled (P3.3 to option header JP7 pin 19) + * PIN 4 = 0, INT2 (IR6) disbled (P3.4 to option header JP7 pin 17) + * PIN 5 = 0, INT2 (IR7) disabled (P3.5 to 386ex header JP7 pin 15) * PIN 6 = 0, Inport (Debugger Break P3.6/PWRD to package pin ) * P3.6 selected * PIN 7 = 0, COMCLK output disabled, 1.8432 Mhz OSC1 oscillator. * ( Debbugger uses COMCLK as the clocking source ) * P3.7 connected to package pin. */ - -SYM(InitPort3): + +SYM(InitPort3): SetExRegByte( P3LTC , 0xff ) SetExRegByte( P3DIR , 0x41 ) SetExRegByte( P3CFG , 0x09 ) # can check TMROUT0 /* - * Initialize Peripheral Pin Configurations: - * PIN 0 = 1, RTS1# to package pin + * Initialize Peripheral Pin Configurations: + * PIN 0 = 1, RTS1# to package pin * PIN 1 = 1, DTR1# to package pin * PIN 2 = 1, TXD1 out to package pin * PIN 3 = 0, EOP#/TC @@ -233,20 +233,20 @@ SYM(InitPort3): * PIN 6 = 0, 0 => CS6# connected to package pin * PIN 7 = 0, Don't care */ - -SYM(InitPeriph): - SetExRegByte( PINCFG , 0x24) - + +SYM(InitPeriph): + SetExRegByte( PINCFG , 0x24) + /* - * Initialize the Asynchronous Serial Ports: + * Initialize the Asynchronous Serial Ports: * BIT 7 = 1, Internal SIO1 modem signals * BIT 6 = 1, Internal SIO0 modem signals * BIT 2 = 0, PSCLK for SSIO clock - * BIT 1 = 1, SERCLK for SIO1 clock + * BIT 1 = 1, SERCLK for SIO1 clock * BIT 0 = 1, SERCLK for SIO0 clock */ -SYM(InitSIO): +SYM(InitSIO): SetExRegByte( SIOCFG, 0xC3 ) # SIOn clocked internally SetExRegByte( LCR0, 0x80 ) # latch DLL0, DLH0 @@ -255,48 +255,48 @@ SYM(InitSIO): SetExRegByte( LCR0, 0x03 ) # enable r/w buffers, IER0 accessible # mode 8-n-1 SetExRegByte( IER0, 0x00 ) # was 0x0f All interrupts detected - - SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 + + SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 SetExRegByte( DLL1, 0x51 ) # 0x51 set to 9600 baud, 0x7 = 115200 SetExRegByte( DLH1, 0x00 ) # 0x145 is 2400 baud SetExRegByte( LCR1, 0x03 ) # enable r/w buffers, IER1 accessible # reg 8-n-1 SetExRegByte( IER1, 0x00 ) # was 0x0f - All interrupts detected -SYM(InitMCR): +SYM(InitMCR): /* - * Initialize Timer for: + * Initialize Timer for: * BIT 7 = 1, Timer clocks disabled * BIT 6 = 0, Reserved * BIT 5 = 1, TMRCLK2 instead of Vcc to Gate2 * BIT 4 = 0, PSCLK to CLK2 * BIT 3 = 1, TMRCLK1 instead of Vcc to Gate1 * BIT 2 = 0, PSCLK to Gate1 - * BIT 1 = 0, Vcc to Gate0 + * BIT 1 = 0, Vcc to Gate0 * BIT 0 = 0, PSCLK to Gate0 */ -SYM(InitTimer): - SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 +SYM(InitTimer): + SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 # and 2 are set to Vcc SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB SetExRegByte(TMR0 , 0x00 ) # sfa - SetExRegByte(TMR0 , 0x00 ) # sfa + SetExRegByte(TMR0 , 0x00 ) # sfa + - SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc - SetExRegByte(TMR1 , 0x00 ) # sfa SetExRegByte(TMR1 , 0x00 ) # sfa - + SetExRegByte(TMR1 , 0x00 ) # sfa + SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc - SetExRegByte(TMR2 , 0x00 ) # - SetExRegByte(TMR2 , 0x00 ) # + SetExRegByte(TMR2 , 0x00 ) # + SetExRegByte(TMR2 , 0x00 ) # SetExRegByte(TMRCFG , 0x80 ) # Enable = 0x00 /* - * Initialize the DMACFG register for: + * Initialize the DMACFG register for: * BIT 7 = 1 , Disable DACK#1 * BITs 6:4 = 100, TMROUT2 connected to DRQ1 * BIT 3 = 1 , Disable DACK0# @@ -316,17 +316,17 @@ SYM(InitTimer): */ SYM(InitInt): - + cli # ! /* SetExRegByte(OCW3S, 0x20) # address the Slave status port - movw $OCW3S , dx + movw $OCW3S , dx inb dx , al # Read the IRR. - SetExRegByte(OCW3M, 0x20) # address the Master status port - movw $OCW3M , dx + SetExRegByte(OCW3M, 0x20) # address the Master status port + movw $OCW3M , dx inb dx , al # Read the IRR. -*/ - +*/ + SetExRegByte(ICW1S , 0x11 ) # EDGE TRIGGERED SetExRegByte(ICW2S , 0x28 ) # Slave base vector after Master SetExRegByte(ICW3S , 0x02 ) # slave cascaded to IR2 on master @@ -336,65 +336,65 @@ SYM(InitInt): SetExRegByte(ICW2M , 0x20 ) # base vector starts at byte 32 SetExRegByte(ICW3M , 0x04) # IR2 is cascaded internally SetExRegByte(ICW4M , 0x01 ) # fully nested mode - - SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. + + SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. # for IR5 and IR0 active use 0xde # for IR0 and IR2 use 0xfa SetExRegByte(INTCFG , 0x00 ) - - -SYM(SetCS4): + + +SYM(SetCS4): SetExRegWord(CS4ADL , 0x702) #Configure chip select 4 SetExRegWord(CS4ADH , 0x00) - SetExRegWord(CS4MSKH, 0x03F) - SetExRegWord(CS4MSKL, 0xFC01) + SetExRegWord(CS4MSKH, 0x03F) + SetExRegWord(CS4MSKL, 0xFC01) -SYM(SetUCS1): +SYM(SetUCS1): SetExRegWord(UCSADL , 0x0304) # 512K block starting at 0x80000 until 0x3f80000 SetExRegWord(UCSADH , 0x03F8) - SetExRegWord(UCSMSKH, 0x03F7) + SetExRegWord(UCSMSKH, 0x03F7) SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select /****************************************************** * The GDT must be in RAM since it must be writeable, * So, move the whole data section down. ********************************************************/ - + movw $ _ram_data_offset , di - movw $ _ram_data_segment, cx + movw $ _ram_data_segment, cx mov cx , es - movw $ _data_size , cx - movw $ _rom_data_segment, ax - movw $ _rom_data_offset , si + movw $ _data_size , cx + movw $ _rom_data_segment, ax + movw $ _rom_data_offset , si mov ax , ds - + repne movsb - + /***************************** * Load the Global Descriptor * Table Register ****************************/ - -#ifdef NEW_GAS + +#ifdef NEW_GAS data32 addr32 lgdt SYM(GDTR) # location of GDT #else lgdt SYM(GDTR) # location of GDT -#endif +#endif + - -SYM(SetUCS): - SetExRegWord(UCSADL, 0x0702) # now 512K starting at 0x3f80000. +SYM(SetUCS): + SetExRegWord(UCSADL, 0x0702) # now 512K starting at 0x3f80000. SetExRegWord(UCSADH, 0x03f8) - SetExRegWord(UCSMSKH, 0x0007) + SetExRegWord(UCSMSKH, 0x0007) SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select - + /* * SRAM chip select: 16 bit bus size,starting 16Mb, size 512k, * 4 waits */ - + #ifdef UT_I386EX SYM(SetCS1): @@ -411,7 +411,7 @@ SYM(SetCS2): /* * Real-time clock: 8 bit bus size, starting@16Mb+512K, size 32k - * 4 waits + * 4 waits */ SYM(SetCS3): SetExRegWord(CS3ADL, 0x0504) @@ -427,25 +427,25 @@ SYM(SetCS3): mov cr0, eax orw $0x1, ax mov eax, cr0 - + /************************** * Flush prefetch queue, * and load CS selector *********************/ ljmpl $ GDT_CODE_PTR , $ SYM(_load_segment_registers) # sets the code selector - + /* * Load the segment registers */ -SYM(_load_segment_registers): +SYM(_load_segment_registers): .code32 pLOAD_SEGMENT( GDT_DATA_PTR, fs) pLOAD_SEGMENT( GDT_DATA_PTR, gs) pLOAD_SEGMENT( GDT_DATA_PTR, ss) pLOAD_SEGMENT( GDT_DATA_PTR, ds) pLOAD_SEGMENT( GDT_DATA_PTR, es) - + /* * Set up the stack */ @@ -481,7 +481,7 @@ SYM (zero_bss): pushl $0 # argc movw $0xFFFB, SYM(i8259s_cache) # ICU mask values reflect - # initial ICU state + # initial ICU state call SYM(boot_card) addl $12,esp diff --git a/c/src/lib/libbsp/i386/i386ex/startup/bspstart.c b/c/src/lib/libbsp/i386/i386ex/startup/bspstart.c index 088796bdc5..bfb7b9cf99 100644 --- a/c/src/lib/libbsp/i386/i386ex/startup/bspstart.c +++ b/c/src/lib/libbsp/i386/i386ex/startup/bspstart.c @@ -13,10 +13,10 @@ * * Ported to the i386ex and submitted by: * - * Erik Ivanenko + * Erik Ivanenko * University of Toronto * erik.ivanenko@utoronto.ca - * + * * $Id$ */ @@ -46,7 +46,7 @@ extern uint32_t rdb_start; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -63,7 +63,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int heap_bottom; diff --git a/c/src/lib/libbsp/i386/i386ex/timer/timer.c b/c/src/lib/libbsp/i386/i386ex/timer/timer.c index 555676e5e1..cf6e87d144 100644 --- a/c/src/lib/libbsp/i386/i386ex/timer/timer.c +++ b/c/src/lib/libbsp/i386/i386ex/timer/timer.c @@ -48,7 +48,7 @@ void TimerOn(const rtems_raw_irq_connect_data* used) outport_byte ( TMRCON , 0xb0 ); /* select tmr2, stay in mode 0 */ outport_byte ( TMR1 , 0xfa ); /* set to 250 usec interval */ outport_byte ( TMR1 , 0x00 ); - outport_byte ( TMRCON , 0x64 ); /* change to mode 2 ( starts timer ) */ + outport_byte ( TMRCON , 0x64 ); /* change to mode 2 ( starts timer ) */ /* interrupts ARE enabled */ /* outport_byte( IERA, 0x41 ); enable interrupt */ /* @@ -116,7 +116,7 @@ int Read_timer() /* outport_byte( TBCR, 0x00 ); stop the timer -- not needed on intel */ outport_byte ( TMRCON, 0x40 ); /* latch the count */ - inport_byte ( TMR1, clicks ); /* read the count */ + inport_byte ( TMR1, clicks ); /* read the count */ total = Ttimer_val + 250 - clicks; diff --git a/c/src/lib/libbsp/i386/pc386/3c509/3c509.c b/c/src/lib/libbsp/i386/pc386/3c509/3c509.c index 07feea0255..cf06a85916 100644 --- a/c/src/lib/libbsp/i386/pc386/3c509/3c509.c +++ b/c/src/lib/libbsp/i386/pc386/3c509/3c509.c @@ -6,7 +6,7 @@ * e-mail: rdasilva@connecttel.com * * MODULE DESCRIPTION: - * RTEMS driver for 3COM 3C509 Ethernet Card. + * RTEMS driver for 3COM 3C509 Ethernet Card. * The driver has been tested on PC with a single network card. * * @@ -54,10 +54,13 @@ * Saskatoon, Saskatchewan, CANADA * eric@skatter.usask.ca ******************************************************************************* - * + * * * MODIFICATION/HISTORY: * $Log$ + * Revision 1.2 1999/12/13 21:21:31 joel + * Warning removal patch from Philip A. Prindeville <philipp@zembu.com>. + * * Revision 1.1 1999/05/14 16:23:42 joel * Added 3COM 3C509 driver from Rosimildo DaSilva <rdasilva@connecttel.com>. * @@ -140,7 +143,7 @@ * more powerful mechanism for detecting and dealing with multiple types * of non-fatal conflict. -jkh XXX */ -struct isa_device +struct isa_device { int id_id; /* device id */ int id_unit; /* unit number */ @@ -149,7 +152,7 @@ struct isa_device }; -struct ep_board +struct ep_board { int epb_addr; /* address of this board */ char epb_used; /* was this entry already used for configuring ? */ @@ -163,7 +166,7 @@ struct ep_board /* * Ethernet software status per interface. */ -struct ep_softc +struct ep_softc { struct arpcom arpcom; /* Ethernet common part */ int ep_io_addr; /* i/o bus address */ @@ -194,7 +197,7 @@ struct ep_softc static volatile unsigned long overrun; static volatile unsigned long resend; static struct ep_softc ep_softc[ NWDDRIVER ]; -static struct isa_device isa_dev[ NWDDRIVER ] = +static struct isa_device isa_dev[ NWDDRIVER ] = { { 0, /* device id */ 0, /* unit number */ @@ -230,7 +233,7 @@ extern void Wait_X_ms( unsigned int timeToWait ); /* timer.c ??? */ /********************************************************************************** - * + * * DESCRIPTION: Writes a buffer of data to the I/O port. The data is sent to the * port as 32 bits units( 4 bytes ). * @@ -239,7 +242,7 @@ extern void Wait_X_ms( unsigned int timeToWait ); /* timer.c ??? */ **********************************************************************************/ static __inline void outsl( unsigned short io_addr, unsigned char *out_data, int len ) { - u_long *pl = ( u_long *)out_data; + u_long *pl = ( u_long *)out_data; while( len-- ) { outport_long( io_addr, *pl ); @@ -248,7 +251,7 @@ static __inline void outsl( unsigned short io_addr, unsigned char *out_data, int } /********************************************************************************** - * + * * DESCRIPTION: Writes a buffer of data to the I/O port. The data is sent to the * port as 16 bits units( 2 bytes ). * @@ -257,7 +260,7 @@ static __inline void outsl( unsigned short io_addr, unsigned char *out_data, int **********************************************************************************/ static __inline void outsw( unsigned short io_addr, unsigned char *out_data, int len ) { - u_short *ps = ( u_short *)out_data; + u_short *ps = ( u_short *)out_data; while( len-- ) { outport_word( io_addr, *ps ); @@ -266,7 +269,7 @@ static __inline void outsw( unsigned short io_addr, unsigned char *out_data, int } /********************************************************************************** - * + * * DESCRIPTION: Writes a buffer of data to the I/O port. The data is sent to the * port as 8 bits units( 1 byte ). * @@ -284,7 +287,7 @@ static __inline void outsb( unsigned short io_addr, unsigned char *out_data, int /********************************************************************************** - * + * * DESCRIPTION: Read a buffer of data from an I/O port. The data is read as 16 bits * units or 2 bytes. * @@ -293,7 +296,7 @@ static __inline void outsb( unsigned short io_addr, unsigned char *out_data, int **********************************************************************************/ static __inline void insw( unsigned short io_addr, unsigned char *in_data, int len ) { - u_short *ps = ( u_short *)in_data; + u_short *ps = ( u_short *)in_data; while( len-- ) { inport_word( io_addr, *ps ); @@ -302,7 +305,7 @@ static __inline void insw( unsigned short io_addr, unsigned char *in_data, int l } /********************************************************************************** - * + * * DESCRIPTION: Read a buffer of data from an I/O port. The data is read as 32 bits * units or 4 bytes. * @@ -311,7 +314,7 @@ static __inline void insw( unsigned short io_addr, unsigned char *in_data, int l **********************************************************************************/ static __inline void insl( unsigned short io_addr, unsigned char *in_data, int len ) { - u_long *pl = ( u_long *)in_data; + u_long *pl = ( u_long *)in_data; while( len-- ) { inport_long( io_addr, *pl ); @@ -320,7 +323,7 @@ static __inline void insl( unsigned short io_addr, unsigned char *in_data, int l } /********************************************************************************** - * + * * DESCRIPTION: Read a buffer of data from an I/O port. The data is read as 8 bits * units or 1 bytes. * @@ -337,7 +340,7 @@ static __inline void insb( unsigned short io_addr, unsigned char *in_data, int l /********************************************************************************** - * + * * DESCRIPTION: Writes a word to the I/O port. * * RETURNS: nothing. @@ -353,7 +356,7 @@ static __inline void outw( unsigned short io_addr, unsigned short out_data ) /********************************************************************************** - * + * * DESCRIPTION: Routine to read a word as defined in FreeBSD. * * RETURNS: nothing @@ -367,7 +370,7 @@ static __inline unsigned short inw( unsigned short io_addr ) } /********************************************************************************** - * + * * DESCRIPTION: Routine to output a word as defined in FreeBSD. * * RETURNS: nothing. @@ -379,7 +382,7 @@ void __inline outb( unsigned short io_addr, unsigned char out_data ) } /********************************************************************************** - * + * * DESCRIPTION: Routine to read a word as defined in FreeBSD. * * RETURNS: byte read. @@ -394,7 +397,7 @@ static __inline unsigned char inb( unsigned short io_addr ) /********************************************************************************** - * + * * DESCRIPTION: * We get eeprom data from the id_port given an offset into the eeprom. * Basically; after the ID_sequence is sent to all of the cards; they enter @@ -422,7 +425,7 @@ static int get_eeprom_data( int id_port, int offset ) /********************************************************************************** - * + * * DESCRIPTION: Waits until the EEPROM of the card is ready to be accessed. * * RETURNS: 0 - not ready; 1 - ok @@ -434,7 +437,7 @@ static int eeprom_rdy( struct ep_softc *sc ) for (i = 0; is_eeprom_busy(BASE) && i < MAX_EEPROMBUSY; i++) continue; - if (i >= MAX_EEPROMBUSY) + if (i >= MAX_EEPROMBUSY) { printf("ep%d: eeprom failed to come ready.\n", sc->unit); return (0); @@ -443,9 +446,9 @@ static int eeprom_rdy( struct ep_softc *sc ) } /********************************************************************************** - * + * * DESCRIPTION: - * get_e: gets a 16 bits word from the EEPROM. + * get_e: gets a 16 bits word from the EEPROM. * We must have set the window before call this routine. * * RETURNS: data from EEPROM @@ -463,7 +466,7 @@ u_short get_e( struct ep_softc *sc, int offset ) /********************************************************************************** - * + * * DESCRIPTION: * Driver interrupt handler. This routine is called by the RTEMS kernel when this * interrupt is raised. @@ -477,14 +480,14 @@ static rtems_isr ap_interrupt_handler( rtems_vector_number v ) /* de-activate any pending interrrupt, and sent and event to interrupt task * to process all events required by this interrupt. - */ + */ outw( BASE + EP_COMMAND, SET_INTR_MASK ); /* disable all Ints */ - rtems_event_send( sc->rxDaemonTid, INTERRUPT_EVENT ); + rtems_event_send( sc->rxDaemonTid, INTERRUPT_EVENT ); } /********************************************************************************** - * + * * DESCRIPTION: * * RETURNS: @@ -496,7 +499,7 @@ static void nopOn(const rtems_irq_connect_data* notUsed) } /********************************************************************************** - * + * * DESCRIPTION: * * RETURNS: @@ -509,7 +512,7 @@ static int _3c509_IsOn(const rtems_irq_connect_data* irq) /********************************************************************************** - * + * * DESCRIPTION: * Initializes the ethernet hardware. * @@ -521,15 +524,15 @@ static void _3c509_initialize_hardware (struct ep_softc *sc) rtems_status_code st; epinit( sc ); - + /* - * Set up interrupts + * Set up interrupts */ sc->irqInfo.hdl = ( rtems_irq_hdl )ap_interrupt_handler; sc->irqInfo.on = nopOn; sc->irqInfo.off = nopOn; sc->irqInfo.isOn = _3c509_IsOn; - + printf ("3c509: IRQ with Kernel: %d\n", sc->irqInfo.name ); st = BSP_install_rtems_irq_handler( &sc->irqInfo ); if( !st ) @@ -539,7 +542,7 @@ static void _3c509_initialize_hardware (struct ep_softc *sc) } /********************************************************************************** - * + * * DESCRIPTION: Driver interrupt daemon. * * RETURNS: nothing. @@ -561,13 +564,13 @@ static void _3c509_rxDaemon (void *arg) /* printk( "R+" ); */ ep_intr( dp ); epstart( &dp->arpcom.ac_if ); - } + } printf ("3C509: RX Daemon is finishing.\n"); } /********************************************************************************** - * + * * DESCRIPTION: Driver transmit daemon * * RETURNS: @@ -578,7 +581,7 @@ static void _3c509_txDaemon (void *arg) struct ep_softc *sc = (struct ep_softc *)&ep_softc[0]; struct ifnet *ifp = &sc->arpcom.ac_if; rtems_event_set events; - + printf ("3C509: TX Daemon is starting.\n"); for( ;; ) { @@ -586,9 +589,9 @@ static void _3c509_txDaemon (void *arg) * Wait for packet */ /* printk( "T-\n" ); */ - rtems_bsdnet_event_receive( START_TRANSMIT_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, - RTEMS_NO_TIMEOUT, + rtems_bsdnet_event_receive( START_TRANSMIT_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, + RTEMS_NO_TIMEOUT, &events ); /* printk( "T+\n" ); */ epstart( ifp ); @@ -600,7 +603,7 @@ static void _3c509_txDaemon (void *arg) /********************************************************************************** - * + * * DESCRIPTION: Activates the trabsmitter task... * * RETURNS: nothing. @@ -615,7 +618,7 @@ static void _3c509_start (struct ifnet *ifp) } /********************************************************************************** - * + * * DESCRIPTION: Initialize and start the device * * RETURNS: @@ -628,11 +631,11 @@ static void _3c509_init (void *arg) printf ("3C509: Initialization called.\n"); if (sc->txDaemonTid == 0) { - + /* * Set up WD hardware */ - _3c509_initialize_hardware (sc); + _3c509_initialize_hardware (sc); printf ("3C509: starting network driver tasks..\n"); /* * Start driver tasks @@ -648,7 +651,7 @@ static void _3c509_init (void *arg) } /********************************************************************************** - * + * * DESCRIPTION: Stop the device * * RETURNS: @@ -679,7 +682,7 @@ static void _3c509_stop (struct ep_softc *sc) /********************************************************************************** - * + * * DESCRIPTION: Show interface statistics * * RETURNS: nothing. @@ -697,10 +700,10 @@ static void _3c509_stats (struct ep_softc *sc) } /********************************************************************************** - * + * * DESCRIPTION: Driver ioctl handler * - * RETURNS: + * RETURNS: * **********************************************************************************/ static int _3c509_ioctl (struct ifnet *ifp, int command, caddr_t data) @@ -738,7 +741,7 @@ static int _3c509_ioctl (struct ifnet *ifp, int command, caddr_t data) case SIO_RTEMS_SHOW_STATS: _3c509_stats( sc ); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -750,7 +753,7 @@ static int _3c509_ioctl (struct ifnet *ifp, int command, caddr_t data) } /********************************************************************************** - * + * * DESCRIPTION: * Attaches this network driver to the system. This function is called by the network * interface during the initialization of the system. @@ -784,7 +787,7 @@ int rtems_3c509_driver_attach (struct rtems_bsdnet_ifconfig *config ) if (ifp->if_softc == NULL) break; } - if (i >= NWDDRIVER) + if (i >= NWDDRIVER) { printf ("Too many 3C509 drivers.\n"); return 0; @@ -793,11 +796,11 @@ int rtems_3c509_driver_attach (struct rtems_bsdnet_ifconfig *config ) /* * Process options */ - if( config->hardware_address ) + if( config->hardware_address ) { memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); } - else + else { /* set it to something ... */ memset (sc->arpcom.ac_enaddr, 0x08,ETHER_ADDR_LEN); @@ -856,11 +859,11 @@ int rtems_3c509_driver_attach (struct rtems_bsdnet_ifconfig *config ) /********************************************************************************** - * + * * DESCRIPTION: * This function looks for a 3COM card 3c5x9 in an isa bus. If a board is found, it * returns a structure describing the caracteristics of the card. It returns zero when - * card can not be found. + * card can not be found. * * RETURNS: 0 - fail - could not find a card... * <> description of the card. @@ -871,7 +874,7 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) int data, i, j, id_port = ELINK_ID_PORT; int count = 0; - if(ep_current_tag == (EP_LAST_TAG + 1) ) + if(ep_current_tag == (EP_LAST_TAG + 1) ) { /* Come here just one time */ ep_current_tag--; @@ -883,7 +886,7 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) elink_idseq(0xCF); elink_reset(); Wait_X_ms( 10 ); /* RPS: assuming delay in miliseconds */ - for (i = 0; i < EP_MAX_BOARDS; i++) + for (i = 0; i < EP_MAX_BOARDS; i++) { outb(id_port, 0); outb(id_port, 0); @@ -923,7 +926,7 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) ep_current_tag--; } ep_board[ep_boards].epb_addr = 0; - if( count ) + if( count ) { printf("%d 3C5x9 board(s) on ISA found at", count); for (j = 0; ep_board[j].epb_addr; j++) @@ -943,7 +946,7 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) * */ - if (IS_BASE == -1) + if (IS_BASE == -1) { /* port? */ for (i = 0; ep_board[i].epb_addr && ep_board[i].epb_used; i++) ; if (ep_board[i].epb_addr == 0) @@ -952,15 +955,15 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) IS_BASE = ep_board[i].epb_addr; ep_board[i].epb_used = 1; return &ep_board[ i ]; - } - else + } + else { for (i = 0; ep_board[i].epb_addr && ep_board[i].epb_addr != IS_BASE; i++ ) ; if (ep_board[i].epb_used || ep_board[i].epb_addr != IS_BASE) return 0; - if (inw(IS_BASE + EP_W0_EEPROM_COMMAND) & EEPROM_TST_MODE) + if (inw(IS_BASE + EP_W0_EEPROM_COMMAND) & EEPROM_TST_MODE) { - printf("ep%d: 3c5x9 at 0x%x in PnP mode. Disable PnP mode!\n", + printf("ep%d: 3c5x9 at 0x%x in PnP mode. Disable PnP mode!\n", is->id_unit, IS_BASE ); } ep_board[i].epb_used = 1; @@ -971,7 +974,7 @@ static struct ep_board *ep_look_for_board_at( struct isa_device *is ) /********************************************************************************** - * + * * DESCRIPTION: * This routine checks if there card installed on the machine. * @@ -989,7 +992,7 @@ static int ep_isa_probe( struct isa_device *is ) if( (epb = ep_look_for_board_at(is)) == 0 ) return (0); - sc = &ep_softc[ 0 ]; + sc = &ep_softc[ 0 ]; sc->ep_io_addr = epb->epb_addr; sc->epb = epb; @@ -1001,10 +1004,10 @@ static int ep_isa_probe( struct isa_device *is ) GO_WINDOW(0); k = sc->epb->prod_id; #ifdef PC98 - if ((k & 0xf0f0) != (PROD_ID & 0xf0f0)) + if ((k & 0xf0f0) != (PROD_ID & 0xf0f0)) { #else - if ((k & 0xf0ff) != (PROD_ID & 0xf0ff)) + if ((k & 0xf0ff) != (PROD_ID & 0xf0ff)) { #endif printf("ep_isa_probe: ignoring model %04x\n", k ); @@ -1024,7 +1027,7 @@ static int ep_isa_probe( struct isa_device *is ) * */ - if (is->id_irq == 0) + if (is->id_irq == 0) { /* irq? */ is->id_irq = ( k == 2 ) ? 9 : k; } @@ -1039,9 +1042,9 @@ static int ep_isa_probe( struct isa_device *is ) /********************************************************************************** - * + * * DESCRIPTION: - * This routine attaches this network driver and the network interface routines. + * This routine attaches this network driver and the network interface routines. * * RETURNS: 0 - failed to attach * 1 - success @@ -1055,15 +1058,15 @@ static int ep_isa_attach( struct isa_device *is ) sc->ep_connectors = 0; config = inw( IS_BASE + EP_W0_CONFIG_CTRL ); - if (config & IS_AUI) + if (config & IS_AUI) { sc->ep_connectors |= AUI; } - if (config & IS_BNC) + if (config & IS_BNC) { sc->ep_connectors |= BNC; } - if (config & IS_UTP) + if (config & IS_UTP) { sc->ep_connectors |= UTP; } @@ -1082,7 +1085,7 @@ static int ep_isa_attach( struct isa_device *is ) GO_WINDOW( 0 ); SET_IRQ( BASE, irq ); - printf( "3C509: I/O=0x%x, IRQ=%d, CONNECTOR=%s, ", + printf( "3C509: I/O=0x%x, IRQ=%d, CONNECTOR=%s, ", sc->ep_io_addr, sc->irqInfo.name,ep_conn_type[ sc->ep_connector ] ); ep_attach( sc ); @@ -1090,7 +1093,7 @@ static int ep_isa_attach( struct isa_device *is ) } /********************************************************************************** - * + * * DESCRIPTION: Completes the initialization/attachement of the driver. * * RETURNS: 0 - ok. @@ -1100,21 +1103,21 @@ static int ep_attach( struct ep_softc *sc ) { u_short *p; int i; - + /* * Setup the station address */ p = (u_short *) &sc->arpcom.ac_enaddr; GO_WINDOW(2); printf("ADDRESS=" ); - for (i = 0; i < 3; i++) + for (i = 0; i < 3; i++) { p[i] = htons( sc->epb->eth_addr[i] ); outw( BASE + EP_W2_ADDR_0 + (i * 2), ntohs( p[i] ) ); printf("%04x ", (u_short)ntohs( p[i] ) ); } printf("\n" ); - + sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc = sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0; @@ -1126,7 +1129,7 @@ static int ep_attach( struct ep_softc *sc ) /********************************************************************************** - * + * * DESCRIPTION: * Initializes the card. * The order in here seems important. Otherwise we may not receive interrupts. ?! @@ -1199,19 +1202,19 @@ static void epinit( struct ep_softc *sc ) */ /* Set the xcvr. */ - if (ifp->if_flags & IFF_LINK0 && sc->ep_connectors & AUI) + if (ifp->if_flags & IFF_LINK0 && sc->ep_connectors & AUI) { i = ACF_CONNECTOR_AUI; - } - else if (ifp->if_flags & IFF_LINK1 && sc->ep_connectors & BNC) + } + else if (ifp->if_flags & IFF_LINK1 && sc->ep_connectors & BNC) { i = ACF_CONNECTOR_BNC; - } - else if (ifp->if_flags & IFF_LINK2 && sc->ep_connectors & UTP) + } + else if (ifp->if_flags & IFF_LINK2 && sc->ep_connectors & UTP) { i = ACF_CONNECTOR_UTP; - } - else + } + else { i = sc->ep_connector; } @@ -1219,10 +1222,10 @@ static void epinit( struct ep_softc *sc ) j = inw(BASE + EP_W0_ADDRESS_CFG) & 0x3fff; outw(BASE + EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS)); - switch(i) + switch(i) { case ACF_CONNECTOR_UTP: - if (sc->ep_connectors & UTP) + if (sc->ep_connectors & UTP) { GO_WINDOW(4); outw(BASE + EP_W4_MEDIA_TYPE, ENABLE_UTP); @@ -1230,7 +1233,7 @@ static void epinit( struct ep_softc *sc ) break; case ACF_CONNECTOR_BNC: - if (sc->ep_connectors & BNC) + if (sc->ep_connectors & BNC) { outw(BASE + EP_COMMAND, START_TRANSCEIVER); Wait_X_ms( 1 ); @@ -1258,7 +1261,7 @@ static void epinit( struct ep_softc *sc ) sc->tx_underrun = 0; ep_fset(F_RX_FIRST); - if( sc->top ) + if( sc->top ) { m_freem( sc->top ); sc->top = sc->mcur = 0; @@ -1279,7 +1282,7 @@ static void epinit( struct ep_softc *sc ) static const char padmap[] = {0, 3, 2, 1}; /********************************************************************************** - * + * * DESCRIPTION: Routine to transmit frames to the card. * * RETURNS: nothing. @@ -1293,14 +1296,14 @@ static void epstart( struct ifnet *ifp ) struct mbuf *top; int pad; - while( inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS ) + while( inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS ) ; startagain: /* printk( "S-" ); */ /* Sneak a peek at the next packet */ m = ifp->if_snd.ifq_head; - if (m == 0) + if (m == 0) { ifp->if_flags &= ~IFF_OACTIVE; return; @@ -1316,7 +1319,7 @@ startagain: * but we drop packets that are too large. Perhaps we should truncate * them instead? */ - if( len + pad > ETHER_MAX_LEN ) + if( len + pad > ETHER_MAX_LEN ) { /* packet is obviously too large: toss it */ ++ifp->if_oerrors; @@ -1324,30 +1327,30 @@ startagain: m_freem( m ); goto readcheck; } - if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) + if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) { /* no room in FIFO */ outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4)); /* make sure */ - if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) + if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) { ifp->if_flags |= IFF_OACTIVE; return; } } IF_DEQUEUE( &ifp->if_snd, m ); - outw(BASE + EP_W1_TX_PIO_WR_1, len); + outw(BASE + EP_W1_TX_PIO_WR_1, len); outw(BASE + EP_W1_TX_PIO_WR_1, 0x0); /* Second dword meaningless */ for (top = m; m != 0; m = m->m_next) { - if( ep_ftst(F_ACCESS_32_BITS ) ) + if( ep_ftst(F_ACCESS_32_BITS ) ) { outsl( BASE + EP_W1_TX_PIO_WR_1, mtod(m, caddr_t), m->m_len / 4 ); if( m->m_len & 3 ) outsb(BASE + EP_W1_TX_PIO_WR_1, mtod(m, caddr_t) + (m->m_len & (~3)), m->m_len & 3 ); - } - else + } + else { outsw( BASE + EP_W1_TX_PIO_WR_1, mtod(m, caddr_t), m->m_len / 2 ); if( m->m_len & 1 ) @@ -1368,13 +1371,13 @@ startagain: * fifo. */ readcheck: - if( inw(BASE + EP_W1_RX_STATUS) & RX_BYTES_MASK ) + if( inw(BASE + EP_W1_RX_STATUS) & RX_BYTES_MASK ) { /* * we check if we have packets left, in that case we prepare to come * back later */ - if( ifp->if_snd.ifq_head ) + if( ifp->if_snd.ifq_head ) { outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 8); } @@ -1386,7 +1389,7 @@ readcheck: /********************************************************************************** - * + * * DESCRIPTION: Routine to read frames from the card. * * RETURNS: nothing. @@ -1407,10 +1410,10 @@ static void epread( register struct ep_softc *sc ) read_again: - if (status & ERR_RX) + if (status & ERR_RX) { ++ifp->if_ierrors; - if( status & ERR_RX_OVERRUN ) + if( status & ERR_RX_OVERRUN ) { /* * we can think the rx latency is actually greather than we @@ -1426,7 +1429,7 @@ read_again: } rx_fifo = rx_fifo2 = status & RX_BYTES_MASK; - if( ep_ftst( F_RX_FIRST ) ) + if( ep_ftst( F_RX_FIRST ) ) { MGETHDR( m, M_DONTWAIT, MT_DATA ); if( !m ) @@ -1443,8 +1446,8 @@ read_again: top->m_len = sizeof(struct ether_header); rx_fifo -= sizeof(struct ether_header); sc->cur_len = rx_fifo2; - } - else + } + else { /* come here if we didn't have a complete packet last time */ top = sc->top; @@ -1453,10 +1456,10 @@ read_again: } /* Reads what is left in the RX FIFO */ - while (rx_fifo > 0) + while (rx_fifo > 0) { lenthisone = min( rx_fifo, M_TRAILINGSPACE(m) ); - if( lenthisone == 0 ) + if( lenthisone == 0 ) { /* no room in this one */ mcur = m; MGET(m, M_WAIT, MT_DATA); @@ -1468,15 +1471,15 @@ read_again: mcur->m_next = m; lenthisone = min(rx_fifo, M_TRAILINGSPACE(m)); } - if( ep_ftst( F_ACCESS_32_BITS ) ) + if( ep_ftst( F_ACCESS_32_BITS ) ) { /* default for EISA configured cards*/ insl( BASE + EP_W1_RX_PIO_RD_1, mtod(m, caddr_t) + m->m_len, lenthisone / 4); m->m_len += (lenthisone & ~3); if (lenthisone & 3) insb(BASE + EP_W1_RX_PIO_RD_1, mtod(m, caddr_t) + m->m_len, lenthisone & 3); m->m_len += (lenthisone & 3); - } - else + } + else { insw(BASE + EP_W1_RX_PIO_RD_1, mtod(m, caddr_t) + m->m_len, lenthisone / 2); m->m_len += lenthisone; @@ -1486,12 +1489,12 @@ read_again: rx_fifo -= lenthisone; } - if( status & ERR_RX_INCOMPLETE) + if( status & ERR_RX_INCOMPLETE) { /* we haven't received the complete packet */ sc->mcur = m; sc->rx_no_first++; /* to know how often we come here */ ep_frst( F_RX_FIRST ); - if( !((status = inw(BASE + EP_W1_RX_STATUS)) & ERR_RX_INCOMPLETE) ) + if( !((status = inw(BASE + EP_W1_RX_STATUS)) & ERR_RX_INCOMPLETE) ) { /* we see if by now, the packet has completly arrived */ goto read_again; @@ -1516,7 +1519,7 @@ read_again: out: outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK); - if (sc->top) + if (sc->top) { m_freem(sc->top); sc->top = 0; @@ -1530,10 +1533,10 @@ out: /********************************************************************************** - * - * DESCRIPTION: - * This routine handles interrupts. It is called from the "RX" task whenever - * the ISR post an event to the task. + * + * DESCRIPTION: + * This routine handles interrupts. It is called from the "RX" task whenever + * the ISR post an event to the task. * This is basically the "isr" from the FreeBSD driver. * * RETURNS: nothing. @@ -1548,17 +1551,17 @@ static void ep_intr( struct ep_softc *sc ) rescan: /* printk( "I-" ); */ - while( ( status = inw(BASE + EP_STATUS)) & S_5_INTS ) + while( ( status = inw(BASE + EP_STATUS)) & S_5_INTS ) { /* first acknowledge all interrupt sources */ outw( BASE + EP_COMMAND, ACK_INTR | ( status & S_MASK ) ); - if( status & ( S_RX_COMPLETE | S_RX_EARLY ) ) + if( status & ( S_RX_COMPLETE | S_RX_EARLY ) ) { epread( sc ); continue; } - if (status & S_TX_AVAIL) + if (status & S_TX_AVAIL) { /* we need ACK */ ifp->if_timer = 0; @@ -1567,7 +1570,7 @@ rescan: inw(BASE + EP_W1_FREE_TX); epstart(ifp); } - if (status & S_CARD_FAILURE) + if (status & S_CARD_FAILURE) { ifp->if_timer = 0; printf("\nep%d:\n\tStatus: %x\n", sc->unit, status); @@ -1584,7 +1587,7 @@ rescan: epinit(sc); return; } - if (status & S_TX_COMPLETE) + if (status & S_TX_COMPLETE) { ifp->if_timer = 0; /* we need ACK. we do it at the end */ @@ -1592,18 +1595,18 @@ rescan: * We need to read TX_STATUS until we get a 0 status in order to * turn off the interrupt flag. */ - while ((status = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) + while ((status = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) { if (status & TXS_SUCCES_INTR_REQ) ; - else if( status & (TXS_UNDERRUN | TXS_JABBER | TXS_MAX_COLLISION ) ) + else if( status & (TXS_UNDERRUN | TXS_JABBER | TXS_MAX_COLLISION ) ) { outw(BASE + EP_COMMAND, TX_RESET); - if (status & TXS_UNDERRUN) + if (status & TXS_UNDERRUN) { sc->tx_underrun++; - } - else + } + else { if( status & TXS_JABBER ) ; @@ -1616,7 +1619,7 @@ rescan: * To have a tx_avail_int but giving the chance to the * Reception */ - if( ifp->if_snd.ifq_head ) + if( ifp->if_snd.ifq_head ) { outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 8); } @@ -1632,7 +1635,7 @@ rescan: outw(BASE + EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */ if( (status = inw(BASE + EP_STATUS) ) & S_5_INTS ) goto rescan; - + /* re-enable Ints */ outw( BASE + EP_COMMAND, SET_INTR_MASK | S_5_INTS ); /* printk( "I+" ); */ diff --git a/c/src/lib/libbsp/i386/pc386/clock/ckinit.c b/c/src/lib/libbsp/i386/pc386/clock/ckinit.c index 9fa7acbd33..a1b1899dc9 100644 --- a/c/src/lib/libbsp/i386/pc386/clock/ckinit.c +++ b/c/src/lib/libbsp/i386/pc386/clock/ckinit.c @@ -64,7 +64,7 @@ rtems_device_minor_number rtems_clock_minor; | Description: Interrupt Service Routine for clock (0h) interruption. | Global Variables: Clock_driver_ticks, Clock_isrs. | Arguments: vector - standard RTEMS argument - see documentation. -| Returns: standard return value - see documentation. +| Returns: standard return value - see documentation. +--------------------------------------------------------------------------*/ static void clockIsr() { @@ -99,7 +99,7 @@ static void clockIsr() | not really necessary, since there will be a reset at exit. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void clockOff(const rtems_irq_connect_data* unused) { @@ -115,7 +115,7 @@ void clockOff(const rtems_irq_connect_data* unused) | Description: Initialize and install clock interrupt handler. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static void clockOn(const rtems_irq_connect_data* unused) { @@ -162,9 +162,9 @@ static void clockOn(const rtems_irq_connect_data* unused) outport_byte(TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN); outport_byte(TIMER_CNTR0, count >> 0 & 0xff); outport_byte(TIMER_CNTR0, count >> 8 & 0xff); - } + } -} +} int clockIsOn(const rtems_irq_connect_data* unused) { @@ -176,8 +176,8 @@ static rtems_irq_connect_data clockIrqData = {BSP_PERIODIC_TIMER, clockOn, clockOff, clockIsOn}; - - + + /*-------------------------------------------------------------------------+ | Clock device driver INITIALIZE entry point. @@ -195,14 +195,14 @@ Clock_initialize(rtems_device_major_number major, rtems_fatal_error_occurred(1); } /* make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } /* Clock_initialize */ - + /*-------------------------------------------------------------------------+ | Console device driver CONTROL entry point +--------------------------------------------------------------------------*/ @@ -214,12 +214,12 @@ Clock_control(rtems_device_major_number major, if (pargp != NULL) { rtems_libio_ioctl_args_t *args = pargp; - + /*-------------------------------------------------------------------------+ | This is hokey, but until we get a defined interface to do this, it will | just be this simple... +-------------------------------------------------------------------------*/ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) clockIsr(); else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) diff --git a/c/src/lib/libbsp/i386/pc386/clock/rtc.c b/c/src/lib/libbsp/i386/pc386/clock/rtc.c index 401220bf6d..26c4c2056d 100644 --- a/c/src/lib/libbsp/i386/pc386/clock/rtc.c +++ b/c/src/lib/libbsp/i386/pc386/clock/rtc.c @@ -79,9 +79,9 @@ | Description: Convert 2 digit number to its BCD representation. | Global Variables: None. | Arguments: i - Number to convert. -| Returns: BCD representation of number. +| Returns: BCD representation of number. +--------------------------------------------------------------------------*/ -static inline uint8_t +static inline uint8_t bcd(uint8_t i) { return ((i / 16) * 10 + (i % 16)); @@ -99,9 +99,9 @@ bcd(uint8_t i) | Description: Convert years to seconds (since 1970). | Global Variables: None. | Arguments: y - year to convert (1970 <= y <= 2100). -| Returns: number of seconds since 1970. +| Returns: number of seconds since 1970. +--------------------------------------------------------------------------*/ -static inline uint32_t +static inline uint32_t ytos(uint16_t y) { /* v NUM LEAP YEARS v */ return ((y - 1970) * SECS_PER_REG_YEAR + (y - 1970 + 1) / 4 * SECS_PER_DAY); @@ -113,9 +113,9 @@ ytos(uint16_t y) | Description: Convert months to seconds since January. | Global Variables: None. | Arguments: m - month to convert, leap - is this a month of a leap year. -| Returns: number of seconds since January. +| Returns: number of seconds since January. +--------------------------------------------------------------------------*/ -static inline uint32_t +static inline uint32_t mtos(uint8_t m, rtems_boolean leap) { static uint16_t daysMonth[] = { 0, 0, 31, 59, 90, 120, 151, 181, @@ -132,9 +132,9 @@ mtos(uint8_t m, rtems_boolean leap) | Description: Perform action on RTC and return its result. | Global Variables: None. | Arguments: what - what to write to RTC port (what to do). -| Returns: result received from RTC port after action performed. +| Returns: result received from RTC port after action performed. +--------------------------------------------------------------------------*/ -static inline uint8_t +static inline uint8_t rtcin(uint8_t what) { uint8_t r; @@ -153,7 +153,7 @@ rtcin(uint8_t what) | Description: Initialize real-time clock (RTC). | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void init_rtc(void) @@ -181,7 +181,7 @@ init_rtc(void) | Description: Read present time from RTC and return it. | Global Variables: None. | Arguments: tod - to return present time in 'rtems_time_of_day' format. -| Returns: number of seconds from 1970/01/01 corresponding to 'tod'. +| Returns: number of seconds from 1970/01/01 corresponding to 'tod'. +--------------------------------------------------------------------------*/ long int rtc_read(rtems_time_of_day *tod) @@ -201,7 +201,7 @@ rtc_read(rtems_time_of_day *tod) sa = rtcin(RTC_STATUSA); tod->year = bcd(rtcin(RTC_YEAR)) + 1900; /* year */ - if (tod->year < 1970) tod->year += 100; + if (tod->year < 1970) tod->year += 100; tod->month = bcd(rtcin(RTC_MONTH)); /* month */ tod->day = bcd(rtcin(RTC_DAY)); /* day */ (void) bcd(rtcin(RTC_WDAY)); /* weekday */ diff --git a/c/src/lib/libbsp/i386/pc386/console/console.c b/c/src/lib/libbsp/i386/pc386/console/console.c index 7a1ad2dbd6..a0b468e52b 100644 --- a/c/src/lib/libbsp/i386/pc386/console/console.c +++ b/c/src/lib/libbsp/i386/pc386/console/console.c @@ -96,7 +96,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -151,9 +151,9 @@ void __assert (const char *file, int line, const char *msg) { static char exit_msg[] = "EXECUTIVE SHUTDOWN! Any key to reboot..."; unsigned char ch; - + /* - * Note we cannot call exit or printf from here, + * Note we cannot call exit or printf from here, * assert can fail inside ISR too */ @@ -218,13 +218,13 @@ console_initialize(rtems_device_major_number major, { /* Install keyboard interrupt handler */ status = BSP_install_rtems_irq_handler(&console_isr_data); - + if (!status) { printk("Error installing keyboard interrupt handler!\n"); rtems_fatal_error_occurred(status); } - + status = rtems_io_register_name("/dev/console", major, 0); if (status != RTEMS_SUCCESSFUL) { @@ -240,14 +240,14 @@ console_initialize(rtems_device_major_number major, */ /* 9600-8-N-1 */ BSP_uart_init(BSPConsolePort, 9600, CHR_8_BITS, 0, 0, 0); - - + + /* Set interrupt handler */ if(BSPConsolePort == BSP_UART_COM1) { console_isr_data.name = BSP_UART_COM1_IRQ; console_isr_data.hdl = BSP_uart_termios_isr_com1; - + } else { @@ -322,7 +322,7 @@ console_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ console_last_close, /* lastClose */ @@ -338,7 +338,7 @@ console_open(rtems_device_major_number major, { /* Let's set the routines for termios to poll the - * Kbd queue for data + * Kbd queue for data */ cb.pollRead = kbd_poll_read; cb.outputUsesInterrupts = 0; @@ -371,9 +371,9 @@ console_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set(BSPConsolePort, + BSP_uart_termios_set(BSPConsolePort, ((rtems_libio_open_close_args_t *)arg)->iop->data1); - + /* Enable interrupts on channel */ BSP_uart_intr_ctrl(BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS); @@ -391,7 +391,7 @@ console_close(rtems_device_major_number major, return rtems_termios_close (arg); } /* console_close */ - + /*-------------------------------------------------------------------------+ | Console device driver READ entry point. +--------------------------------------------------------------------------+ @@ -404,7 +404,7 @@ console_read(rtems_device_major_number major, { return rtems_termios_read( arg ); } /* console_read */ - + /*-------------------------------------------------------------------------+ | Console device driver WRITE entry point. @@ -424,7 +424,7 @@ console_write(rtems_device_major_number major, { return rtems_termios_write (arg); } - + /* write data to VGA */ ibmpc_console_write( minor, buffer, maximum ); rw_args->bytes_moved = maximum; @@ -433,18 +433,18 @@ console_write(rtems_device_major_number major, extern int vt_ioctl( unsigned int cmd, unsigned long arg); - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ rtems_libio_ioctl_args_t *args = arg; - switch (args->command) + switch (args->command) { default: if( vt_ioctl( args->command, (unsigned long)args->buffer ) != 0 ) @@ -469,45 +469,45 @@ conSetAttr(int minor, const struct termios *t) { unsigned long baud, databits, parity, stopbits; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -516,7 +516,7 @@ conSetAttr(int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: @@ -542,7 +542,7 @@ conSetAttr(int minor, const struct termios *t) /* No parity */ parity = 0; } - + switch (t->c_cflag & CSIZE) { case CS5: databits = CHR_5_BITS; break; case CS6: databits = CHR_6_BITS; break; @@ -569,7 +569,7 @@ conSetAttr(int minor, const struct termios *t) * BSP initialization */ -BSP_output_char_function_type BSP_output_char = +BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) _IBMPC_outch; BSP_polling_getchar_function_type BSP_poll_char = BSP_wait_polled_input; diff --git a/c/src/lib/libbsp/i386/pc386/console/defkeymap.c b/c/src/lib/libbsp/i386/pc386/console/defkeymap.c index ce5e918fb5..a6bf5103a1 100644 --- a/c/src/lib/libbsp/i386/pc386/console/defkeymap.c +++ b/c/src/lib/libbsp/i386/pc386/console/defkeymap.c @@ -154,34 +154,34 @@ unsigned int keymap_count = 7; */ char func_buf[] = { - '\033', '[', '[', 'A', 0, - '\033', '[', '[', 'B', 0, - '\033', '[', '[', 'C', 0, - '\033', '[', '[', 'D', 0, - '\033', '[', '[', 'E', 0, - '\033', '[', '1', '7', '~', 0, - '\033', '[', '1', '8', '~', 0, - '\033', '[', '1', '9', '~', 0, - '\033', '[', '2', '0', '~', 0, - '\033', '[', '2', '1', '~', 0, - '\033', '[', '2', '3', '~', 0, - '\033', '[', '2', '4', '~', 0, - '\033', '[', '2', '5', '~', 0, - '\033', '[', '2', '6', '~', 0, - '\033', '[', '2', '8', '~', 0, - '\033', '[', '2', '9', '~', 0, - '\033', '[', '3', '1', '~', 0, - '\033', '[', '3', '2', '~', 0, - '\033', '[', '3', '3', '~', 0, - '\033', '[', '3', '4', '~', 0, - '\033', '[', '1', '~', 0, - '\033', '[', '2', '~', 0, - '\033', '[', '3', '~', 0, - '\033', '[', '4', '~', 0, - '\033', '[', '5', '~', 0, - '\033', '[', '6', '~', 0, - '\033', '[', 'M', 0, - '\033', '[', 'P', 0, + '\033', '[', '[', 'A', 0, + '\033', '[', '[', 'B', 0, + '\033', '[', '[', 'C', 0, + '\033', '[', '[', 'D', 0, + '\033', '[', '[', 'E', 0, + '\033', '[', '1', '7', '~', 0, + '\033', '[', '1', '8', '~', 0, + '\033', '[', '1', '9', '~', 0, + '\033', '[', '2', '0', '~', 0, + '\033', '[', '2', '1', '~', 0, + '\033', '[', '2', '3', '~', 0, + '\033', '[', '2', '4', '~', 0, + '\033', '[', '2', '5', '~', 0, + '\033', '[', '2', '6', '~', 0, + '\033', '[', '2', '8', '~', 0, + '\033', '[', '2', '9', '~', 0, + '\033', '[', '3', '1', '~', 0, + '\033', '[', '3', '2', '~', 0, + '\033', '[', '3', '3', '~', 0, + '\033', '[', '3', '4', '~', 0, + '\033', '[', '1', '~', 0, + '\033', '[', '2', '~', 0, + '\033', '[', '3', '~', 0, + '\033', '[', '4', '~', 0, + '\033', '[', '5', '~', 0, + '\033', '[', '6', '~', 0, + '\033', '[', 'M', 0, + '\033', '[', 'P', 0, }; char *funcbufptr = func_buf; diff --git a/c/src/lib/libbsp/i386/pc386/console/fb_vga.c b/c/src/lib/libbsp/i386/pc386/console/fb_vga.c index 29b840f728..8c678b8081 100644 --- a/c/src/lib/libbsp/i386/pc386/console/fb_vga.c +++ b/c/src/lib/libbsp/i386/pc386/console/fb_vga.c @@ -3,14 +3,47 @@ // $Header$ // // Copyright (c) 2000 - Rosimildo da Silva ( rdasilva@connecttel.com ) -// +// // MODULE DESCRIPTION: -// This module implements the micro FB driver for "Bare VGA". It uses the +// This module implements the micro FB driver for "Bare VGA". It uses the // routines for "bare hardware" that comes with MicroWindows. // // MODIFICATION/HISTORY: // // $Log$ +// Revision 1.1 2000/08/30 08:15:30 joel +// 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> +// +// * Major rework of the "/dev/console" driver. +// * Added termios support for stdin ( keyboard ). +// * Added ioctls() to support modes similar to Linux( XLATE, +// RAW, MEDIUMRAW ). +// * Added Keyboard mapping and handling of the keyboard's leds. +// * Added Micro FrameBuffer driver ( "/dev/fb0" ) for bare VGA +// controller ( 16 colors ). +// * Added PS/2 and Serial mouse support for PC386 BSP. +// * console/defkeymap.c: New file. +// * console/fb_vga.c: New file. +// * console/fb_vga.h: New file. +// * console/i386kbd.h: New file. +// * console/kd.h: New file. +// * console/keyboard.c: New file. +// * console/keyboard.h: New file. +// * console/mouse_parser.c: New file. +// * console/mouse_parser.h: New file. +// * console/pc_keyb.c: New file. +// * console/ps2_drv.h: New file. +// * console/ps2_mouse.c: New file. +// * console/ps2_mouse.h: New file. +// * console/serial_mouse.c: New file. +// * console/serial_mouse.h: New file. +// * console/vgainit.c: New file. +// * console/vt.c: New file. +// * console/Makefile.am: Reflect new files. +// * console/console.c, console/inch.c, console/outch.c: Console +// functionality modifications. +// * startup/Makefile.am: Pick up tty_drv.c and gdb_glue.c +// // ///////////////////////////////////////////////////////////////////////////// */ @@ -28,14 +61,14 @@ /* these routines are defined in the microwindows code. This driver is here more as an example of how to implement and - use the micro FB interface + use the micro FB interface */ extern void ega_hwinit( void ); extern void ega_hwterm( void ); /* screen information for the VGA driver */ -static struct fb_screeninfo fb_info = +static struct fb_screeninfo fb_info = { 640, 480, /* screen size x, y */ 4, /* bits per pixel */ @@ -109,7 +142,7 @@ fbvga_close(rtems_device_major_number major, return RTEMS_SUCCESSFUL; } - + /* * fbvga device driver READ entry point. * Read characters from the PS/2 mouse. @@ -124,7 +157,7 @@ fbvga_read( rtems_device_major_number major, rw_args->bytes_moved = 0; return RTEMS_SUCCESSFUL; } - + /* * fbvga device driver WRITE entry point. @@ -187,15 +220,15 @@ static int set_palette( struct fb_cmap *cmap ) * IOCTL entry point -- This method is called to carry * all services of this interface. */ -rtems_device_driver +rtems_device_driver fbvga_control( rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ rtems_libio_ioctl_args_t *args = arg; printk( "FBVGA ioctl called, cmd=%x\n", args->command ); - switch( args->command ) + switch( args->command ) { case FB_SCREENINFO: args->ioctl_return = get_screen_info( args->buffer ); @@ -208,7 +241,7 @@ fbvga_control( rtems_device_major_number major, break; /* this function would execute one of the routines of the - * interface based on the operation requested + * interface based on the operation requested */ case FB_EXEC_FUNCTION: { diff --git a/c/src/lib/libbsp/i386/pc386/console/fb_vga.h b/c/src/lib/libbsp/i386/pc386/console/fb_vga.h index 6587e7474d..643c892949 100644 --- a/c/src/lib/libbsp/i386/pc386/console/fb_vga.h +++ b/c/src/lib/libbsp/i386/pc386/console/fb_vga.h @@ -5,8 +5,8 @@ * $Header$ * * Copyright (c) 2000 -- Rosimildo da Silva. - * - * MODULE DESCRIPTION: + * + * MODULE DESCRIPTION: * Prototype routines for the fbvga driver. * * by: Rosimildo da Silva: @@ -16,6 +16,9 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.2 2004/04/15 13:26:12 ralf + * Remove stray white spaces. + * * Revision 1.1 2000/08/30 08:15:30 joel * 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> * diff --git a/c/src/lib/libbsp/i386/pc386/console/i386kbd.h b/c/src/lib/libbsp/i386/pc386/console/i386kbd.h index 5bd0365ae4..c3fe9463a6 100644 --- a/c/src/lib/libbsp/i386/pc386/console/i386kbd.h +++ b/c/src/lib/libbsp/i386/pc386/console/i386kbd.h @@ -183,6 +183,6 @@ extern unsigned char aux_device_present; but then the read function would need a lock etc - ick */ -#define mark_bh(x) +#define mark_bh(x) #endif /* _I386_KEYBOARD_H */ diff --git a/c/src/lib/libbsp/i386/pc386/console/inch.c b/c/src/lib/libbsp/i386/pc386/console/inch.c index 7997a6b246..264b0ae0a4 100644 --- a/c/src/lib/libbsp/i386/pc386/console/inch.c +++ b/c/src/lib/libbsp/i386/pc386/console/inch.c @@ -64,7 +64,7 @@ static char shift_map[] = '*',0x80,' ',0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, 0x80,0x80,0x80,0x80,'7','8','9',0x80,'4','5','6',0x80, '1','2','3','0',177 -}; /* Keyboard scancode -> character map with SHIFT key modifier. */ +}; /* Keyboard scancode -> character map with SHIFT key modifier. */ static unsigned short kbd_buffer[KBD_BUF_SIZE]; @@ -175,7 +175,7 @@ _IBMPC_scankey(char *outChar) break; case 0x53: - if (ctrl_pressed && alt_pressed) + if (ctrl_pressed && alt_pressed) rtemsReboot(); /* ctrl+alt+del -> reboot */ break; @@ -256,11 +256,11 @@ _IBMPC_inch(void) return c; } /* _IBMPC_inch */ - + /* * Routine that can be used before interrupt management is initialized. */ - + char BSP_wait_polled_input(void) { diff --git a/c/src/lib/libbsp/i386/pc386/console/kd.h b/c/src/lib/libbsp/i386/pc386/console/kd.h index 7833abfa9d..963c8cc935 100644 --- a/c/src/lib/libbsp/i386/pc386/console/kd.h +++ b/c/src/lib/libbsp/i386/pc386/console/kd.h @@ -5,11 +5,44 @@ // MODULE DESCRIPTION: // // This module was based on the Linux version kd.h -// +// // by: Rosimildo da Silva: rdasilva@connecttel.com // // MODIFICATION/HISTORY: // $Log$ +// Revision 1.1 2000/08/30 08:15:30 joel +// 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> +// +// * Major rework of the "/dev/console" driver. +// * Added termios support for stdin ( keyboard ). +// * Added ioctls() to support modes similar to Linux( XLATE, +// RAW, MEDIUMRAW ). +// * Added Keyboard mapping and handling of the keyboard's leds. +// * Added Micro FrameBuffer driver ( "/dev/fb0" ) for bare VGA +// controller ( 16 colors ). +// * Added PS/2 and Serial mouse support for PC386 BSP. +// * console/defkeymap.c: New file. +// * console/fb_vga.c: New file. +// * console/fb_vga.h: New file. +// * console/i386kbd.h: New file. +// * console/kd.h: New file. +// * console/keyboard.c: New file. +// * console/keyboard.h: New file. +// * console/mouse_parser.c: New file. +// * console/mouse_parser.h: New file. +// * console/pc_keyb.c: New file. +// * console/ps2_drv.h: New file. +// * console/ps2_mouse.c: New file. +// * console/ps2_mouse.h: New file. +// * console/serial_mouse.c: New file. +// * console/serial_mouse.h: New file. +// * console/vgainit.c: New file. +// * console/vt.c: New file. +// * console/Makefile.am: Reflect new files. +// * console/console.c, console/inch.c, console/outch.c: Console +// functionality modifications. +// * startup/Makefile.am: Pick up tty_drv.c and gdb_glue.c +// // ///////////////////////////////////////////////////////////////////////////// */ diff --git a/c/src/lib/libbsp/i386/pc386/console/keyboard.c b/c/src/lib/libbsp/i386/pc386/console/keyboard.c index bcae056b97..0be2ef4e15 100644 --- a/c/src/lib/libbsp/i386/pc386/console/keyboard.c +++ b/c/src/lib/libbsp/i386/pc386/console/keyboard.c @@ -14,7 +14,7 @@ * `Sticky' modifier keys, 951006. * * 11-11-96: SAK should now work in the raw mode (Martin Mares) - * + * * Modified to provide 'generic' keyboard support by Hamish Macdonald * Merge with the m68k keyboard driver and split-off of the PC low-level * parts by Geert Uytterhoeven, May 1997 @@ -24,7 +24,7 @@ * ------------------------------------------------------------------- * End of Linux - Copyright notes... * - * Ported to RTEMS to provide the basic fuctionality to the console driver. + * Ported to RTEMS to provide the basic fuctionality to the console driver. * by: Rosimildo da Silva: rdasilva@connecttel.com * */ @@ -110,9 +110,9 @@ static unsigned char k_down[NR_SHIFT] = {0, }; static unsigned long key_down[256/BITS_PER_LONG] = { 0, }; static int dead_key_next = 0; -/* +/* * In order to retrieve the shift_state (for the mouse server), either - * the variable must be global, or a new procedure must be created to + * the variable must be global, or a new procedure must be created to * return the value. I chose the former way. */ int shift_state = 0; diff --git a/c/src/lib/libbsp/i386/pc386/console/keyboard.h b/c/src/lib/libbsp/i386/pc386/console/keyboard.h index ab4c669b15..2946235039 100644 --- a/c/src/lib/libbsp/i386/pc386/console/keyboard.h +++ b/c/src/lib/libbsp/i386/pc386/console/keyboard.h @@ -5,11 +5,17 @@ // MODULE DESCRIPTION: // // This module was based on the Linux version keyboard.h + kbd_kern.h -// +// // by: Rosimildo da Silva: rdasilva@connecttel.com // // MODIFICATION/HISTORY: // $Log$ +// Revision 1.2 2000/08/30 17:06:23 joel +// 2000-08-30 Joel Sherrill <joel@OARcorp.com> +// +// * console/keyboard.h: Changed numerous routines from extern inline +// to static inline. +// // Revision 1.1 2000/08/30 08:15:30 joel // 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> // diff --git a/c/src/lib/libbsp/i386/pc386/console/mouse_parser.c b/c/src/lib/libbsp/i386/pc386/console/mouse_parser.c index bb49a3906a..308ace335f 100644 --- a/c/src/lib/libbsp/i386/pc386/console/mouse_parser.c +++ b/c/src/lib/libbsp/i386/pc386/console/mouse_parser.c @@ -5,7 +5,7 @@ * provided that this copyright notice remains intact. * * UNIX Serial Port Mouse Driver - * + * * This driver opens a serial port directly, and interprets serial data. * Microsoft, PC, Logitech and PS/2 mice are supported. * The PS/2 mouse is only supported if the OS runs the mouse @@ -148,7 +148,7 @@ int MOU_Data( int ch, COORD *dx, COORD *dy, COORD *dz, BUTTON *bptr) * When a complete state has been read, return the results, * leaving further bytes in the buffer for later calls. */ - if( (*parse)( ch ) ) + if( (*parse)( ch ) ) { *dx = xd; *dy = yd; @@ -268,7 +268,7 @@ static int ParsePS2(int byte) switch (state) { case IDLE: if (byte & PS2_CTRL_BYTE) { - buttons = byte & + buttons = byte & (PS2_LEFT_BUTTON|PS2_RIGHT_BUTTON); state = XSET; } @@ -372,7 +372,7 @@ static void kbd_parser( void *ptr, unsigned short keycode, unsigned long mods ) m.m.kbd.modifiers = kbd->ledflagstate; m.m.kbd.mode = kbd->kbdmode; /* printk( "kbd: msg: keycode=%X, mod=%X\n", keycode, mods ); */ - rtems_message_queue_send( queue_id, ( void * )&m, + rtems_message_queue_send( queue_id, ( void * )&m, sizeof( struct MW_UID_MESSAGE ) ); } diff --git a/c/src/lib/libbsp/i386/pc386/console/mouse_parser.h b/c/src/lib/libbsp/i386/pc386/console/mouse_parser.h index 0adc9be55a..40d491f2c4 100644 --- a/c/src/lib/libbsp/i386/pc386/console/mouse_parser.h +++ b/c/src/lib/libbsp/i386/pc386/console/mouse_parser.h @@ -8,9 +8,9 @@ extern "C" { #endif /* Use the same definitions as the user interface */ -#define RBUTTON MV_BUTTON_RIGHT -#define MBUTTON MV_BUTTON_CENTER -#define LBUTTON MV_BUTTON_LEFT +#define RBUTTON MV_BUTTON_RIGHT +#define MBUTTON MV_BUTTON_CENTER +#define LBUTTON MV_BUTTON_LEFT typedef int COORD; /* device coordinates*/ typedef unsigned int BUTTON; /* mouse button mask*/ diff --git a/c/src/lib/libbsp/i386/pc386/console/outch.c b/c/src/lib/libbsp/i386/pc386/console/outch.c index e32f361476..ae6cb6d288 100644 --- a/c/src/lib/libbsp/i386/pc386/console/outch.c +++ b/c/src/lib/libbsp/i386/pc386/console/outch.c @@ -37,12 +37,12 @@ static unsigned char column; static unsigned short attribute; static unsigned int nLines; -static void +static void scroll(void) { int i, j; /* Counters */ unsigned short *pt_scroll, *pt_bitmap; /* Pointers on the bit-map */ - + pt_bitmap = bitMapBaseAddr; j = 0; pt_bitmap = pt_bitmap + j; @@ -50,11 +50,11 @@ scroll(void) for (i = j; i < (maxRow - 1) * maxCol; i++) { *pt_bitmap++ = *pt_scroll++; } - + /* * Blank characters are displayed on the last line. - */ - for (i = 0; i < maxCol; i++) { + */ + for (i = 0; i < maxCol; i++) { *pt_bitmap++ = (short) (' ' | attribute); } } @@ -63,9 +63,9 @@ static void doCRNL(int cr, int nl) { if (nl) { - if (++row == maxRow) { + if (++row == maxRow) { scroll(); /* Scroll the screen now */ - row = maxRow - 1; + row = maxRow - 1; } nLines++; } @@ -102,7 +102,7 @@ gotorc(int r, int c) #define BLANK ((char)0x7f) -static void +static void videoPutChar(char car) { unsigned short *pt_bitmap = bitMapBaseAddr + row * maxCol + column; @@ -123,7 +123,7 @@ videoPutChar(char car) doCRNL(1,1); return; } - while (i--) *pt_bitmap++ = ' ' | attribute; + while (i--) *pt_bitmap++ = ' ' | attribute; wr_cursor(row * maxCol + column, ioCrtBaseAddr); return; } @@ -134,7 +134,7 @@ videoPutChar(char car) case 7: { /* Bell code must be inserted here */ return; } - case '\r' : { + case '\r' : { doCRNL(1,0); return; } @@ -149,7 +149,7 @@ videoPutChar(char car) return; } } -} +} /* trivial state machine to handle escape sequences: * @@ -161,9 +161,9 @@ videoPutChar(char car) * ^\ \ \ \ * KEY: | \other \ other \ other \ other * <------------------------------------- - * + * * in state '-1', the DCABHKJ cases are handled - * + * * (cursor motion and screen clearing) */ @@ -262,7 +262,7 @@ clear_screen(void) | Description: Higher level (console) interface to consPutc. | Global Variables: None. | Arguments: c - character to write to console. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void _IBMPC_outch(char c) @@ -280,7 +280,7 @@ static int escaped = 0; | Global Variables: bitMapBaseAddr, ioCrtBaseAddr, maxCol, maxRow, row | column, attribute, nLines; | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void _IBMPC_initVideo(void) @@ -301,7 +301,7 @@ _IBMPC_initVideo(void) attribute = ((BLACK << 4) | WHITE)<<8; nLines = 0; clear_screen(); -#ifdef DEBUG_EARLY_STAGE +#ifdef DEBUG_EARLY_STAGE printk("bitMapBaseAddr = %X, display controller base IO = %X\n", (unsigned) bitMapBaseAddr, (unsigned) ioCrtBaseAddr); diff --git a/c/src/lib/libbsp/i386/pc386/console/pc_keyb.c b/c/src/lib/libbsp/i386/pc386/console/pc_keyb.c index d9feaca1b4..074d84e38a 100644 --- a/c/src/lib/libbsp/i386/pc386/console/pc_keyb.c +++ b/c/src/lib/libbsp/i386/pc386/console/pc_keyb.c @@ -369,7 +369,7 @@ static unsigned char handle_kbd_event(void) } status = kbd_read_status(); - + if(!work--) { printk( "pc_keyb: controller jammed (0x%02X).\n", status); @@ -378,10 +378,10 @@ static unsigned char handle_kbd_event(void) return status; } - /* - * the commands to set the leds for some reason, returns 0x14, 0x16 + /* + * the commands to set the leds for some reason, returns 0x14, 0x16 * and I am intepreting as an ACK, because the original code from - * Linux was timeing out here... + * Linux was timeing out here... */ acknowledge = 1; reply_expected = 0; @@ -595,7 +595,7 @@ static char * initialize_kbd(void) kbd_wait_for_input(); } - + kbd_write_output_w(KBD_CMD_ENABLE); if (kbd_wait_for_input() != KBD_REPLY_ACK) return "Enable keyboard: no ACK"; diff --git a/c/src/lib/libbsp/i386/pc386/console/ps2_drv.h b/c/src/lib/libbsp/i386/pc386/console/ps2_drv.h index 0a035c1a67..bfa9c2a32a 100644 --- a/c/src/lib/libbsp/i386/pc386/console/ps2_drv.h +++ b/c/src/lib/libbsp/i386/pc386/console/ps2_drv.h @@ -5,7 +5,7 @@ * $Header$ * * Copyright (c) 1999 ConnectTel, Inc. All Rights Reserved. - * + * * MODULE DESCRIPTION: Prototype routines for the paux driver. * * by: Rosimildo da Silva: @@ -15,6 +15,9 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.2 2004/04/15 13:26:12 ralf + * Remove stray white spaces. + * * Revision 1.1 2000/08/30 08:15:30 joel * 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> * diff --git a/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.c b/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.c index 8f24e1a706..5149822229 100644 --- a/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.c +++ b/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.c @@ -82,7 +82,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -126,7 +126,7 @@ static void kb_wait(void) if (! (status & KBD_STAT_IBF)) return; - mdelay(1); + mdelay(1); timeout--; } while (timeout); @@ -463,11 +463,11 @@ size_t read_aux(char * buffer, size_t count ) size_t i = count; unsigned char c; - if (queue_empty()) + if (queue_empty()) { return 0; } - while (i > 0 && !queue_empty()) + while (i > 0 && !queue_empty()) { c = get_from_queue(); *buffer++ = c; @@ -591,7 +591,7 @@ static int paux_last_close(int major, int minor, void *arg) * It does nothing write now. */ static int write_aux_echo( int minor, const char * buffer, int count ) -{ +{ return 0; } @@ -617,7 +617,7 @@ paux_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ paux_last_close, /* lastClose */ @@ -645,7 +645,7 @@ paux_close(rtems_device_major_number major, return (rtems_termios_close (arg)); } - + /* * paux device driver READ entry point. * Read characters from the PS/2 mouse. @@ -657,7 +657,7 @@ paux_read(rtems_device_major_number major, { return rtems_termios_read (arg); } /* tty_read */ - + /* * paux device driver WRITE entry point. @@ -675,18 +675,18 @@ paux_write(rtems_device_major_number major, return RTEMS_SUCCESSFUL; } /* tty_write */ - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver paux_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ rtems_libio_ioctl_args_t *args = arg; - switch( args->command ) + switch( args->command ) { default: return rtems_termios_ioctl (arg); diff --git a/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.h b/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.h index 1236e8cff2..4a3d083f1c 100644 --- a/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.h +++ b/c/src/lib/libbsp/i386/pc386/console/ps2_mouse.h @@ -6,7 +6,7 @@ * RTEMS port: by Rosimildo da Silva. * * This module was ported from Linux. - * + * */ /* diff --git a/c/src/lib/libbsp/i386/pc386/console/serial_mouse.c b/c/src/lib/libbsp/i386/pc386/console/serial_mouse.c index 184911c58f..b34d13b41c 100644 --- a/c/src/lib/libbsp/i386/pc386/console/serial_mouse.c +++ b/c/src/lib/libbsp/i386/pc386/console/serial_mouse.c @@ -7,7 +7,7 @@ * as /dev/ttyS1 for COM1 and /dev/ttyS2 as COM2. If one of the ports * is used as the console, this driver would fail to initialize. * - * This code was based on the console driver. It is based on the + * This code was based on the console driver. It is based on the * current termios framework. This is just a shell around the * termios support. * @@ -18,6 +18,12 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.5 2000/12/05 16:37:38 joel + * 2000-12-01 Joel Sherrill <joel@OARcorp.com> + * + * * pc386/console/console.c, pc386/console/serial_mouse.c, + * pc386/console/vgainit.c, shared/comm/tty_drv.c: Remove warnings. + * * Revision 1.4 2000/10/23 14:10:25 joel * 2000-10-23 Joel Sherrill <joel@OARcorp.com> * @@ -80,8 +86,8 @@ extern int BSPConsolePort; /* * Interrupt structure for serial_mouse */ -static rtems_irq_connect_data serial_mouse_isr_data = -{ +static rtems_irq_connect_data serial_mouse_isr_data = +{ BSP_UART_IRQ, BSP_ISR_FUNC, isr_on, @@ -92,7 +98,7 @@ static void isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { return; @@ -131,7 +137,7 @@ serial_mouse_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize(); - + /* * Do device-specific initialization */ @@ -172,7 +178,7 @@ serial_mouse_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ serial_mouse_last_close, /* lastClose */ @@ -194,7 +200,7 @@ serial_mouse_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set( BSP_UART_PORT, + BSP_uart_termios_set( BSP_UART_PORT, ((rtems_libio_open_close_args_t *)arg)->iop->data1 ); /* Enable interrupts on channel */ BSP_uart_intr_ctrl( BSP_UART_PORT, BSP_UART_INTR_CTRL_TERMIOS); @@ -211,10 +217,10 @@ serial_mouse_close(rtems_device_major_number major, { return (rtems_termios_close (arg)); - + } /* tty_close */ - + /* * TTY device driver READ entry point. * Read characters from the tty device. @@ -226,7 +232,7 @@ serial_mouse_read(rtems_device_major_number major, { return rtems_termios_read (arg); } /* tty_read */ - + /* * TTY device driver WRITE entry point. @@ -238,7 +244,7 @@ serial_mouse_write(rtems_device_major_number major, void * arg) { return rtems_termios_write (arg); - + } /* tty_write */ /* @@ -246,9 +252,9 @@ serial_mouse_write(rtems_device_major_number major, * routine to handle both devices. */ static rtems_device_driver serial_mouse_control_internal( int port, void *arg ) -{ +{ rtems_libio_ioctl_args_t *args = arg; - switch( args->command ) + switch( args->command ) { default: return rtems_termios_ioctl (arg); @@ -271,12 +277,12 @@ static rtems_device_driver serial_mouse_control_internal( int port, void *arg ) /* * Handle ioctl request for ttyS1. */ -rtems_device_driver +rtems_device_driver serial_mouse_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return serial_mouse_control_internal( BSP_UART_PORT, arg ); } @@ -287,45 +293,45 @@ conSetAttr(int port, int minor, const struct termios *t) { unsigned long baud, databits, parity, stopbits; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -334,7 +340,7 @@ conSetAttr(int port, int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: @@ -360,7 +366,7 @@ conSetAttr(int port, int minor, const struct termios *t) /* No parity */ parity = 0; } - + switch (t->c_cflag & CSIZE) { case CS5: databits = CHR_5_BITS; break; case CS6: databits = CHR_6_BITS; break; diff --git a/c/src/lib/libbsp/i386/pc386/console/serial_mouse.h b/c/src/lib/libbsp/i386/pc386/console/serial_mouse.h index ded9b469f5..2a7385d453 100644 --- a/c/src/lib/libbsp/i386/pc386/console/serial_mouse.h +++ b/c/src/lib/libbsp/i386/pc386/console/serial_mouse.h @@ -5,7 +5,7 @@ * $Header$ * * Copyright (c) 1999 ConnectTel, Inc. All Rights Reserved. - * + * * MODULE DESCRIPTION: Prototype routines for the /dev/mouse driver. * * by: Rosimildo da Silva: @@ -15,6 +15,9 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.2 2004/04/15 13:26:12 ralf + * Remove stray white spaces. + * * Revision 1.1 2000/08/30 08:15:30 joel * 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> * @@ -98,7 +101,7 @@ rtems_device_driver serial_mouse_write( /* Select the mouse type: "ms","pc","ps2" */ -#define MOUSE_TYPE "ms" +#define MOUSE_TYPE "ms" /* Select the serial port for the serial mouse driver */ #define SERIAL_MOUSE_COM1 1 diff --git a/c/src/lib/libbsp/i386/pc386/console/videoAsm.S b/c/src/lib/libbsp/i386/pc386/console/videoAsm.S index 6c9b56e4af..e78b100c1c 100644 --- a/c/src/lib/libbsp/i386/pc386/console/videoAsm.S +++ b/c/src/lib/libbsp/i386/pc386/console/videoAsm.S @@ -1,7 +1,7 @@ /* * videoAsm.S - This file contains code for displaying cursor on the console * - * Copyright (C) 1998 valette@crf.canon.fr + * Copyright (C) 1998 valette@crf.canon.fr * * This code is free software; you can redistribute it and/or * modify it under the terms of the GNU Library General Public diff --git a/c/src/lib/libbsp/i386/pc386/console/vt.c b/c/src/lib/libbsp/i386/pc386/console/vt.c index 0f38106332..631a7d532f 100644 --- a/c/src/lib/libbsp/i386/pc386/console/vt.c +++ b/c/src/lib/libbsp/i386/pc386/console/vt.c @@ -73,7 +73,7 @@ _kd_mksound(unsigned int hz, unsigned int ticks) if (hz > 20 && hz < 32767) count = 1193180 / hz; - + _CPU_ISR_Disable(level); /* del_timer(&sound_timer); */ if (count) { @@ -121,7 +121,7 @@ do_kdsk_ioctl(int cmd, struct kbentry *user_kbe, int perm, struct kbd_struct *kb tmp = *user_kbe; if (i >= NR_KEYS || s >= MAX_NR_KEYMAPS) - return -EINVAL; + return -EINVAL; switch (cmd) { case KDGKBENT: @@ -147,7 +147,7 @@ do_kdsk_ioctl(int cmd, struct kbentry *user_kbe, int perm, struct kbd_struct *kb #define HZ 100 -static inline int +static inline int do_kbkeycode_ioctl(int cmd, struct kbkeycode *user_kbkc, int perm) { struct kbkeycode tmp; @@ -177,7 +177,7 @@ do_kdgkb_ioctl(int cmd, struct kbsentry *user_kdgkb, int perm) /* * We handle the console-specific ioctl's here. We allow the - * capability to modify any console, not just the fg_console. + * capability to modify any console, not just the fg_console. */ int vt_ioctl( unsigned int cmd, unsigned long arg) { @@ -207,7 +207,7 @@ int vt_ioctl( unsigned int cmd, unsigned long arg) return -EPERM; { unsigned int ticks, count; - + /* * Generate the tone for the appropriate number of ticks. * If the time is zero, turn off sound ourselves. diff --git a/c/src/lib/libbsp/i386/pc386/ide/ide.c b/c/src/lib/libbsp/i386/pc386/ide/ide.c index 29f1f8a349..482fabd0eb 100644 --- a/c/src/lib/libbsp/i386/pc386/ide/ide.c +++ b/c/src/lib/libbsp/i386/pc386/ide/ide.c @@ -30,8 +30,8 @@ #include <libchip/ide_ctrl_io.h> /* #define DEBUG_OUT */ -/* - * support functions for IDE harddisk IF +/* + * support functions for IDE harddisk IF */ /*=========================================================================*\ | Function: | @@ -52,7 +52,7 @@ boolean pc386_ide_probe \*=========================================================================*/ { boolean ide_card_plugged = TRUE; /* assume: we have a disk here */ - + return ide_card_plugged; } @@ -160,9 +160,9 @@ void pc386_ide_read_block +---------------------------------------------------------------------------+ | Input Parameters: | \*-------------------------------------------------------------------------*/ - int minor, - uint16_t block_size, - blkdev_sg_buffer *bufs, + int minor, + uint16_t block_size, + blkdev_sg_buffer *bufs, uint32_t *cbuf, uint32_t *pos ) @@ -179,7 +179,7 @@ void pc386_ide_read_block ((uint8_t*)(bufs[(*cbuf)].buffer) + (*pos)); inport_byte(port+IDE_REGISTER_STATUS,status_val); - while ((status_val & IDE_REGISTER_STATUS_DRQ) && + while ((status_val & IDE_REGISTER_STATUS_DRQ) && (cnt < block_size)) { inport_word(port+IDE_REGISTER_DATA,*lbuf); @@ -187,7 +187,7 @@ void pc386_ide_read_block printk("0x%x ",*lbuf); #endif lbuf++; - cnt += sizeof(*lbuf); + cnt += sizeof(*lbuf); (*pos) += sizeof(*lbuf); if ((*pos) == llength) { (*pos) = 0; @@ -196,7 +196,7 @@ void pc386_ide_read_block llength = bufs[(*cbuf)].length; } inport_byte(port+IDE_REGISTER_STATUS,status_val); - } + } #ifdef DEBUG_OUT printk("pc386_ide_read_block()\r\n"); #endif @@ -213,9 +213,9 @@ void pc386_ide_write_block +---------------------------------------------------------------------------+ | Input Parameters: | \*-------------------------------------------------------------------------*/ - int minor, - uint16_t block_size, - blkdev_sg_buffer *bufs, + int minor, + uint16_t block_size, + blkdev_sg_buffer *bufs, uint32_t *cbuf, uint32_t *pos ) @@ -230,19 +230,19 @@ void pc386_ide_write_block uint8_t status_val; uint16_t *lbuf = (uint16_t*) ((uint8_t*)(bufs[(*cbuf)].buffer) + (*pos)); - + #ifdef DEBUG_OUT printk("pc386_ide_write_block()\r\n"); #endif inport_byte(port+IDE_REGISTER_STATUS,status_val); - while ((status_val & IDE_REGISTER_STATUS_DRQ) && + while ((status_val & IDE_REGISTER_STATUS_DRQ) && (cnt < block_size)) { #ifdef DEBUG_OUT printk("0x%x ",*lbuf); #endif outport_word(port+IDE_REGISTER_DATA,*lbuf); lbuf++; - cnt += sizeof(*lbuf); + cnt += sizeof(*lbuf); (*pos) += sizeof(*lbuf); if ((*pos) == llength) { (*pos) = 0; @@ -300,7 +300,7 @@ rtems_status_code pc386_ide_config_io_speed } /* - * The following table configures the functions used for IDE drivers + * The following table configures the functions used for IDE drivers * in this BSP. */ diff --git a/c/src/lib/libbsp/i386/pc386/ide/idecfg.c b/c/src/lib/libbsp/i386/pc386/ide/idecfg.c index d254bb5827..b84855a7b8 100644 --- a/c/src/lib/libbsp/i386/pc386/ide/idecfg.c +++ b/c/src/lib/libbsp/i386/pc386/ide/idecfg.c @@ -25,7 +25,7 @@ /* - * The following table configures the functions used for IDE drivers + * The following table configures the functions used for IDE drivers * in this BSP. */ @@ -48,5 +48,5 @@ ide_controller_bsp_table_t IDE_Controller_Table[] = { }; /* Number of rows in IDE_Controller_Table */ -unsigned long IDE_Controller_Count = +unsigned long IDE_Controller_Count = sizeof(IDE_Controller_Table)/sizeof(IDE_Controller_Table[0]); diff --git a/c/src/lib/libbsp/i386/pc386/include/bsp.h b/c/src/lib/libbsp/i386/pc386/include/bsp.h index e9edef177a..ef5d43ea84 100644 --- a/c/src/lib/libbsp/i386/pc386/include/bsp.h +++ b/c/src/lib/libbsp/i386/pc386/include/bsp.h @@ -54,7 +54,7 @@ extern "C" { #include <rtems/clockdrv.h> #include <libcpu/cpu.h> #include <rtems/bspIo.h> - + /* * confdefs.h overrides for this BSP: * - number of termios serial ports @@ -104,8 +104,8 @@ extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int); | Video (console) related constants. +--------------------------------------------------------------------------*/ -#include <crt.h> - +#include <crt.h> + /*-------------------------------------------------------------------------+ | Constants relating to the 8254 (or 8253) programmable interval timers. +--------------------------------------------------------------------------*/ @@ -192,7 +192,7 @@ extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int); extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE]; extern segment_descriptors Global_descriptor_table [GDT_SIZE]; - + extern rtems_configuration_table BSP_Configuration; /* User provided BSP configuration table. */ extern uint32_t rtemsFreeMemStart; @@ -204,8 +204,8 @@ extern uint32_t rtemsFreeMemStart; +--------------------------------------------------------------------------*/ void _IBMPC_initVideo(void); /* from 'outch.c' */ void _IBMPC_outch (char); /* from 'outch.c' */ -char _IBMPC_inch (void); /* from 'inch.c' */ -char _IBMPC_inch_sleep (void); /* from 'inch.c' */ +char _IBMPC_inch (void); /* from 'inch.c' */ +char _IBMPC_inch_sleep (void); /* from 'inch.c' */ void rtemsReboot(void); /* from 'exit.c' */ diff --git a/c/src/lib/libbsp/i386/pc386/include/crt.h b/c/src/lib/libbsp/i386/pc386/include/crt.h index 526fcbe62a..c750777cfb 100644 --- a/c/src/lib/libbsp/i386/pc386/include/crt.h +++ b/c/src/lib/libbsp/i386/pc386/include/crt.h @@ -21,7 +21,7 @@ */ /* In monochrome */ -#define V_MONO 0xb0000 +#define V_MONO 0xb0000 /* In color */ #define V_COLOR 0xb8000 @@ -73,7 +73,7 @@ #define ON 1 -/* +/* * CRT Controller register offset definitions */ diff --git a/c/src/lib/libbsp/i386/pc386/include/wd80x3.h b/c/src/lib/libbsp/i386/pc386/include/wd80x3.h index 282faabdd1..5f7a1fa970 100644 --- a/c/src/lib/libbsp/i386/pc386/include/wd80x3.h +++ b/c/src/lib/libbsp/i386/pc386/include/wd80x3.h @@ -17,7 +17,7 @@ /* page 0 read or read/write registers */ -#define CMDR 0x00+RO +#define CMDR 0x00+RO #define CLDA0 0x01+RO /* current local dma addr 0 for read */ #define CLDA1 0x02+RO /* current local dma addr 1 for read */ #define BNRY 0x03+RO /* boundary reg for rd and wr */ @@ -63,7 +63,7 @@ /*-----CMDR command bits-----*/ #define MSK_STP 0x01 /* stop the chip */ -#define MSK_STA 0x02 /* start the chip */ +#define MSK_STA 0x02 /* start the chip */ #define MSK_TXP 0x04 /* initial txing of a frm */ #define MSK_RRE 0x08 /* remote read */ #define MSK_RWR 0x10 /* remote write */ diff --git a/c/src/lib/libbsp/i386/pc386/start/start.S b/c/src/lib/libbsp/i386/pc386/start/start.S index 135ae90496..bef9448bc8 100644 --- a/c/src/lib/libbsp/i386/pc386/start/start.S +++ b/c/src/lib/libbsp/i386/pc386/start/start.S @@ -25,7 +25,7 @@ | | ************************************************************************** | * COPYRIGHT (c) 1989-1999. -| * On-Line Applications Research Corporation (OAR). +| * On-Line Applications Research Corporation (OAR). | * | * The license and distribution terms for this file may be | * found in the file LICENSE in this distribution or at @@ -44,7 +44,7 @@ #include <rtems/asm.h> /*----------------------------------------------------------------------------+ -| Size of heap and stack: +| Size of heap and stack: +----------------------------------------------------------------------------*/ .set STACK_SIZE, 0x1000 @@ -63,7 +63,7 @@ BEGIN_CODE EXTERN (_IBMPC_initVideo) EXTERN (debugPollingGetChar) EXTERN (checkCPUtypeSetCr0) - + /* * In case this crashes on your machine and this is not due @@ -75,7 +75,7 @@ BEGIN_CODE SYM (start): /* * When things are really, REALLY!, bad -- turn on the speaker and - * lock up. This shows whether or not we make it to a certain + * lock up. This shows whether or not we make it to a certain * location. */ #if 0 @@ -91,7 +91,7 @@ speakl: jmp speakl # and SPIN!!! #ifdef DEBUG_EARLY_START /* * Must get video attribute to have a working printk. - * Note that the following code assume we already have + * Note that the following code assume we already have * valid segments and a stack. It should be true for * any loader starting RTEMS in protected mode (or * at least I hope so : -)). @@ -105,13 +105,13 @@ speakl: jmp speakl # and SPIN!!! addl $4, esp /* call debugPollingGetChar */ - -#endif + +#endif /*----------------------------------------------------------------------------+ | Load the segment registers (this is done by the board's BSP) and perform any | other board specific initialization procedures, this piece of code -| does not know anything about +| does not know anything about | | NOTE: Upon return, gs will contain the segment descriptor for a segment which | maps directly to all of physical memory. @@ -153,12 +153,12 @@ SYM (zero_bss): | So from now we can use printk +-------------------------------------------------------------------*/ call _IBMPC_initVideo - + /*---------------------------------------------------------------------+ | Check CPU type. Enable Cache and init coprocessor if needed. +---------------------------------------------------------------------*/ call checkCPUtypeSetCr0 - + /*---------------------------------------------------------------------+ | Transfer control to User's Board Support Package +---------------------------------------------------------------------*/ diff --git a/c/src/lib/libbsp/i386/pc386/start/start16.S b/c/src/lib/libbsp/i386/pc386/start/start16.S index 6b53b6e19d..cfc2b92771 100644 --- a/c/src/lib/libbsp/i386/pc386/start/start16.S +++ b/c/src/lib/libbsp/i386/pc386/start/start16.S @@ -53,10 +53,10 @@ _start16: movw %ax, %ss # #if defined(RTEMS_VIDEO_80x50) - + movl $0x0040,%eax # use 32 bit constant to ensure 16 MSB=0 mov %ax,%es - movw %es:0x4a, %ax # get 16 bit number of columns + movw %es:0x4a, %ax # get 16 bit number of columns cmpw $0, %ax # or 0 if no video adapter je 1f # if no video, skip touching it /*---------------------------------------------------------------------+ @@ -87,12 +87,12 @@ _start16: movl %cr0, %eax orl $CR0_PE, %eax movl %eax, %cr0 # turn on protected mode - + #ifdef NEW_GAS ljmpl $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs #else ljmp $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs -#endif +#endif .code32 1: /*---------------------------------------------------------------------+ @@ -127,10 +127,10 @@ _start16: /*----------------------------------------------------------------------------+ | pc386_delay +------------------------------------------------------------------------------ -| Delay is needed after doing I/O. +| Delay is needed after doing I/O. | | The outb version is OK on most machines BUT the loop version ... -| +| | will delay for 1us on 1Gz machine, it will take a little bit | longer on slower machines, however, it does not matter because we | are going to call this function only a few times @@ -180,7 +180,7 @@ no_output: test $0x02, %al # is input buffer full? jnz empty_8042 # yes - loop ret - + /*----------------------------------------------------------------------------+ | DATA section +----------------------------------------------------------------------------*/ diff --git a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c index 3535f2b735..56a4e3ad60 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c +++ b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | This file contains the PC386 BSP startup package. It includes application, | board, and monitor specific initialization and configuration. The generic CPU -| dependent initialization has been performed before this routine is invoked. +| dependent initialization has been performed before this routine is invoked. +--------------------------------------------------------------------------+ | (C) Copyright 1997 - | - NavIST Group - Real-Time Distributed Systems and Industrial Automation @@ -40,11 +40,11 @@ | Global Variables +--------------------------------------------------------------------------*/ extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */ -/* - * Size of heap if it is 0 it will be dynamically defined by memory size, - * otherwise the value should be changed by binary patch +/* + * Size of heap if it is 0 it will be dynamically defined by memory size, + * otherwise the value should be changed by binary patch */ -uint32_t _heap_size = 0; +uint32_t _heap_size = 0; /* Size of stack used during initialization. Defined in 'start.s'. */ extern uint32_t _stack_size; @@ -77,20 +77,20 @@ void bsp_postdriver_hook(void); | since drivers are not yet initialized. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_pretasking_hook(void) { uint32_t topAddr, val; int i; - - + + if (rtemsFreeMemStart & (CPU_ALIGNMENT - 1)) /* not aligned => align it */ rtemsFreeMemStart = (rtemsFreeMemStart+CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); if(_heap_size == 0) { - /* + /* * We have to dynamically size memory. Memory size can be anything * between 2M and 2048M. * let us first write @@ -110,12 +110,12 @@ void bsp_pretasking_hook(void) break; } } - + topAddr = (i-1)*1024*1024 - 4; _heap_size = topAddr - rtemsFreeMemStart; } - + bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0); rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */ @@ -126,19 +126,19 @@ void bsp_pretasking_hook(void) #endif /* RTEMS_DEBUG */ } /* bsp_pretasking_hook */ - + /*-------------------------------------------------------------------------+ | Function: bsp_start | Description: Called before main is invoked. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_start_default( void ) { void Calibrate_loop_1ms(void); - + /* * Calibrate variable for 1ms-loop (see timer.c) */ diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S index 1ca9b1b415..f9279c292b 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S +++ b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @@ -41,7 +41,7 @@ | CODE section +----------------------------------------------------------------------------*/ EXTERN (rtems_i8259_masks) - + BEGIN_CODE EXTERN (_establish_stack) @@ -51,17 +51,17 @@ BEGIN_CODE /*----------------------------------------------------------------------------+ | pc386_delay +------------------------------------------------------------------------------ -| Delay is needed after doing I/O. +| Delay is needed after doing I/O. | | The outb version is OK on most machines BUT the loop version ... -| +| | will delay for 1us on 1Gz machine, it will take a little bit | longer on slower machines, however, it does not matter because we | are going to call this function only a few times +----------------------------------------------------------------------------*/ #define DELAY_USE_OUTB - + .p2align 4 .globl _pc386_delay .globl pc386_delay @@ -88,10 +88,10 @@ pc386_delay1: | with apropriate values + reprogram PIC. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ .p2align 4 - + PUBLIC (_load_segments) SYM (_load_segments): @@ -101,7 +101,7 @@ SYM (_load_segments): /* Load CS, flush prefetched queue */ ljmp $0x8, $next_step -next_step: +next_step: /* Load segment registers */ movw $0x10, ax movw ax, ss @@ -125,27 +125,27 @@ next_step: call SYM(pc386_delay) outb al, $0xA0 /* and to 8259A-2 */ call SYM(pc386_delay) - + movb $0x20, al /* start of hardware int's (0x20) */ outb al, $0x21 call SYM(pc386_delay) movb $0x28, al /* start of hardware int's 2 (0x28) */ outb al, $0xA1 call SYM(pc386_delay) - + movb $0x04, al /* 8259-1 is master */ outb al, $0x21 call SYM(pc386_delay) movb $0x02, al /* 8259-2 is slave */ outb al, $0xA1 call SYM(pc386_delay) - + movb $0x01, al /* 8086 mode for both */ outb al, $0x21 call SYM(pc386_delay) outb al, $0xA1 call SYM(pc386_delay) - + movb $0xFF, al /* mask off all interrupts for now */ outb al, $0xA1 call SYM(pc386_delay) @@ -154,7 +154,7 @@ next_step: call SYM(pc386_delay) movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ - + jmp SYM (_establish_stack) # return to the bsp entry code /*-------------------------------------------------------------------------+ @@ -162,11 +162,11 @@ next_step: | Description: Return to board's monitor (we have none so simply restart). | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ .p2align 4 - + PUBLIC (_return_to_monitor) SYM (_return_to_monitor): @@ -179,21 +179,21 @@ SYM (_return_to_monitor): | Description: default interrupt handler | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ .p2align 4 - + /*---------------------------------------------------------------------------+ | GDT itself +--------------------------------------------------------------------------*/ .p2align 4 - + PUBLIC (_Global_descriptor_table) SYM (_Global_descriptor_table): /* NULL segment */ - .word 0, 0 + .word 0, 0 .byte 0, 0, 0, 0 /* code segment */ @@ -203,13 +203,13 @@ SYM (_Global_descriptor_table): /* data segment */ .word 0xffff, 0 .byte 0, 0x92, 0xcf, 0 - + /*---------------------------------------------------------------------------+ | Descriptor of GDT +--------------------------------------------------------------------------*/ SYM (gdtdesc): - .word (3*8 - 1) + .word (3*8 - 1) .long SYM (_Global_descriptor_table) @@ -218,23 +218,23 @@ SYM (gdtdesc): +---------------------------------------------------------------------------*/ BEGIN_DATA .p2align 4 - + PUBLIC(Interrupt_descriptor_table) SYM(Interrupt_descriptor_table): .rept 256 .word 0,0,0,0 .endr END_DATA - + /*---------------------------------------------------------------------------+ | Descriptor of IDT +--------------------------------------------------------------------------*/ BEGIN_CODE .p2align 4 -SYM(idtdesc): +SYM(idtdesc): .word (256*8 - 1) .long SYM (Interrupt_descriptor_table) - + END_CODE .section .m_hdr diff --git a/c/src/lib/libbsp/i386/pc386/timer/timer.c b/c/src/lib/libbsp/i386/pc386/timer/timer.c index db152cffac..3024ac70c7 100644 --- a/c/src/lib/libbsp/i386/pc386/timer/timer.c +++ b/c/src/lib/libbsp/i386/pc386/timer/timer.c @@ -79,7 +79,7 @@ extern void timerisr(void); | Description: Read the value of PENTIUM on-chip cycle counter. | Global Variables: None. | Arguments: None. -| Returns: Value of PENTIUM on-chip cycle counter. +| Returns: Value of PENTIUM on-chip cycle counter. +--------------------------------------------------------------------------*/ static inline unsigned long long rdtsc(void) @@ -97,7 +97,7 @@ rdtsc(void) | not really necessary, since there will be a reset at exit. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Timer_exit(void) @@ -110,7 +110,7 @@ Timer_exit(void) | Description: Timer initialization routine. | Global Variables: Ttimer_val. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Timer_initialize(void) @@ -132,9 +132,9 @@ Timer_initialize(void) | Description: Read hardware timer value. | Global Variables: Ttimer_val, Timer_driver_Find_average_overhead. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ -uint32_t +uint32_t Read_timer(void) { register uint32_t total; @@ -163,7 +163,7 @@ Read_timer(void) | not really necessary, since there will be a reset at exit. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static void timerOff(const rtems_raw_irq_connect_data* used) @@ -179,7 +179,7 @@ timerOff(const rtems_raw_irq_connect_data* used) } /* Timer_exit */ -static void +static void timerOn(const rtems_raw_irq_connect_data* used) { /* load timer for US_PER_ISR microsecond period */ @@ -192,7 +192,7 @@ timerOn(const rtems_raw_irq_connect_data* used) BSP_irq_enable_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); } -static int +static int timerIsOn(const rtems_raw_irq_connect_data *used) { return BSP_irq_enabled_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE);} @@ -211,7 +211,7 @@ static rtems_raw_irq_connect_data timer_raw_irq_data = { | not really necessary, since there will be a reset at exit. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Timer_exit(void) @@ -224,7 +224,7 @@ Timer_exit(void) | Description: Timer initialization routine. | Global Variables: Ttimer_val. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Timer_initialize(void) @@ -254,9 +254,9 @@ Timer_initialize(void) | Description: Read hardware timer value. | Global Variables: Ttimer_val, Timer_driver_Find_average_overhead. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ -uint32_t +uint32_t Read_timer(void) { register uint32_t total, clicks; @@ -284,20 +284,20 @@ Read_timer(void) | Description: Empty function used in time tests. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ rtems_status_code Empty_function(void) { return RTEMS_SUCCESSFUL; } /* Empty function */ - + /*-------------------------------------------------------------------------+ | Function: Set_find_average_overhead | Description: Set internal Timer_driver_Find_average_overhead flag value. | Global Variables: Timer_driver_Find_average_overhead. | Arguments: find_flag - new value of the flag. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Set_find_average_overhead(rtems_boolean find_flag) @@ -321,9 +321,9 @@ void loadTimerValue( unsigned short loadedValue ) /*-------------------------------------------------------------------------+ -| Description: Reads the current value of the timer, and converts the -| number of ticks to micro-seconds. -| Returns: number of clock bits elapsed since last load. +| Description: Reads the current value of the timer, and converts the +| number of ticks to micro-seconds. +| Returns: number of clock bits elapsed since last load. +--------------------------------------------------------------------------*/ unsigned int readTimer0() { @@ -338,7 +338,7 @@ unsigned int readTimer0() count = ( msb << 8 ) | lsb ; if (status & RB_OUTPUT ) count += lastLoadedValue; - + return (2*lastLoadedValue - count); } @@ -372,19 +372,19 @@ Calibrate_loop_1ms(void) unsigned int targetClockBits, currentClockBits; unsigned int slowLoopGranularity, fastLoopGranularity; rtems_interrupt_level level; - + #ifdef DEBUG_CALIBRATE printk( "Calibrate_loop_1ms is starting, please wait ( but not too loooong. )\n" ); -#endif +#endif targetClockBits = US_TO_TICK(1000); - + rtems_interrupt_disable(level); /* * Fill up the cache to get a correct offset */ Timer0Reset(); readTimer0(); - /* + /* * Compute the minimal offset to apply due to read counter register. */ offset = 0xffffffff; @@ -437,24 +437,24 @@ Calibrate_loop_1ms(void) while (1); } slowLoopGranularity = (res - offset - emptyCall)/ 10; - + if (slowLoopGranularity == 0) { printk("Problem #3 in Calibrate_loop_1ms in file libbsp/i386/pc386/timer/timer.c\n"); while (1); } targetClockBits += offset; -#ifdef DEBUG_CALIBRATE +#ifdef DEBUG_CALIBRATE printk("offset = %u, emptyCall = %u, targetClockBits = %u\n", offset, emptyCall, targetClockBits); printk("slowLoopGranularity = %u fastLoopGranularity = %u\n", slowLoopGranularity, fastLoopGranularity); -#endif +#endif slowLoop1ms = (targetClockBits - emptyCall) / slowLoopGranularity; if (slowLoop1ms != 0) { fastLoop1ms = targetClockBits % slowLoopGranularity; if (fastLoop1ms > emptyCall) fastLoop1ms -= emptyCall; - } + } else fastLoop1ms = targetClockBits - emptyCall / fastLoopGranularity; @@ -462,7 +462,7 @@ Calibrate_loop_1ms(void) /* * calibrate slow loop */ - + while(1) { int previousSign = 0; /* 0 = unset, 1 = incrementing, 2 = decrementing */ @@ -497,7 +497,7 @@ Calibrate_loop_1ms(void) /* * calibrate fast loop */ - + if (fastLoopGranularity != 0 ) { while(1) { int previousSign = 0; /* 0 = unset, 1 = incrementing, 2 = decrementing */ @@ -525,11 +525,11 @@ Calibrate_loop_1ms(void) } } } -#ifdef DEBUG_CALIBRATE +#ifdef DEBUG_CALIBRATE printk("slowLoop1ms = %u, fastLoop1ms = %u\n", slowLoop1ms, fastLoop1ms); -#endif +#endif rtems_interrupt_enable(level); - + } /*-------------------------------------------------------------------------+ @@ -537,7 +537,7 @@ Calibrate_loop_1ms(void) | Description: loop which waits at least timeToWait ms | Global Variables: loop1ms | Arguments: timeToWait -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void Wait_X_ms( unsigned int timeToWait){ diff --git a/c/src/lib/libbsp/i386/pc386/timer/timerisr.S b/c/src/lib/libbsp/i386/pc386/timer/timerisr.S index ce5fd95239..b7afdfefee 100644 --- a/c/src/lib/libbsp/i386/pc386/timer/timerisr.S +++ b/c/src/lib/libbsp/i386/pc386/timer/timerisr.S @@ -43,10 +43,10 @@ BEGIN_CODE | interrupt at maximum intervals. | Global Variables: None. | Arguments: standard - see RTEMS documentation. -| Returns: standard return value - see RTEMS documentation. +| Returns: standard return value - see RTEMS documentation. +--------------------------------------------------------------------------*/ PUBLIC(timerisr) -SYM (timerisr): +SYM (timerisr): incl Ttimer_val # another tick pushl eax movb $0x20, al diff --git a/c/src/lib/libbsp/i386/pc386/tools/bin2boot.c b/c/src/lib/libbsp/i386/pc386/tools/bin2boot.c index d60d4d99f0..fed169eac8 100644 --- a/c/src/lib/libbsp/i386/pc386/tools/bin2boot.c +++ b/c/src/lib/libbsp/i386/pc386/tools/bin2boot.c @@ -41,7 +41,7 @@ int main(int argc, char* argv[]) unsigned long headerAddr, addr1, addr2; int size1, size2, len1, len2, len, imageCnt, cnt; char *ofile, *ifile, *end; - + verbose = 0; /* parse command line options */ @@ -60,13 +60,13 @@ int main(int argc, char* argv[]) return 1; } } - + if((argc - optind) != 8 && (argc - optind) != 5) { usage(); return 1; } - + ofile = argv[optind]; ofp = fopen(ofile, "wb"); if(ofp == NULL) @@ -74,15 +74,15 @@ int main(int argc, char* argv[]) fprintf(stderr, "unable to open file %s\n", ofile); return 1; } - - /* - * Layout is very simple first 512 is header shared by all + + /* + * Layout is very simple first 512 is header shared by all * images, then images at 512 bytes border */ - + /* Fill buffer with 0's */ memset(buf, 0, sizeof(buf)); - + fwrite(buf, 1, sizeof(buf), ofp); optind++; @@ -100,7 +100,7 @@ int main(int argc, char* argv[]) fclose(ofp); return 1; } - + /* Copy the first image */ optind++; ifile = argv[optind]; @@ -183,7 +183,7 @@ int main(int argc, char* argv[]) { /* Areas overlapped */ printf("area overlapping: \n"); - printf("header address 0x%08lx, its memory size 0x%08x\n", + printf("header address 0x%08lx, its memory size 0x%08x\n", headerAddr, sizeof(buf)); printf("first image address 0x%08lx, its memory size 0x%08x\n", addr1, size1); @@ -198,7 +198,7 @@ int main(int argc, char* argv[]) fclose(ofp); return 1; } - + if(optind == (argc - 1)) { @@ -242,12 +242,12 @@ int main(int argc, char* argv[]) for(;;) { len = fread(buf, 1, sizeof(buf), ifp); - + if(len != 0) { fwrite(buf, len, 1, ofp); cnt += sizeof(buf); - + if(len != sizeof(buf)) { memset(buf, 0, sizeof(buf) - len); @@ -287,13 +287,13 @@ int main(int argc, char* argv[]) (addr2 < addr1 && addr2 < headerAddr) || (addr1 > headerAddr && addr2 > (headerAddr + sizeof(buf)) && (addr2 + size2) <= addr1) || - (addr1 < headerAddr && addr2 > (addr1 + size1) && + (addr1 < headerAddr && addr2 > (addr1 + size1) && (addr2 + size2) <= headerAddr))) - + { /* Areas overlapped */ printf("area overlapping: \n"); - printf("header address 0x%08lx, its memory size 0x%08x\n", + printf("header address 0x%08lx, its memory size 0x%08x\n", headerAddr, sizeof(buf)); printf("first image address 0x%08lx, its memory size 0x%08x\n", addr1, size1); @@ -322,8 +322,8 @@ writeHeader: buf[0xa] = (headerAddr >> 4) & 0xff; buf[0xb] = (headerAddr >> 12) & 0xff; - /* - * Execute address in cs:ip format, which addr1 + /* + * Execute address in cs:ip format, which addr1 */ buf[0xc] = addr1 & 0xf; buf[0xd] = 0; @@ -361,7 +361,7 @@ writeHeader: /* Flags, tags and lengths */ buf[0x20] = 4; - + buf[0x23] = 4; @@ -370,13 +370,13 @@ writeHeader: buf[0x25] = (addr2 >> 8) & 0xff; buf[0x26] = (addr2 >> 16) & 0xff; buf[0x27] = (addr2 >> 24) & 0xff; - + /* Image Length */ buf[0x28] = len2 & 0xff; buf[0x29] = (len2 >> 8) & 0xff; buf[0x2a] = (len2 >> 16) & 0xff; buf[0x2b] = (len2 >> 24) & 0xff; - + /* Memory Size */ buf[0x2c] = size2 & 0xff; buf[0x2d] = (size2 >> 8) & 0xff; @@ -392,7 +392,7 @@ writeHeader: if(verbose) { - printf("header address 0x%08lx, its memory size 0x%08x\n", + printf("header address 0x%08lx, its memory size 0x%08x\n", headerAddr, sizeof(buf)); printf("first image address 0x%08lx, its memory size 0x%08x\n", addr1, size1); diff --git a/c/src/lib/libbsp/i386/pc386/wd8003/wd8003.c b/c/src/lib/libbsp/i386/pc386/wd8003/wd8003.c index ad0f0d7672..1e336f6f4f 100644 --- a/c/src/lib/libbsp/i386/pc386/wd8003/wd8003.c +++ b/c/src/lib/libbsp/i386/pc386/wd8003/wd8003.c @@ -89,7 +89,7 @@ struct wd_softc { unsigned int port; unsigned char *base; unsigned long bpar; - + /* * Statistics */ @@ -102,7 +102,7 @@ struct wd_softc { unsigned long rxBadCRC; unsigned long rxOverrun; unsigned long rxCollision; - + unsigned long txInterrupts; unsigned long txDeferred; unsigned long txHeartbeat; @@ -165,7 +165,7 @@ wd8003Enet_interrupt_handler (void) if (status & (MSK_PRX+MSK_RXE)) { outport_byte(tport+ISR, status & (MSK_PRX+MSK_RXE)); wd_softc[0].rxInterrupts++; - rtems_event_send (wd_softc[0].rxDaemonTid, INTERRUPT_EVENT); + rtems_event_send (wd_softc[0].rxDaemonTid, INTERRUPT_EVENT); } } @@ -209,8 +209,8 @@ wd8003Enet_initialize_hardware (struct wd_softc *sc) if (i1 < 6) hwaddr[i1] = cc1; } - - inport_byte(tport+0x04, temp); + + inport_byte(tport+0x04, temp); outport_byte(tport+0x04, temp | 0x80); /* alternate registers */ outport_byte(tport+W83CREG, MSK_RESET); /* reset board, set buffer */ outport_byte(tport+W83CREG, 0); @@ -219,7 +219,7 @@ wd8003Enet_initialize_hardware (struct wd_softc *sc) outport_byte(tport+CMDR, MSK_PG0 + MSK_RD2); cc1 = MSK_BMS + MSK_FT10; /* configure 8 or 16 bits */ - inport_byte(tport+0x07, temp) ; + inport_byte(tport+0x07, temp) ; ultra = ((temp & 0xf0) == 0x20 || (temp & 0xf0) == 0x40); if (ultra) @@ -247,14 +247,14 @@ wd8003Enet_initialize_hardware (struct wd_softc *sc) outport_byte(tport+CMDR, MSK_PG0 + MSK_RD2); outport_byte(tport+CMDR, MSK_STA + MSK_RD2); /* put 8390 on line */ outport_byte(tport+RCR, MSK_AB); /* MSK_AB accept broadcast */ - + if (ultra) { inport_byte(tport+0x0c, temp); outport_byte(tport+0x0c, temp | 0x80); outport_byte(tport+0x05, 0x80); outport_byte(tport+0x06, 0x01); } - + /* * Set up interrupts */ @@ -262,7 +262,7 @@ wd8003Enet_initialize_hardware (struct wd_softc *sc) sc->irqInfo.on = nopOn; sc->irqInfo.off = nopOn; sc->irqInfo.isOn = wdIsOn; - + st = BSP_install_rtems_irq_handler (&sc->irqInfo); if (!st) rtems_panic ("Can't attach WD interrupt handler for irq %d\n", @@ -298,7 +298,7 @@ wd_rxDaemon (void *arg) outport_byte(tport+CMDR, MSK_PG1 + MSK_RD2); inport_byte(tport+CURR, current); - outport_byte(tport+CMDR, MSK_PG0 + MSK_RD2); + outport_byte(tport+CMDR, MSK_PG0 + MSK_RD2); start += 1; if (start >= OUTPAGE){ @@ -307,7 +307,7 @@ wd_rxDaemon (void *arg) if (current == start) break; - + shp = dp->base + 1 + (SHAPAGE * start); next = *shp++; len = *((short *)shp)++ - 4; @@ -315,14 +315,14 @@ wd_rxDaemon (void *arg) if (next >= OUTPAGE){ next = 0; } - + MGETHDR (m, M_WAIT, MT_DATA); MCLGET (m, M_WAIT); m->m_pkthdr.rcvif = ifp; - + temp = m->m_data; m->m_len = m->m_pkthdr.len = len - sizeof(struct ether_header); - + if ((i2 = (OUTPAGE - start) * SHAPAGE - 4) < len){ memcpy(temp, shp, i2); len -= i2; @@ -330,18 +330,18 @@ wd_rxDaemon (void *arg) shp = dp->base; } memcpy(temp, shp, len); - + eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + outport_byte(tport+BNRY, next-1); } - + /* * Ring overwrite */ - if (overrun){ + if (overrun){ outport_byte(tport+ISR, MSK_OVW); /* reset IR */ outport_byte(tport+TCR, 0); /* out of loopback */ if (resend == 1) @@ -349,9 +349,9 @@ wd_rxDaemon (void *arg) resend = 0; overrun = 0; } - + outport_byte(tport+IMR, 0x15); /* re-enable IT rx */ - } + } } static void @@ -366,16 +366,16 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) /* * Waiting for Transmitter ready - */ - inport_byte(tport+CMDR, txReady); + */ + inport_byte(tport+CMDR, txReady); while(txReady & MSK_TXP) - inport_byte(tport+CMDR, txReady); + inport_byte(tport+CMDR, txReady); len = 0; shp = dp->base + (SHAPAGE * OUTPAGE); n = m; - + for (;;){ len += m->m_len; memcpy(shp, (char *)m->m_data, m->m_len); @@ -385,7 +385,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) } m_freem(n); - + if (len < ET_MINLEN) len = ET_MINLEN; outport_byte(tport+TBCR0, len); outport_byte(tport+TBCR1, (len >> 8) ); @@ -448,12 +448,12 @@ wd_init (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; if (sc->txDaemonTid == 0) { - + /* * Set up WD hardware */ wd8003Enet_initialize_hardware (sc); - + /* * Start driver tasks */ @@ -555,7 +555,7 @@ wd_ioctl (struct ifnet *ifp, int command, caddr_t data) case SIO_RTEMS_SHOW_STATS: wd_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -625,7 +625,7 @@ rtems_wd_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach) sc->bpar = 0xD0000; sc->base = (unsigned char*) 0xD0000; } - + sc->acceptBroadcast = !config->ignore_broadcast; /* diff --git a/c/src/lib/libbsp/i386/shared/comm/i386-stub-glue.c b/c/src/lib/libbsp/i386/shared/comm/i386-stub-glue.c index 407544a388..e36f5e2ea4 100644 --- a/c/src/lib/libbsp/i386/shared/comm/i386-stub-glue.c +++ b/c/src/lib/libbsp/i386/shared/comm/i386-stub-glue.c @@ -19,7 +19,7 @@ int putDebugChar(int ch); /* write a single character */ int getDebugChar(void); /* read and return a single char */ /* assign an exception handler */ -void exceptionHandler(int, void (*handler)(void)); +void exceptionHandler(int, void (*handler)(void)); void BSP_loop(int uart); @@ -37,7 +37,7 @@ i386_stub_glue_init(int uart) uart_current = uart; - BSP_uart_init(uart, 38400, CHR_8_BITS, 0, 0, 0); + BSP_uart_init(uart, 38400, CHR_8_BITS, 0, 0, 0); } void BSP_uart_on(const rtems_raw_irq_connect_data* used) @@ -57,7 +57,7 @@ int BSP_uart_isOn(const rtems_raw_irq_connect_data* used) /* - * In order to have a possibility to break into + * In order to have a possibility to break into * running program, one has to call this function */ void i386_stub_glue_init_breakin(void) @@ -75,13 +75,13 @@ void i386_stub_glue_init_breakin(void) uart_raw_irq_data.idtIndex = BSP_UART_COM2_IRQ + BSP_IRQ_VECTOR_BASE; } - if(!i386_get_current_idt_entry(&uart_raw_irq_data)) + if(!i386_get_current_idt_entry(&uart_raw_irq_data)) { printk("cannot get idt entry\n"); rtems_fatal_error_occurred(1); } - if(!i386_delete_idt_entry(&uart_raw_irq_data)) + if(!i386_delete_idt_entry(&uart_raw_irq_data)) { printk("cannot delete idt entry\n"); rtems_fatal_error_occurred(1); @@ -103,12 +103,12 @@ void i386_stub_glue_init_breakin(void) uart_raw_irq_data.hdl = BSP_uart_dbgisr_com2; } - if (!i386_set_idt_entry (&uart_raw_irq_data)) + if (!i386_set_idt_entry (&uart_raw_irq_data)) { printk("raw exception handler connection failed\n"); rtems_fatal_error_occurred(1); } - + /* Enable interrupts */ BSP_uart_intr_ctrl(uart_current, BSP_UART_INTR_CTRL_GDB); @@ -146,13 +146,13 @@ void exceptionHandler(int vector, void (*handler)(void)) excep_raw_irq_data.idtIndex = vector; - if(!i386_get_current_idt_entry(&excep_raw_irq_data)) + if(!i386_get_current_idt_entry(&excep_raw_irq_data)) { printk("cannot get idt entry\n"); rtems_fatal_error_occurred(1); } - if(!i386_delete_idt_entry(&excep_raw_irq_data)) + if(!i386_delete_idt_entry(&excep_raw_irq_data)) { printk("cannot delete idt entry\n"); rtems_fatal_error_occurred(1); diff --git a/c/src/lib/libbsp/i386/shared/comm/i386-stub.c b/c/src/lib/libbsp/i386/shared/comm/i386-stub.c index f35f16d2b7..b55d5302fb 100644 --- a/c/src/lib/libbsp/i386/shared/comm/i386-stub.c +++ b/c/src/lib/libbsp/i386/shared/comm/i386-stub.c @@ -5,17 +5,17 @@ */ /**************************************************************************** - + THIS SOFTWARE IS NOT COPYRIGHTED - + HP offers the following for use in the public domain. HP makes no warranty with regard to the software or it's performance and the user accepts the software "AS IS" with all faults. - + HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - + ****************************************************************************/ /**************************************************************************** @@ -446,13 +446,13 @@ asm (" movl stackPtr, %esp"); /* move to remcom stack area */ asm (" pushl %eax"); /* push exception onto stack */ asm (" call handle_exception"); /* this never returns */ -void +void _returnFromException (void) { return_to_prog (); } -int +int hex (char ch) { if ((ch >= 'a') && (ch <= 'f')) @@ -466,7 +466,7 @@ hex (char ch) /* scan for the sequence $<data>#<checksum> */ -void +void getpacket (char *buffer) { unsigned char checksum; @@ -531,7 +531,7 @@ getpacket (char *buffer) /* send the packet in buffer. */ -void +void putpacket (char *buffer) { unsigned char checksum; @@ -566,7 +566,7 @@ char remcomInBuffer[BUFMAX]; char remcomOutBuffer[BUFMAX]; static short error; -void +void debug_error ( char *format, char *parm @@ -656,7 +656,7 @@ hex2mem (char *buf, char *mem, int count, int may_fault) /* this function takes the 386 exception vector and attempts to translate this number into a unix compatible signal value */ -int +int computeSignal (int exceptionVector) { int sigval; @@ -717,7 +717,7 @@ computeSignal (int exceptionVector) /* WHILE WE FIND NICE HEX CHARS, BUILD AN INT */ /* RETURN NUMBER OF CHARS PROCESSED */ /**********************************************/ -int +int hexToInt (char **ptr, int *intValue) { int numChars = 0; @@ -745,7 +745,7 @@ hexToInt (char **ptr, int *intValue) /* * This function does all command procesing for interfacing to gdb. */ -void +void handle_exception (int exceptionVector) { int sigval; @@ -929,7 +929,7 @@ handle_exception (int exceptionVector) /* this function is used to set up exception handlers for tracing and breakpoints */ -void +void set_debug_traps (void) { extern void remcomHandler (); @@ -965,7 +965,7 @@ set_debug_traps (void) otherwise as a quick means to stop program execution and "break" into the debugger. */ -void +void breakpoint (void) { if (initialized) diff --git a/c/src/lib/libbsp/i386/shared/comm/i386_io.h b/c/src/lib/libbsp/i386/shared/comm/i386_io.h index 7d2612ec11..8823750306 100644 --- a/c/src/lib/libbsp/i386/shared/comm/i386_io.h +++ b/c/src/lib/libbsp/i386/shared/comm/i386_io.h @@ -3,16 +3,19 @@ // $Header$ // // Copyright (c) 2000 - Rosimildo da Silva. All Rights Reserved. -// +// // MODULE DESCRIPTION: -// +// // IO Functions for the PC platform equivalent to DOS/Linux. They make -// eaiser the porting of code from these platforms. +// eaiser the porting of code from these platforms. // // by: Rosimildo da Silva: rdasilva@connecttel.com // // MODIFICATION/HISTORY: // $Log$ +// Revision 1.2 2004/04/15 13:26:12 ralf +// Remove stray white spaces. +// // Revision 1.1 2000/08/30 08:18:56 joel // 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> // diff --git a/c/src/lib/libbsp/i386/shared/comm/tty_drv.c b/c/src/lib/libbsp/i386/shared/comm/tty_drv.c index fd096fe9a6..cb219d5f87 100644 --- a/c/src/lib/libbsp/i386/shared/comm/tty_drv.c +++ b/c/src/lib/libbsp/i386/shared/comm/tty_drv.c @@ -7,7 +7,7 @@ * as /dev/ttyS1 for COM1 and /dev/ttyS2 as COM2. If one of the ports * is used as the console, this driver would fail to initialize. * - * This code was based on the console driver. It is based on the + * This code was based on the console driver. It is based on the * current termios framework. This is just a shell around the * termios support. * @@ -18,6 +18,11 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.5 2001/08/16 20:52:05 joel + * 2001-08-16 Mike Siers <mikes@poliac.com> + * + * * comm/tty_drv.c, comm/uart.c: Correct some minor cut and paste bugs. + * * Revision 1.4 2001/07/03 17:56:32 joel * 2001-07-03 Mike Seirs <mike@poliac.com> * @@ -88,8 +93,8 @@ extern void rtems_set_waiting_id_comx( int port, rtems_id id, rtems_event_set e /* * Interrupt structure for tty1 */ -static rtems_irq_connect_data tty1_isr_data = -{ +static rtems_irq_connect_data tty1_isr_data = +{ BSP_UART_COM1_IRQ, BSP_uart_termios_isr_com1, isr_on, @@ -99,8 +104,8 @@ static rtems_irq_connect_data tty1_isr_data = /* * Interrupt structure for tty2 */ -static rtems_irq_connect_data tty2_isr_data = -{ +static rtems_irq_connect_data tty2_isr_data = +{ BSP_UART_COM2_IRQ, BSP_uart_termios_isr_com2, isr_on, @@ -112,7 +117,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -153,7 +158,7 @@ tty1_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize(); - + /* * Do device-specific initialization */ @@ -195,7 +200,7 @@ tty1_open(rtems_device_major_number major, { rtems_status_code status; #ifndef USE_TASK_DRIVEN - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ tty1_last_close, /* lastClose */ @@ -207,7 +212,7 @@ tty1_open(rtems_device_major_number major, TERMIOS_IRQ_DRIVEN /* outputUsesInterrupts */ }; #else - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ NULL, /* lastClose */ @@ -230,7 +235,7 @@ tty1_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set( BSP_UART_COM1, + BSP_uart_termios_set( BSP_UART_COM1, ((rtems_libio_open_close_args_t *)arg)->iop->data1 ); /* Enable interrupts on channel */ BSP_uart_intr_ctrl( BSP_UART_COM1, BSP_UART_INTR_CTRL_TERMIOS); @@ -247,10 +252,10 @@ tty_close(rtems_device_major_number major, { return (rtems_termios_close (arg)); - + } /* tty_close */ - + /* * TTY device driver READ entry point. * Read characters from the tty device. @@ -262,7 +267,7 @@ tty_read(rtems_device_major_number major, { return rtems_termios_read (arg); } /* tty_read */ - + /* * TTY device driver WRITE entry point. @@ -274,7 +279,7 @@ tty_write(rtems_device_major_number major, void * arg) { return rtems_termios_write (arg); - + } /* tty_write */ /* @@ -282,9 +287,9 @@ tty_write(rtems_device_major_number major, * routine to handle both devices. */ static rtems_device_driver tty_control( int port, void *arg ) -{ +{ rtems_libio_ioctl_args_t *args = arg; - switch( args->command ) + switch( args->command ) { default: return rtems_termios_ioctl (arg); @@ -299,12 +304,12 @@ static rtems_device_driver tty_control( int port, void *arg ) /* * Handle ioctl request for ttyS1. */ -rtems_device_driver +rtems_device_driver tty1_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return tty_control( BSP_UART_COM1, arg ); } @@ -314,45 +319,45 @@ conSetAttr(int port, int minor, const struct termios *t) { unsigned long baud, databits, parity, stopbits; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -361,7 +366,7 @@ conSetAttr(int port, int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: @@ -387,7 +392,7 @@ conSetAttr(int port, int minor, const struct termios *t) /* No parity */ parity = 0; } - + switch (t->c_cflag & CSIZE) { case CS5: databits = CHR_5_BITS; break; case CS6: databits = CHR_6_BITS; break; @@ -443,7 +448,7 @@ tty2_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize(); - + /* * Do device-specific initialization */ @@ -485,7 +490,7 @@ tty2_open(rtems_device_major_number major, { rtems_status_code status; #ifndef USE_TASK_DRIVEN - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ tty2_last_close, /* lastClose */ @@ -497,7 +502,7 @@ tty2_open(rtems_device_major_number major, TERMIOS_IRQ_DRIVEN /* outputUsesInterrupts */ }; #else - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ NULL, /* lastClose */ @@ -520,7 +525,7 @@ tty2_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set( BSP_UART_COM2, + BSP_uart_termios_set( BSP_UART_COM2, ((rtems_libio_open_close_args_t *)arg)->iop->data1 ); /* Enable interrupts on channel */ BSP_uart_intr_ctrl( BSP_UART_COM2, BSP_UART_INTR_CTRL_TERMIOS); @@ -530,12 +535,12 @@ tty2_open(rtems_device_major_number major, /* * Handle ioctl request for TTY2 */ -rtems_device_driver +rtems_device_driver tty2_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return tty_control( BSP_UART_COM2, arg ); } diff --git a/c/src/lib/libbsp/i386/shared/comm/tty_drv.h b/c/src/lib/libbsp/i386/shared/comm/tty_drv.h index c4f017c8c6..d84dd4d3a1 100644 --- a/c/src/lib/libbsp/i386/shared/comm/tty_drv.h +++ b/c/src/lib/libbsp/i386/shared/comm/tty_drv.h @@ -5,7 +5,7 @@ * $Header$ * * Copyright (c) 1999 ConnectTel, Inc. All Rights Reserved. - * + * * MODULE DESCRIPTION: Prototype routines for the ttySx driver. * * by: Rosimildo da Silva: @@ -15,6 +15,9 @@ * MODIFICATION/HISTORY: * * $Log$ + * Revision 1.2 2004/04/15 13:26:12 ralf + * Remove stray white spaces. + * * Revision 1.1 2000/08/30 08:18:56 joel * 2000-08-26 Rosimildo da Silva <rdasilva@connecttel.com> * diff --git a/c/src/lib/libbsp/i386/shared/comm/uart.c b/c/src/lib/libbsp/i386/shared/comm/uart.c index d8d0a1b29b..bc5e805c4e 100644 --- a/c/src/lib/libbsp/i386/shared/comm/uart.c +++ b/c/src/lib/libbsp/i386/shared/comm/uart.c @@ -33,10 +33,10 @@ struct uart_data static struct uart_data uart_data[2]; -/* +/* * Macros to read/write register of uart, if configuration is * different just rewrite these macros - */ + */ static inline unsigned char uread(int uart, unsigned int reg) @@ -52,7 +52,7 @@ uread(int uart, unsigned int reg) return val; } -static inline void +static inline void uwrite(int uart, int reg, unsigned int val) { if (uart == 0) { @@ -87,13 +87,13 @@ uartError(int uart) inline void uartError(int uart) { unsigned char uartStatus; - + uartStatus = uread(uart, LSR); uartStatus = uread(uart, RBR); } #endif -/* +/* * Uart initialization, it is hardcoded to 8 bit, no parity, * one stop bit, FIFO, things to be changed * are baud rate and nad hw flow control, @@ -111,10 +111,10 @@ BSP_uart_init ) { unsigned char tmp; - + /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + switch(baud) { case 50: @@ -135,23 +135,23 @@ BSP_uart_init assert(0); return; } - + /* Set DLAB bit to 1 */ uwrite(uart, LCR, DLAB); - + /* Set baud rate */ - uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); - uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); + uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); + uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); /* 8-bit, no parity , 1 stop */ uwrite(uart, LCR, databits | parity | stopbits); - + /* Set DTR, RTS and OUT2 high */ uwrite(uart, MCR, DTR | RTS | OUT_2); /* Enable FIFO */ - uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); + uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); /* Disable Interrupts */ uwrite(uart, IER, 0); @@ -170,12 +170,12 @@ BSP_uart_init return; } -/* +/* * Set baud */ void -BSP_uart_set_baud( +BSP_uart_set_baud( int uart, unsigned long baud ) @@ -183,7 +183,7 @@ BSP_uart_set_baud( /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - BSP_uart_set_attributes( uart, baud, uart_data[uart].databits, + BSP_uart_set_attributes( uart, baud, uart_data[uart].databits, uart_data[uart].parity, uart_data[uart].stopbits ); } @@ -205,10 +205,10 @@ BSP_uart_set_attributes /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - - /* + + /* * This function may be called whenever TERMIOS parameters - * are changed, so we have to make sure that baud change is + * are changed, so we have to make sure that baud change is * indeed required */ @@ -227,14 +227,14 @@ BSP_uart_set_attributes uwrite(uart, MCR, mcr); uwrite(uart, IER, ier); - + return; } /* - * Enable/disable interrupts + * Enable/disable interrupts */ -void +void BSP_uart_intr_ctrl(int uart, int cmd) { int iStatus = (int)INTERRUPT_DISABLE; @@ -262,7 +262,7 @@ BSP_uart_intr_ctrl(int uart, int cmd) uart_data[uart].ier = iStatus; uwrite(uart, IER, iStatus); - + return; } @@ -270,7 +270,7 @@ void BSP_uart_throttle(int uart) { unsigned int mcr; - + assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); if(!uart_data[uart].hwFlow) @@ -312,12 +312,12 @@ BSP_uart_unthrottle(int uart) * Status function, -1 if error * detected, 0 if no received chars available, * 1 if received char available, 2 if break - * is detected, it will eat break and error - * chars. It ignores overruns - we cannot do + * is detected, it will eat break and error + * chars. It ignores overruns - we cannot do * anything about - it execpt count statistics * and we are not counting it. */ -int +int BSP_uart_polled_status(int uart) { unsigned char val; @@ -335,7 +335,7 @@ BSP_uart_polled_status(int uart) if((val & (DR | OE | FE)) == 1) { - /* No error, character present */ + /* No error, character present */ return BSP_UART_STATUS_CHAR; } @@ -345,12 +345,12 @@ BSP_uart_polled_status(int uart) return BSP_UART_STATUS_NOCHAR; } - /* + /* * Framing or parity error * eat character */ uread(uart, RBR); - + return BSP_UART_STATUS_ERROR; } @@ -358,14 +358,14 @@ BSP_uart_polled_status(int uart) /* * Polled mode write function */ -void +void BSP_uart_polled_write(int uart, int val) { unsigned char val1; - + /* Sanity check */ assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + for(;;) { if((val1=uread(uart, LSR)) & THRE) @@ -386,7 +386,7 @@ BSP_uart_polled_write(int uart, int val) } uwrite(uart, THR, val & 0xff); - + /* * Wait for character to be transmitted. * This ensures that printk and printf play nicely together @@ -413,16 +413,16 @@ BSP_output_char_via_serial(int val) if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); } -/* +/* * Polled mode read function */ -int +int BSP_uart_polled_read(int uart) { unsigned char val; assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + for(;;) { if(uread(uart, LSR) & DR) @@ -430,13 +430,13 @@ BSP_uart_polled_read(int uart) break; } } - + val = uread(uart, RBR); return (int)(val & 0xff); } -unsigned +unsigned BSP_poll_char_via_serial() { return BSP_uart_polled_read(BSPConsolePort); @@ -480,7 +480,7 @@ void uart_set_driver_handler( int port, void ( *handler )( void *, char *, int /* - * Set channel parameters + * Set channel parameters */ void BSP_uart_termios_set(int uart, void *ttyp) @@ -488,7 +488,7 @@ BSP_uart_termios_set(int uart, void *ttyp) struct rtems_termios_tty *p = (struct rtems_termios_tty *)ttyp; unsigned char val; assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); - + if(uart == BSP_UART_COM1) { uart_data[uart].ioMode = p->device.outputUsesInterrupts; @@ -504,7 +504,7 @@ BSP_uart_termios_set(int uart, void *ttyp) } termios_tx_active_com1 = 0; termios_ttyp_com1 = ttyp; - termios_tx_hold_com1 = 0; + termios_tx_hold_com1 = 0; termios_tx_hold_valid_com1 = 0; } else @@ -522,7 +522,7 @@ BSP_uart_termios_set(int uart, void *ttyp) } termios_tx_active_com2 = 0; termios_ttyp_com2 = ttyp; - termios_tx_hold_com2 = 0; + termios_tx_hold_com2 = 0; termios_tx_hold_valid_com2 = 0; } @@ -657,7 +657,7 @@ BSP_uart_termios_isr_com1(void) for(;;) { vect = uread(BSP_UART_COM1, IIR) & 0xf; - + switch(vect) { case MODEM_STATUS : @@ -690,7 +690,7 @@ BSP_uart_termios_isr_com1(void) if( driver_input_handler_com1 ) { driver_input_handler_com1( termios_ttyp_com1, (char *)buf, off ); - } + } else { /* Update rx buffer */ @@ -699,9 +699,9 @@ BSP_uart_termios_isr_com1(void) } return; case TRANSMITTER_HODING_REGISTER_EMPTY : - /* - * TX holding empty: we have to disable these interrupts - * if there is nothing more to send. + /* + * TX holding empty: we have to disable these interrupts + * if there is nothing more to send. */ /* If nothing else to send disable interrupts */ @@ -740,7 +740,7 @@ BSP_uart_termios_isr_com1(void) } } } - + void BSP_uart_termios_isr_com2() { @@ -753,7 +753,7 @@ BSP_uart_termios_isr_com2() for(;;) { vect = uread(BSP_UART_COM2, IIR) & 0xf; - + switch(vect) { case MODEM_STATUS : @@ -786,7 +786,7 @@ BSP_uart_termios_isr_com2() if( driver_input_handler_com2 ) { driver_input_handler_com2( termios_ttyp_com2, (char *)buf, off ); - } + } else { rtems_termios_enqueue_raw_characters(termios_ttyp_com2, (char *)buf, off); @@ -794,8 +794,8 @@ BSP_uart_termios_isr_com2() } return; case TRANSMITTER_HODING_REGISTER_EMPTY : - /* - * TX holding empty: we have to disable these interrupts + /* + * TX holding empty: we have to disable these interrupts * if there is nothing more to send. */ @@ -835,13 +835,13 @@ BSP_uart_termios_isr_com2() } } } - - -/* ================= GDB support ===================*/ + + +/* ================= GDB support ===================*/ static int sav[4] __attribute__ ((unused)); /* - * Interrupt service routine for COM1 - all, + * Interrupt service routine for COM1 - all, * it does it check whether ^C is received * if yes it will flip TF bit before returning * Note: it should be installed as raw interrupt @@ -858,7 +858,7 @@ asm (" movl %edx, sav + 8"); /* Save edx */ asm (" movl $0, %ebx"); /* Clear flag */ -/* +/* * We know that only receive related interrupts * are available, eat chars */ @@ -873,7 +873,7 @@ asm (" inb %dx, %al"); /* Get input character */ asm (" cmpb $3, %al"); asm (" jne uart_dbgisr_com1_1"); -/* ^C received, set flag */ +/* ^C received, set flag */ asm (" movl $1, %ebx"); asm (" jmp uart_dbgisr_com1_1"); @@ -920,10 +920,10 @@ asm (" iret"); /* Done */ /* - * Interrupt service routine for COM2 - all, + * Interrupt service routine for COM2 - all, * it does it check whether ^C is received * if yes it will flip TF bit before returning - * Note: it has to be installed as raw interrupt + * Note: it has to be installed as raw interrupt * handler */ asm (".p2align 4"); @@ -936,7 +936,7 @@ asm (" movl %edx, sav + 8"); /* Save edx */ asm (" movl $0, %ebx"); /* Clear flag */ -/* +/* * We know that only receive related interrupts * are available, eat chars */ @@ -951,7 +951,7 @@ asm (" inb %dx, %al"); /* Get input character */ asm (" cmpb $3, %al"); asm (" jne uart_dbgisr_com2_1"); -/* ^C received, set flag */ +/* ^C received, set flag */ asm (" movl $1, %ebx"); asm (" jmp uart_dbgisr_com2_1"); diff --git a/c/src/lib/libbsp/i386/shared/comm/uart.h b/c/src/lib/libbsp/i386/shared/comm/uart.h index 5f7ceb70a7..05370c56dd 100644 --- a/c/src/lib/libbsp/i386/shared/comm/uart.h +++ b/c/src/lib/libbsp/i386/shared/comm/uart.h @@ -38,7 +38,7 @@ extern int BSPConsolePort; extern int BSPBaseBaud; /* * Command values for BSP_uart_intr_ctrl(), - * values are strange in order to catch errors + * values are strange in order to catch errors * with assert */ #define BSP_UART_INTR_CTRL_DISABLE (0) diff --git a/c/src/lib/libbsp/i386/shared/irq/idt.c b/c/src/lib/libbsp/i386/shared/irq/idt.c index ea6490f157..a81c6358c6 100644 --- a/c/src/lib/libbsp/i386/shared/irq/idt.c +++ b/c/src/lib/libbsp/i386/shared/irq/idt.c @@ -30,9 +30,9 @@ void create_interrupt_gate_descriptor (interrupt_gate_descriptor* idtEntry, rtems_raw_irq_hdl hdl) { idtEntry->low_offsets_bits = (((unsigned) hdl) & 0xffff); - idtEntry->segment_selector = i386_get_cs(); + idtEntry->segment_selector = i386_get_cs(); idtEntry->fixed_value_bits = 0; - idtEntry->gate_type = 0xe; + idtEntry->gate_type = 0xe; idtEntry->privilege = 0; idtEntry->present = 1; idtEntry->high_offsets_bits = ((((unsigned) hdl) >> 16) & 0xffff); @@ -45,15 +45,15 @@ rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset index) unsigned limit; i386_get_info_from_IDTR (&idt_entry_tbl, &limit); - + /* Convert limit into number of entries */ limit = (limit + 1) / sizeof(interrupt_gate_descriptor); - + if(index >= limit) { return 0; } - * ((unsigned int*) &hdl) = (idt_entry_tbl[index].low_offsets_bits | + * ((unsigned int*) &hdl) = (idt_entry_tbl[index].low_offsets_bits | (idt_entry_tbl[index].high_offsets_bits << 16)); return hdl; } @@ -64,7 +64,7 @@ int i386_set_idt_entry (const rtems_raw_irq_connect_data* irq) unsigned limit; unsigned int level; - + i386_get_info_from_IDTR (&idt_entry_tbl, &limit); /* Convert limit into number of entries */ @@ -85,11 +85,11 @@ int i386_set_idt_entry (const rtems_raw_irq_connect_data* irq) } _CPU_ISR_Disable(level); - + raw_irq_table [irq->idtIndex] = *irq; create_interrupt_gate_descriptor (&idt_entry_tbl[irq->idtIndex], irq->hdl); irq->on(irq); - + _CPU_ISR_Enable(level); return 1; } @@ -102,7 +102,7 @@ void _CPU_ISR_install_vector (unsigned vector, unsigned limit; interrupt_gate_descriptor new; unsigned int level; - + i386_get_info_from_IDTR (&idt_entry_tbl, &limit); /* Convert limit into number of entries */ @@ -120,7 +120,7 @@ void _CPU_ISR_install_vector (unsigned vector, _CPU_ISR_Enable(level); } - + int i386_get_current_idt_entry (rtems_raw_irq_connect_data* irq) { interrupt_gate_descriptor* idt_entry_tbl; @@ -135,9 +135,9 @@ int i386_get_current_idt_entry (rtems_raw_irq_connect_data* irq) return 0; } raw_irq_table [irq->idtIndex].hdl = get_hdl_from_vector(irq->idtIndex); - + *irq = raw_irq_table [irq->idtIndex]; - + return 1; } @@ -146,7 +146,7 @@ int i386_delete_idt_entry (const rtems_raw_irq_connect_data* irq) interrupt_gate_descriptor* idt_entry_tbl; unsigned limit; unsigned int level; - + i386_get_info_from_IDTR (&idt_entry_tbl, &limit); /* Convert limit into number of entries */ @@ -170,12 +170,12 @@ int i386_delete_idt_entry (const rtems_raw_irq_connect_data* irq) idt_entry_tbl[irq->idtIndex] = default_idt_entry; irq->off(irq); - + raw_irq_table[irq->idtIndex] = default_raw_irq_entry; raw_irq_table[irq->idtIndex].idtIndex = irq->idtIndex; _CPU_ISR_Enable(level); - + return 1; } @@ -188,12 +188,12 @@ int i386_init_idt (rtems_raw_irq_global_settings* config) unsigned i; unsigned level; interrupt_gate_descriptor* idt_entry_tbl; - + i386_get_info_from_IDTR (&idt_entry_tbl, &limit); /* Convert limit into number of entries */ limit = (limit + 1) / sizeof(interrupt_gate_descriptor); - + if (config->idtSize != limit) { return 0; } @@ -241,7 +241,7 @@ int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, unsigned int limit_adjusted; segment_descriptors* gdt_entry_tbl; - + i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); if (segment_selector > limit) { @@ -283,6 +283,6 @@ int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, : "=r" (tmp_segment) : "0" (tmp_segment) ); - + return 1; } diff --git a/c/src/lib/libbsp/i386/shared/irq/irq.c b/c/src/lib/libbsp/i386/shared/irq/irq.c index ad04ac314e..1fae59f777 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq.c +++ b/c/src/lib/libbsp/i386/shared/irq/irq.c @@ -60,7 +60,7 @@ rtems_i8259_masks i8259s_cache = 0xFFFB; | Description: Mask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: vector_offset - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -71,12 +71,12 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) ((int)irqLine > BSP_MAX_OFFSET ) ) return 1; - + _CPU_ISR_Disable(level); - + mask = 1 << irqLine; i8259s_cache |= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -88,14 +88,14 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) _CPU_ISR_Enable (level); return 0; -} +} /*-------------------------------------------------------------------------+ | Function: BSP_irq_enable_at_i8259s | Description: Unmask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: irqLine - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -108,10 +108,10 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) return 1; _CPU_ISR_Disable(level); - + mask = ~(1 << irqLine); i8259s_cache &= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -137,14 +137,14 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine) mask = (1 << irqLine); return (~(i8259s_cache & mask)); } - + /*-------------------------------------------------------------------------+ | Function: BSP_irq_ack_at_i8259s | Description: Signal generic End Of Interrupt (EOI) to appropriate PIC. | Global Variables: None. | Arguments: irqLine - number of IRQ line to acknowledge. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -165,7 +165,7 @@ int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine) /* * ------------------------ RTEMS Irq helper functions ---------------- */ - + /* * Caution : this function assumes the variable "internal_config" * is already set and that the tables it contains are still valid @@ -224,7 +224,7 @@ static int isValidInterrupt(int irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -257,7 +257,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -280,7 +280,7 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq) int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -313,7 +313,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) rtems_hdl_tbl[irq->name] = default_rtems_entry; current_irq[irq->name] = default_rtems_entry.hdl; - + _CPU_ISR_Enable(level); return 1; @@ -363,7 +363,7 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config) { *config = internal_config; return 0; -} +} void _ThreadProcessSignalsFromIrq (CPU_Exception_frame* ctx) { diff --git a/c/src/lib/libbsp/i386/shared/irq/irq.h b/c/src/lib/libbsp/i386/shared/irq/irq.h index fa82c0233d..3a1add8355 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq.h +++ b/c/src/lib/libbsp/i386/shared/irq/irq.h @@ -28,7 +28,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <irq_asm.h> #include <rtems.h> /*-------------------------------------------------------------------------+ @@ -37,7 +37,7 @@ extern "C" { typedef enum { /* Base vector for our IRQ handlers. */ - BSP_IRQ_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE, + BSP_IRQ_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE, BSP_IRQ_LINES_NUMBER = 16, BSP_LOWEST_OFFSET = 0, BSP_MAX_OFFSET = BSP_IRQ_LINES_NUMBER - 1, @@ -46,7 +46,7 @@ typedef enum { * NB : 1) Interrupt vector number in IDT = offset + BSP_ASM_IRQ_VECTOR_BASE * 2) The same name should be defined on all architecture * so that handler connexion can be unchanged. - */ + */ BSP_PERIODIC_TIMER = 0, BSP_KEYBOARD = 1, @@ -56,11 +56,11 @@ typedef enum { BSP_UART_COM1_IRQ = 4, BSP_RT_TIMER1 = 8, - + BSP_RT_TIMER3 = 10 } rtems_irq_symbolic_name; - + /* @@ -94,9 +94,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -132,7 +132,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -209,7 +209,7 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* @@ -252,7 +252,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S index a4bc1a2299..9c5e327379 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -15,8 +15,8 @@ #include <irq_asm.h> BEGIN_CODE - -SYM (_ISR_Handler): + +SYM (_ISR_Handler): /* * Before this was point is reached the vectors unique * entry point did the following: @@ -77,7 +77,7 @@ SYM (_ISR_Handler): outb $PIC_SLAVE_COMMAND_IO_PORT .master: outb $PIC_MASTER_COMMAND_IO_PORT - + .check_stack_switch: pushl ebp movl esp, ebp /* ebp = previous stack pointer */ @@ -100,12 +100,12 @@ nested: * interrupt source is now masked via i8259 */ sti - + /* * ECX is preloaded with the vector number but it is a scratch register * so we must save it again. */ - + pushl ecx /* push vector number */ mov SYM (current_irq) (,ecx,4),eax /* eax = Users handler */ @@ -129,8 +129,8 @@ nested: outb $PIC_MASTER_IMR_IO_PORT movb ah, al outb $PIC_SLAVE_IMR_IO_PORT - - + + decl SYM (_ISR_Nest_level) /* one less ISR nest level */ /* If interrupts are nested, */ /* then dispatching is disabled */ @@ -149,13 +149,13 @@ nested: /* while in interrupt handler? */ je .exit /* No, exit */ - + .bframe: movl $0, SYM (_ISR_Signals_to_thread_executing) /* * This code is the less critical path. In order to have a single - * Thread Context, we take the same frame than the one pushed on - * exceptions. This makes sense because Signal is a software + * Thread Context, we take the same frame than the one pushed on + * exceptions. This makes sense because Signal is a software * exception. */ popl edx @@ -172,11 +172,11 @@ nested: popa addl $8, esp iret - + .schedule: /* * the scratch registers have already been saved and we are already - * back on the thread system stack. So we can call _Thread_Displatch + * back on the thread system stack. So we can call _Thread_Displatch * directly */ call _Thread_Dispatch @@ -203,7 +203,7 @@ nested: popl eax iret - + #define DISTINCT_INTERRUPT_ENTRY(_vector) \ .p2align 4 ; \ PUBLIC (rtems_irq_prologue_ ## _vector ) ; \ @@ -230,21 +230,21 @@ DISTINCT_INTERRUPT_ENTRY(12) DISTINCT_INTERRUPT_ENTRY(13) DISTINCT_INTERRUPT_ENTRY(14) DISTINCT_INTERRUPT_ENTRY(15) - + /* * routine used to initialize the IDT by default */ - + PUBLIC (default_raw_idt_handler) PUBLIC (raw_idt_notify) - + SYM (default_raw_idt_handler): pusha cld call raw_idt_notify popa iret - + END_CODE END diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_init.c b/c/src/lib/libbsp/i386/shared/irq/irq_init.c index 128a474462..7a54329082 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_init.c +++ b/c/src/lib/libbsp/i386/shared/irq/irq_init.c @@ -99,9 +99,9 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_LINES_NUMBER]={ 255, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - - + + static interrupt_gate_descriptor idtEntry; static rtems_irq_global_settings initial_config; @@ -128,7 +128,7 @@ void rtems_irq_mngt_init() printk("IDT table size mismatch !!! System locked\n"); while(1); } - + _CPU_ISR_Disable(level); @@ -143,7 +143,7 @@ void rtems_irq_mngt_init() raw_initial_config.idtSize = IDT_SIZE; raw_initial_config.defaultRawEntry = defaultRawIrq; raw_initial_config.rawIrqHdlTbl = idtHdl; - + if (!i386_init_idt (&raw_initial_config)) { /* * put something here that will show the failure... @@ -189,7 +189,7 @@ void rtems_irq_mngt_init() } /* - * #define DEBUG + * #define DEBUG */ #ifdef DEBUG { @@ -206,5 +206,5 @@ void rtems_irq_mngt_init() } printk("i8259s_cache = %x\n", * (unsigned short*) &i8259s_cache); BSP_wait_polled_input(); -#endif +#endif } diff --git a/c/src/lib/libbsp/i386/shared/pci/pcibios.c b/c/src/lib/libbsp/i386/shared/pci/pcibios.c index 354f6d9e71..1cece0fb86 100644 --- a/c/src/lib/libbsp/i386/shared/pci/pcibios.c +++ b/c/src/lib/libbsp/i386/shared/pci/pcibios.c @@ -15,28 +15,28 @@ /* * This is simpliest possible PCI BIOS, it assumes that addressing - * is flat and that stack is big enough - */ + * is flat and that stack is big enough + */ static int pcibInitialized = 0; static unsigned int pcibEntry; /* - * Array to pass data between c and asm parts, at the time of - * writing I am not yet that familiar with extended asm feature - * of gcc. This code is not on performance path, so we can care - * relatively little about performance here + * Array to pass data between c and asm parts, at the time of + * writing I am not yet that familiar with extended asm feature + * of gcc. This code is not on performance path, so we can care + * relatively little about performance here */ static volatile unsigned int pcibExchg[5]; static int pcib_convert_err(int err); /* - * Detects presense of PCI BIOS, returns + * Detects presense of PCI BIOS, returns * error code */ -int +int pcib_init(void) { unsigned char *ucp; @@ -84,7 +84,7 @@ pcib_init(void) pcibExchg[0] = *(unsigned int *)ucp; - asm (" pusha"); /* Push all registers */ + asm (" pusha"); /* Push all registers */ asm (" movl pcibExchg, %edi"); /* Move entry point to esi */ asm (" movl $0x49435024, %eax"); /* Move signature to eax */ asm (" xorl %ebx, %ebx"); /* Zero ebx */ @@ -107,7 +107,7 @@ pcib_init(void) /* Let us check whether PCI bios is present */ pcibExchg[0] = pcibEntry; - + asm(" pusha"); asm(" movl pcibExchg, %edi"); asm(" movb $0xb1, %ah"); @@ -133,13 +133,13 @@ pcib_init(void) } /* Success */ - + pcibInitialized = 1; return PCIB_ERR_SUCCESS; } -/* - * Find specified device and return its signature: combination +/* + * Find specified device and return its signature: combination * of bus number, device number and function number */ int @@ -173,8 +173,8 @@ pcib_find_by_devid(int vendorId, int devId, int idx, int *sig) return pcib_convert_err((pcibExchg[0] >> 8) & 0xff); } -/* - * Find specified class code return device signature: combination +/* + * Find specified class code return device signature: combination * of bus number, device number and function number */ int @@ -210,8 +210,8 @@ pcib_find_by_class(int classCode, int idx, int *sig) return PCIB_ERR_SUCCESS; } - - + + #define PCI_MULTI_FUNCTION 0x80 @@ -228,42 +228,42 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid, unsigned short s; unsigned char bus,dev,fun,hd; - for (bus=0; bus<BusCountPCI(); bus++) + for (bus=0; bus<BusCountPCI(); bus++) { - for (dev=0; dev<PCI_MAX_DEVICES; dev++) + for (dev=0; dev<PCI_MAX_DEVICES; dev++) { sig = PCIB_DEVSIG_MAKE(bus,dev,0); /* pci_read_config_byte(bus,dev,0, PCI_HEADER_TYPE, &hd); */ - pcib_conf_read8(sig, 0xe, &hd); + pcib_conf_read8(sig, 0xe, &hd); hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1); for (fun=0; fun<hd; fun++) { - /* + /* * The last devfn id/slot is special; must skip it */ if( PCI_MAX_DEVICES-1 == dev && PCI_MAX_FUNCTIONS-1 == fun ) break; /*pci_read_config_dword(bus,dev,fun,PCI_VENDOR_ID,&d); */ - pcib_conf_read32(sig, 0, &d); + pcib_conf_read32(sig, 0, &d); if( d == -1 ) continue; #ifdef PCI_DEBUG printk("BSP_pciFindDevice: found 0x%08x at %d/%d/%d\n",d,bus,dev,fun); #endif /* pci_read_config_word(bus,dev,fun,PCI_VENDOR_ID,&s); */ - pcib_conf_read16(sig, 0, &s); + pcib_conf_read16(sig, 0, &s); if (vendorid != s) continue; /* pci_read_config_word(bus,dev,fun,PCI_DEVICE_ID,&s); */ - pcib_conf_read16(sig, 0x2, &s); + pcib_conf_read16(sig, 0x2, &s); if (deviceid == s) { if (instance--) continue; - *pbus=bus; - *pdev=dev; + *pbus=bus; + *pdev=dev; *pfun=fun; return 0; } @@ -274,9 +274,9 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid, } - -/* + +/* * Generate Special Cycle */ int @@ -305,9 +305,9 @@ pcib_special_cycle(int busNo, int data) return pcib_convert_err((pcibExchg[0] >> 8) & 0xff); } - -/* + +/* * Read byte from config space */ int @@ -343,9 +343,9 @@ pcib_conf_read8(int sig, int off, unsigned char *data) return PCIB_ERR_SUCCESS; } - -/* + +/* * Read word from config space */ int @@ -381,9 +381,9 @@ pcib_conf_read16(int sig, int off, unsigned short *data) return PCIB_ERR_SUCCESS; } - -/* + +/* * Read dword from config space */ int @@ -419,9 +419,9 @@ pcib_conf_read32(int sig, int off, unsigned int *data) return PCIB_ERR_SUCCESS; } - -/* + +/* * Write byte into config space */ int @@ -452,7 +452,7 @@ pcib_conf_write8(int sig, int off, unsigned int data) return pcib_convert_err((pcibExchg[0] >> 8) & 0xff); } -/* +/* * Write word into config space */ int @@ -482,10 +482,10 @@ pcib_conf_write16(int sig, int off, unsigned int data) return pcib_convert_err((pcibExchg[0] >> 8) & 0xff); } - -/* + +/* * Write dword into config space */ int @@ -515,7 +515,7 @@ pcib_conf_write32(int sig, int off, unsigned int data) return pcib_convert_err((pcibExchg[0] >> 8) & 0xff); } - + static int pcib_convert_err(int err) diff --git a/c/src/lib/libbsp/i386/shared/pci/pcibios.h b/c/src/lib/libbsp/i386/shared/pci/pcibios.h index 1bd5d144b6..beba80ff5b 100644 --- a/c/src/lib/libbsp/i386/shared/pci/pcibios.h +++ b/c/src/lib/libbsp/i386/shared/pci/pcibios.h @@ -15,10 +15,10 @@ #define PCIB_ERR_NOFUNC (-3) /* Function not supported */ #define PCIB_ERR_BADVENDOR (-4) /* Bad Vendor ID */ #define PCIB_ERR_DEVNOTFOUND (-5) /* Device not found */ -#define PCIB_ERR_BADREG (-6) /* Bad register number */ +#define PCIB_ERR_BADREG (-6) /* Bad register number */ -/* - * Make device signature from bus number, device numebr and function +/* + * Make device signature from bus number, device numebr and function * number */ #define PCIB_DEVSIG_MAKE(b,d,f) ((b<<8)|(d<<3)|(f)) diff --git a/c/src/lib/libbsp/i386/ts_386ex/clock/ckinit.c b/c/src/lib/libbsp/i386/ts_386ex/clock/ckinit.c index fb39b12608..e890139db5 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/clock/ckinit.c +++ b/c/src/lib/libbsp/i386/ts_386ex/clock/ckinit.c @@ -36,7 +36,7 @@ void Clock_exit( void ); /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_major_number rtems_clock_minor = 0; @@ -100,7 +100,7 @@ rtems_device_driver Clock_initialize( /* External Prototypes */ extern void init_rtc(void); /* defined in 'rtc.c' */ extern long rtc_read(rtems_time_of_day *); /* defined in 'rtc.c' */ - + #ifdef BSP_DEBUG printk("Loading clock from on-board real-time clock.\n"); #endif @@ -113,25 +113,25 @@ rtems_device_driver Clock_initialize( Clock_driver_ticks = 0; - Clock_isrs = - Clock_initial_isr_value = + Clock_isrs = + Clock_initial_isr_value = BSP_Configuration.microseconds_per_tick / 1000; /* ticks per clock_isr */ - + /* * configure the counter timer ( should be based on microsecs/tick ) * NB. The divisor(Clock_isrs) resolves the is the same number that appears in confdefs.h * when setting the microseconds_per_tick value. */ ClockOff ( &clockIrqData ); - + timer_counter_init_value = BSP_Configuration.microseconds_per_tick / Clock_isrs; clock_lsb = (unsigned char)timer_counter_init_value; clock_msb = timer_counter_init_value >> 8; - - outport_byte (TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN); + + outport_byte (TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN); outport_byte (TIMER_CNTR0, clock_lsb ); /* load LSB first */ outport_byte (TIMER_CNTR0, clock_msb ); /* then MSB */ - + if (!BSP_install_rtems_irq_handler (&clockIrqData)) { printk("Unable to initialize system clock\n"); rtems_fatal_error_occurred(1); @@ -140,10 +140,10 @@ rtems_device_driver Clock_initialize( /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -154,15 +154,15 @@ rtems_device_driver Clock_control( ) { rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(); @@ -178,13 +178,13 @@ rtems_device_driver Clock_control( printk("Clock installed AGAIN\n"); #endif } - + done: return RTEMS_SUCCESSFUL; } void Clock_exit() { - ClockOff(&clockIrqData); + ClockOff(&clockIrqData); BSP_remove_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/i386/ts_386ex/clock/rtc.c b/c/src/lib/libbsp/i386/ts_386ex/clock/rtc.c index 401220bf6d..26c4c2056d 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/clock/rtc.c +++ b/c/src/lib/libbsp/i386/ts_386ex/clock/rtc.c @@ -79,9 +79,9 @@ | Description: Convert 2 digit number to its BCD representation. | Global Variables: None. | Arguments: i - Number to convert. -| Returns: BCD representation of number. +| Returns: BCD representation of number. +--------------------------------------------------------------------------*/ -static inline uint8_t +static inline uint8_t bcd(uint8_t i) { return ((i / 16) * 10 + (i % 16)); @@ -99,9 +99,9 @@ bcd(uint8_t i) | Description: Convert years to seconds (since 1970). | Global Variables: None. | Arguments: y - year to convert (1970 <= y <= 2100). -| Returns: number of seconds since 1970. +| Returns: number of seconds since 1970. +--------------------------------------------------------------------------*/ -static inline uint32_t +static inline uint32_t ytos(uint16_t y) { /* v NUM LEAP YEARS v */ return ((y - 1970) * SECS_PER_REG_YEAR + (y - 1970 + 1) / 4 * SECS_PER_DAY); @@ -113,9 +113,9 @@ ytos(uint16_t y) | Description: Convert months to seconds since January. | Global Variables: None. | Arguments: m - month to convert, leap - is this a month of a leap year. -| Returns: number of seconds since January. +| Returns: number of seconds since January. +--------------------------------------------------------------------------*/ -static inline uint32_t +static inline uint32_t mtos(uint8_t m, rtems_boolean leap) { static uint16_t daysMonth[] = { 0, 0, 31, 59, 90, 120, 151, 181, @@ -132,9 +132,9 @@ mtos(uint8_t m, rtems_boolean leap) | Description: Perform action on RTC and return its result. | Global Variables: None. | Arguments: what - what to write to RTC port (what to do). -| Returns: result received from RTC port after action performed. +| Returns: result received from RTC port after action performed. +--------------------------------------------------------------------------*/ -static inline uint8_t +static inline uint8_t rtcin(uint8_t what) { uint8_t r; @@ -153,7 +153,7 @@ rtcin(uint8_t what) | Description: Initialize real-time clock (RTC). | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void init_rtc(void) @@ -181,7 +181,7 @@ init_rtc(void) | Description: Read present time from RTC and return it. | Global Variables: None. | Arguments: tod - to return present time in 'rtems_time_of_day' format. -| Returns: number of seconds from 1970/01/01 corresponding to 'tod'. +| Returns: number of seconds from 1970/01/01 corresponding to 'tod'. +--------------------------------------------------------------------------*/ long int rtc_read(rtems_time_of_day *tod) @@ -201,7 +201,7 @@ rtc_read(rtems_time_of_day *tod) sa = rtcin(RTC_STATUSA); tod->year = bcd(rtcin(RTC_YEAR)) + 1900; /* year */ - if (tod->year < 1970) tod->year += 100; + if (tod->year < 1970) tod->year += 100; tod->month = bcd(rtcin(RTC_MONTH)); /* month */ tod->day = bcd(rtcin(RTC_DAY)); /* day */ (void) bcd(rtcin(RTC_WDAY)); /* weekday */ diff --git a/c/src/lib/libbsp/i386/ts_386ex/console/console.c b/c/src/lib/libbsp/i386/ts_386ex/console/console.c index 6dedba06de..a101823370 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/console/console.c +++ b/c/src/lib/libbsp/i386/ts_386ex/console/console.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | console.c v1.1 - i386ex BSP - 1997/08/07 +--------------------------------------------------------------------------+ -| This file contains the i386ex console I/O package. It is just a termios +| This file contains the i386ex console I/O package. It is just a termios | wrapper. +--------------------------------------------------------------------------+ | (C) Copyright 1997 - @@ -48,7 +48,7 @@ * Possible value for console input/output : * BSP_UART_COM1 * BSP_UART_COM2 - * BSP_CONSOLE_PORT_CONSOLE is not valid in this BSP. + * BSP_CONSOLE_PORT_CONSOLE is not valid in this BSP. * All references to either keyboard or video handling have been removed. */ @@ -67,7 +67,7 @@ static int isr_is_on(const rtems_irq_connect_data *); * Change references to com2 if required. */ -static rtems_irq_connect_data console_isr_data = +static rtems_irq_connect_data console_isr_data = { BSP_UART_COM2_IRQ, BSP_uart_termios_isr_com2, isr_on, @@ -79,7 +79,7 @@ isr_on(const rtems_irq_connect_data *unused) { return; } - + static void isr_off(const rtems_irq_connect_data *unused) { @@ -108,20 +108,20 @@ console_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize (); - + /* * Do device-specific initialization */ - + /* 115200-8-N-1, without hardware flow control */ BSP_uart_init(BSPConsolePort, 115200, CHR_8_BITS, 0, 0, 0); - + /* Set interrupt handler */ if(BSPConsolePort == BSP_UART_COM1) { console_isr_data.name = BSP_UART_COM1_IRQ; console_isr_data.hdl = BSP_uart_termios_isr_com1; - + } else { @@ -129,9 +129,9 @@ console_initialize(rtems_device_major_number major, console_isr_data.name = BSP_UART_COM2_IRQ; console_isr_data.hdl = BSP_uart_termios_isr_com2; } - + status = BSP_install_rtems_irq_handler(&console_isr_data); - + if (!status){ printk("Error installing serial console interrupt handler!\n"); rtems_fatal_error_occurred(status); @@ -145,7 +145,7 @@ console_initialize(rtems_device_major_number major, printk("Error registering console device!\n"); rtems_fatal_error_occurred (status); } - + if(BSPConsolePort == BSP_UART_COM1) { printk("Initialized console on port COM1 115200-8-N-1\n\n"); @@ -175,7 +175,7 @@ console_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { NULL, /* firstOpen */ console_last_close, /* lastClose */ @@ -203,9 +203,9 @@ console_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set(BSPConsolePort, + BSP_uart_termios_set(BSPConsolePort, ((rtems_libio_open_close_args_t *)arg)->iop->data1); - + /* Enable interrupts on channel */ BSP_uart_intr_ctrl(BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS); @@ -222,10 +222,10 @@ console_close(rtems_device_major_number major, { return (rtems_termios_close (arg)); - + } /* console_close */ - + /*-------------------------------------------------------------------------+ | Console device driver READ entry point. +--------------------------------------------------------------------------+ @@ -246,7 +246,7 @@ console_read(rtems_device_major_number major, return sc; } /* console_read */ - + /*-------------------------------------------------------------------------+ | Console device driver WRITE entry point. @@ -259,20 +259,20 @@ console_write(rtems_device_major_number major, void * arg) { return rtems_termios_write (arg); - + } /* console_write */ - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void * arg ) -{ +{ return rtems_termios_ioctl (arg); } @@ -281,45 +281,45 @@ conSetAttr(int minor, const struct termios *t) { int baud; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -328,7 +328,7 @@ conSetAttr(int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: @@ -349,13 +349,13 @@ conSetAttr(int minor, const struct termios *t) * BSP initialization */ -BSP_output_char_function_type BSP_output_char = +BSP_output_char_function_type BSP_output_char = (BSP_output_char_function_type) BSP_output_char_via_serial; -BSP_polling_getchar_function_type BSP_poll_char = +BSP_polling_getchar_function_type BSP_poll_char = (BSP_polling_getchar_function_type) BSP_poll_char_via_serial; int BSP_poll_read(int ttyMinor){ - + return BSP_poll_char_via_serial(); } diff --git a/c/src/lib/libbsp/i386/ts_386ex/include/bsp.h b/c/src/lib/libbsp/i386/ts_386ex/include/bsp.h index 1b5ce3d639..ae38792de6 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/include/bsp.h +++ b/c/src/lib/libbsp/i386/ts_386ex/include/bsp.h @@ -37,7 +37,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (8 * 1024) - + /* * Network driver configuration */ @@ -163,15 +163,15 @@ extern void Wait_X_ms (unsigned); /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* miscellaneous stuff assumed to exist */ extern rtems_configuration_table BSP_Configuration; diff --git a/c/src/lib/libbsp/i386/ts_386ex/include/wd80x3.h b/c/src/lib/libbsp/i386/ts_386ex/include/wd80x3.h index 545861cb3b..c82035b61c 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/include/wd80x3.h +++ b/c/src/lib/libbsp/i386/ts_386ex/include/wd80x3.h @@ -9,7 +9,7 @@ /* page 0 read or read/write registers */ -#define CMDR 0x00+RO +#define CMDR 0x00+RO #define CLDA0 0x01+RO /* current local dma addr 0 for read */ #define CLDA1 0x02+RO /* current local dma addr 1 for read */ #define BNRY 0x03+RO /* boundary reg for rd and wr */ @@ -55,7 +55,7 @@ /*-----CMDR command bits-----*/ #define MSK_STP 0x01 /* stop the chip */ -#define MSK_STA 0x02 /* start the chip */ +#define MSK_STA 0x02 /* start the chip */ #define MSK_TXP 0x04 /* initial txing of a frm */ #define MSK_RRE 0x08 /* remote read */ #define MSK_RWR 0x10 /* remote write */ diff --git a/c/src/lib/libbsp/i386/ts_386ex/network/ne2000.c b/c/src/lib/libbsp/i386/ts_386ex/network/ne2000.c index a6a51d900f..80e97d8904 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/network/ne2000.c +++ b/c/src/lib/libbsp/i386/ts_386ex/network/ne2000.c @@ -23,7 +23,7 @@ * is any point to having more than two transmit buffers. However, the * code does make it possible, by changing NE_TX_BUFS, although that * would of course reduce the number of receive buffers. - * + * * I suspect that the wd80x3 driver would benefit slightly from copying * the multiple transmit buffer code. However, I have no way to test * that. @@ -223,7 +223,7 @@ ne_read_data (struct ne_softc *sc, int addr, int len, unsigned char *p) if (sc->byte_transfers) while (len > 0) { unsigned char d; - + inport_byte (dport, d); *p++ = d; len--; @@ -231,7 +231,7 @@ ne_read_data (struct ne_softc *sc, int addr, int len, unsigned char *p) else /* word transfers */ while (len > 0) { unsigned short d; - + inport_word (dport, d); *p++ = d; *p++ = d >> 8; @@ -643,7 +643,7 @@ ne_loadpacket (struct ne_softc *sc, struct mbuf *m) leftover = 0; } - /* If using byte transfers, len always ends up as zero so + /* If using byte transfers, len always ends up as zero so there are no leftovers. */ if (sc->byte_transfers) @@ -954,7 +954,7 @@ rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config) memset (sc, 0, sizeof *sc); /* Check whether we do byte-wide or word-wide transfers. */ - + #ifdef NE2000_BYTE_TRANSFERS sc->byte_transfers = TRUE; #else diff --git a/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h b/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h index 8c2c5caeff..a62f08f425 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h +++ b/c/src/lib/libbsp/i386/ts_386ex/start/80386ex.h @@ -8,7 +8,7 @@ * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/c/src/lib/libbsp/i386/ts_386ex/start/start.S b/c/src/lib/libbsp/i386/ts_386ex/start/start.S index 1add645b37..53c28c5585 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/start/start.S +++ b/c/src/lib/libbsp/i386/ts_386ex/start/start.S @@ -2,14 +2,14 @@ * This file is the main boot and configuration file for the TS-1325. It is * solely responsible for initializing the internal register set to reflect * the proper board configuration. This version is modified from the i386ex - * BSP startup: + * BSP startup: * * 1) 1 MB RAM @ 0x0100000 * 2) 1 MB RAM @ 0x0 but with standard DOS memory usage. * 3) Timer0 used as RTEMS clock ticker, 1 msec tick rate. * 4) READY# is generated by CPU * - * The file describes the ".initial" section, which contains: + * The file describes the ".initial" section, which contains: * 1) device configuration code * 2) interrupt descriptor table * 3) global descriptor table @@ -33,12 +33,12 @@ #include "80386ex.inc" #include "ts_1325.inc" /* controls for LED and button */ - + /* * NEW_GAS Needed for binutils 2.9.1.0.7 and higher - */ + */ - EXTERN (boot_card) /* exits to bspstart */ + EXTERN (boot_card) /* exits to bspstart */ EXTERN (_DOS_seg_base) /* defined in startup/linkcmds */ EXTERN (Clock_exit) @@ -49,34 +49,34 @@ PUBLIC( SYM(_init_i386ex) ) - + .section .initial, "ax" /* * Enable access to peripheral register at expanded I/O addresses */ -SYM(_init_i386ex): +SYM(_init_i386ex): .code16 /* LED_GREEN WAIT_BUTTON */ # cli Move this up for now for debug. - movw $0x8000 , ax + movw $0x8000 , ax outb al , $REMAPCFGH xchg al , ah outb al , $REMAPCFGL outw ax , $REMAPCFG ; -/* +/* LED_OFF WAIT_BUTTON */ /* * Configure operation of the A20 Address Line - */ + */ SYM(A20): movw $PORT92 , dx - + inb dx , al # clear A20 port reset andb $0xfe , al # b0 Fast Reset(0)=disabled,(1)=reset triggered orb $0x02 , al # Bit 1 Fast A20 = 0 (always 0) else enabled. @@ -88,14 +88,14 @@ SYM(A20): SYM(Watchdog): movw $WDTSTATUS , dx # address the WDT status port inb dx , al # get the WDT status - orb $0x01 , al # set the CLKDIS bit + orb $0x01 , al # set the CLKDIS bit outb al , dx # disable the clock to the WDT /* LED_GREEN WAIT_BUTTON */ /* - * Initialize Refresh Control Unit for: + * Initialize Refresh Control Unit for: * Refresh Address = 0x0000 * Refresh gate between rows is 20.0 (???) uSec @@ -108,7 +108,7 @@ SYM(Watchdog): */ /* -SYM(InitRCU): +SYM(InitRCU): SetExRegWord( RFSCIR , 0x1F4) # refresh interval 500 SetExRegWord( RFSBAD , 0x0) # base address SetExRegWord( RFSADD , 0x0) # address register @@ -120,15 +120,15 @@ SYM(InitRCU): WAIT_BUTTON */ /* - * Initialize clock and power mgmt unit for: + * Initialize clock and power mgmt unit for: * Clock Frequency = 50 Mhz * Prescaled clock output = 1 Mhz * Normal halt instructions * - * NOTE: Hope this doesn't change the COMCLK frequency + * NOTE: Hope this doesn't change the COMCLK frequency */ - -SYM(InitClk): + +SYM(InitClk): SetExRegByte( PWRCON, 0x0 ) SetExRegWord( CLKPRS, 0x17) # 0x13 for 1.19318 MHz. 0x17 for 1MHz. @@ -140,7 +140,7 @@ SYM(InitClk): WAIT_BUTTON */ /* - * Initialize I/O port 1 for: + * Initialize I/O port 1 for: * PIN 0 = 0, Inport for external push-button switch * PIN 1 = 1, RTS0# to package pin * PIN 2 = 1, DTR0# to package pin @@ -151,7 +151,7 @@ SYM(InitClk): * PIN 7 = 0, Inport ??? */ -SYM(InitPort1): +SYM(InitPort1): SetExRegByte( P1LTC , 0xd1 ) SetExRegByte( P1DIR , 0x91) SetExRegByte( P1CFG , 0x0e) @@ -160,9 +160,9 @@ SYM(InitPort1): WAIT_BUTTON */ /* - * Initialize I/O port 2 for: + * Initialize I/O port 2 for: * PIN 0 = 0, Outport ??? - * PIN 1 = 0, Outport ??? + * PIN 1 = 0, Outport ??? * PIN 2 = 0, Outport ??? * PIN 3 = 0, Outport ??? * PIN 4 = 0, Outport ??? @@ -170,8 +170,8 @@ SYM(InitPort1): * PIN 6 = 1, Int. periph, TXD0 * PIN 7 = 0, Outport ??? */ - -SYM(InitPort2): + +SYM(InitPort2): SetExRegByte( P2LTC , 0x1f ) SetExRegByte( P2DIR , 0x00 ) SetExRegByte( P2CFG , 0x60) @@ -180,18 +180,18 @@ SYM(InitPort2): WAIT_BUTTON */ /* - * Initialize I/O port 3 P3CFG + * Initialize I/O port 3 P3CFG * PIN 0 = 1, Int. periph, TMROUT0 - * PIN 1 = 1, Int. periph, TMROUT1 - * PIN 2 = 1, Int. periph, INT0 (IR1) - * PIN 3 = 1, Int. periph, INT1 (IR5) - * PIN 4 = 1, Int. periph, INT2 (IR6) - * PIN 5 = 1, Int. periph, INT2 (IR7) + * PIN 1 = 1, Int. periph, TMROUT1 + * PIN 2 = 1, Int. periph, INT0 (IR1) + * PIN 3 = 1, Int. periph, INT1 (IR5) + * PIN 4 = 1, Int. periph, INT2 (IR6) + * PIN 5 = 1, Int. periph, INT2 (IR7) * PIN 6 = 0, Outport ??? * PIN 7 = 1, Int. periph, COMCLK used for serial I/O */ - -SYM(InitPort3): + +SYM(InitPort3): SetExRegByte( P3LTC , 0x00 ) SetExRegByte( P3DIR , 0xbf ) SetExRegByte( P3CFG , 0xbf ) # can check TMROUT0 @@ -200,7 +200,7 @@ SYM(InitPort3): WAIT_BUTTON */ /* - * Initialize Peripheral Pin Configurations: + * Initialize Peripheral Pin Configurations: * PIN 0 = 1, Select RTS1# * PIN 1 = 1, Select DTR1# * PIN 2 = 1, Select TXD1# @@ -210,23 +210,23 @@ SYM(InitPort3): * PIN 6 = 0, Select CS6# * PIN 7 = 0, Don't care */ - -SYM(InitPeriph): - SetExRegByte( PINCFG , 0x3f) + +SYM(InitPeriph): + SetExRegByte( PINCFG , 0x3f) /* LED_GREEN WAIT_BUTTON */ /* - * Initialize the Asynchronous Serial Ports: + * Initialize the Asynchronous Serial Ports: * BIT 7 = 1, Internal SIO1 modem signals * BIT 6 = 1, Internal SIO0 modem signals * BIT 2 = 0, PSCLK for SSIO clock - * BIT 1 = 1, SERCLK for SIO1 clock + * BIT 1 = 1, SERCLK for SIO1 clock * BIT 0 = 1, SERCLK for SIO0 clock */ -SYM(InitSIO): +SYM(InitSIO): SetExRegByte( SIOCFG, 0x00 ) # COMCLK -> baud-rate generator # modem signals -> package pins SetExRegByte( LCR0, 0x80 ) # latch DLL0, DLH0 @@ -235,8 +235,8 @@ SYM(InitSIO): SetExRegByte( LCR0, 0x03 ) # enable r/w buffers, IER0 accessible # mode 8-n-1 SetExRegByte( IER0, 0x00 ) # no generated interrupts - - SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 + + SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 SetExRegByte( DLL1, 0x01 ) # 0x0C set to 9600 baud, 0x6 = 19.2K SetExRegByte( DLH1, 0x00 ) # 0x4 is 28.8K baud SetExRegByte( LCR1, 0x03 ) # enable r/w buffers, IER1 accessible @@ -251,43 +251,43 @@ SYM(InitMCR): SetExRegByte( MCR1, 0x03 ) # standard mode, RTS,DTR activated /* - * Initialize Timer for: + * Initialize Timer for: * BIT 7 = 1, Timer clocks disabled * BIT 6 = 0, Reserved * BIT 5 = 1, TMRCLK2 instead of Vcc to Gate2 * BIT 4 = 0, PSCLK to CLK2 * BIT 3 = 1, TMRCLK1 instead of Vcc to Gate1 * BIT 2 = 0, PSCLK to Gate1 - * BIT 1 = 0, Vcc to Gate0 + * BIT 1 = 0, Vcc to Gate0 * BIT 0 = 0, PSCLK to Gate0 */ /* LED_YELLOW WAIT_BUTTON */ -SYM(InitTimer): - SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 +SYM(InitTimer): + SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 # and 2 are set to Vcc SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB SetExRegByte(TMR0 , 0x00 ) # sfa - SetExRegByte(TMR0 , 0x00 ) # sfa + SetExRegByte(TMR0 , 0x00 ) # sfa + - SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc - SetExRegByte(TMR1 , 0x00 ) # sfa SetExRegByte(TMR1 , 0x00 ) # sfa - + SetExRegByte(TMR1 , 0x00 ) # sfa + SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc - SetExRegByte(TMR2 , 0x00 ) # - SetExRegByte(TMR2 , 0x00 ) # + SetExRegByte(TMR2 , 0x00 ) # + SetExRegByte(TMR2 , 0x00 ) # /* LED_GREEN WAIT_BUTTON */ /* - * Initialize the DMACFG register for: + * Initialize the DMACFG register for: * BIT 7 = 1 , Disable DACK#1 * BITs 6:4 = 100, TMROUT2 connected to DRQ1 * BIT 3 = 1 , Disable DACK0# @@ -315,7 +315,7 @@ SYM(InitTimer): */ SYM(InitInt): - + cli # ! /* LED_YELLOW @@ -330,7 +330,7 @@ SYM(InitInt): SetExRegByte(ICW2M , 0x20 ) # base vector starts at byte 32 SetExRegByte(ICW3M , 0x04) # internal slave cascaded from master IR2 SetExRegByte(ICW4M , 0x01 ) # idem - + SetExRegByte(OCW1M , 0xfb ) # mask master IRQs, but not IR2 (cascade) SetExRegByte(OCW1S , 0xff ) # mask all slave IRQs SetExRegByte(INTCFG , 0x00 ) # slave IRs -> Vss or SSIOINT @@ -346,11 +346,11 @@ SYM(InitInt): /* NOTE: not sure about this so comment out... -SYM(SetCS4): +SYM(SetCS4): SetExRegWord(CS4ADL , 0x702) #Configure chip select 4 SetExRegWord(CS4ADH , 0x00) - SetExRegWord(CS4MSKH, 0x03F) - SetExRegWord(CS4MSKL, 0xFC01) + SetExRegWord(CS4MSKH, 0x03F) + SetExRegWord(CS4MSKL, 0xFC01) */ /* LED_GREEN @@ -364,10 +364,10 @@ SYM(SetCS4): movl $SYM(GDTR), eax andl $0xFFFF, eax -#ifdef NEW_GAS +#ifdef NEW_GAS addr32 data32 -#endif +#endif #if 0 lgdt (eax) # location of GDT in segment @@ -375,11 +375,11 @@ SYM(SetCS4): lgdt SYM(GDTR) # location of GDT /* - NOTE: not sure about this either so comment out for now... -SYM(SetUCS): + NOTE: not sure about this either so comment out for now... +SYM(SetUCS): SetExRegWord(UCSADL, 0xC503) # values taken from TS-1325 memory SetExRegWord(UCSADH, 0x000D) - SetExRegWord(UCSMSKH, 0x0000) + SetExRegWord(UCSMSKH, 0x0000) SetExRegWord(UCSMSKL, 0x3C01) # configure upper chip select */ /* @@ -392,7 +392,7 @@ SYM(SetUCS): mov cr0, eax orw $0x1, ax mov eax, cr0 - + /************************** * Flush prefetch queue, * and load CS selector @@ -406,7 +406,7 @@ SYM(SetUCS): /* * Load the segment registers */ -SYM(_load_segment_registers): +SYM(_load_segment_registers): .code32 /* LED_GREEN @@ -417,7 +417,7 @@ SYM(_load_segment_registers): pLOAD_SEGMENT( GDT_DATA_PTR, ss) pLOAD_SEGMENT( GDT_DATA_PTR, ds) pLOAD_SEGMENT( GDT_DATA_PTR, es) - + /* * Set up the stack */ @@ -482,7 +482,7 @@ SYM (zero_bss): .balign 4 # align tables to 4 byte boundary SYM(IDTR): DESC3( SYM(Interrupt_descriptor_table), 0x07ff ); - + SYM(Interrupt_descriptor_table): /* Now in data section */ .rept 256 .word 0,0,0,0 @@ -493,8 +493,8 @@ SYM(Interrupt_descriptor_table): /* Now in data section */ * Use the first (null) entry in the the GDT as a self-pointer for the GDTR. * (looks like a common trick) */ - -SYM (_Global_descriptor_table): + +SYM (_Global_descriptor_table): SYM(GDTR): DESC3( GDTR, 0x17 ); # one less than the size .word 0 # padding to DESC2 size SYM(GDT_CODE): DESC2(0xffff,0,0x0,0x9B,0xDF,0x00); diff --git a/c/src/lib/libbsp/i386/ts_386ex/startup/bspstart.c b/c/src/lib/libbsp/i386/ts_386ex/startup/bspstart.c index aca43a4d56..e84334c41c 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/startup/bspstart.c +++ b/c/src/lib/libbsp/i386/ts_386ex/startup/bspstart.c @@ -13,10 +13,10 @@ * * Ported to the i386ex and submitted by: * - * Erik Ivanenko + * Erik Ivanenko * University of Toronto * erik.ivanenko@utoronto.ca - * + * * $Id$ */ @@ -45,7 +45,7 @@ extern uint32_t rdb_start; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -62,7 +62,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int heap_bottom; diff --git a/c/src/lib/libbsp/i386/ts_386ex/timer/timer.c b/c/src/lib/libbsp/i386/ts_386ex/timer/timer.c index c4301d39aa..3125165466 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/timer/timer.c +++ b/c/src/lib/libbsp/i386/ts_386ex/timer/timer.c @@ -33,7 +33,7 @@ rtems_boolean Timer_driver_Find_average_overhead; extern void timerisr(); -/* +/* * Number of us per timer interrupt. Note: 1 us == 1 tick. */ @@ -87,7 +87,7 @@ static rtems_raw_irq_connect_data timer_raw_irq_data = { static rtems_raw_irq_connect_data old_raw_irq_data = { BSP_PERIODIC_TIMER + BSP_IRQ_VECTOR_BASE, -}; +}; void Timer_exit() { @@ -143,7 +143,7 @@ int Read_timer(void) /* latch the count */ outport_byte (TIMER_MODE, TIMER_SEL0|TIMER_LATCH ); - /* read the count */ + /* read the count */ inport_byte (TIMER_CNTR0, lsb ); inport_byte (TIMER_CNTR0, msb ); diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/init.c b/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/init.c index 1df43db4a3..ede6acd692 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/init.c +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/init.c @@ -1,4 +1,4 @@ -/* +/* * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * @@ -30,7 +30,7 @@ pid_t getpid() * of the "Ada environment task". Otherwise, we would be * stuck with the defaults set by RTEMS. */ - + void *start_gnat_main( void * argument ) { extern int gnat_main ( int argc, char **argv, char **envp ); diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/serial_debug.adb b/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/serial_debug.adb index f89e290764..5250d82fee 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/serial_debug.adb +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/debug_ada/serial_debug.adb @@ -63,4 +63,3 @@ begin I386_Stub_Glue_Init_Breakin; end Serial_Debug; - diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/listener/init.c b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/listener/init.c index 6b3342f91b..5e87ddf6e2 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/listener/init.c +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/listener/init.c @@ -1,4 +1,4 @@ -/* +/* * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * @@ -32,7 +32,7 @@ pid_t getpid() * of the "Ada environment task". Otherwise, we would be * stuck with the defaults set by RTEMS. */ - + void *start_gnat_main( void * argument ) { extern int gnat_main ( int argc, char **argv, char **envp ); diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/networkconfig.h b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/networkconfig.h index 41dfbe11d4..6b424ccb96 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/networkconfig.h +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/networkconfig.h @@ -1,9 +1,9 @@ /* * Network configuration - * + * ************************************************************ * EDIT THIS FILE TO REFLECT YOUR NETWORK CONFIGURATION * - * BEFORE RUNNING ANY RTEMS PROGRAMS WHICH USE THE NETWORK! * + * BEFORE RUNNING ANY RTEMS PROGRAMS WHICH USE THE NETWORK! * ************************************************************ * * $Id$ diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/tcprelay/init.c b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/tcprelay/init.c index e05eb635d4..5590ad8f2a 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/tcprelay/init.c +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/network_ada/tcprelay/init.c @@ -1,4 +1,4 @@ -/* +/* * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * @@ -32,7 +32,7 @@ pid_t getpid() * of the "Ada environment task". Otherwise, we would be * stuck with the defaults set by RTEMS. */ - + void *start_gnat_main( void * argument ) { extern int gnat_main ( int argc, char **argv, char **envp ); diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/i386_ports.ads b/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/i386_ports.ads index c27ea646e7..44090c4f4b 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/i386_ports.ads +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/i386_ports.ads @@ -43,5 +43,3 @@ private P3DIR: constant Port_Address := 16#F874#; end I386_Ports; - - diff --git a/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/init.c b/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/init.c index 7d3c2026ea..faa6f9876f 100644 --- a/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/init.c +++ b/c/src/lib/libbsp/i386/ts_386ex/tools/ts_1325_ada/init.c @@ -1,4 +1,4 @@ -/* +/* * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * @@ -28,7 +28,7 @@ pid_t getpid() * of the "Ada environment task". Otherwise, we would be * stuck with the defaults set by RTEMS. */ - + void *start_gnat_main( void * argument ) { extern int gnat_main ( int argc, char **argv, char **envp ); diff --git a/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c b/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c index e7279e1ebc..99ec6a34e6 100644 --- a/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c +++ b/c/src/lib/libbsp/i960/cvme961/clock/ckinit.c @@ -30,11 +30,11 @@ volatile uint32_t Clock_driver_ticks; /* ticks since initialization */ void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -74,19 +74,19 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + atexit( Clock_exit ); /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -95,15 +95,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -114,7 +114,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/i960/cvme961/console/console.c b/c/src/lib/libbsp/i960/cvme961/console/console.c index 4b046658b4..ccf5df7258 100644 --- a/c/src/lib/libbsp/i960/cvme961/console/console.c +++ b/c/src/lib/libbsp/i960/cvme961/console/console.c @@ -32,16 +32,16 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + status = rtems_io_register_name( "/dev/console", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -107,7 +107,7 @@ void outbyte( /* * Open entry point */ - + rtems_device_driver console_open( rtems_device_major_number major, rtems_device_minor_number minor, @@ -116,11 +116,11 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -129,11 +129,11 @@ rtems_device_driver console_close( { return RTEMS_SUCCESSFUL; } - + /* * read bytes from the serial port. We only have stdin. */ - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -144,12 +144,12 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; - + buffer = rw_args->buffer; maximum = rw_args->count; - + for (count = 0; count < maximum; count++) { buffer[ count ] = inbyte(); if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { @@ -157,15 +157,15 @@ rtems_device_driver console_read( break; } } - + rw_args->bytes_moved = count; return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; } - + /* * write bytes to the serial port. Stdout and stderr are the same. */ - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -176,12 +176,12 @@ rtems_device_driver console_write( int maximum; rtems_libio_rw_args_t *rw_args; char *buffer; - + rw_args = (rtems_libio_rw_args_t *) arg; - + buffer = rw_args->buffer; maximum = rw_args->count; - + for (count = 0; count < maximum; count++) { if ( buffer[ count ] == '\n') { outbyte('\r'); @@ -192,11 +192,11 @@ rtems_device_driver console_write( rw_args->bytes_moved = maximum; return 0; } - + /* * IO Control entry point */ - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/i960/cvme961/include/bsp.h b/c/src/lib/libbsp/i960/cvme961/include/bsp.h index 9c892faa0f..d05b0819c8 100644 --- a/c/src/lib/libbsp/i960/cvme961/include/bsp.h +++ b/c/src/lib/libbsp/i960/cvme961/include/bsp.h @@ -135,7 +135,7 @@ BSP_EXTERN i960ca_control_table *Ctl_tbl; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c b/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c index 9b8b9b6daa..5a5bd86d32 100644 --- a/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c +++ b/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c @@ -21,7 +21,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -38,7 +38,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -55,7 +55,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int end; @@ -66,12 +66,12 @@ void bsp_pretasking_hook(void) heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); bsp_libc_init((void *) heap_start, 64 * 1024, 0); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/i960/i960sim/console/console-io.c b/c/src/lib/libbsp/i960/i960sim/console/console-io.c index 853d133255..1f17fad4cb 100644 --- a/c/src/lib/libbsp/i960/i960sim/console/console-io.c +++ b/c/src/lib/libbsp/i960/i960sim/console/console-io.c @@ -47,7 +47,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -61,7 +61,7 @@ int console_inbyte_nonblocking( char c; status = _sys_read (0, &c, 1, &nread); - if ( status == 0 ) + if ( status == 0 ) return c; return -1; } diff --git a/c/src/lib/libbsp/i960/i960sim/include/bsp.h b/c/src/lib/libbsp/i960/i960sim/include/bsp.h index d02c20f3fd..cab30a0c0e 100644 --- a/c/src/lib/libbsp/i960/i960sim/include/bsp.h +++ b/c/src/lib/libbsp/i960/i960sim/include/bsp.h @@ -68,7 +68,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/i960/i960sim/start/start.c b/c/src/lib/libbsp/i960/i960sim/start/start.c index 590e3eb8ed..d6b0f9aafe 100644 --- a/c/src/lib/libbsp/i960/i960sim/start/start.c +++ b/c/src/lib/libbsp/i960/i960sim/start/start.c @@ -4,7 +4,7 @@ char **environ = __env; #define ENABLE_TRACE_MASK 1 #define STACK_ALIGN 64 -__inline static void +__inline static void init_Cregs (void) { /* set register values gcc like */ diff --git a/c/src/lib/libbsp/i960/i960sim/startup/bspstart.c b/c/src/lib/libbsp/i960/i960sim/startup/bspstart.c index 8469fe710d..60ac79070a 100644 --- a/c/src/lib/libbsp/i960/i960sim/startup/bspstart.c +++ b/c/src/lib/libbsp/i960/i960sim/startup/bspstart.c @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int HeapBase; @@ -69,7 +69,7 @@ void bsp_pretasking_hook(void) #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c b/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c index e5e5537965..8afdc4a320 100644 --- a/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c +++ b/c/src/lib/libbsp/i960/rxgen960/clock/ckinit.c @@ -1,6 +1,6 @@ /* Clock_init() * - * This routine initializes the i960RP onboard timer + * This routine initializes the i960RP onboard timer * The tick frequency is 1 millisecond; assuming 33MHz core * * Input parameters: NONE @@ -34,11 +34,11 @@ volatile uint32_t Clock_driver_ticks; unsigned int clock_isr_global[16]; /* place to store global regs */ void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -72,14 +72,14 @@ void Install_clock( Old_ticker = set_vector( (((unsigned int) clock_isr) | 0x2), CLOCK_VECTOR, 1 ); /* initialize the i960RP timer 0 here */ - + /* set the timer countdown (Assume 33MHz operation) */ *trr0 = 30 * BSP_Configuration.microseconds_per_tick ; *tcr0 = 30 * BSP_Configuration.microseconds_per_tick ; /* kkprintf("Load the timers with %x\n", 30 * BSP_Configuration.microseconds_per_tick / Reload_Clock_isrs); */ - + *tmr0 = BUS_CLOCK_1 | TMR_AUTO_RELOAD | TMR_ENABLE; /* Unmask the interrupts */ *ipnd &= ~(1 << 12); @@ -105,19 +105,19 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + atexit( Clock_exit ); /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -126,15 +126,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -145,7 +145,7 @@ rtems_device_driver Clock_control( (void) set_tmr_vector( args->buffer, CLOCK_VECTOR, 0 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/i960/rxgen960/console/console.c b/c/src/lib/libbsp/i960/rxgen960/console/console.c index fd5124c6bf..9e24c8c7a1 100644 --- a/c/src/lib/libbsp/i960/rxgen960/console/console.c +++ b/c/src/lib/libbsp/i960/rxgen960/console/console.c @@ -38,20 +38,20 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + if ( console_pmr_init(*(uint32_t*)arg) ) return RTEMS_INVALID_NUMBER; - + status = rtems_io_register_name( "/dev/console", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -133,7 +133,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -161,7 +161,7 @@ rtems_device_driver console_read( uint8_t *buffer; uint32_t maximum; uint32_t count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -191,7 +191,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/i960/rxgen960/console/serial.c b/c/src/lib/libbsp/i960/rxgen960/console/serial.c index bebeca997d..9f1af9acec 100644 --- a/c/src/lib/libbsp/i960/rxgen960/console/serial.c +++ b/c/src/lib/libbsp/i960/rxgen960/console/serial.c @@ -10,10 +10,10 @@ typedef unsigned char uchar ; /* Abbreviations */ typedef unsigned short ushort ; typedef unsigned long ulong ; int DBGConsole_make_sync = 0; -#define CONSOLE_CHANNELS 1 +#define CONSOLE_CHANNELS 1 #define MAX_CONSOLE 4 -static int consoles[MAX_CONSOLE]; +static int consoles[MAX_CONSOLE]; static int active_consoles = 0; static struct{ rtems_id sem; @@ -25,7 +25,7 @@ static struct{ /* This uses the message out and in buffers as serial emulator. - Pretty stupid eh? + Pretty stupid eh? */ #define uart1 ((volatile unsigned char *)0x1318) @@ -51,7 +51,7 @@ console_uartinit(unsigned int BAUDRate) return(0); } - + /* Introduce a new console channel */ console_new(char * name) { @@ -71,13 +71,13 @@ console_new(char * name) rtems_task_ident( RTEMS_SELF, RTEMS_SEARCH_ALL_NODES, &consoles[active_consoles] ); #endif } - + /*********************************************************************** *** Transmit character to host. *** put the console ID in upper byte - *** + *** ***********************************************************************/ int console_sps_putc(int cc) @@ -138,10 +138,10 @@ wait: char buffer[9]; int count; int digit; - + for (count = 7 ; count >= 0 ; count--) { digit = (num >> (count * 4)) & 0xf; - + if (digit <= 9) console_sps_putc( (char) ('0' + digit)); else @@ -161,7 +161,7 @@ wait: int j = 0; int val = 0; int digit = 0; - + console_sps_putc(13); console_sps_putc(10); putnum((unsigned int) addr); @@ -176,7 +176,7 @@ wait: digit = (val & 0xf0) >> 4; val <<= 4; - if (digit < 10) + if (digit < 10) { console_sps_putc(digit + '0'); } @@ -218,7 +218,7 @@ wait: unsigned int *satucmd = (unsigned int *) 0x1298; unsigned int *soccar = (unsigned int *) 0x12a8; unsigned int *soccdp = (unsigned int *) 0x12b0; - + *satucmd = 4; console_sps_putc(13); @@ -236,7 +236,7 @@ wait: digit = (val & 0xf000) >> 12; val <<= 4; - if (digit < 10) + if (digit < 10) { console_sps_putc(digit + '0'); } @@ -269,7 +269,7 @@ wait: #ifdef CONSOLE_CHANNELS int console_sps_getc() { - + int consinx; int rtid, i; unsigned int level, level2; @@ -304,7 +304,7 @@ int console_sps_getc() rtems_interrupt_enable(level); return ch; } - + void cons_isr() { @@ -323,7 +323,7 @@ void cons_isr() release: *uart_rx = 0; } - + #else volatile int console_foo = 0; int console_sps_getc() diff --git a/c/src/lib/libbsp/i960/rxgen960/include/bsp.h b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h index d4014087b7..cec76ce3fb 100644 --- a/c/src/lib/libbsp/i960/rxgen960/include/bsp.h +++ b/c/src/lib/libbsp/i960/rxgen960/include/bsp.h @@ -134,7 +134,7 @@ BSP_EXTERN i960_control_table *Ctl_tbl; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/i960/rxgen960/start/rxgen_romld.S b/c/src/lib/libbsp/i960/rxgen960/start/rxgen_romld.S index 682841581f..de62be173d 100644 --- a/c/src/lib/libbsp/i960/rxgen960/start/rxgen_romld.S +++ b/c/src/lib/libbsp/i960/rxgen960/start/rxgen_romld.S @@ -11,11 +11,11 @@ .globl _start .globl _romFaultStart .globl _led_array - .text + .text start: /* JRS */ _start: /* JRS */ -SYM(romStart ): -SYM(_romStart ): +SYM(romStart ): +SYM(_romStart ): # This line is to make compiler happy. mov 0, g14 ldconst 0x120f,r10 # BIST register @@ -50,8 +50,8 @@ SYM(_romStart ): # This point will never be reached. */ -SYM(_pmc_start) : -SYM(pmc_start) : +SYM(_pmc_start) : +SYM(pmc_start) : ldconst 0x120f,r10 # BIST register ldconst 0x4,r3 stob r3,0(r10) //# 4->LED @@ -62,7 +62,7 @@ SYM(pmc_start) : */ ldconst _svrStackPtr, fp - lda 16*4(fp), sp + lda 16*4(fp), sp ldconst 0x5,r3 stob r3,0(r10) //# 5->LED @@ -78,8 +78,8 @@ SYM(pmc_start) : /* # if _romMain ever returns ... */ b _romExit -SYM(romFaultStart) : -SYM(_romFaultStart) : +SYM(romFaultStart) : +SYM(_romFaultStart) : mov 0, g14 @@ -90,7 +90,7 @@ SYM(_romFaultStart) : # _svrStackPtr is defined directly in rom.ld. */ ldconst _svrStackPtr, fp - lda 16*4(fp), sp + lda 16*4(fp), sp /* # Set processor priority to zero. */ @@ -100,7 +100,7 @@ SYM(_romFaultStart) : // # Now to real code // Fix this up callx _romFaultMain callx _rx_boot_card -// # if _romMain ever returns ... +// # if _romMain ever returns ... b _romExit _romExit : @@ -146,7 +146,7 @@ SYM(led_array): .globl _bssStart_1 .globl _bssEnd_1 .globl _intStackPtr - + _faultStart: _faultEnd: _faultCheckSum: diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.S b/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.S index 04a90d4476..3b452f8340 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.S +++ b/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.S @@ -4,7 +4,7 @@ /* * asmfault.s - * Last change : 31. 1.95 + * Last change : 31. 1.95 */ .text @@ -21,7 +21,7 @@ _faultHndlEntry : ldconst _faultBuffer, r3 /* Save global registers. */ stq g0, 64+0(r3) - stq g4, 64+16(r3) + stq g4, 64+16(r3) stq g8, 64+32(r3) stt g12, 64+48(r3) /* Faulted code's fp (g15) is our pfp. */ @@ -38,7 +38,7 @@ _faultHndlEntry : ldq 32(g3), r4 stq r4, 32(r3) ldq 48(g3), r4 - stq r4, 48(r3) + stq r4, 48(r3) /* To handling. */ mov fp, g0 mov r3, g1 diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.h b/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.h index 2860ed5c1f..e3c406c8ab 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/asmfault.h @@ -9,7 +9,7 @@ #ifndef _ASMFAULT_H_ #define _ASMFAULT_H_ - /* Fault handler start point. + /* Fault handler start point. */ extern void faultHndlEntry(void); diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S index 193f5a7e4d..82a9566b01 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S +++ b/c/src/lib/libbsp/i960/rxgen960/startup/asmstub.S @@ -44,7 +44,7 @@ _asm_exit: .text _asm_sysctl: - b _asm_sysctl + b _asm_sysctl sysctl g0, g1, g2 ret diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/bspstart.c b/c/src/lib/libbsp/i960/rxgen960/startup/bspstart.c index 77609f358c..17e1b99ca8 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/bspstart.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/bspstart.c @@ -22,13 +22,13 @@ #include <string.h> #include <fcntl.h> #include <stdio.h> - + #define RXGEN960_INIT #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + #define HEAP_SIZE 1024*1024*2 /* @@ -61,7 +61,7 @@ unsigned int top_of_used_memory; * not yet initialized. * */ - + void bsp_pretasking_hook(void) { @@ -83,9 +83,9 @@ bsp_pretasking_hook(void) #endif *(unsigned char *)(0x120f) = 0xf; } - -/* we need to have the top of memory remembered later to start libc_init with + +/* we need to have the top of memory remembered later to start libc_init with the correct values */ int rx_boot_card( int argc, char **argv, char **environp) @@ -122,7 +122,7 @@ bsp_start(void) /* just trying to get along */ Cpu_table.stack_allocate_hook = 0; Cpu_table.stack_free_hook = 0; - + /* * Tell libio how many fd's we want and allow it to tweak config */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c index c1aa826eb5..826e569cde 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.c @@ -71,18 +71,18 @@ ControlTblEntry controlTbl[] = { REGION_8_CONFIG, 0, REGION_A_CONFIG, - 0, + 0, /* --group 5 -- */ REGION_C_CONFIG, 0, REGION_BOOT_CONFIG, - 0, + 0, /* --group 6 -- */ - 0, /* Reserved */ + 0, /* Reserved */ 0, TC, BCON -}; +}; /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.h b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.h index f4712a8562..416164a957 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.h @@ -9,7 +9,7 @@ #ifndef _CNTRLTBL_H_ #define _CNTRLTBL_H_ - /* Control Table Entry. + /* Control Table Entry. */ typedef unsigned int ControlTblEntry; /* Control Table itself. @@ -18,34 +18,34 @@ extern ControlTblEntry controlTbl[]; extern ControlTblEntry rom_controlTbl[]; /* Interrupt Registers Initial. - */ + */ #define IPB0 0 -#define IPB1 0 -#define DAB0 0 -#define DAB1 0 +#define IPB1 0 +#define DAB0 0 +#define DAB1 0 -#define I_DISABLE (0x1<<10) -#define I_ENABLE 0 +#define I_DISABLE (0x1<<10) +#define I_ENABLE 0 #define MSK_UNCHNG 0 -#define MSK_CLEAR (0x1<<11) +#define MSK_CLEAR (0x1<<11) -#define VECTOR_CACHE (0x1<<13) +#define VECTOR_CACHE (0x1<<13) /* BreakPoint Control Register Initial. */ -#define BPCON 0 +#define BPCON 0 /* Bus Controller Mode Comstants. */ #define CONF_TBL_VALID 0x1 -#define PROTECT_RAM 0x2 +#define PROTECT_RAM 0x2 #define PROTECT_RAM_SUP 0x4 -#endif +#endif /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c index 67b2420345..80fb551a8f 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/fault.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/fault.c @@ -1,7 +1,7 @@ /*-------------------------------------*/ /* fault.c */ /* Last change : 13. 7.95 */ -/*-------------------------------------*/ +/*-------------------------------------*/ /* * $Id$ */ @@ -21,11 +21,11 @@ extern void romFaultStart(void); */ typedef struct { UserFaultHandler hndl; /* Handler itself. */ - int cnt; /* Handler is valid for cnt times. */ -} UserFaultEntry; + int cnt; /* Handler is valid for cnt times. */ +} UserFaultEntry; /* Table itself. */ -static UserFaultEntry userFaultTable[] = { +static UserFaultEntry userFaultTable[] = { {0, 0}, /* Parallel */ {0, 0}, /* Trace */ {0, 0}, /* Operation */ @@ -73,7 +73,7 @@ int faultOk(int fault) #if 0 faultCheckSum = faultNewCheckSum(); #endif - faultCheckSum ++; + faultCheckSum ++; rsl = 1; } return rsl; @@ -90,18 +90,18 @@ void faultBad(int invokedFromRom, */ /* memChnlI960Fault();*/ /* Give some panic message. - */ + */ faultInfo(invokedFromRom, inst, faultBuffer, type, sbtp); /* At this point RAM is repaired. Do * whatever you want. */ #if 0 - if (OsfIsUp) { + if (OsfIsUp) { asm_exit(romFaultStart, & ram_prcb); } else { asm_exit(romStart, & ram_prcb); - } + } # endif asm_exit(romFaultStart, & ram_prcb); } @@ -109,7 +109,7 @@ void faultGood(unsigned int inst, unsigned int * faultBuffer, unsigned int type, unsigned int sbtp) { static unsigned int faultNewCheckSum(void); - + if (userFaultTable[type].hndl != 0 && userFaultTable[type].cnt > 0) { /* This is done to avoid the situation when * handler causes a fault and, thus, infinite recursion. @@ -122,19 +122,19 @@ void faultGood(unsigned int inst, unsigned int * faultBuffer, #endif faultCheckSum --; /* Invoke handler. - */ + */ (* userFaultTable[type].hndl)(inst, faultBuffer, type, sbtp); /* If this returns => fault is bad. - */ + */ } faultBad(0, inst, faultBuffer, type, sbtp); } static unsigned int faultNewCheckSum(void) { unsigned int * f = faultStart; - unsigned int * l = faultEnd; + unsigned int * l = faultEnd; unsigned int sum; - + for (sum = 0; f < l; f ++) { sum += * f; } @@ -191,7 +191,7 @@ static void faultInfo(int invokedFromRom, faultBuffer[G0_REGNUM+6], faultBuffer[G0_REGNUM+7]); printf("g8=0x%08x g9=0x%08x gA=0x%08x gB=0x%08x\n", faultBuffer[G0_REGNUM+8], faultBuffer[G0_REGNUM+9], - faultBuffer[G0_REGNUM+10], faultBuffer[G0_REGNUM+11]); + faultBuffer[G0_REGNUM+10], faultBuffer[G0_REGNUM+11]); printf("gC=0x%08x gD=0x%08x gE=0x%08x gF=0x%08x\n", faultBuffer[G0_REGNUM+12], faultBuffer[G0_REGNUM+13], faultBuffer[G0_REGNUM+14], faultBuffer[G0_REGNUM+15]); @@ -203,21 +203,21 @@ static void faultInfo(int invokedFromRom, faultBuffer[R0_REGNUM+6], faultBuffer[R0_REGNUM+7]); printf("r8=0x%08x r9=0x%08x rA=0x%08x rB=0x%08x\n", faultBuffer[R0_REGNUM+8], faultBuffer[R0_REGNUM+9], - faultBuffer[R0_REGNUM+10], faultBuffer[R0_REGNUM+11]); + faultBuffer[R0_REGNUM+10], faultBuffer[R0_REGNUM+11]); printf("rC=0x%08x rD=0x%08x rE=0x%08x rF=0x%08x\n", faultBuffer[R0_REGNUM+12], faultBuffer[R0_REGNUM+13], - faultBuffer[R0_REGNUM+14], faultBuffer[R0_REGNUM+15]); + faultBuffer[R0_REGNUM+14], faultBuffer[R0_REGNUM+15]); if (invokedFromRom) { printf("RAM image damaged. No chance to recover\n"); - } + } else { - printf("RAM image not damaged. Still no recovery\n"); + printf("RAM image not damaged. Still no recovery\n"); } -} +} static char * faultParallelSbtpStr(unsigned int sbtp) { static char buf[10]; - + sprintf(buf, "%d", sbtp); return buf; } @@ -231,46 +231,46 @@ static char * faultTraceSbtpStr(unsigned int sbtp) if (sbtp & 0x2) { strcat(buf, "Instruction"); notEmpty = 1; - } + } if (sbtp & 0x4) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Branch"); notEmpty = 1; - } + } if (sbtp & 0x8) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Call"); notEmpty = 1; - } + } if (sbtp & 0x10) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Return"); notEmpty = 1; - } + } if (sbtp & 0x20) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Prereturn"); notEmpty = 1; - } + } if (sbtp & 0x40) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Supervisor"); notEmpty = 1; - } + } if (sbtp & 0x80) { if (notEmpty) strcat(buf, ":"); strcat(buf, "Breakpoint"); notEmpty = 1; - } + } if (! notEmpty) { strcat(buf, "Unknown"); - } + } return buf; } static char * faultOperationSbtpStr(unsigned int sbtp) { char * rsl; - + if (sbtp == 0x1) rsl = "Invalid Opcode"; else if (sbtp == 0x2) rsl = "Unimplemented"; else if (sbtp == 0x3) rsl = "Unaligned"; @@ -281,39 +281,39 @@ static char * faultOperationSbtpStr(unsigned int sbtp) static char * faultArithmeticSbtpStr(unsigned int sbtp) { char * rsl; - + if (sbtp == 0x1) rsl = "Integer Overflow"; else if (sbtp == 0x2) rsl = "Arithmetic Zero-Divide"; - else rsl = "Unknown"; + else rsl = "Unknown"; return rsl; } static char * faultReservedSbtpStr(unsigned int sbtp) { - return "Unknown"; + return "Unknown"; } static char * faultConstraintSbtpStr(unsigned int sbtp) { char * rsl; - + if (sbtp == 0x1) rsl = "Constraint Range"; else if (sbtp == 0x2) rsl = "Priveleged"; - else rsl = "Unknown"; + else rsl = "Unknown"; return rsl; } static char * faultProtectionSbtpStr(unsigned int sbtp) { char * rsl; - + if (sbtp == 0x1) rsl = "Length"; - else rsl = "Unknown"; + else rsl = "Unknown"; return rsl; } static char * faultTypeSbtpStr(unsigned int sbtp) { char * rsl; - + if (sbtp == 0x1) rsl = "Type Mismatch"; - else rsl = "Unknown"; + else rsl = "Unknown"; return rsl; } static char * faultUnknownSbtpStr(unsigned int sbtp) diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/fault.h b/c/src/lib/libbsp/i960/rxgen960/startup/fault.h index 54fcfd7bae..eb11786979 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/fault.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/fault.h @@ -10,15 +10,15 @@ #define _FAULT_H_ /* (RAM-based) Fault Handler. - * Is invoked when there is no chance to repair current state. + * Is invoked when there is no chance to repair current state. */ extern void faultBad(int invokedFromRom, - unsigned int inst, unsigned int * faultBuffer, + unsigned int inst, unsigned int * faultBuffer, unsigned int type, unsigned int sbtp); /* (RAM-based) Fault Handler. - * Is invoked when there is a chance to repair current state. + * Is invoked when there is a chance to repair current state. */ -extern void faultGood(unsigned int instr, unsigned int * faultBuffer, +extern void faultGood(unsigned int instr, unsigned int * faultBuffer, unsigned int type, unsigned int sbtp); /* Some addresses that are defined in rom.ld. */ @@ -27,7 +27,7 @@ extern unsigned int faultCheckSum; extern unsigned int faultBuffer[]; extern unsigned int faultStart[]; -extern unsigned int faultEnd[]; +extern unsigned int faultEnd[]; /* Interface for user to register fault handlers of his own. * Fault names. */ @@ -37,10 +37,10 @@ extern unsigned int faultEnd[]; #define ArithmeticFLT 3 #define ConstraintFLT 5 #define ProtectionFLT 7 -#define TypeFLT 9 +#define TypeFLT 9 /* User-registered fault handler. */ -typedef void (* UserFaultHandler)(unsigned int inst, unsigned int * faultBuf, +typedef void (* UserFaultHandler)(unsigned int inst, unsigned int * faultBuf, unsigned int type, unsigned int sbtp); /* Register user-defined fault handler. The third argument is * how many times this fault handler will be valid. This to avoid @@ -50,7 +50,7 @@ extern int faultRegister(int fault, UserFaultHandler, int cnt); /* Validate handler for one more time. */ extern int faultOk(int fault); - + #endif /*-------------*/ /* End of file */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/faultret.h b/c/src/lib/libbsp/i960/rxgen960/startup/faultret.h index 7f7fe4f205..9c667088bc 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/faultret.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/faultret.h @@ -10,7 +10,7 @@ #define _FAULTRET_H_ /* Return to the point where fault happened. - * Fault state keeps all registers. + * Fault state keeps all registers. */ extern void faultRet(unsigned int * faultState); diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.c index d4cc505331..d83dc07eb3 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.c @@ -1,7 +1,7 @@ /*-------------------------------------*/ /* flttbl.c */ /* Last change : 3.11.94 */ -/*-------------------------------------*/ +/*-------------------------------------*/ /* * $Id$ */ @@ -21,10 +21,10 @@ FaultTblEntry faultTbl[] = { {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Parallel */ {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Trace */ - {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Operation */ - {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Arithmetic */ - {0, 0}, /* Reserved */ - {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Constraint */ + {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Operation */ + {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Arithmetic */ + {0, 0}, /* Reserved */ + {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Constraint */ {0, 0}, /* Reserved */ {faultHndlEntry + LOCAL_FH, LOCAL_FW}, /* Protection */ {0, 0}, /* Reserved */ @@ -40,9 +40,9 @@ void fltTblInit(void) static unsigned int fltTblCheckSum(void) { unsigned int * f = faultStart; - unsigned int * l = faultEnd; + unsigned int * l = faultEnd; unsigned int sum; - + for (sum = 0; f < l; f ++) { sum += * f; } @@ -68,34 +68,34 @@ void faultTblHandler(unsigned int * fp, unsigned int * faultBuffer) /* Address of faulting instruction. */ - ip = (unsigned int *) fp[-1]; + ip = (unsigned int *) fp[-1]; /* Type/Subtype word. */ /* put address of faulting instruction to console */ kkprintf("Fault: %x\n", ip); - - tw = * (struct typeWord *) & fp[-2]; + + tw = * (struct typeWord *) & fp[-2]; /* Type and subtype. */ type = tw.type; - sbtp = tw.sbtp; + sbtp = tw.sbtp; /* Arithmetic controls. */ - ac = fp[-3]; + ac = fp[-3]; /* Process controls. */ - pc = fp[-4]; + pc = fp[-4]; /* Global and local registers are in faultBuffer * already. Save the rest. Change RIP to IP. */ faultBuffer[IP_REGNUM] = (unsigned int) ip; faultBuffer[ACW_REGNUM] = ac; - faultBuffer[PCW_REGNUM] = pc; + faultBuffer[PCW_REGNUM] = pc; /* Bad instruction itself. We do * this here since it may be repaired (by copying from PROM). */ - inst = * ip; + inst = * ip; /* Now, to handling. */ if (faultCheckSum != fltTblCheckSum()) { @@ -104,15 +104,15 @@ void faultTblHandler(unsigned int * fp, unsigned int * faultBuffer) * Repair RAM memory which is * destroyed by silly user. */ - copyCodeToRom(); + copyCodeToRom(); /* And call RAM-based fault handler. */ faultBad(1, inst, faultBuffer, type, sbtp); - } + } else { /* There exist a chance to recover. */ - faultGood(inst, faultBuffer, type, sbtp); + faultGood(inst, faultBuffer, type, sbtp); } } /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.h b/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.h index 8a3a0a91d2..956d86e686 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/flttbl.h @@ -9,9 +9,9 @@ #ifndef _FLTTBL_H_ #define _FLTTBL_H_ - /* FaultTable Entry. + /* FaultTable Entry. */ -typedef struct { +typedef struct { void (* hndl)(void); /* Fault Handle */ unsigned int type; /* Fault Table Type */ } FaultTblEntry; @@ -21,19 +21,19 @@ typedef struct { #define SYSTEM_FH 0x10 #define LOCAL_FW 0 -#define SYSTEM_FW 0x027F +#define SYSTEM_FW 0x027F /* FaultTable Itself. */ extern FaultTblEntry faultTbl[]; /* To initialize fault handling. */ -extern void faultTblInit(void); +extern void faultTblInit(void); /* Fault handler. Invoked from low-level handler. */ extern void faultTblHandler(unsigned int * fp, unsigned int * faultBuffer); - -#endif + +#endif /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/frmstr.c b/c/src/lib/libbsp/i960/rxgen960/startup/frmstr.c index 783dfc4f62..682890e57b 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/frmstr.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/frmstr.c @@ -102,7 +102,7 @@ int format_string(const char * fmt, ArgType * args, char * buffer) s = s1; do { if (s == 0) break; - if (* s == 0) + if (* s == 0) break; s ++; } while (-- ndigit); @@ -111,7 +111,7 @@ int format_string(const char * fmt, ArgType * args, char * buffer) j = 2; case 'u': getu: - + if (! lflag) { geta(& inte, wsize(inte)); goto i_unsignd; @@ -119,7 +119,7 @@ int format_string(const char * fmt, ArgType * args, char * buffer) # ifdef DO_LONG case 'U': getlu: - + geta((ArgType *) & l, wsize(l)); goto l_unsignd; case 'B': @@ -133,21 +133,21 @@ int format_string(const char * fmt, ArgType * args, char * buffer) goto getlu ; case 'D': l_signed: - + geta((ArgType *) & l, wsize(l)); if (l < 0) { STORE_BYTE(s ++, '-'); l = -l; } goto do_l; - + l_unsignd: if (l && ndigit) STORE_BYTE(s ++, '0'); do_l: - + s = l_compute(l, j, s); break; # endif @@ -165,14 +165,14 @@ int format_string(const char * fmt, ArgType * args, char * buffer) inte = - inte; } goto do_i; - + i_unsignd: - + if (inte && ndigit) STORE_BYTE(s ++, '0'); do_i: - + s = i_compute(inte, j, s); break; case 'c': @@ -204,7 +204,7 @@ int format_string(const char * fmt, ArgType * args, char * buffer) do STORE_BYTE(buffer ++, zfill); while (-- c); } - } + } while (-- j >= 0) STORE_BYTE(buffer ++, * s1 ++); while (-- c >= 0) @@ -268,7 +268,7 @@ static char *l_compute(long l1,int d, char * s) l2 = ((l1>>1) & ~signbit(l1)); l1 = l2 / (d>>1); c += (l2%(d>>1))<<1; - } + } else { c = l1 % d; l1 = l1 / d; @@ -306,7 +306,7 @@ long store_byte(char * cp, long c) #define INT 0 #define FLOAT 1 -static int new_c(void); +static int new_c(void); static void unnew_c(char); static int _innum(int ** ptr, int type, int len, int size, int * eofptr); static int _instr(char * ptr, int type, int len, int * eofptr); @@ -336,13 +336,13 @@ int unformat_string(const char * fmt, int ** argp, const char * buffer) line = buffer; linep = (char*)line; - + nmatch = 0; fileended = 0; for (;;) switch (ch = * fmt ++) { - case '\0': + case '\0': return (nmatch); - case '%': + case '%': if ((ch = * fmt ++) == '%') goto def; ptr = 0; @@ -381,16 +381,16 @@ int unformat_string(const char * fmt, int ** argp, const char * buffer) break; case ' ': case '\n': - case '\t': + case '\t': while ((ch1 = new_c())==' ' || ch1=='\t' || ch1=='\n') ; if (ch1 != EOF) unnew_c(ch1); break; default: - + def: - + ch1 = new_c(); if (ch1 != ch) { if (ch1==EOF) @@ -400,10 +400,10 @@ int unformat_string(const char * fmt, int ** argp, const char * buffer) } } } -static int new_c() +static int new_c() { char c; - + if (linep) { c = * linep ++; return c; @@ -421,7 +421,7 @@ static int _innum(int ** ptr, int type, int len, int size, int * eofptr) { # ifdef DO_FLOAT extern double atof(); -# endif +# endif char * np; char numbuf[64]; int c, base; @@ -571,7 +571,7 @@ static int _instr(char * ptr, int type, int len, int * eofptr) return 1; } return 0; -} +} static const char * _getccl(const char * s) { int c, t; diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.S b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.S index 2ca149ffe1..71802b34f0 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.S +++ b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.S @@ -11,11 +11,11 @@ .globl _nmiHandler .globl _intr5Handler .globl _intr6Handler - .globl _clockHandler + .globl _clockHandler - .text + .text -# NMI Handler +# NMI Handler _nmiHandler : ldconst 64, r4 addo sp, r4, sp diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.h b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.h index e9235fda06..5121fc0155 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/ihandler.h @@ -15,7 +15,7 @@ extern void nmiHandler(void); /* Interrupt Handlers for Dedicated Interrupts. */ extern void intr5Handler(void); -extern void intr6Handler(void); +extern void intr6Handler(void); #endif /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/intrtbl.h b/c/src/lib/libbsp/i960/rxgen960/startup/intrtbl.h index 9fa40d1d4e..196825f2b3 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/intrtbl.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/intrtbl.h @@ -17,17 +17,17 @@ typedef void (* IntrHndl)(void); typedef struct { unsigned int pendPrty; /* Pending Priorities */ unsigned int pendIntr[8]; /* Pending Interrupts */ - IntrHndl intrHndl[248]; /* Interrupt Handlers */ + IntrHndl intrHndl[248]; /* Interrupt Handlers */ } InterruptTbl; /* Interrupt Handler Type. */ #define NORMAL_IH 0 -#define IN_CACHE_IH 0x10 +#define IN_CACHE_IH 0x10 /* Interrupt Table Itself. */ extern InterruptTbl interruptTbl; -#endif +#endif /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/main.h b/c/src/lib/libbsp/i960/rxgen960/startup/main.h index 08b3c7c09c..e71bdb59aa 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/main.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/main.h @@ -9,7 +9,7 @@ #ifndef _MAIN_H_ #define _MAIN_H_ - /* ROM monitor main function(s). + /* ROM monitor main function(s). * Gets control from rommon.s. */ extern void romMain(void); diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/memchnl.h b/c/src/lib/libbsp/i960/rxgen960/startup/memchnl.h index 2569226956..554b77006a 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/memchnl.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/memchnl.h @@ -1,7 +1,7 @@ /*-------------------------------------*/ /* memchnl.h */ /* Last change : 16. 5.95 */ -/*-------------------------------------*/ +/*-------------------------------------*/ /* * $Id$ */ @@ -10,7 +10,7 @@ #define _MEMCHNL_H_ /* The following is a dummy for now to be filled in - as the message passing stuff gets migrated to + as the message passing stuff gets migrated to I20 (or other standard ) */ @@ -34,15 +34,15 @@ extern void memChnlIotFinished(IOTrCBlk *); */ extern void memChnlI960Fault(void); /* IOT handler procedure. - */ + */ typedef void (* IotHandler)(IOTrCBlk *, int tr_req); /* Register handler to process IOT's. - */ + */ extern void memChnlRegisterHndl(IotHandler); /* Intermediate image buffer. * Defined in *.ld */ -extern unsigned int downloadStart[]; +extern unsigned int downloadStart[]; typedef struct { int ptr_len; diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/nulsystbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/nulsystbl.c index a9a3292977..4dc81c02b8 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/nulsystbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/nulsystbl.c @@ -9,9 +9,9 @@ #include "prcb.h" #include "systbl.h" /*-------------------------------------*/ - /* System Procedures Table. + /* System Procedures Table. * Dummy version that will live in ROM at all times - * RP does fetch on it, so must be present here rather than pointing + * RP does fetch on it, so must be present here rather than pointing * to ram */ SystemTbl nulsystemTbl = { @@ -27,7 +27,7 @@ SystemTbl nulsystemTbl = { 0, /* 20 */ 0, /* 21 */ 0, 0, /* 22 - 23 */ - 0, /* 24 */ + 0, /* 24 */ 0, /* 25 */ 0, /* 26 */ 0, /* 27 */ @@ -37,8 +37,8 @@ SystemTbl nulsystemTbl = { 0, /* 31 */ 0, 0, 0, 0, 0, 0, 0, 0, /* 32 - 39 */ 0, /* 40 */ - 0, /* 41 */ - 0, /* 42 */ + 0, /* 41 */ + 0, /* 42 */ 0, /* 43 */ 0, /* 44 */ 0, /* 45 */ @@ -50,22 +50,22 @@ SystemTbl nulsystemTbl = { 0, /* 58 */ 0, 0, 0, 0, 0, /* 59 - 63 */ 0, /* 64 */ - 0, /* 65 */ - 0, 0, 0, 0, 0, 0, /* 66 - 71 */ - 0, /* 72 */ - 0, /* 73 */ + 0, /* 65 */ + 0, 0, 0, 0, 0, 0, /* 66 - 71 */ + 0, /* 72 */ + 0, /* 73 */ 0, /* 74 */ 0, /* 75 */ 0, /* 76 */ 0, /* 77 */ 0, 0, /* 78 - 79 */ 0, /* 80 */ - 0, /* 81 */ + 0, /* 81 */ 0, 0, 0, 0, 0, 0, /* 82 - 87 */ - 0, /* 88 */ + 0, /* 88 */ 0, 0, 0, 0, 0, 0, 0, /* 89 - 95 */ - 0, /* 96 */ - 0, /* 97 */ + 0, /* 96 */ + 0, /* 97 */ 0, 0, 0, 0, 0, 0, /* 98 - 103 */ 0, /* 104 */ 0, /* 105 */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/prcb.c b/c/src/lib/libbsp/i960/rxgen960/startup/prcb.c index 1aaefd21d0..b14512cc79 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/prcb.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/prcb.c @@ -12,8 +12,8 @@ #include "systbl.h" #include "prcb.h" /*-------------------------------------*/ - /* RAM based PRocess Control Block - */ + /* RAM based PRocess Control Block + */ #ifdef DBPRECISE_FAULTS #define AC (INT_OVFL_DISABLE | PRECISE_FLTS) #else @@ -40,17 +40,17 @@ struct PRCB ram_prcb = { - & faultTbl[0], /* Fault Table Base */ - & controlTbl[0], /* Control Table Base */ - AC, /* AC */ + & faultTbl[0], /* Fault Table Base */ + & controlTbl[0], /* Control Table Base */ + AC, /* AC */ FAULT_CONFIG, /* Fault Configuration Word */ - & interruptTbl, /* Interrupt Table Base */ - & systemTbl, /* System Procedure Table Base */ - 0, /* Reserved */ + & interruptTbl, /* Interrupt Table Base */ + & systemTbl, /* System Procedure Table Base */ + 0, /* Reserved */ & intStackPtr[0], /* Interrupt Stack Pointer */ - INST_CACHE_CONFIG, /* Instruction Cache Config */ - REG_CACHE_CONFIG, /* Reg Cache Config */ -}; + INST_CACHE_CONFIG, /* Instruction Cache Config */ + REG_CACHE_CONFIG, /* Reg Cache Config */ +}; /*-------------*/ /* End of file */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/prcb.h b/c/src/lib/libbsp/i960/rxgen960/startup/prcb.h index 235341740d..f00b69e894 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/prcb.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/prcb.h @@ -14,33 +14,33 @@ #include "intrtbl.h" #include "systbl.h" - /* PRocess Control Block - */ -struct PRCB { - FaultTblEntry * faultTbl; /* Fault Table Base */ - ControlTblEntry * controlTbl; /* Control Table Base */ - unsigned int arithConfig; /* Arithmetic Control Register Image */ + /* PRocess Control Block + */ +struct PRCB { + FaultTblEntry * faultTbl; /* Fault Table Base */ + ControlTblEntry * controlTbl; /* Control Table Base */ + unsigned int arithConfig; /* Arithmetic Control Register Image */ unsigned int faultConfig; /* Fault Configuration Word Image */ - InterruptTbl * interruptTbl; /* Interrupt Table Base */ - SystemTbl * systemTbl; /* System Procedure Table Base */ - unsigned int reserved; /* Reserved */ + InterruptTbl * interruptTbl; /* Interrupt Table Base */ + SystemTbl * systemTbl; /* System Procedure Table Base */ + unsigned int reserved; /* Reserved */ unsigned int * intStackPtr; /* Interrupt Stack Pointer */ - unsigned int instCacheConfig; /* Instruction Cache Config */ - unsigned int regCacheConfig; /* Register Cache Config */ -}; + unsigned int instCacheConfig; /* Instruction Cache Config */ + unsigned int regCacheConfig; /* Register Cache Config */ +}; /* Constants for Arithmetic Control Register. */ #define INT_OVFL_ENABLE 0 #define INT_OVFL_DISABLE 0x1000 -#define PRECISE_FLTS 0x8000 -#define IMPRECISE_FLTS 0 +#define PRECISE_FLTS 0x8000 +#define IMPRECISE_FLTS 0 /* Constants for Fault Configuration Word. */ #define UNLGND_FAULT_ENABLE 0 -#define UNLGND_FAULT_DISABLE 0x40000000 +#define UNLGND_FAULT_DISABLE 0x40000000 /* Constants for Instruction Cache Configuration Word. - */ + */ #define INST_CACHE_ENABLE 0 #define INST_CACHE_DISABLE 0x10000 /* RAM-based Process Control Block. @@ -49,10 +49,10 @@ extern struct PRCB ram_prcb; extern struct PRCB rom_prcb; /* Supervisor Stack. Is defined directly in rom.ld. */ -extern unsigned int svrStackPtr[]; +extern unsigned int svrStackPtr[]; /* Interrupt Stack. Is defined directly in rom.ld. */ -extern unsigned int intStackPtr[]; +extern unsigned int intStackPtr[]; #endif /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c index 254618d532..b9811f65bf 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_cntrltbl.c @@ -71,18 +71,18 @@ ControlTblEntry rom_controlTbl[] = { REGION_8_CONFIG, 0, REGION_A_CONFIG, - 0, + 0, /* --group 5 -- */ REGION_C_CONFIG, 0, REGION_BOOT_CONFIG, - 0, + 0, /* --group 6 -- */ - 0, /* Reserved */ + 0, /* Reserved */ 0, TC, BCON -}; +}; /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.c b/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.c index d65d0109cd..becc0b6843 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.c @@ -15,14 +15,14 @@ extern void romStart(void); -struct IBR rom_ibr = { +struct IBR rom_ibr = { {((REGION_BOOT_CONFIG) & 0xff), /* Initial Bus Configuration */ - ((REGION_BOOT_CONFIG) >> 8) & 0xff, + ((REGION_BOOT_CONFIG) >> 8) & 0xff, ((REGION_BOOT_CONFIG) >> 16) & 0xff, - ((REGION_BOOT_CONFIG) >> 24) & 0xff}, + ((REGION_BOOT_CONFIG) >> 24) & 0xff}, romStart, /* Start Point */ & rom_prcb, /* PRCB */ - {-2, /* CheckSum */ + {-2, /* CheckSum */ 0, 0, 0, diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.h b/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.h index db6317875c..e9d7b6908e 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_ibr.h @@ -14,14 +14,14 @@ #include "intrtbl.h" #include "systbl.h" - /* Initial Boot Record. - */ -struct IBR { + /* Initial Boot Record. + */ +struct IBR { unsigned int busConfig[4]; /* Initial Bus Configuration */ void (* start)(void); /* Start Point */ struct PRCB * prcb; /* PRCB */ - unsigned int chckSum[6]; /* CheckSum */ -}; + unsigned int chckSum[6]; /* CheckSum */ +}; /* Check sum values (defined in *.ld). */ extern unsigned int rom_ibr_cksum[]; diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rom_prcb.c b/c/src/lib/libbsp/i960/rxgen960/startup/rom_prcb.c index 663df41096..0f11c884d8 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rom_prcb.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rom_prcb.c @@ -12,8 +12,8 @@ #include "systbl.h" #include "prcb.h" /*-------------------------------------*/ - /* RAM based PRocess Control Block - */ + /* RAM based PRocess Control Block + */ #ifdef DBPRECISE_FAULTS #define AC (INT_OVFL_DISABLE | PRECISE_FLTS) #else @@ -41,17 +41,17 @@ extern SystemTbl nulsystemTbl; struct PRCB rom_prcb = { - & faultTbl[0], /* Fault Table Base */ - & rom_controlTbl[0], /* Control Table Base */ - AC, /* AC */ + & faultTbl[0], /* Fault Table Base */ + & rom_controlTbl[0], /* Control Table Base */ + AC, /* AC */ FAULT_CONFIG, /* Fault Configuration Word */ - & interruptTbl, /* Interrupt Table Base */ - & nulsystemTbl, /* System Procedure Table Base */ - 0, /* Reserved */ + & interruptTbl, /* Interrupt Table Base */ + & nulsystemTbl, /* System Procedure Table Base */ + 0, /* Reserved */ & intStackPtr[0], /* Interrupt Stack Pointer */ - INST_CACHE_CONFIG, /* Instruction Cache Config */ - REG_CACHE_CONFIG, /* Reg Cache Config */ -}; + INST_CACHE_CONFIG, /* Instruction Cache Config */ + REG_CACHE_CONFIG, /* Reg Cache Config */ +}; /*-------------*/ /* End of file */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/rommon.h b/c/src/lib/libbsp/i960/rxgen960/startup/rommon.h index 8cd87a1d5b..da6e44e6a5 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/rommon.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/rommon.h @@ -9,18 +9,18 @@ #ifndef _ROMMON_H_ #define _ROMMON_H_ - /* ROM monitor start point. + /* ROM monitor start point. * Gets control on power on. */ extern void romStart(void); extern void start(void); /* ROM monitor start point. * Gets control on a fault. - */ + */ extern void romFaultStart(void); /* ROM monitor start point. * Gets control on a test command. - */ + */ extern void romTestStart(void); #endif diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/sctns.c b/c/src/lib/libbsp/i960/rxgen960/startup/sctns.c index d9e9646df4..466995c75b 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/sctns.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/sctns.c @@ -23,7 +23,7 @@ void ledcyc() i = 1; loop: if (i > 9 ) - i = 1; + i = 1; *(unsigned char *) LED_REG = la[i]; for(t=1; t < 0x10000; t++) k = m + 33; @@ -31,7 +31,7 @@ loop: goto loop; } -void copyCodeToRom(void) +void copyCodeToRom(void) { register int errval = 0; unsigned int * s; @@ -66,12 +66,12 @@ extern unsigned char * led_array; goto error; WRITE_LED(0x4); for (s = codeRomStart, d = codeRamStart; d < codeRamEnd; s ++, d ++) { - * d = * s; + * d = * s; } WRITE_LED(0x5); for (s = codeRomStart, d = codeRamStart; d < codeRamEnd; s ++, d ++) { if( * d != * s ) - goto error; + goto error; } WRITE_LED(0x6); return; @@ -83,7 +83,7 @@ error: for(t=1; t < 0x100000; t++) *(unsigned char *) LED_REG = led_array[0]; } - + } void zeroBss(void) { diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/sctns.h b/c/src/lib/libbsp/i960/rxgen960/startup/sctns.h index 3ba9cb1308..acf78dcf3b 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/sctns.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/sctns.h @@ -10,7 +10,7 @@ #define _SCTNS_H_ /* Copy all code into SRAM. - * Fault Table and Fault Handler stays in EPROM to not be + * Fault Table and Fault Handler stays in EPROM to not be * destroyed by a buggy user program. Beyond that only * monitor Start point and procedures to copy code * into RAM will be relocated in ROM. @@ -28,7 +28,7 @@ extern unsigned int codeRamStart[]; extern unsigned int codeRamEnd[]; extern unsigned int bssStart[]; -extern unsigned int bssEnd[]; +extern unsigned int bssEnd[]; #endif /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/systbl.c b/c/src/lib/libbsp/i960/rxgen960/startup/systbl.c index b51ff4e86b..d2861d71f9 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/systbl.c +++ b/c/src/lib/libbsp/i960/rxgen960/startup/systbl.c @@ -27,14 +27,14 @@ struct PRCB *sys_get_prcb() /*asm volatile("lda _ram_prcb, g0" : : ); */ } - /* System Procedures Table. + /* System Procedures Table. */ SystemTbl systemTbl = { {0, 0, 0}, /* Reserved */ svrStackPtr, /* Supervisor Stack Pointer Base */ {0, 0, 0, 0, 0, 0, 0, 0}, /* Preserved */ {0, 0, 0, 0, 0, - SP(sys_get_prcb + SUPERVISOR_SP), + SP(sys_get_prcb + SUPERVISOR_SP), 0, 0, /* 6 - 7 */ 0, 0, 0, 0, 0, 0, 0, 0, /* 8 - 15 */ 0, 0, /* 16 - 17 */ @@ -43,7 +43,7 @@ SystemTbl systemTbl = { 0, /* 20 */ 0, /* 21 */ 0, 0, /* 22 - 23 */ - 0, /* 24 */ + 0, /* 24 */ 0, /* 25 */ 0, /* 26 */ 0, /* 27 */ @@ -53,8 +53,8 @@ SystemTbl systemTbl = { 0, /* 31 */ 0, 0, 0, 0, 0, 0, 0, 0, /* 32 - 39 */ 0, /* 40 */ - 0, /* 41 */ - 0, /* 42 */ + 0, /* 41 */ + 0, /* 42 */ 0, /* 43 */ 0, /* 44 */ 0, /* 45 */ @@ -66,9 +66,9 @@ SystemTbl systemTbl = { 0, /* 58 */ 0, 0, 0, 0, 0, /* 59 - 63 */ 0, /* 64 */ - 0, /* 65 */ - 0, 0, 0, 0, 0, 0, /* 66 - 71 */ - 0, /* 72 */ + 0, /* 65 */ + 0, 0, 0, 0, 0, 0, /* 66 - 71 */ + 0, /* 72 */ 0, /* 73 */ 0, /* 74 */ 0, /* 75 */ @@ -78,10 +78,10 @@ SystemTbl systemTbl = { 0, /* 80 */ 0, /* 81 */ 0, 0, 0, 0, 0, 0, /* 82 - 87 */ - 0, /* 88 */ + 0, /* 88 */ 0, 0, 0, 0, 0, 0, 0, /* 89 - 95 */ - 0, /* 96 */ - 0, /* 97 */ + 0, /* 96 */ + 0, /* 97 */ 0, 0, 0, 0, 0, 0, /* 98 - 103 */ 0, /* 104 */ 0, /* 105 */ diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/systbl.h b/c/src/lib/libbsp/i960/rxgen960/startup/systbl.h index 0c51851090..ac902cc829 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/systbl.h +++ b/c/src/lib/libbsp/i960/rxgen960/startup/systbl.h @@ -11,27 +11,27 @@ /* System Procedure. */ -typedef void (* SysProc)(void); +typedef void (* SysProc)(void); /* System Procedures Table. */ typedef struct { unsigned int reserved[3]; /* Reserved */ unsigned int * svrStackPtr; /* Supervisor Stack Pointer Base */ - unsigned int preserved[8]; /* Preserved */ + unsigned int preserved[8]; /* Preserved */ SysProc sysProc[259]; /* System Procedures Entry Points */ } SystemTbl; /* Type of System Procedure. */ #define LOCAL_SP 0x0 -#define SUPERVISOR_SP 0x2 +#define SUPERVISOR_SP 0x2 /* Cinvert to System Procedure Type. */ -#define SP(addr) ((SysProc) (addr)) +#define SP(addr) ((SysProc) (addr)) /* System Procedures Table Itself. */ extern SystemTbl systemTbl; -#endif +#endif /*-------------*/ /* End of file */ /*-------------*/ diff --git a/c/src/lib/libbsp/i960/rxgen960/timer/timer.c b/c/src/lib/libbsp/i960/rxgen960/timer/timer.c index 80289362ef..e4f8a7d63b 100644 --- a/c/src/lib/libbsp/i960/rxgen960/timer/timer.c +++ b/c/src/lib/libbsp/i960/rxgen960/timer/timer.c @@ -54,9 +54,9 @@ void Timer_initialize() #define TMR_AUTO_RELOAD 4 #define TMR_ENABLE 2 #define TMR_TERM_CNT_STAT 1 - - *tmr1 = BUS_CLOCK_1 | TMR_AUTO_RELOAD; - *icon = 0x6000; + + *tmr1 = BUS_CLOCK_1 | TMR_AUTO_RELOAD; + *icon = 0x6000; set_vector( (((unsigned int) timerisr) | 0x2), TIMER_VECTOR, 1 ); @@ -64,13 +64,13 @@ void Timer_initialize() *imap2 = (*imap2 & 0xff0fffff) | (((TIMER_VECTOR >> 4) & 0xf) << 20); /* initialize the i960RP timer 1 here */ - + /* set the timer countdown */ *trr1 = 33 * BSP_Configuration.microseconds_per_tick; *tcr1 = 33 * BSP_Configuration.microseconds_per_tick; - + *ipnd &= ~(1<<13); - *imsk |= (1 << 13); + *imsk |= (1 << 13); Ttimer_val = 0; *tmr1 = BUS_CLOCK_1 | TMR_AUTO_RELOAD | TMR_ENABLE; diff --git a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c index 62f83c519d..a4487d2ffa 100644 --- a/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c @@ -18,7 +18,7 @@ */ #include <stdlib.h> - + #include <bsp.h> #include <rtems/libio.h> @@ -30,11 +30,11 @@ rtems_isr_entry Old_ticker; void Clock_exit( void ); #define CLOCK_VECTOR TIMER_VECTOR - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -110,17 +110,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -129,15 +129,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -148,7 +148,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/dmv152/console/console.c b/c/src/lib/libbsp/m68k/dmv152/console/console.c index 6dd73f2a5f..78ceca83c1 100644 --- a/c/src/lib/libbsp/m68k/dmv152/console/console.c +++ b/c/src/lib/libbsp/m68k/dmv152/console/console.c @@ -53,7 +53,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -103,7 +103,7 @@ void DEBUG_puts( char *s; /* should disable interrupts here */ - for ( s = string ; *s ; s++ ) + for ( s = string ; *s ; s++ ) console_outbyte_polled( 0, *s ); console_outbyte_polled( 0, '\r' ); @@ -132,7 +132,7 @@ int console_write_support (int minor, const char *buf, int len) * Console Device Driver Entry Points * */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -171,7 +171,7 @@ rtems_device_driver console_initialize( /* * Initialize Hardware */ - + return RTEMS_SUCCESSFUL; } @@ -201,7 +201,7 @@ rtems_device_driver console_open( return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -210,7 +210,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -219,7 +219,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -228,7 +228,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/m68k/dmv152/include/bsp.h b/c/src/lib/libbsp/m68k/dmv152/include/bsp.h index 249106d9ce..439b20a5db 100644 --- a/c/src/lib/libbsp/m68k/dmv152/include/bsp.h +++ b/c/src/lib/libbsp/m68k/dmv152/include/bsp.h @@ -46,7 +46,7 @@ extern "C" { #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 /* #define CONFIGURE_INTERRUPT_STACK_MEMORY (TBD * 1024) */ - + /* * Define the time limits for RTEMS Test Suite test durations. * Long test and short test duration limits are provided. These @@ -165,7 +165,7 @@ extern m68k_isr_entry M68Kvec[]; /* vector table address */ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/dmv152/startup/bspclean.c b/c/src/lib/libbsp/m68k/dmv152/startup/bspclean.c index da9c7585e1..2d947236ed 100644 --- a/c/src/lib/libbsp/m68k/dmv152/startup/bspclean.c +++ b/c/src/lib/libbsp/m68k/dmv152/startup/bspclean.c @@ -16,5 +16,5 @@ void bsp_cleanup( void ) { - VME_interrupt_Disable( 0xff ); + VME_interrupt_Disable( 0xff ); } diff --git a/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c b/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c index 42396f865d..203b6359d0 100644 --- a/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -35,11 +35,11 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ - + /* * bsp_start * diff --git a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c index df7df55bc6..f4ddb6fe14 100644 --- a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c @@ -50,11 +50,11 @@ volatile uint32_t Clock_driver_ticks; uint32_t Clock_isrs; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -111,17 +111,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -130,15 +130,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr( CLOCK_VECTOR); @@ -149,7 +149,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/gen68302/console/console.c b/c/src/lib/libbsp/m68k/gen68302/console/console.c index 43afc35428..84363fb735 100644 --- a/c/src/lib/libbsp/m68k/gen68302/console/console.c +++ b/c/src/lib/libbsp/m68k/gen68302/console/console.c @@ -83,10 +83,10 @@ rtems_device_driver console_initialize( major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -211,7 +211,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -239,7 +239,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -258,7 +258,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/gen68302/include/bsp.h b/c/src/lib/libbsp/m68k/gen68302/include/bsp.h index 958471e9ef..28b663a532 100644 --- a/c/src/lib/libbsp/m68k/gen68302/include/bsp.h +++ b/c/src/lib/libbsp/m68k/gen68302/include/bsp.h @@ -100,7 +100,7 @@ extern "C" { /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/gen68302/network/network.c b/c/src/lib/libbsp/m68k/gen68302/network/network.c index 7252f2f15d..b1d47be756 100644 --- a/c/src/lib/libbsp/m68k/gen68302/network/network.c +++ b/c/src/lib/libbsp/m68k/gen68302/network/network.c @@ -158,15 +158,15 @@ m302Enet_initialize_hardware (struct scc_softc *sc) #define DSQE 0x0010 #define FDE 0x0020 - + /* * standard loopback */ - M68302imp_port_data (1) &= ~(LBK); + M68302imp_port_data (1) &= ~(LBK); M68302imp_port_data (1) |= (FDE); - + M68en302imp_ecntrl=0x0001; /* * Set dma configuration status register EDMA @@ -175,15 +175,15 @@ m302Enet_initialize_hardware (struct scc_softc *sc) (sc->txBdCount == 32) ? EDMA_BDSIZE_32T_96R : (sc->txBdCount == 64) ? EDMA_BDSIZE_64T_64R : EDMA_BDSIZE_8T_120R; - + M68en302imp_edma = EDMA_BLIM_8ACCESS | EDMA_WMRK_16FIFO | EDMA_BIT_TSRLY | (ushort)i; - + /* * Set maximum receive buffer length */ M68en302imp_emrblr = RBUF_SIZE; /* 1520 */ - + /* * Set interrupt vector */ @@ -191,23 +191,23 @@ m302Enet_initialize_hardware (struct scc_softc *sc) M68en302imp_intr_mask=0x0; - + /* * Set ethernet Configuration */ M68en302imp_ecnfig=0x0000; - + /* * Set ETHER_TEST */ M68en302imp_ether_test=0x0000; - + /* * Set AR control Register * Ignore/accept broadcast packets as specified */ M68en302imp_ar_cntrl = ((sc->acceptBroadcast) ? 0 : AR_CNTRL_BIT_NO_BROADCAST) ; - + /* * Allocate mbuf pointers */ @@ -220,7 +220,7 @@ m302Enet_initialize_hardware (struct scc_softc *sc) * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + cam=(ushort *)(M68en302imp_cet); for (i=0;i<64;i++){ cam[(4*i)]=0x00ff; @@ -232,7 +232,7 @@ m302Enet_initialize_hardware (struct scc_softc *sc) cam[5] = (hwaddr[2] << 8) | hwaddr[3]; cam[6] = (hwaddr[4] << 8) | hwaddr[5]; - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -240,13 +240,13 @@ m302Enet_initialize_hardware (struct scc_softc *sc) for (i=0;i<128;i++){ - + M68302_scc_bd_stat_ctrl (a_bd + i) = 0; M68302_scc_bd_data_lgth (a_bd + i) = 0; M68302_scc_bd_p_buffer (a_bd + i) = NULL; } - + sc->txBdBase = M68302imp_a_eth_bd ( 0 ); /* point to first BD */ sc->rxBdBase = M68302imp_a_eth_bd ( sc->txBdCount); /* point to first RX BD atfer all TX*/ @@ -266,7 +266,7 @@ m302Enet_initialize_hardware (struct scc_softc *sc) /* * Set up interrupts */ - + status = rtems_interrupt_catch (m302Enet_interrupt_handler, M302_ETHER_IVECTOR, &old_handler); @@ -403,7 +403,7 @@ scc_rxDaemon (void *arg) sc->rxMbuf[rxBdIndex] = m; rxBd->p_buffer = mtod (m, void *); - + if (++rxBdIndex == sc->rxBdCount) { rxBd->stat_ctrl = BUF_STAT_EMPTY | BUF_STAT_INTERRUPT | BUF_STAT_WRAP; break; @@ -443,7 +443,7 @@ scc_rxDaemon (void *arg) */ rtems_interrupt_disable (level); M68en302imp_intr_mask |= INTR_MASK_BIT_RFIEN; - + rtems_interrupt_enable (level); rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, @@ -452,7 +452,7 @@ scc_rxDaemon (void *arg) } } - + /* * Check that packet is valid */ @@ -478,7 +478,7 @@ scc_rxDaemon (void *arg) sizeof(struct ether_header); eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); - + ether_input (ifp, eh, m); /* @@ -535,7 +535,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) struct mbuf *l = NULL; uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ @@ -611,14 +611,14 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) MFREE (m, n); m = n; } - + /* * Redo the send with the new mbuf cluster */ m = nm; nAdded = 0; status = 0; - + continue; } @@ -677,7 +677,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) txBd = sc->txBdBase + sc->txBdHead; txBd->p_buffer = mtod (m, void *); txBd->data_lgth = m->m_len; - + sc->txMbuf[sc->txBdHead] = m; status = nAdded ? BUF_STAT_READY : 0; if (++sc->txBdHead == sc->txBdCount) { @@ -688,7 +688,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) l = m; m = m->m_next; nAdded++; - + } else { /* @@ -699,7 +699,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) m = n; if (l != NULL) l->m_next = m; - + } } if (nAdded) { @@ -709,7 +709,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) txBd->stat_ctrl = status | BUF_STAT_LAST | BUF_STAT_TX_CRC | BUF_STAT_INTERRUPT; firstTxBd->stat_ctrl |= BUF_STAT_READY; sc->txBdActiveCount += nAdded; - + } } @@ -782,7 +782,7 @@ scc_init (void *arg) sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); } - + /* * Set flags appropriately */ @@ -800,7 +800,7 @@ scc_init (void *arg) * Enable receiver and transmitter */ M68en302imp_ecntrl = ECNTRL_BIT_RESET | ECNTRL_BIT_ETHER_EN; - + } /* @@ -891,7 +891,7 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) case SIO_RTEMS_SHOW_STATS: scc_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -922,7 +922,7 @@ rtems_ether1_driver_attach (struct rtems_bsdnet_ifconfig *config) */ if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) return 0; - + /* * Is driver free? */ @@ -943,7 +943,7 @@ rtems_ether1_driver_attach (struct rtems_bsdnet_ifconfig *config) if (config->hardware_address) { memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); } - + if (config->mtu) mtu = config->mtu; else diff --git a/c/src/lib/libbsp/m68k/gen68302/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68302/startup/bspstart.c index 63678e4b25..fd7f7503b2 100644 --- a/c/src/lib/libbsp/m68k/gen68302/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/gen68302/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -35,7 +35,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/m68k/gen68302/timer/timer.c b/c/src/lib/libbsp/m68k/gen68302/timer/timer.c index 6e53830bdf..b3927487c7 100644 --- a/c/src/lib/libbsp/m68k/gen68302/timer/timer.c +++ b/c/src/lib/libbsp/m68k/gen68302/timer/timer.c @@ -6,7 +6,7 @@ * * Output parameters: NONE * - * NOTE: It is important that the timer start/stop overhead be + * NOTE: It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c index 6634fc270a..3078046cf5 100644 --- a/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/gen68340/clock/ckinit.c @@ -1,4 +1,4 @@ -/* +/* * This routine initializes the MC68340/349 Periodic Interval Timer * * Based on the `gen68360' board support package, and covered by the @@ -9,7 +9,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com * * $Id$ @@ -54,7 +54,7 @@ rtems_device_minor_number rtems_clock_minor; /****************************************************** Name: Clock_isr - Input parameters: irq vector + Input parameters: irq vector Output parameters: none Description: update # of clock ticks *****************************************************/ @@ -79,7 +79,7 @@ Clock_exit (void) { /* * Turn off periodic interval timer - */ + */ SIMPITR = 0; } @@ -99,23 +99,23 @@ Install_clock (rtems_isr_entry clock_isr) Clock_driver_ticks = 0; set_vector (clock_isr, CLOCK_VECTOR, 1); - + /* sets the Periodic Interrupt Control Register PICR */ /* voir a quoi correspond exactement le Clock Vector */ - SIMPICR = ( CLOCK_IRQ_LEVEL << 8 ) | ( CLOCK_VECTOR ); - + SIMPICR = ( CLOCK_IRQ_LEVEL << 8 ) | ( CLOCK_VECTOR ); + /* sets the PITR count value */ /* this assumes a 32.765 kHz crystal */ - + usecs_per_tick = BSP_Configuration.microseconds_per_tick; /* find out whether prescaler should be enabled or not */ if ( usecs_per_tick <= 31128 ) { pitr_tmp = ( usecs_per_tick * 8192 ) / 1000000 ; } else { pitr_tmp = ( usecs_per_tick / 1000000 ) * 16; - /* enable it */ - pitr_tmp |= 0x100; + /* enable it */ + pitr_tmp |= 0x100; } SIMPITR = (unsigned char) pitr_tmp; @@ -126,7 +126,7 @@ Install_clock (rtems_isr_entry clock_isr) /****************************************************** Name: Clock_initialize Input parameters: major & minor numbers - Output parameters: - + Output parameters: - Description: main entry for clock initialization calls the bsp dependant routine *****************************************************/ @@ -138,16 +138,16 @@ Clock_initialize( ) { Install_clock (Clock_isr); - + /* * make major/minor avail to others such as shared memory driver */ rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /****************************************************** Name: Clock_control Input parameters: major & minor number diff --git a/c/src/lib/libbsp/m68k/gen68340/console/Modif_cpu_asm.S b/c/src/lib/libbsp/m68k/gen68340/console/Modif_cpu_asm.S index 38ba6f2646..3895962722 100644 --- a/c/src/lib/libbsp/m68k/gen68340/console/Modif_cpu_asm.S +++ b/c/src/lib/libbsp/m68k/gen68340/console/Modif_cpu_asm.S @@ -49,7 +49,7 @@ * permitted by the new interrupt level mask, and (2) when * the original context regains the cpu. */ - + #if ( M68K_HAS_VBR == 1) .set SR_OFFSET, 0 | Status register offset .set PC_OFFSET, 2 | Program Counter offset @@ -59,7 +59,7 @@ .set PC_OFFSET, 4 | Program Counter offset .set FVO_OFFSET, 0 | Format/vector offset placed in the stack #endif /* M68K_HAS_VBR */ - + .set SAVED, 16 | space for saved registers .align 4 @@ -68,7 +68,7 @@ SYM (_Debug_ISR_Handler_Console): | - tst.w 0x14000000 | ALLUME CS5 + tst.w 0x14000000 | ALLUME CS5 | addql #1,SYM (_Thread_Dispatch_disable_level) | disable multitasking diff --git a/c/src/lib/libbsp/m68k/gen68340/console/console.c b/c/src/lib/libbsp/m68k/gen68340/console/console.c index 6035fcb8a5..bfde76f00b 100644 --- a/c/src/lib/libbsp/m68k/gen68340/console/console.c +++ b/c/src/lib/libbsp/m68k/gen68340/console/console.c @@ -7,7 +7,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com * * COPYRIGHT (c) 1989-1999. @@ -102,7 +102,7 @@ InterruptHandler (rtems_vector_number v) else { /* this is necessary, otherwise it blocks when FIFO is full */ ch = DURBA; - rtems_termios_enqueue_raw_characters(ttypA,&ch,1); + rtems_termios_enqueue_raw_characters(ttypA,&ch,1); } } while (DUSRA & m340_Rx_RDY); Restart_Fifo_Full_A_Timer(); /* only if necessary (pointer to a fake function if @@ -142,9 +142,9 @@ InterruptHandler (rtems_vector_number v) /* push them in a trash */ ch = DURBB; } - else { + else { ch = DURBB; - rtems_termios_enqueue_raw_characters(ttypB,&ch,1); + rtems_termios_enqueue_raw_characters(ttypB,&ch,1); } } while (DUSRB & m340_Rx_RDY); @@ -189,16 +189,16 @@ InterruptWrite (int minor, const char *buf, int len) Input parameters: channel, character to emit Output parameters: - Description: wait for the UART to be ready to emit - a character and send it + a character and send it *****************************************************/ void dbug_out_char( int minor, int ch ) { if (minor==UART_CHANNEL_A) { - while (!(DUSRA & m340_Tx_RDY)) continue; + while (!(DUSRA & m340_Tx_RDY)) continue; DUTBA=ch; } else if (minor==UART_CHANNEL_B) { - while (!(DUSRB & m340_Tx_RDY)) continue; + while (!(DUSRB & m340_Tx_RDY)) continue; DUTBB=ch; } } @@ -262,7 +262,7 @@ dbugInitialise () DUCRB = m340_Reset_Transmitter; /* - * Enable serial module for normal operation, ignore FREEZE, select the crystal clock, + * Enable serial module for normal operation, ignore FREEZE, select the crystal clock, * supervisor/user serial registers unrestricted * interrupt arbitration at priority CONSOLE_INTERRUPT_ARBITRATION * WARNING : 8 bits access only on this UART! @@ -322,17 +322,17 @@ dbugInitialise () */ unset_DUIER(m340_RxRDYA&m340_TxRDYA); } - + /* * Change set of baud speeds * disable input control */ /* no good uart configuration ? */ if (uart_config.nb<1) rtems_fatal_error_occurred (-1); - - if (uart_config.baud_speed_table[UART_CHANNEL_A].set==1) + + if (uart_config.baud_speed_table[UART_CHANNEL_A].set==1) DUACR = m340_BRG_Set1; - else + else DUACR = m340_BRG_Set2; /* @@ -347,13 +347,13 @@ dbugInitialise () /* * Serial Channel Baud Speed */ - DUCSRA = (uart_config.baud_speed_table[UART_CHANNEL_A].rcs << 4) + DUCSRA = (uart_config.baud_speed_table[UART_CHANNEL_A].rcs << 4) | (uart_config.baud_speed_table[UART_CHANNEL_A].tcs); /* * Serial Channel Configuration */ - DUMR1A = m340_uart_config[UART_CHANNEL_A].parity_mode + DUMR1A = m340_uart_config[UART_CHANNEL_A].parity_mode | m340_uart_config[UART_CHANNEL_A].bits_per_char | m340_RxRTS; @@ -376,7 +376,7 @@ dbugInitialise () if (CHANNEL_ENABLED_B) { /* we mustn't set the console vector twice! */ - if ((USE_INTERRUPTS_B && !(CHANNEL_ENABLED_A)) + if ((USE_INTERRUPTS_B && !(CHANNEL_ENABLED_A)) || (USE_INTERRUPTS_B && CHANNEL_ENABLED_A && !USE_INTERRUPTS_A)) { rtems_isr_entry old_handler; rtems_status_code sc; @@ -408,7 +408,7 @@ dbugInitialise () */ unset_DUIER(m340_RxRDYB&m340_TxRDYB); } - + /* * Change set of baud speeds * disable input control @@ -416,7 +416,7 @@ dbugInitialise () /* no good uart configuration ? */ if (uart_config.nb<2) rtems_fatal_error_occurred (-1); - + /* don't set DUACR twice! */ if (!CHANNEL_ENABLED_A) { if (uart_config.baud_speed_table[UART_CHANNEL_B].set==1) @@ -437,13 +437,13 @@ dbugInitialise () /* * Serial Channel Baud Speed */ - DUCSRB = (uart_config.baud_speed_table[UART_CHANNEL_B].rcs << 4) + DUCSRB = (uart_config.baud_speed_table[UART_CHANNEL_B].rcs << 4) | (uart_config.baud_speed_table[UART_CHANNEL_B].tcs); /* * Serial Channel Configuration */ - DUMR1B = m340_uart_config[UART_CHANNEL_B].parity_mode + DUMR1B = m340_uart_config[UART_CHANNEL_B].parity_mode | m340_uart_config[UART_CHANNEL_B].bits_per_char | m340_RxRTS; @@ -479,7 +479,7 @@ SetAttributes (int minor, const struct termios *t) /* output speed */ if (t->c_cflag & CBAUDEX) osp = (t->c_cflag & CBAUD) + CBAUD + 1; - else + else osp = t->c_cflag & CBAUD; /* input speed */ @@ -633,7 +633,7 @@ rtems_device_driver console_open( return sc; } - + /****************************************************** Name: console_close Input parameters: channel #, termios args @@ -692,9 +692,9 @@ rtems_device_driver console_control( ) { rtems_libio_ioctl_args_t *args = arg; - + if (args->command == RTEMS_IO_SET_ATTRIBUTES) SetAttributes (minor, (struct termios *)args->buffer); - + return rtems_termios_ioctl (arg); } diff --git a/c/src/lib/libbsp/m68k/gen68340/console/m340uart.c b/c/src/lib/libbsp/m68k/gen68340/console/m340uart.c index 94160b011c..75b3d97e77 100644 --- a/c/src/lib/libbsp/m68k/gen68340/console/m340uart.c +++ b/c/src/lib/libbsp/m68k/gen68340/console/m340uart.c @@ -7,8 +7,8 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * - * e-mail: g_montel@yahoo.com + * + * e-mail: g_montel@yahoo.com * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -69,9 +69,9 @@ uart_channel_config m340_uart_config[UART_NUMBER_OF_CHANNELS]; Output parameters: - Description: Init the m340_uart_config THIS SHOULD NOT BE HERE! - Its aim was to let the user configure + Its aim was to let the user configure UARTs for each application. - As we can't pass args to the console + As we can't pass args to the console driver initialisation routine at the moment, this was not done. ATTENTION: TERMIOS init presupposes that the channel @@ -109,18 +109,18 @@ void Init_UART_Table(void) /****************************************************** Name: Find_Right_m340_UART_Channel_Config - Input parameters: Send/Receive baud rates for a + Input parameters: Send/Receive baud rates for a given channel Output parameters: UART compatible configs for this channel - Description: returns which uart configurations fit - Receiver Baud Rate and Transmitter Baud + Description: returns which uart configurations fit + Receiver Baud Rate and Transmitter Baud Rate for a given channel - For instance, according to the + For instance, according to the m340_Baud_Rates_Table: - Output Speed = 50, Input Speed = 75 is not a correct config, because - 50 bauds implies set 1 and 75 bauds + 50 bauds implies set 1 and 75 bauds implies set 2 - Output Speed = 9600, Input Speed = 9600 two correct configs for this: @@ -142,7 +142,7 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau int i,j; /* Receiver and Transmitter baud rates must be compatible, ie in the same set */ - + /* search for configurations for ReceiverBaudRate - there can't be more than two (only two sets) */ for (i=0;i<16;i++) for (j=0;j<2;j++) @@ -151,7 +151,7 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau Receiver[Receiver_nb_of_config].set=j; Receiver_nb_of_config++; } - + /* search for configurations for TransmitterBaudRate - there can't be more than two (only two sets) */ for (i=0;i<16;i++) for (j=0;j<2;j++) @@ -161,15 +161,15 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau Transmitter_nb_of_config++; } - /* now check if there's a compatible config */ + /* now check if there's a compatible config */ return_value.nb=0; - + for (i=0; i<Receiver_nb_of_config; i++) for (j=0;j<Transmitter_nb_of_config;j++) if (Receiver[i].set == Transmitter[j].set) { return_value.baud_speed_table[return_value.nb].set = Receiver[i].set + 1; /* we want set 1 or set 2, not 0 or 1 */ return_value.baud_speed_table[return_value.nb].rcs = Receiver[i].cs; - return_value.baud_speed_table[return_value.nb].tcs = Transmitter[j].cs; + return_value.baud_speed_table[return_value.nb].tcs = Transmitter[j].cs; return_value.nb++; } @@ -178,17 +178,17 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau /****************************************************** Name: Find_Right_m340_UART_Config - Input parameters: Send/Receive baud rates for both + Input parameters: Send/Receive baud rates for both channels - Output parameters: UART compatible configs for + Output parameters: UART compatible configs for BOTH channels - Description: returns which uart configurations fit - Receiver Baud Rate and Transmitter Baud + Description: returns which uart configurations fit + Receiver Baud Rate and Transmitter Baud Rate for both channels - For instance, if we want 9600/38400 on - channel A and 9600/19200 on channel B, - this is not a good m340 uart config - (channel A needs set 1 and channel B + For instance, if we want 9600/38400 on + channel A and 9600/19200 on channel B, + this is not a good m340 uart config + (channel A needs set 1 and channel B needs set 2) *****************************************************/ t_baud_speed_table @@ -245,7 +245,7 @@ Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_Tran we need to know real speed in order to use the functions above *****************************************************/ -float termios_baud_rates_equivalence ( int speed ) +float termios_baud_rates_equivalence ( int speed ) { switch (speed) { default: return 0; break; @@ -304,7 +304,7 @@ int dbugRead (int minor) int dbugWrite (int minor, const char *buf, int len) { static char txBuf; - + while (len--) { txBuf = *buf++; dbug_out_char( minor, (int)txBuf ); @@ -318,7 +318,7 @@ static void fmt_str( int minor, const char* ); /****************************************************** Name: RAW_GETC Input parameters: channel, buffer and its length - Output parameters: + Output parameters: Description: a light blocking "getc" *****************************************************/ char RAW_GETC(int minor) diff --git a/c/src/lib/libbsp/m68k/gen68340/include/bsp.h b/c/src/lib/libbsp/m68k/gen68340/include/bsp.h index 1cd088c509..74153a1e49 100644 --- a/c/src/lib/libbsp/m68k/gen68340/include/bsp.h +++ b/c/src/lib/libbsp/m68k/gen68340/include/bsp.h @@ -39,7 +39,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) - + /* * Define the time limits for RTEMS Test Suite test durations. * Long test and short test duration limits are provided. These @@ -93,7 +93,7 @@ extern "C" { /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/gen68340/include/m340timer.h b/c/src/lib/libbsp/m68k/gen68340/include/m340timer.h index 948bc36b6b..4b0050b5d4 100644 --- a/c/src/lib/libbsp/m68k/gen68340/include/m340timer.h +++ b/c/src/lib/libbsp/m68k/gen68340/include/m340timer.h @@ -8,8 +8,8 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * - * e-mail: g_montel@yahoo.com + * + * e-mail: g_montel@yahoo.com * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). diff --git a/c/src/lib/libbsp/m68k/gen68340/include/m340uart.h b/c/src/lib/libbsp/m68k/gen68340/include/m340uart.h index e9cb6598c7..6bf4a32d14 100644 --- a/c/src/lib/libbsp/m68k/gen68340/include/m340uart.h +++ b/c/src/lib/libbsp/m68k/gen68340/include/m340uart.h @@ -8,8 +8,8 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * - * e-mail: g_montel@yahoo.com + * + * e-mail: g_montel@yahoo.com * * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/m68k/gen68340/include/m68340.h b/c/src/lib/libbsp/m68k/gen68340/include/m68340.h index b8e5422d0a..fefb223fc1 100644 --- a/c/src/lib/libbsp/m68k/gen68340/include/m68340.h +++ b/c/src/lib/libbsp/m68k/gen68340/include/m68340.h @@ -4,7 +4,7 @@ * Developed by : Motorola * * High Performance Embedded Systems Division * * Austin, TX * - * Rectified by : Geoffroy Montel + * Rectified by : Geoffroy Montel * g_montel@yahoo.com * * * **********************************************************************/ @@ -14,7 +14,7 @@ typedef volatile unsigned short * portw; /* 16-bit port */ typedef volatile unsigned int * portl; /* 32-bit port */ #define MBASE 0xEFFFF000 /* Module Base Address */ - /* not EFFFF000 due to a 68349 + /* not EFFFF000 due to a 68349 hardware incompatibility */ #define MBAR (*(portb) 0x0003FF00) /* Module Base Addr Reg */ diff --git a/c/src/lib/libbsp/m68k/gen68340/start/start.S b/c/src/lib/libbsp/m68k/gen68340/start/start.S index cad8293c0c..1f2976f96e 100644 --- a/c/src/lib/libbsp/m68k/gen68340/start/start.S +++ b/c/src/lib/libbsp/m68k/gen68340/start/start.S @@ -19,7 +19,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com * * $Id$ @@ -537,7 +537,7 @@ _table_csepld: #if 1 dc.w (((_EPLD_CS_BASE&0x0F)+0x80) << 8) | 0x80 | 16 bits, 0ws dc.w 0x9090 | 16 bits, ext /dsack - + #else dc.b (_EPLD_CS_BASE&0x0F)+0x80 | 16 bits, 0ws dc.b 0x80 | 16 bits, 0 ws @@ -560,7 +560,7 @@ _begin_68349_init: /*-------------------------------------------------*/ /* 68349 chip select initialization - + at this stage, the width of /CS0 may be incorrect it will be corrected later */ diff --git a/c/src/lib/libbsp/m68k/gen68340/start/startfor340only.S b/c/src/lib/libbsp/m68k/gen68340/start/startfor340only.S index 937313a218..1367314057 100644 --- a/c/src/lib/libbsp/m68k/gen68340/start/startfor340only.S +++ b/c/src/lib/libbsp/m68k/gen68340/start/startfor340only.S @@ -19,7 +19,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com * * $Id$ @@ -408,7 +408,7 @@ sync_wait: /* -- chip select initialization -- */ lea.l SIM_MASKH0(a0),a2 lea.l _table_cs(%pc),a1 - + moveq.l #0x07,d1 _b_cs: @@ -427,7 +427,7 @@ _fill_loop: clr.l (a0)+ subq.l #1,d1 bne _fill_loop - + _dont_fill: jmp SYM(_Init68340) | Start C code (which never returns) diff --git a/c/src/lib/libbsp/m68k/gen68340/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68340/startup/bspstart.c index d7c95a4097..536e774631 100644 --- a/c/src/lib/libbsp/m68k/gen68340/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/gen68340/startup/bspstart.c @@ -24,7 +24,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. diff --git a/c/src/lib/libbsp/m68k/gen68340/startup/dumpanic.c b/c/src/lib/libbsp/m68k/gen68340/startup/dumpanic.c index 7a84dff20e..9310ca9f87 100644 --- a/c/src/lib/libbsp/m68k/gen68340/startup/dumpanic.c +++ b/c/src/lib/libbsp/m68k/gen68340/startup/dumpanic.c @@ -7,7 +7,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). * @@ -104,7 +104,7 @@ extern char RAW_GETC(int minor); /****************************************************** Name: _dbug_dump - Input parameters: sr, pc, stack pointer, + Input parameters: sr, pc, stack pointer, size to display Output parameters: - Description: display the supervisor stack diff --git a/c/src/lib/libbsp/m68k/gen68340/startup/init68340.c b/c/src/lib/libbsp/m68k/gen68340/startup/init68340.c index 96caf9e585..d7e7831e4d 100644 --- a/c/src/lib/libbsp/m68k/gen68340/startup/init68340.c +++ b/c/src/lib/libbsp/m68k/gen68340/startup/init68340.c @@ -6,9 +6,9 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com - * + * * $Id$ */ diff --git a/c/src/lib/libbsp/m68k/gen68340/timer/timer.c b/c/src/lib/libbsp/m68k/gen68340/timer/timer.c index b4298e150d..84060ae68c 100644 --- a/c/src/lib/libbsp/m68k/gen68340/timer/timer.c +++ b/c/src/lib/libbsp/m68k/gen68340/timer/timer.c @@ -13,7 +13,7 @@ * 4, rue du Clos Courtel * 35512 CESSON-SEVIGNE * FRANCE - * + * * e-mail: g_montel@yahoo.com * * $Id$ @@ -25,7 +25,7 @@ * * Output parameters: NONE * - * NOTE: It is important that the timer start/stop overhead be + * NOTE: It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * COPYRIGHT (c) 1989-1999. @@ -66,7 +66,7 @@ int preload = 0; Input parameters: - Output parameters: - Description: when a character is received, sets - the TIMER to raise an interrupt at + the TIMER to raise an interrupt at TIMEOUT. It's necessary to prevent from not getting n-1 characters (with n the @@ -128,7 +128,7 @@ void Fifo_Full_Timer_initialize (void) * USE TIMER 1 for UART FIFO FULL mode */ - if ( Fifo_Full_on_A || Fifo_Full_on_B ) + if ( Fifo_Full_on_A || Fifo_Full_on_B ) { /* Disable the timer */ TCR1 &= ~m340_SWR; @@ -145,8 +145,8 @@ void Fifo_Full_Timer_initialize (void) /* compute prescaler */ if ( Fifo_Full_on_A && Fifo_Full_on_B) - max_baud_rate = max(m340_uart_config[UART_CHANNEL_A].rx_baudrate, m340_uart_config[UART_CHANNEL_B].rx_baudrate); - else if ( Fifo_Full_on_A ) + max_baud_rate = max(m340_uart_config[UART_CHANNEL_A].rx_baudrate, m340_uart_config[UART_CHANNEL_B].rx_baudrate); + else if ( Fifo_Full_on_A ) max_baud_rate = m340_uart_config[UART_CHANNEL_A].rx_baudrate; else max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate; @@ -154,7 +154,7 @@ void Fifo_Full_Timer_initialize (void) nb_of_clock_ticks = (10/max_baud_rate)*(CLOCK_SPEED*1000000)*1.2; if (nb_of_clock_ticks < 0xFFFF) { preload = nb_of_clock_ticks; - prescaler_output_tap = -1; + prescaler_output_tap = -1; } else if (nb_of_clock_ticks/2 < 0xFFFF) { preload = nb_of_clock_ticks/2; prescaler_output_tap = m340_Divide_by_2; @@ -179,7 +179,7 @@ void Fifo_Full_Timer_initialize (void) } else if (nb_of_clock_ticks/256 < 0xFFFF) { preload = nb_of_clock_ticks/256; prescaler_output_tap = m340_Divide_by_256; - } + } /* Input Capture/Output Compare (ICOC) */ TCR1 = m340_SWR | m340_TO_Enabled | m340_ICOC; @@ -250,7 +250,7 @@ void Timer_initialize (void) } /****************************************************** - Name: Read_timer + Name: Read_timer Input parameters: - Output parameters: - Description: Return timer value in microsecond units @@ -263,10 +263,10 @@ Read_timer (void) } /****************************************************** - Name: Empty_function + Name: Empty_function Input parameters: - Output parameters: - - Description: Empty function call used in loops to + Description: Empty function call used in loops to measure basic cost of looping in Timing Test Suite. *****************************************************/ diff --git a/c/src/lib/libbsp/m68k/gen68360/clock/clock.c b/c/src/lib/libbsp/m68k/gen68360/clock/clock.c index 7ac1d8f728..8959821991 100644 --- a/c/src/lib/libbsp/m68k/gen68360/clock/clock.c +++ b/c/src/lib/libbsp/m68k/gen68360/clock/clock.c @@ -1,4 +1,4 @@ -/* +/* * This routine initializes the MC68360 Periodic Interval Timer * * The PIT has rather poor resolution, but it is easy to set up @@ -77,7 +77,7 @@ static unsigned long nsec; * To reduce the jitter in the calls to RTEMS the * hardware interrupt interval is never greater than * the maximum non-prescaled value from the PIT. - * + * * For a 25 MHz external clock the basic clock rate is * 40 nsec * 128 * 4 = 20.48 usec/tick */ diff --git a/c/src/lib/libbsp/m68k/gen68360/console/console.c b/c/src/lib/libbsp/m68k/gen68360/console/console.c index c20bbfbb17..1cf6aef777 100644 --- a/c/src/lib/libbsp/m68k/gen68360/console/console.c +++ b/c/src/lib/libbsp/m68k/gen68360/console/console.c @@ -168,7 +168,7 @@ smc1Initialize (int major, int minor, void *arg) * Put SMC1 in NMSI mode, connect SMC1 to BRG1 */ m360.simode |= M360_SI_SMC1_BRG1; - + /* * Set up SMC1 parameter RAM common to all protocols */ @@ -180,7 +180,7 @@ smc1Initialize (int major, int minor, void *arg) m360.smc1p.mrblr = RXBUFSIZE; else m360.smc1p.mrblr = 1; - + /* * Set up SMC1 parameter RAM UART-specific parameters */ @@ -188,19 +188,19 @@ smc1Initialize (int major, int minor, void *arg) m360.smc1p.un.uart.brklen = 0; m360.smc1p.un.uart.brkec = 0; m360.smc1p.un.uart.brkcr = 0; - + /* * Set up the Receive Buffer Descriptor */ smcRxBd->status = M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT; smcRxBd->length = 0; smcRxBd->buffer = rxBuf; - + /* * Setup the Transmit Buffer Descriptor */ smcTxBd->status = M360_BD_WRAP; - + /* * Set up SMC1 general and protocol-specific mode registers */ @@ -357,7 +357,7 @@ rtems_device_driver console_open( } return sc; } - + /* * Close the device */ @@ -402,6 +402,6 @@ rtems_device_driver console_control( rtems_device_minor_number minor, void * arg ) -{ +{ return rtems_termios_ioctl (arg); } diff --git a/c/src/lib/libbsp/m68k/gen68360/include/bsp.h b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h index 5860548b37..cc5ce7357c 100644 --- a/c/src/lib/libbsp/m68k/gen68360/include/bsp.h +++ b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h @@ -45,7 +45,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) - + /* * Network driver configuration */ @@ -107,7 +107,7 @@ extern int rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config, int a /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/gen68360/network/network.c b/c/src/lib/libbsp/m68k/gen68360/network/network.c index 698dd756b5..5c3f67d0f7 100644 --- a/c/src/lib/libbsp/m68k/gen68360/network/network.c +++ b/c/src/lib/libbsp/m68k/gen68360/network/network.c @@ -150,7 +150,7 @@ m360Enet_initialize_hardware (struct scc_softc *sc) m360.papar |= 0x303; m360.padir &= ~0x303; m360.paodr &= ~0x303; - + /* * Configure port C CTS1* and CD1* pins */ @@ -247,7 +247,7 @@ m360Enet_initialize_hardware (struct scc_softc *sc) * Aggressive retry */ m360.scc1p.un.ethernet.p_per = 0; - + /* * Clear individual address hash table */ @@ -377,10 +377,10 @@ m360Enet_retire_tx_bd (struct scc_softc *sc) status = (sc->txBdBase + j)->status; if (status & M360_BD_READY) break; - (sc->txBdBase + j)->status = M360_BD_READY | - (status & (M360_BD_PAD | - M360_BD_WRAP | - M360_BD_INTERRUPT | + (sc->txBdBase + j)->status = M360_BD_READY | + (status & (M360_BD_PAD | + M360_BD_WRAP | + M360_BD_INTERRUPT | M360_BD_LAST | M360_BD_TX_CRC)); if (status & M360_BD_LAST) @@ -393,7 +393,7 @@ m360Enet_retire_tx_bd (struct scc_softc *sc) * Move transmitter back to the first * buffer descriptor in the frame. */ - m360.scc1p._tbptr = m360.scc1p.tbase + + m360.scc1p._tbptr = m360.scc1p.tbase + sc->txBdTail * sizeof (m360BufferDescriptor_t); /* @@ -658,7 +658,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m) MFREE (m, n); m = n; } - + /* * Redo the send with the new mbuf cluster */ @@ -927,7 +927,7 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) case SIO_RTEMS_SHOW_STATS: scc_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -957,13 +957,13 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching) printf ("SCC1 driver can not be detached.\n"); return 0; } - + /* * Parse driver name */ if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) return 0; - + /* * Is driver free? */ diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/alloc360.c b/c/src/lib/libbsp/m68k/gen68360/startup/alloc360.c index b305d0cd65..b9a206b851 100644 --- a/c/src/lib/libbsp/m68k/gen68360/startup/alloc360.c +++ b/c/src/lib/libbsp/m68k/gen68360/startup/alloc360.c @@ -91,6 +91,6 @@ M360AllocateRiscTimers (int count) * descriptors are allocated with appropriate alignment. */ return M360AllocateBufferDescriptors (((count * 4) + - sizeof(m360BufferDescriptor_t) - 1) / + sizeof(m360BufferDescriptor_t) - 1) / sizeof(m360BufferDescriptor_t)); } diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c index 125cd2e81b..daa16fec28 100644 --- a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -37,7 +37,7 @@ unsigned long _M68K_RamSize; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ @@ -51,7 +51,7 @@ void bsp_pretasking_hook(void); /* m68k version */ void bsp_start( void ) { extern void *_WorkspaceBase; - + /* * _M68k_Ramsize is the amount of RAM on this board and * is set by many m68k BSPs at this point. With this diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c index 086c7b73f4..14aae8e20e 100644 --- a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c +++ b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c @@ -112,7 +112,7 @@ void _Init68360 (void) * 70 nsec DRAM * 180 nsec ROM (3 wait states) */ - m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN | + m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN | M360_GMR_RCYC(0) | M360_GMR_PGS(1) | M360_GMR_DPS_32BIT | M360_GMR_NCS | M360_GMR_TSS40; @@ -152,7 +152,7 @@ void _Init68360 (void) for (i = 0; i < 256; ++i) M68Kvec[i] = vbr[i]; m68k_set_vbr (M68Kvec); - + /* * Step 14: More system initialization * SDCR (Serial DMA configuration register) @@ -259,8 +259,8 @@ void _Init68360 (void) /* * Step 11: Remap Chip Select 0 (CS0*), set up GMR */ - m360.gmr = M360_GMR_RCNT(12) | M360_GMR_RFEN | - M360_GMR_RCYC(0) | M360_GMR_PGS(1) | + m360.gmr = M360_GMR_RCNT(12) | M360_GMR_RFEN | + M360_GMR_RCYC(0) | M360_GMR_PGS(1) | M360_GMR_DPS_32BIT | M360_GMR_DWQ | M360_GMR_GAMX; m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | @@ -305,7 +305,7 @@ void _Init68360 (void) for (i = 0; i < 256; ++i) M68Kvec[i] = vbr[i]; m68k_set_vbr (M68Kvec); - + /* * Step 14: More system initialization * SDCR (Serial DMA configuration register) @@ -365,7 +365,7 @@ void _Init68360 (void) * Enable bus monitor for external cycles * 1024 clocks for external timeout */ - m360.sypcr = 0xEC; + m360.sypcr = 0xEC; /* * Step 9: Clear parameter RAM and reset communication processor module @@ -374,8 +374,8 @@ void _Init68360 (void) *((long *)((char *)&m360 + 0xC00 + i)) = 0; *((long *)((char *)&m360 + 0xD00 + i)) = 0; *((long *)((char *)&m360 + 0xE00 + i)) = 0; - *((long *)((char *)&m360 + 0xF00 + i)) = 0; - } + *((long *)((char *)&m360 + 0xF00 + i)) = 0; + } M360ExecuteRISC (M360_CR_RST); /* @@ -397,16 +397,16 @@ void _Init68360 (void) /* * Step 11: Set up GMR - * + * */ m360.gmr = 0x0; /* * Step 11a: Remap 512Kx8 flash memory on CS0* - * 2 wait states - * Make it read-only for now + * 2 wait states + * Make it read-only for now */ - m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | + m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | M360_MEMC_BR_V; m360.memc[0].or = M360_MEMC_OR_WAITS(2) | M360_MEMC_OR_512KB | M360_MEMC_OR_8BIT; @@ -419,10 +419,10 @@ void _Init68360 (void) ramSize = 4 * 1024 * 1024; m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V; m360.memc[1].or = M360_MEMC_OR_WAITS(0) | M360_MEMC_OR_2MB | - M360_MEMC_OR_32BIT; + M360_MEMC_OR_32BIT; m360.memc[2].br = ((unsigned long)&_RamBase + 0x200000) | M360_MEMC_BR_V; m360.memc[2].or = M360_MEMC_OR_WAITS(0) | M360_MEMC_OR_2MB | - M360_MEMC_OR_32BIT; + M360_MEMC_OR_32BIT; /* * Step 13: Copy the exception vector table to system RAM */ @@ -544,9 +544,9 @@ void _Init68360 (void) * startup code may be running in a bootstrap PROM or in * a program downloaded by the bootstrap PROM. */ - m360.gmr = (m360.gmr & 0x001C0000) | M360_GMR_RCNT(23) | - M360_GMR_RFEN | M360_GMR_RCYC(0) | - M360_GMR_DPS_32BIT | M360_GMR_NCS | + m360.gmr = (m360.gmr & 0x001C0000) | M360_GMR_RCNT(23) | + M360_GMR_RFEN | M360_GMR_RCYC(0) | + M360_GMR_DPS_32BIT | M360_GMR_NCS | M360_GMR_GAMX; m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | M360_MEMC_BR_V; @@ -617,7 +617,7 @@ void _Init68360 (void) for (i = 0; i < 256; ++i) M68Kvec[i] = vbr[i]; m68k_set_vbr (M68Kvec); - + /* * Step 14: More system initialization * SDCR (Serial DMA configuration register) diff --git a/c/src/lib/libbsp/m68k/gen68360/timer/timer.c b/c/src/lib/libbsp/m68k/gen68360/timer/timer.c index b1c6ceb402..ab81cb8c9b 100644 --- a/c/src/lib/libbsp/m68k/gen68360/timer/timer.c +++ b/c/src/lib/libbsp/m68k/gen68360/timer/timer.c @@ -23,7 +23,7 @@ * * Output parameters: NONE * - * NOTE: It is important that the timer start/stop overhead be + * NOTE: It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/m68k/idp/clock/ckinit.c b/c/src/lib/libbsp/m68k/idp/clock/ckinit.c index 46f00d7063..6838af3c9b 100644 --- a/c/src/lib/libbsp/m68k/idp/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/idp/clock/ckinit.c @@ -40,14 +40,14 @@ void Disable_clock(); #define CLOCK_VECTOR 0x4D void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + /* * ISR Handler @@ -77,10 +77,10 @@ rtems_isr Clock_isr( have a heart attack -- if you use newlib1.6 or greater and get libgcc.a for gcc with software floating point support, this is not a problem */ - Clock_isrs = + Clock_isrs = (int)(BSP_Configuration.microseconds_per_tick / 1000); } - else + else Clock_isrs -= 1; } @@ -148,17 +148,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -167,15 +167,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -186,7 +186,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/idp/console/console.c b/c/src/lib/libbsp/m68k/idp/console/console.c index bb020d7f9a..6aa96bf5a7 100644 --- a/c/src/lib/libbsp/m68k/idp/console/console.c +++ b/c/src/lib/libbsp/m68k/idp/console/console.c @@ -1,4 +1,4 @@ -/* +/* * This file contains the Motorola IDP console IO package. * * Written by Doug McBride, Colorado Space Grant College @@ -49,28 +49,28 @@ rtems_device_driver console_initialize( major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + status = rtems_io_register_name( "/dev/tty00", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + status = rtems_io_register_name( "/dev/tty01", major, (rtems_device_minor_number) 1 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -86,7 +86,7 @@ rtems_device_driver console_initialize( * Return values: */ -rtems_boolean is_character_ready( +rtems_boolean is_character_ready( char *ch, int port ) @@ -110,7 +110,7 @@ rtems_boolean is_character_ready( * Return values: */ -rtems_boolean quick_char_check( +rtems_boolean quick_char_check( int port ) { @@ -132,17 +132,17 @@ rtems_boolean quick_char_check( * character read from UART */ -char inbyte( +char inbyte( int port ) { unsigned char tmp_char; - + /* If you come into this routine without checking is_character_ready() first and you want nonblocking code, then it's your own fault */ while ( !is_character_ready( &tmp_char, port ) ); - + return tmp_char; } @@ -153,12 +153,12 @@ char inbyte( * XON/XOFF flow control. * * Input parameters: - * ch - character to be transmitted + * ch - character to be transmitted * * Output parameters: NONE */ -void outbyte( +void outbyte( char ch, int port ) @@ -186,7 +186,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -214,7 +214,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -236,7 +236,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/idp/console/duart.c b/c/src/lib/libbsp/m68k/idp/console/duart.c index c944d57ed6..194b4ecc09 100644 --- a/c/src/lib/libbsp/m68k/idp/console/duart.c +++ b/c/src/lib/libbsp/m68k/idp/console/duart.c @@ -55,13 +55,13 @@ volatile void init_pit() MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_TX); MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_RX); - /* + /* * install ISR for ports A and B */ set_vector(C_Receive_ISR, (VECT+H3VECT), 1); - /* - * initialize pit + /* + * initialize pit * * set mode to 0 -- disable all ports * set up pirq and piack @@ -70,24 +70,24 @@ volatile void init_pit() * setup pivr * turn on all ports */ - MC68230_WRITE(PGCR, 0x00); - MC68230_WRITE(PSRR, 0x18); + MC68230_WRITE(PGCR, 0x00); + MC68230_WRITE(PSRR, 0x18); MC68230_WRITE(PBDDR, 0x00); - MC68230_WRITE(PBCR, 0x82); - MC68230_WRITE(PIVR, VECT); - MC68230_WRITE(PGCR, 0x20); + MC68230_WRITE(PBCR, 0x82); + MC68230_WRITE(PIVR, VECT); + MC68230_WRITE(PGCR, 0x20); /* * For some reason, the reset of receiver/transmitter only works for - * the first time around -- it garbles the output otherwise - * (e.g., sp21) + * the first time around -- it garbles the output otherwise + * (e.g., sp21) */ if (!Pit_initialized) { - /* + /* * initialize the duart registers on port b * WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE - * + * * reset tx, channel b * reset rx, channel b * reset mr pointer, ch @@ -96,10 +96,10 @@ volatile void init_pit() MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_RX); MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_MR_PTR); - /* + /* * initialize the duart registers on port a * WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE - * + * * reset tx, channel a * reset rx, channel a * reset mr pointer, ch @@ -112,8 +112,8 @@ volatile void init_pit() } /* - * Init the general registers of the duart - * + * Init the general registers of the duart + * * init ivr * init imr * init acr @@ -122,32 +122,32 @@ volatile void init_pit() * init opcr * init cts */ - MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_VECTOR_REG, + MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_VECTOR_REG, MC68681_INTERRUPT_VECTOR_INIT); - MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_MASK_REG, - MC68681_IR_RX_READY_A | MC68681_IR_RX_READY_B); + MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_MASK_REG, + MC68681_IR_RX_READY_A | MC68681_IR_RX_READY_B); MC68681_WRITE(DUART_ADDR, MC68681_AUX_CTRL_REG, MC68681_CLEAR); MC68681_WRITE(DUART_ADDR, MC68681_COUNTER_TIMER_UPPER_REG, 0x00); MC68681_WRITE(DUART_ADDR, MC68681_COUNTER_TIMER_LOWER_REG, 0x02); - MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_CONFIG_REG, MC68681_CLEAR); - MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_SET_REG, 0x01); + MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_CONFIG_REG, MC68681_CLEAR); + MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_SET_REG, 0x01); - /* + /* * init the actual serial port for port a - * - * Set Baud Rate to 9600 + * + * Set Baud Rate to 9600 * Set Stop bit length of 1 * enable Transmit and receive */ MC68681_WRITE(DUART_ADDR, MC68681_CLOCK_SELECT_REG_A, MC68681_BAUD_RATE_MASK_9600); - MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1A, + MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1A, (MC68681_8BIT_CHARS | MC68681_NO_PARITY)); MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_2A,MC68681_STOP_BIT_LENGTH_1); - MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, + MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, (MC68681_MODE_REG_ENABLE_TX | MC68681_MODE_REG_ENABLE_RX)); - /* - * init the actual serial port for port b + /* + * init the actual serial port for port b * init csrb -- 9600 baud */ MC68681_WRITE(DUART_ADDR, MC68681_CLOCK_SELECT_REG_B, MC68681_BAUD_RATE_MASK_9600); @@ -157,20 +157,20 @@ volatile void init_pit() #ifdef EIGHT_BITS_NO_PARITY /* * Set 8 Bit characters with no parity - */ - MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B, + */ + MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B, (MC68681_NO_PARITY | MC68681_8BIT_CHARS) ); -#else +#else /* - * Set 7 Bit Characters with parity + * Set 7 Bit Characters with parity */ - MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B, + MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B, (MC68681_WITH_PARITY | MC68681_7BIT_CHARS) ); #endif /* - * Set Stop Bit length to 1 + * Set Stop Bit length to 1 * Disable Recieve and transmit on B */ MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_2B,MC68681_STOP_BIT_LENGTH_1); @@ -191,8 +191,8 @@ rtems_isr C_Receive_ISR(rtems_vector_number vector) _addr = (unsigned char *) (PIT_ADDR + PITSR); *_addr = 0x04; - /* - * check port A first for input + /* + * check port A first for input * extract rcvrdy on port B * set ptr to recieve buffer and read character into ring buffer */ @@ -203,11 +203,11 @@ rtems_isr C_Receive_ISR(rtems_vector_number vector) Ring_buffer_Add_character( &Console_Buffer[ 0 ], *_addr ); } - /* + /* * If not on port A, let's check port B * extract rcvrdy on port B * set ptr to recieve buffer and read character into ring buffer - */ + */ else { _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B); @@ -217,9 +217,9 @@ rtems_isr C_Receive_ISR(rtems_vector_number vector) Ring_buffer_Add_character( &Console_Buffer[ 1 ], *_addr ); } - /* - * if not ready on port A or port B, must be an error - * if error, get out so that fifo is undisturbed + /* + * if not ready on port A or port B, must be an error + * if error, get out so that fifo is undisturbed */ } } @@ -232,16 +232,16 @@ void transmit_char(char ch) { volatile unsigned char *_addr; - /* - * Get SRA (extract txrdy) + /* + * Get SRA (extract txrdy) */ _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_A); while (!(*_addr & MC68681_TX_READY)) { } - /* - * transmit character over port A + /* + * transmit character over port A */ MC68681_WRITE(DUART_ADDR, MC68681_TRANSMIT_BUFFER_A, ch); } @@ -255,16 +255,16 @@ void transmit_char_portb(char ch) { volatile unsigned char *_addr; - /* - * Get SRB (extract txrdy) + /* + * Get SRB (extract txrdy) */ _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B); while (!(*_addr & MC68681_TX_READY)) { } - /* - * transmit character over port B + /* + * transmit character over port B */ MC68681_WRITE(DUART_ADDR, MC68681_TRANSMIT_BUFFER_B, ch); } diff --git a/c/src/lib/libbsp/m68k/idp/console/leds.c b/c/src/lib/libbsp/m68k/idp/console/leds.c index b7b7722008..7f2926f290 100644 --- a/c/src/lib/libbsp/m68k/idp/console/leds.c +++ b/c/src/lib/libbsp/m68k/idp/console/leds.c @@ -16,12 +16,12 @@ void clear_leds(); * the led display. * Setting the bit to 0 turns it on, 1 turns it off. * the LED's are controlled by setting the right bit mask in the base - * address. + * address. * The bits are: * [d.p | g | f | e | d | c | b | a ] is the byte. * * The locations are: - * + * * a * ----- * f | | b diff --git a/c/src/lib/libbsp/m68k/idp/include/bsp.h b/c/src/lib/libbsp/m68k/idp/include/bsp.h index de04626c57..80a9abea0a 100644 --- a/c/src/lib/libbsp/m68k/idp/include/bsp.h +++ b/c/src/lib/libbsp/m68k/idp/include/bsp.h @@ -1,5 +1,5 @@ /* bsp.h - * + * * This include file contains all Motorola 680x0 IDP board IO definitions. * * $Id$ @@ -38,18 +38,18 @@ #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ /* - * Define the interrupt mechanism for Time Test 27 + * Define the interrupt mechanism for Time Test 27 * * NOTE: tm27 apparently not supported. */ #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() @@ -73,7 +73,7 @@ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/idp/startup/bspstart.c b/c/src/lib/libbsp/m68k/idp/startup/bspstart.c index ba8a3406e0..0675e666ca 100644 --- a/c/src/lib/libbsp/m68k/idp/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/idp/startup/bspstart.c @@ -3,7 +3,7 @@ * board, and monitor specific initialization and configuration. * The generic CPU dependent initialization has been performed * before this routine is invoked. - * + * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). * @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + unsigned char *duart_base; extern struct duart_regs duart_info; @@ -31,18 +31,18 @@ void led_putnum(); * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; rtems_cpu_table Cpu_table; - + char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ @@ -65,7 +65,7 @@ void bsp_start( void ) duart_base = (unsigned char *)DUART_ADDR; - /* + /* * Set the VBR here to the monitor's default. */ @@ -73,7 +73,7 @@ void bsp_start( void ) /* This is where you set vector base register = 0 */ m68k_set_vbr( monitors_vector_table ); - /* The vector interrupt table for the 680x0 is in appendix B-2 + /* The vector interrupt table for the 680x0 is in appendix B-2 of the M68000 Family Programmer's reference table */ for ( index=2 ; index<=255 ; index++ ) M68Kvec[ index ] = monitors_vector_table[ 32 ]; @@ -83,7 +83,7 @@ void bsp_start( void ) M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */ M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */ - /* + /* * Set the VBR here if you do not want to use the monitor's vector table. */ @@ -95,14 +95,14 @@ void bsp_start( void ) /* * we only use a hook to get the C library initialized. */ - + Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ Cpu_table.postdriver_hook = bsp_postdriver_hook; Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec; Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; BSP_Configuration.work_space_start = (void *) &_WorkspaceBase; - + /* led_putnum('e'); * for debugging purposes only */ /* Clock_exit is done as an atexit() function */ diff --git a/c/src/lib/libbsp/m68k/idp/timer/timer.c b/c/src/lib/libbsp/m68k/idp/timer/timer.c index 3866a81a96..28f15ddbd2 100644 --- a/c/src/lib/libbsp/m68k/idp/timer/timer.c +++ b/c/src/lib/libbsp/m68k/idp/timer/timer.c @@ -10,7 +10,7 @@ * for some compilers. The multiple writes to the MC68230 * may be optimized away. * - * It is important that the timer start/stop overhead be + * It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * Code Modified for the MC68230 by Doug McBride, Colorado Space Grant College @@ -40,7 +40,7 @@ rtems_isr timerisr(); void Timer_initialize() { (void) set_vector( timerisr, TIMER_VECTOR, 0 ); /* install ISR */ - + Ttimer_val = 0; /* clear timer ISR count */ /* some PI/T initialization stuff here */ @@ -65,7 +65,7 @@ void Timer_initialize() #define AVG_OVERHEAD 9 /* may not be right -- do this later */ #define LEAST_VALID 10 /* Don't trust a value lower than this */ -int Read_timer() +int Read_timer() { uint8_t data; uint8_t msb, osb, lsb; @@ -99,7 +99,7 @@ int Read_timer() if ( total < LEAST_VALID ) return 0; /* below timer resolution */ - + /* Clocked at 6.5 Mhz */ /* Avoid floating point problems, be lazy, and return the total minus the average overhead */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c index 06980a4530..c3cb1ae5bf 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c @@ -154,7 +154,7 @@ console_first_open(int major, int minor, void *arg) rtems_libio_open_close_args_t *args = arg; rtems_status_code sc; uint8_t intvec; - + switch (minor) { case 0: intvec = BSP_INTVEC_UART1; break; @@ -251,7 +251,7 @@ console_initialize(rtems_device_major_number major, sc = mcfuart_reset(&uart[1]); return sc; } - + return RTEMS_SUCCESSFUL; } @@ -267,8 +267,8 @@ console_initialize(rtems_device_major_number major, * RETURNS: * RTEMS error code */ -rtems_device_driver -console_open(rtems_device_major_number major, +rtems_device_driver +console_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) { @@ -297,10 +297,10 @@ console_open(rtems_device_major_number major, { case CONSOLE_MODE_RAW: return RTEMS_SUCCESSFUL; - + case CONSOLE_MODE_INT: return rtems_termios_open(major, minor, arg, &intr_callbacks); - + case CONSOLE_MODE_POLL: return rtems_termios_open(major, minor, arg, &poll_callbacks); @@ -321,7 +321,7 @@ console_open(rtems_device_major_number major, * RETURNS: * RTEMS error code */ -rtems_device_driver +rtems_device_driver console_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) @@ -431,7 +431,7 @@ rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) -{ +{ if (console_mode != CONSOLE_MODE_RAW) { return rtems_termios_ioctl (arg); diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c index dd57ad8ff8..32c8809584 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c @@ -65,7 +65,7 @@ i2c_transfer_wait_sema(i2c_bus_number bus, i2c_message *msg, int nmsg) sc = rtems_semaphore_create( rtems_build_name('I', '2', 'C', 'S'), 0, - RTEMS_COUNTING_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | + RTEMS_COUNTING_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | RTEMS_NO_PRIORITY_CEILING | RTEMS_LOCAL, 0, &sema @@ -101,7 +101,7 @@ i2c_transfer_wait_poll(i2c_bus_number bus, i2c_message *msg, int nmsg) volatile rtems_boolean poll_done_flag; rtems_status_code sc; poll_done_flag = 0; - sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_poll_done_func, + sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_poll_done_func, (uint32_t)&poll_done_flag); if (sc != RTEMS_SUCCESSFUL) return sc; @@ -123,7 +123,7 @@ i2c_transfer_wait_poll(i2c_bus_number bus, i2c_message *msg, int nmsg) * nmsg - number of messages in transfer * * RETURNS: - * I2C_SUCCESSFUL, if tranfer finished successfully, + * I2C_SUCCESSFUL, if tranfer finished successfully, * I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed, * value of status field of first error-finished message in transfer, * if something wrong. @@ -141,10 +141,10 @@ i2c_transfer_wait(i2c_bus_number bus, i2c_message *msg, int nmsg) { sc = i2c_transfer_wait_poll(bus, msg, nmsg); } - + if (sc != RTEMS_SUCCESSFUL) return I2C_RESOURCE_NOT_AVAILABLE; - + for (i = 0; i < nmsg; i++) { if (msg[i].status != I2C_SUCCESSFUL) @@ -264,7 +264,7 @@ i2c_wrrd(i2c_bus_number bus, i2c_address addr, void *bufw, int sizew, msg[0].status = 0; msg[0].len = sizew; msg[0].buf = bufw; - + msg[1].addr = addr; msg[1].flags = 0; if (addr > 0xff) @@ -303,7 +303,7 @@ i2c_wbrd(i2c_bus_number bus, i2c_address addr, uint8_t cmd, msg[0].status = 0; msg[0].len = sizeof(bufw); msg[0].buf = &bufw; - + msg[1].addr = addr; msg[1].flags = I2C_MSG_ERRSKIP; if (addr > 0xff) diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c index cf23767577..8850ab8aaa 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c @@ -32,7 +32,7 @@ #define I2C_SELECT_BUS(bus) #endif -/* +/* * Few I2C transfers may be posted simultaneously, but MBUS driver is able * to process it one-by-one. To serialize transfers, function i2c_transfer * put transfer information to the queue and initiate new transfers if MBUS @@ -40,7 +40,7 @@ * when current active transfer is finished. */ -/* +/* * i2c_qel - I2C transfers queue element; contain information about * delayed transfer */ @@ -113,7 +113,7 @@ i2cdrv_unload(void) mbus_busy = 1; rtems_interrupt_enable(level); qel = tqueue + tqueue_tail; - + I2C_SELECT_BUS(qel->bus); if (i2cdrv_bus_clock_div[qel->bus] != i2cdrv_bus_clock_div_current) { @@ -160,17 +160,17 @@ i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, { i2c_qel qel; rtems_interrupt_level level; - + if (bus >= I2C_NUMBER_OF_BUSES) { return RTEMS_INVALID_NUMBER; } - + if (msg == NULL) { return RTEMS_INVALID_ADDRESS; } - + qel.bus = bus; qel.msg = msg; qel.nmsg = nmsg; @@ -204,11 +204,11 @@ i2cdrv_initialize(rtems_device_major_number major, tqueue_tail = tqueue_head = 0; tqueue_size = 32; tqueue = calloc(tqueue_size, sizeof(i2c_qel)); - + sc = mcfmbus_initialize(&mbus, MBAR); if (sc != RTEMS_SUCCESSFUL) return sc; - + for (i = 0; i < I2C_NUMBER_OF_BUSES; i++) { sc = i2c_select_clock_rate(i, 4096); @@ -221,7 +221,7 @@ i2cdrv_initialize(rtems_device_major_number major, /* i2c_select_clock_rate -- * select I2C bus clock rate for specified bus. Some bus controller do not - * allow to select arbitrary clock rate; in this case nearest possible + * allow to select arbitrary clock rate; in this case nearest possible * slower clock rate is selected. * * PARAMETERS: @@ -229,7 +229,7 @@ i2cdrv_initialize(rtems_device_major_number major, * bps - data transfer rate for this bytes in bits per second * * RETURNS: - * RTEMS_SUCCESSFUL, if operation performed successfully, + * RTEMS_SUCCESSFUL, if operation performed successfully, * RTEMS_INVALID_NUMBER, if wrong bus number is specified, * RTEMS_UNSATISFIED, if bus do not support data transfer rate selection * or specified data transfer rate could not be used. @@ -240,10 +240,10 @@ i2c_select_clock_rate(i2c_bus_number bus, int bps) int div; if (bus >= I2C_NUMBER_OF_BUSES) return RTEMS_INVALID_NUMBER; - + if (bps == 0) return RTEMS_UNSATISFIED; - + div = BSP_SYSTEM_FREQUENCY / bps; i2cdrv_bus_clock_div[bus] = div; return RTEMS_SUCCESSFUL; diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h index 7a677f2108..1d0d753a75 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h @@ -21,20 +21,20 @@ #ifndef KB #define KB (1024) #endif -#ifndef MB +#ifndef MB #define MB (KB*KB) #endif /*** Board resources allocation ***/ -/* +/* * To achieve some compatibility with dBUG monitor, we use the same * memory resources allocation as it is used in dBUG. * * If this definitions will be changed, change the linker script also. */ - + /* Memory mapping */ /* CS0: Boot Flash */ #define BSP_MEM_ADDR_FLASH (0xFFE00000) @@ -214,7 +214,7 @@ extern char _SYS_CLOCK_FREQUENCY; /* Don't use this variable directly!!! */ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h index 844f88b362..1ff270a973 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h @@ -90,7 +90,7 @@ i2c_initialize(rtems_device_major_number major, /* i2c_select_clock_rate -- * select I2C bus clock rate for specified bus. Some bus controller do not - * allow to select arbitrary clock rate; in this case nearest possible + * allow to select arbitrary clock rate; in this case nearest possible * slower clock rate is selected. * * PARAMETERS: @@ -98,7 +98,7 @@ i2c_initialize(rtems_device_major_number major, * bps - data transfer rate for this bytes in bits per second * * RETURNS: - * RTEMS_SUCCESSFUL, if operation performed successfully, + * RTEMS_SUCCESSFUL, if operation performed successfully, * RTEMS_INVALID_NUMBER, if wrong bus number is specified, * RTEMS_UNSATISFIED, if bus do not support data transfer rate selection * or specified data transfer rate could not be used. @@ -123,7 +123,7 @@ i2c_select_clock_rate(i2c_bus_number bus, int bps); * code if something failed. */ rtems_status_code -i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, +i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, i2c_transfer_done done, uint32_t done_arg); /* i2c_transfer_wait -- @@ -137,7 +137,7 @@ i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, * nmsg - number of messages in transfer * * RETURNS: - * I2C_SUCCESSFUL, if tranfer finished successfully, + * I2C_SUCCESSFUL, if tranfer finished successfully, * I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed, * value of status field of first error-finished message in transfer, * if something wrong. diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h index 12ce30a0cd..10c25bf36d 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h @@ -33,5 +33,5 @@ i2cdrv_initialize(rtems_device_major_number major, #ifdef __cplusplus } #endif - + #endif /* __I2CDRV_H__ */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c index cbf8579f8a..09edc4c361 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c @@ -1,4 +1,4 @@ -/* +/* * DS1307-based Non-Volatile memory device driver * * DS1307 chip is a I2C Real-Time Clock. It contains 56 bytes of @@ -142,7 +142,7 @@ nvram_driver_write(rtems_device_major_number major, i2c_bus_number bus = DS1307_I2C_BUS_NUMBER; i2c_address addr = DS1307_I2C_ADDRESS; i2c_message_status status; - + if (args->offset >= DS1307_NVRAM_SIZE) { count = 0; diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S index 6e7cdd4e41..58bdaeb34f 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S +++ b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S @@ -314,17 +314,17 @@ SYM(start): move.l #(INITIAL_STACK),sp | Set up stack again (may be we are | going here from monitor or with | BDM interface assistance) - + /* * Remainder of the startup code is handled by C code */ jmp SYM(Init5206e) | Start C code (which never returns) - + /*************************************************************************** Function : CopyDataClearBSSAndStart - Description : Copy DATA segment, clear BSS segment, initialize heap, - initialise real stack, start C program. Assume that DATA and BSS sizes + Description : Copy DATA segment, clear BSS segment, initialize heap, + initialise real stack, start C program. Assume that DATA and BSS sizes are multiples of 4. ***************************************************************************/ PUBLIC (CopyDataClearBSSAndStart) @@ -396,7 +396,7 @@ _avec2_int: _avec3_int: nop - jmp _unexp_int + jmp _unexp_int _avec4_int: nop diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c index 23e2c26c25..4fb551e228 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c @@ -11,9 +11,9 @@ * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at - * + * * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c index b6c78521a7..0d9149b2aa 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c @@ -21,15 +21,15 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ #include <bsp.h> #include <rtems/libio.h> - + #include <rtems/libcsupport.h> - + #include <string.h> /* @@ -49,7 +49,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c index 8bf94caaad..64be2e5354 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c @@ -24,7 +24,7 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ @@ -82,19 +82,19 @@ void Init5206e(void) { extern void CopyDataClearBSSAndStart(unsigned long ramsize); - + /* Set Module Base Address register */ m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V); - + /* Set System Protection Control Register (SYPCR): * Bus Monitor Enable, Bus Monitor Timing = 1024 clocks, * Software watchdog disabled */ *MCF5206E_SYPCR(MBAR) = MCF5206E_SYPCR_BME | MCF5206E_SYPCR_BMT_1024; - + /* Set Pin Assignment Register (PAR): - * Output Timer 0 (not DREQ) on *TOUT[0] / *DREQ[1] + * Output Timer 0 (not DREQ) on *TOUT[0] / *DREQ[1] * Input Timer 0 (not DREQ) on *TIN[0] / *DREQ[0] * IRQ, not IPL * UART2 RTS signal (not \RSTO) @@ -108,7 +108,7 @@ Init5206e(void) MCF5206E_PAR_PAR5_PST | MCF5206E_PAR_PAR4_DDATA | MCF5206E_PAR_WE0_WE1_WE2_WE3; - + /* Set SIM Configuration Register (SIMR): * Disable software watchdog timer and bus timeout monitor when * internal freeze signal is asserted. @@ -117,45 +117,45 @@ Init5206e(void) /* Set Interrupt Mask Register: Disable all interrupts */ *MCF5206E_IMR(MBAR) = 0xFFFF; - + /* Assign Interrupt Control Registers as it is defined in bsp.h */ - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL1) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL1) = (BSP_INTLVL_AVEC1 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC1 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL2) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL2) = (BSP_INTLVL_AVEC2 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC2 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL3) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL3) = (BSP_INTLVL_AVEC3 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC3 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL4) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL4) = (BSP_INTLVL_AVEC4 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC4 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL5) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL5) = (BSP_INTLVL_AVEC5 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC5 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL6) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL6) = (BSP_INTLVL_AVEC6 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC6 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL7) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL7) = (BSP_INTLVL_AVEC7 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_AVEC7 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_1) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_1) = (BSP_INTLVL_TIMER1 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_TIMER1 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_2) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_2) = (BSP_INTLVL_TIMER2 << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_TIMER2 << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; - *MCF5206E_ICR(MBAR,MCF5206E_INTR_MBUS) = + *MCF5206E_ICR(MBAR,MCF5206E_INTR_MBUS) = (BSP_INTLVL_MBUS << MCF5206E_ICR_IL_S) | (BSP_INTPRIO_MBUS << MCF5206E_ICR_IP_S) | MCF5206E_ICR_AVEC; @@ -178,7 +178,7 @@ Init5206e(void) *MCF5206E_SWIVR(MBAR) = 0x0F; /* Uninitialized interrupt */ *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY1; *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY2; - + /* Configuring Chip Selects */ /* CS2: SRAM memory */ *MCF5206E_CSAR(MBAR,2) = BSP_MEM_ADDR_ESRAM >> 16; @@ -189,7 +189,7 @@ Init5206e(void) MCF5206E_CSCR_EMAA | MCF5206E_CSCR_WR | MCF5206E_CSCR_RD; - + /* CS3: GPIO on eLITE board */ *MCF5206E_CSAR(MBAR,3) = BSP_MEM_ADDR_GPIO >> 16; *MCF5206E_CSMR(MBAR,3) = BSP_MEM_MASK_GPIO; @@ -199,7 +199,7 @@ Init5206e(void) MCF5206E_CSCR_EMAA | MCF5206E_CSCR_WR | MCF5206E_CSCR_RD; - + { extern void INTERRUPT_VECTOR(); uint32_t *inttab = (uint32_t*)&INTERRUPT_VECTOR; @@ -211,9 +211,9 @@ Init5206e(void) } } m68k_set_vbr(BSP_MEM_ADDR_ESRAM); - + /* CS0: Flash EEPROM */ - *MCF5206E_CSAR(MBAR,0) = BSP_MEM_ADDR_FLASH >> 16; + *MCF5206E_CSAR(MBAR,0) = BSP_MEM_ADDR_FLASH >> 16; *MCF5206E_CSCR(MBAR,0) = MCF5206E_CSCR_WS3 | MCF5206E_CSCR_AA | MCF5206E_CSCR_PS_16 | @@ -221,7 +221,7 @@ Init5206e(void) MCF5206E_CSCR_WR | MCF5206E_CSCR_RD; *MCF5206E_CSMR(MBAR,0) = BSP_MEM_MASK_FLASH; - + /* * Invalidate the cache and disable it */ @@ -244,8 +244,8 @@ Init5206e(void) | MCF5206E_ACR_SM_ANY ); - mcf5206e_enable_cache(); - + mcf5206e_enable_cache(); + /* * Copy data, clear BSS, switch stacks and call boot_card() */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c index 559b7bdb5d..a2c62ebcc1 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c @@ -53,17 +53,17 @@ ds1307_initialize(int minor) uint8_t sec; i2c_bus_number bus; i2c_address addr; - + bus = RTC_Table[minor].ulCtrlPort1; addr = RTC_Table[minor].ulDataPort; - + /* Read SECONDS register */ try = 0; do { status = i2c_wbrd(bus, addr, 0, &sec, sizeof(sec)); try++; } while ((status != I2C_SUCCESSFUL) && (try < 15)); - + /* If clock is halted, reset and start the clock */ if ((sec & DS1307_SECOND_HALT) != 0) { @@ -98,13 +98,13 @@ ds1307_get_time(int minor, rtems_time_of_day *time) uint32_t v1, v2; i2c_message_status status; int try; - + if (time == NULL) return -1; - + bus = RTC_Table[minor].ulCtrlPort1; addr = RTC_Table[minor].ulDataPort; - + memset(time, 0, sizeof(rtems_time_of_day)); try = 0; do { @@ -116,20 +116,20 @@ ds1307_get_time(int minor, rtems_time_of_day *time) { return -1; } - + v1 = info[DS1307_YEAR]; v2 = From_BCD(v1); if (v2 < 88) time->year = 2000 + v2; else time->year = 1900 + v2; - + v1 = info[DS1307_MONTH] & ~0xE0; time->month = From_BCD(v1); - + v1 = info[DS1307_DAY] & ~0xC0; time->day = From_BCD(v1); - + v1 = info[DS1307_HOUR]; if (v1 & DS1307_HOUR_12) { @@ -151,11 +151,11 @@ ds1307_get_time(int minor, rtems_time_of_day *time) v1 = info[DS1307_MINUTE] & ~0x80; time->minute = From_BCD(v1); - + v1 = info[DS1307_SECOND]; v2 = v1 & ~0x80; time->second = From_BCD(v2); - + return 0; } @@ -178,7 +178,7 @@ ds1307_set_time(int minor, rtems_time_of_day *time) uint8_t info[8]; i2c_message_status status; int try; - + if (time == NULL) return -1; @@ -187,7 +187,7 @@ ds1307_set_time(int minor, rtems_time_of_day *time) if (time->year >= 2088) rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER); - + info[0] = DS1307_SECOND; info[1 + DS1307_YEAR] = To_BCD(time->year % 100); info[1 + DS1307_MONTH] = To_BCD(time->month); @@ -196,7 +196,7 @@ ds1307_set_time(int minor, rtems_time_of_day *time) info[1 + DS1307_MINUTE] = To_BCD(time->minute); info[1 + DS1307_SECOND] = To_BCD(time->second); info[1 + DS1307_DAY_OF_WEEK] = 1; /* Do not set day of week */ - + try = 0; do { status = i2c_write(bus, addr, info, 8); diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c b/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c index 117f95488f..35d00c1792 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c @@ -63,12 +63,12 @@ mcf5206elite_ds1307_probe(int minor) rtc_tbl *rtc; i2c_bus_number bus; i2c_address addr; - + if (minor >= NUM_RTCS) return FALSE; - + rtc = RTC_Table + minor; - + bus = rtc->ulCtrlPort1; addr = rtc->ulDataPort; do { diff --git a/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c b/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c index 367e3dc86f..6b43a81917 100644 --- a/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c @@ -30,14 +30,14 @@ volatile uint32_t Clock_driver_ticks; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + rtems_isr Clock_isr(rtems_vector_number vector) { Clock_driver_ticks += 1; @@ -63,7 +63,7 @@ void Install_clock( *PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */ *PICR = (unsigned short int) /* enable interrupt */ ( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) ); - + atexit( Clock_exit ); } @@ -84,17 +84,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -103,15 +103,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -122,7 +122,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/mrm332/console/console.c b/c/src/lib/libbsp/m68k/mrm332/console/console.c index 33bfb1fa8e..757b196dc6 100644 --- a/c/src/lib/libbsp/m68k/mrm332/console/console.c +++ b/c/src/lib/libbsp/m68k/mrm332/console/console.c @@ -49,11 +49,11 @@ rtems_device_driver console_open( /* SCI internal uart */ - status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( TRUE ) ); + status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( TRUE ) ); return status; } - + /*PAGE * * console_close @@ -69,7 +69,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + /*PAGE * * console_read @@ -85,7 +85,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + /*PAGE * * console_write @@ -101,7 +101,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + /*PAGE * * console_control @@ -167,7 +167,7 @@ rtems_device_driver console_initialize( if ( link( "/dev/sci", "/dev/console") < 0 ) { rtems_fatal_error_occurred( RTEMS_IO_ERROR ); - } + } #endif /* diff --git a/c/src/lib/libbsp/m68k/mrm332/console/sci.c b/c/src/lib/libbsp/m68k/mrm332/console/sci.c index 7e92a5a293..97c4a5c1b5 100644 --- a/c/src/lib/libbsp/m68k/mrm332/console/sci.c +++ b/c/src/lib/libbsp/m68k/mrm332/console/sci.c @@ -36,6 +36,9 @@ * $Id$ * * $Log$ +* Revision 1.6 2004/04/15 13:26:13 ralf +* Remove stray white spaces. +* * Revision 1.5 2004/03/31 04:37:05 ralf * 2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> * @@ -486,7 +489,7 @@ static int8_t SciRcvBufGetChar() { rtems_interrupt_level level; uint8_t ch; - + if ( SciRcvBufCount == 0 ) { rtems_fatal_error_occurred(0xDEAD); // check the count first! @@ -521,7 +524,7 @@ static int8_t SciRcvBufGetChar() static void SciRcvBufPutChar( uint8_t ch ) { rtems_interrupt_level level; - + if ( SciRcvBufCount == SCI_RCV_BUF_SIZE ) // is there room? { return; // no, throw it away @@ -556,7 +559,7 @@ static void SciRcvBufPutChar( uint8_t ch ) static void SciRcvBufFlush( void ) { rtems_interrupt_level level; - + rtems_interrupt_disable( level ); // disable interrupts memset( SciRcvBuffer, 0, sizeof(SciRcvBuffer) ); @@ -740,7 +743,7 @@ int32_t SciSetAttributes( uint16_t sci_databits = 0; if ( minor != SCI_MINOR ) // check the minor dev num - { + { return -1; // return error } @@ -754,7 +757,7 @@ int32_t SciSetAttributes( // baud_requested = B9600; // default to 9600 baud baud_requested = B19200; // default to 19200 baud } - + sci_rate = termios_baud_to_number( baud_requested ); // parity error detection @@ -1123,7 +1126,7 @@ rtems_device_driver SciRead ( rtems_libio_rw_args_t *rw_args; // ptr to argument struct uint8_t *buffer; uint16_t length; - + rw_args = (rtems_libio_rw_args_t *) arg; // arguments to read() @@ -1184,7 +1187,7 @@ rtems_device_driver SciWrite ( rtems_libio_rw_args_t *rw_args; // ptr to argument struct uint8_t *buffer; uint16_t length; - + rw_args = (rtems_libio_rw_args_t *) arg; if (minor != SCI_MINOR) @@ -1234,7 +1237,7 @@ rtems_device_driver SciControl ( uint16_t command; // the cmd to execute uint16_t unused; // maybe later uint16_t *ptr; // ptr to user data - + //printk("%s major=%d minor=%d\r\n", __FUNCTION__,major,minor); // do some sanity checking diff --git a/c/src/lib/libbsp/m68k/mrm332/include/bsp.h b/c/src/lib/libbsp/m68k/mrm332/include/bsp.h index 79be6d6e71..1aa26d9310 100644 --- a/c/src/lib/libbsp/m68k/mrm332/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mrm332/include/bsp.h @@ -57,7 +57,7 @@ extern "C" { /* XXX - JRS - I want to compile the tmtests */ -#define MUST_WAIT_FOR_INTERRUPT 1 +#define MUST_WAIT_FOR_INTERRUPT 1 #define Install_tm27_vector( handler ) @@ -65,7 +65,7 @@ extern "C" { #define Clear_tm27_intr() -#define Lower_tm27_intr() +#define Lower_tm27_intr() /* * Simple spin delay in microsecond units for device drivers. @@ -130,11 +130,11 @@ extern int stack_start; /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h b/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h index d6e97f1cec..8e385f8079 100644 --- a/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h +++ b/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h @@ -64,7 +64,7 @@ /* * This prototype really should have the noreturn attribute but - * that causes a warning. Not sure how to fix that. + * that causes a warning. Not sure how to fix that. */ /* static void reboot(void) __attribute__ ((noreturn)); */ static void reboot(void); diff --git a/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c b/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c index 4e5e0e542a..52796ca03a 100644 --- a/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c +++ b/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c @@ -36,27 +36,27 @@ rtems_isr Spurious_Isr( //int sp = 0; #if 0 const char * const VectDescrip[] = { - _Spurious_Error_[0], _Spurious_Error_[0], _Spurious_Error_[1], - _Spurious_Error_[2], _Spurious_Error_[3], _Spurious_Error_[4], - _Spurious_Error_[5], _Spurious_Error_[6], _Spurious_Error_[7], - _Spurious_Error_[8], _Spurious_Error_[9], _Spurious_Error_[10], - _Spurious_Error_[11], _Spurious_Error_[12], _Spurious_Error_[13], - _Spurious_Error_[13], _Spurious_Error_[14], _Spurious_Error_[14], - _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], - _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], - _Spurious_Error_[15], _Spurious_Error_[16], _Spurious_Error_[17], - _Spurious_Error_[18], _Spurious_Error_[19], _Spurious_Error_[20], - _Spurious_Error_[21], _Spurious_Error_[22], _Spurious_Error_[23], - _Spurious_Error_[24], _Spurious_Error_[23], _Spurious_Error_[23], - _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], - _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], - _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], - _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[25], - _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], - _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], - _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], - _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[27], - _Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27], + _Spurious_Error_[0], _Spurious_Error_[0], _Spurious_Error_[1], + _Spurious_Error_[2], _Spurious_Error_[3], _Spurious_Error_[4], + _Spurious_Error_[5], _Spurious_Error_[6], _Spurious_Error_[7], + _Spurious_Error_[8], _Spurious_Error_[9], _Spurious_Error_[10], + _Spurious_Error_[11], _Spurious_Error_[12], _Spurious_Error_[13], + _Spurious_Error_[13], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[15], _Spurious_Error_[16], _Spurious_Error_[17], + _Spurious_Error_[18], _Spurious_Error_[19], _Spurious_Error_[20], + _Spurious_Error_[21], _Spurious_Error_[22], _Spurious_Error_[23], + _Spurious_Error_[24], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[25], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[27], + _Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[28]}; #endif diff --git a/c/src/lib/libbsp/m68k/mrm332/start/start.S b/c/src/lib/libbsp/m68k/mrm332/start/start.S index 359b2e5f7c..fec7bbee81 100644 --- a/c/src/lib/libbsp/m68k/mrm332/start/start.S +++ b/c/src/lib/libbsp/m68k/mrm332/start/start.S @@ -88,7 +88,7 @@ END_CODE /* see section 9 of the SIM Reference Manual */ *DDRE = (unsigned char) 0xff; *DDRF = (unsigned char) 0xfd; - + /* Port E and F Pin Assignment Register */ /* see section 9 of the SIM Reference Manual */ *PEPAR = (unsigned char) 0; @@ -109,7 +109,7 @@ END_CODE /* ROM has data at end of text; copy it. */ while (dst < _edata) *dst++ = *src++; - + /* Zero bss */ for (dst = _clear_start; dst< end; dst++) { @@ -130,7 +130,7 @@ END_CODE M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */ M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */ M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */ - + m68k_set_vbr(&M68Kvec); } diff --git a/c/src/lib/libbsp/m68k/mrm332/startup/bspclean.c b/c/src/lib/libbsp/m68k/mrm332/startup/bspclean.c index 3379492b72..472ce4ba14 100644 --- a/c/src/lib/libbsp/m68k/mrm332/startup/bspclean.c +++ b/c/src/lib/libbsp/m68k/mrm332/startup/bspclean.c @@ -1,7 +1,7 @@ /* bsp_cleanup() * * This routine cleans up in the sense that it places the board - * in a safe state and flushes the I/O buffers before exiting. + * in a safe state and flushes the I/O buffers before exiting. * * INPUT: NONE * diff --git a/c/src/lib/libbsp/m68k/mrm332/startup/bspstart.c b/c/src/lib/libbsp/m68k/mrm332/startup/bspstart.c index 4c5c577f80..f40fa2153d 100644 --- a/c/src/lib/libbsp/m68k/mrm332/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mrm332/startup/bspstart.c @@ -16,9 +16,9 @@ #include <bsp.h> #include <rtems/libio.h> - + #include <string.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -34,7 +34,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/m68k/mrm332/startup/except_vect_332_ROM.S b/c/src/lib/libbsp/m68k/mrm332/startup/except_vect_332_ROM.S index cb8ce4cf5c..edc0b633f4 100644 --- a/c/src/lib/libbsp/m68k/mrm332/startup/except_vect_332_ROM.S +++ b/c/src/lib/libbsp/m68k/mrm332/startup/except_vect_332_ROM.S @@ -2,18 +2,18 @@ * $Id$ */ -/* Exception Vector definitions follow */ +/* Exception Vector definitions follow */ /* !!! Warning !!! This table is not tested, and the user must make sure it is complete. */ - /* If we use TRAP #15 for reboot, note that group 0 and 1 exceptions + /* If we use TRAP #15 for reboot, note that group 0 and 1 exceptions will have priority. */ /* This is the "magic word" that CPU32bug uses to indicate that there is a bootable image here. */ .long 0xBEEFBEEF - + /* Vector 0: RESET: Initial SSP */ .long _RamEnd /* Vector 1: RESET: Initial PC */ @@ -21,7 +21,7 @@ /* default action for undefined vectors is to re-boot */ - /* Note group 0 and 1 exception (like trace) have priority + /* Note group 0 and 1 exception (like trace) have priority over other exceptions (like trap #15) that may call this. */ /* Vectors 2-255 */ @@ -287,8 +287,8 @@ _reboot: movea.l (0x4).w,%a0 /* jmp to location of reset vector */ jmp (%a0) -reboot: - trap #15 /* use trap exception to enter supervisor - state. Trace mode ( and other group 0 - and 1 exceptions) *could* screw this up if +reboot: + trap #15 /* use trap exception to enter supervisor + state. Trace mode ( and other group 0 + and 1 exceptions) *could* screw this up if not vectored to reboot or did not return. */ diff --git a/c/src/lib/libbsp/m68k/mrm332/startup/start_c.c b/c/src/lib/libbsp/m68k/mrm332/startup/start_c.c index acab7b4696..4cb7ab2c65 100644 --- a/c/src/lib/libbsp/m68k/mrm332/startup/start_c.c +++ b/c/src/lib/libbsp/m68k/mrm332/startup/start_c.c @@ -62,7 +62,7 @@ void start_c() { /* see section 9 of the SIM Reference Manual */ *DDRE = (unsigned char) 0xff; *DDRF = (unsigned char) 0xfd; - + /* Port E and F Pin Assignment Register */ /* see section 9 of the SIM Reference Manual */ *PEPAR = (unsigned char) 0; @@ -83,7 +83,7 @@ void start_c() { /* ROM has data at end of text; copy it. */ while (dst < _edata) *dst++ = *src++; - + /* Zero bss */ for (dst = _clear_start; dst< end; dst++) { @@ -104,14 +104,14 @@ void start_c() { M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */ M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */ M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */ - + m68k_set_vbr(&M68Kvec); } /* * Initalize the board. */ - + /* Spurious should be called in the predriver hook */ /* Spurious_Initialize(); */ //console_init(); diff --git a/c/src/lib/libbsp/m68k/mrm332/timer/timer.c b/c/src/lib/libbsp/m68k/mrm332/timer/timer.c index d497e4580d..8100914286 100644 --- a/c/src/lib/libbsp/m68k/mrm332/timer/timer.c +++ b/c/src/lib/libbsp/m68k/mrm332/timer/timer.c @@ -6,7 +6,7 @@ * * Output parameters: NONE * - * NOTE: It is important that the timer start/stop overhead be + * NOTE: It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c index 33091ab4d5..2695054222 100644 --- a/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c @@ -35,7 +35,7 @@ #define TIMER 0xfffb0000 #define RELOAD 0x24 /* clr IP & IUS,allow countdown */ - + #define CLOCK_VECTOR 66 uint32_t Clock_isrs; /* ISRs until next tick */ @@ -49,14 +49,14 @@ void Clock_exit( void ); /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + /* * ISR Handler */ - + rtems_isr Clock_isr( rtems_vector_number vector ) @@ -130,7 +130,7 @@ rtems_device_driver Clock_initialize( rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -142,15 +142,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -161,7 +161,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/mvme136/console/console.c b/c/src/lib/libbsp/m68k/mvme136/console/console.c index a015a539cb..53e074fe4f 100644 --- a/c/src/lib/libbsp/m68k/mvme136/console/console.c +++ b/c/src/lib/libbsp/m68k/mvme136/console/console.c @@ -46,7 +46,7 @@ rtems_device_driver console_initialize( if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -131,7 +131,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -159,7 +159,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -178,7 +178,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/mvme136/include/bsp.h b/c/src/lib/libbsp/m68k/mvme136/include/bsp.h index 966476fc73..eafdfa2579 100644 --- a/c/src/lib/libbsp/m68k/mvme136/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme136/include/bsp.h @@ -143,7 +143,7 @@ extern m68k_isr_entry M68Kvec[]; /* vector table address */ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c index c3cbc310dd..59e72c60db 100644 --- a/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c index 0c36a9a172..9898fabb70 100644 --- a/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c @@ -35,14 +35,14 @@ volatile uint32_t Clock_driver_ticks; /* ticks since initialization */ rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + /* * ISR Handler @@ -57,7 +57,7 @@ rtems_isr Clock_isr(rtems_vector_number vector) rtems_clock_tick(); Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; } - else + else Clock_isrs -= 1; } @@ -75,7 +75,7 @@ void Install_clock(rtems_isr_entry clock_isr ) pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */ pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08; /* Enable Timer 2 and set its int. level */ - + atexit( Clock_exit ); } @@ -91,17 +91,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -110,15 +110,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(TIMER_2_VECTOR); @@ -129,7 +129,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, TIMER_2_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/mvme147/console/console.c b/c/src/lib/libbsp/m68k/mvme147/console/console.c index d065aa62af..130ecf6473 100644 --- a/c/src/lib/libbsp/m68k/mvme147/console/console.c +++ b/c/src/lib/libbsp/m68k/mvme147/console/console.c @@ -34,7 +34,7 @@ * * Return values: */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -42,16 +42,16 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + status = rtems_io_register_name( "/dev/console", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -164,7 +164,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -192,7 +192,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -211,7 +211,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/mvme147/include/bsp.h b/c/src/lib/libbsp/m68k/mvme147/include/bsp.h index e3f2d4ce24..57d6f6915a 100644 --- a/c/src/lib/libbsp/m68k/mvme147/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme147/include/bsp.h @@ -44,7 +44,7 @@ extern "C" { #define RAM_START 0x00005000 #define RAM_END 0x00400000 - /* MVME 147 Peripheral controller chip + /* MVME 147 Peripheral controller chip see MVME147/D1, 3.4 */ struct pcc_map { @@ -99,9 +99,9 @@ struct pcc_map { #define PCC_BASE_VECTOR 0x40 /* First user int */ #define SCC_VECTOR PCC_BASE_VECTOR+3 #define TIMER_1_VECTOR PCC_BASE_VECTOR+8 -#define TIMER_2_VECTOR PCC_BASE_VECTOR+9 +#define TIMER_2_VECTOR PCC_BASE_VECTOR+9 #define SOFT_1_VECTOR PCC_BASE_VECTOR+10 -#define SOFT_2_VECTOR PCC_BASE_VECTOR+11 +#define SOFT_2_VECTOR PCC_BASE_VECTOR+11 #define USE_CHANNEL_A 1 /* 1 = use channel A for console */ #define USE_CHANNEL_B 0 /* 1 = use channel B for console */ @@ -169,7 +169,7 @@ extern m68k_isr_entry M68Kvec[]; /* vector table address */ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c index 88e3a4040d..ea84a67fdb 100644 --- a/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c @@ -39,7 +39,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ @@ -75,7 +75,7 @@ void bsp_start( void ) pcc->int_base_vector = PCC_BASE_VECTOR; /* Set the PCC int vectors base */ - (*(uint8_t*)0xfffe2001) = 0x08; + (*(uint8_t*)0xfffe2001) = 0x08; /* make VME access round-robin */ rtems_cache_enable_instruction(); diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timer.c b/c/src/lib/libbsp/m68k/mvme147/timer/timer.c index b533b5a8ba..857c391c78 100644 --- a/c/src/lib/libbsp/m68k/mvme147/timer/timer.c +++ b/c/src/lib/libbsp/m68k/mvme147/timer/timer.c @@ -46,9 +46,9 @@ void Timer_initialize() /* write countdown preload value */ pcc->timer1_control = 0x00; /* load preload value */ pcc->timer1_control = 0x07; /* clear T1 overflow counter, enable counter */ - pcc->timer1_int_control = TIMER_INT_LEVEL|0x08; + pcc->timer1_int_control = TIMER_INT_LEVEL|0x08; /* Enable Timer 1 and set its int. level */ - + } #define AVG_OVERHEAD 0 /* No need to start/stop the timer to read diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S index 3e3c1b4394..2f93c005cc 100644 --- a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S +++ b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S @@ -22,7 +22,7 @@ SYM (timerisr): orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit addql #1, SYM (Ttimer_val) | increment timer value end_timerisr: - rte + rte END_CODE END diff --git a/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h b/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h index 6a07fa945f..ebe109d34d 100644 --- a/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme147s/include/bsp.h @@ -46,7 +46,7 @@ extern "C" { #define DRAM_END 0x00400000 /* We leave 128k for the shared memory */ - /* MVME 147 Peripheral controller chip + /* MVME 147 Peripheral controller chip see MVME147/D1, 3.4 */ struct pcc_map { @@ -160,9 +160,9 @@ struct vme_gcsr_map { #define PCC_BASE_VECTOR 0x40 /* First user int */ #define SCC_VECTOR PCC_BASE_VECTOR+3 #define TIMER_1_VECTOR PCC_BASE_VECTOR+8 -#define TIMER_2_VECTOR PCC_BASE_VECTOR+9 +#define TIMER_2_VECTOR PCC_BASE_VECTOR+9 #define SOFT_1_VECTOR PCC_BASE_VECTOR+10 -#define SOFT_2_VECTOR PCC_BASE_VECTOR+11 +#define SOFT_2_VECTOR PCC_BASE_VECTOR+11 #define VME_BASE_VECTOR 0x50 #define VME_SIGLP_VECTOR VME_BASE_VECTOR+1 @@ -233,7 +233,7 @@ extern m68k_isr_entry M68Kvec[]; /* vector table address */ /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c index e14f771c66..6b287edb47 100644 --- a/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c +++ b/c/src/lib/libbsp/m68k/mvme147s/shmsupp/getcfg.c @@ -51,18 +51,18 @@ void Shm_Get_configuration( shm_config_table **shmcfg ) { - /* A shared mem space has bee left between RAM_END and DRAM_END + /* A shared mem space has bee left between RAM_END and DRAM_END on the first node*/ if (localnode == 1) - BSP_shm_cfgtbl.base = (vol_u32 *) RAM_END; + BSP_shm_cfgtbl.base = (vol_u32 *) RAM_END; else BSP_shm_cfgtbl.base = (vol_u32 *) (DRAM_END + RAM_END); - BSP_shm_cfgtbl.length = DRAM_END - RAM_END; + BSP_shm_cfgtbl.length = DRAM_END - RAM_END; BSP_shm_cfgtbl.format = SHM_BIG; - + BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt; - + #ifdef NEUTRAL_BIG BSP_shm_cfgtbl.convert = NULL_CONVERT; #else diff --git a/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c index bc8eb8729c..6e5ba65fe7 100644 --- a/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mvme147s/startup/bspstart.c @@ -39,7 +39,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ @@ -74,9 +74,9 @@ void bsp_start( void ) m68k_set_vbr( &M68Kvec ); - pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0; + pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0; /* Set the PCC int vectors base */ - + /* VME shared memory configuration */ /* Only the first node shares its top 128k DRAM */ @@ -86,16 +86,16 @@ void bsp_start( void ) /* Enable SIGLP interruption (see shm support) */ pcc->general_purpose_control &= 0x10; /* Enable VME master interruptions */ - + if (vme_lcsr->system_controller & 0x01) { /* the board is system controller */ - vme_lcsr->system_controller = 0x08; + vme_lcsr->system_controller = 0x08; /* Make VME access round-robin */ } - - node_number = - (uint8_t) + + node_number = + (uint8_t) (Configuration.User_multiprocessing_table->node - 1) & 0xF; /* Get and store node ID, first node_number = 0 */ vme_gcsr->board_identification = node_number; diff --git a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c index 8a775ff3f7..9f8ddabb0d 100644 --- a/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c @@ -37,15 +37,15 @@ volatile uint32_t Clock_driver_ticks; /* ticks since initialization */ rtems_isr_entry Old_ticker; void Clock_exit( void ); - + #define CLOCK_VECTOR (VBR0 * 0x10 + 0x9) /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + /* * ISR Handler @@ -61,7 +61,7 @@ rtems_isr Clock_isr(rtems_vector_number vector) rtems_clock_tick(); Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; } - else + else Clock_isrs -= 1; } @@ -97,17 +97,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -116,15 +116,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -135,7 +135,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/mvme162/console/console.c b/c/src/lib/libbsp/m68k/mvme162/console/console.c index 6ee69d8c64..71c3d2f71e 100644 --- a/c/src/lib/libbsp/m68k/mvme162/console/console.c +++ b/c/src/lib/libbsp/m68k/mvme162/console/console.c @@ -41,9 +41,9 @@ rtems_isr C_Receive_ISR(rtems_vector_number vector) if (ipend == 0x04) port = 0; /* channel B intr pending */ else if (ipend == 0x20) port = 1; /* channel A intr pending */ else return; - + Ring_buffer_Add_character(&Console_Buffer[port], ZREADD(port)); - + if (ZREAD(port, 1) & 0x70) { /* check error stat */ ZWRITE0(port, 0x30); /* reset error */ } @@ -57,7 +57,7 @@ rtems_device_driver console_initialize( { int i; rtems_status_code status; - + /* * Initialise receiver interrupts on both ports */ @@ -69,7 +69,7 @@ rtems_device_driver console_initialize( ZWRITE(i, 1, 0x10); /* int on all Rx chars or special condition */ ZWRITE(i, 9, 8); /* master interrupt enable */ } - + set_vector(C_Receive_ISR, SCC_VECTOR, 1); /* install ISR for ports A and B */ mcchip->vector_base = 0; @@ -81,28 +81,28 @@ rtems_device_driver console_initialize( major, (rtems_device_minor_number) 1 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + status = rtems_io_register_name( "/dev/tty00", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + status = rtems_io_register_name( "/dev/tty01", major, (rtems_device_minor_number) 1 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -116,7 +116,7 @@ rtems_boolean char_ready(int port, char *ch) return FALSE; Ring_buffer_Remove_character( &Console_Buffer[port], *ch ); - + return TRUE; } @@ -127,12 +127,12 @@ rtems_boolean char_ready(int port, char *ch) char inbyte(int port) { unsigned char tmp_char; - + while ( !char_ready(port, &tmp_char) ); return tmp_char; } -/* +/* * This routine transmits a character out the SCC. It no longer supports * XON/XOFF flow control. */ @@ -157,7 +157,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -185,7 +185,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -207,7 +207,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/mvme162/include/bsp.h b/c/src/lib/libbsp/m68k/mvme162/include/bsp.h index 8ebe643950..1b9f06454c 100644 --- a/c/src/lib/libbsp/m68k/mvme162/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme162/include/bsp.h @@ -53,30 +53,30 @@ typedef volatile struct { unsigned char chipREV; unsigned char gen_control; unsigned char vector_base; - + unsigned long timer_cmp_1; unsigned long timer_cnt_1; unsigned long timer_cmp_2; unsigned long timer_cnt_2; - + unsigned char LSB_prescaler_count; unsigned char prescaler_clock_adjust; unsigned char time_ctl_2; unsigned char time_ctl_1; - + unsigned char time_int_ctl_4; unsigned char time_int_ctl_3; unsigned char time_int_ctl_2; unsigned char time_int_ctl_1; - + unsigned char dram_err_int_ctl; unsigned char SCC_int_ctl; unsigned char time_ctl_4; unsigned char time_ctl_3; - + unsigned short DRAM_space_base; unsigned short SRAM_space_base; - + unsigned char DRAM_size; unsigned char DRAM_SRAM_opt; unsigned char SRAM_size; @@ -96,43 +96,43 @@ typedef volatile struct { unsigned long timer_cnt_3; unsigned long timer_cmp_4; unsigned long timer_cnt_4; - + unsigned char bus_clk; unsigned char PROM_acc_time_ctl; unsigned char FLASH_acc_time_ctl; unsigned char ABORT_int_ctl; - + unsigned char RESET_ctl; unsigned char watchdog_timer_ctl; unsigned char acc_watchdog_time_base_sel; unsigned char reserved2; - + unsigned char DRAM_ctl; unsigned char reserved4; unsigned char MPU_status; unsigned char reserved3; - + unsigned long prescaler_count; - + } mcchip_regs; - + #define mcchip ((mcchip_regs * const) 0xFFF42000) /*----------------------------------------------------------------*/ -/* - * SCC Z8523(0) defines and macros - * ------------------------------- +/* + * SCC Z8523(0) defines and macros + * ------------------------------- * Prototypes for the low-level serial io are also included here, * because such stuff is bsp-specific (yet). The function bodies * are in console.c * * NOTE from Eric Vaitl <evaitl@viasat.com>: * - * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a - * bug in the MC2 chip (revision 1) such that the SCC data register is - * not accessible, it has to be accessed indirectly through the SCC - * control register. + * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a + * bug in the MC2 chip (revision 1) such that the SCC data register is + * not accessible, it has to be accessed indirectly through the SCC + * control register. */ enum {portB, portA}; @@ -177,7 +177,7 @@ typedef volatile struct { #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ /* - * Define the interrupt mechanism for Time Test 27 + * Define the interrupt mechanism for Time Test 27 * * NOTE: We use software interrupt 0 */ @@ -210,7 +210,7 @@ typedef volatile struct { /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/mvme162/include/page_table.h b/c/src/lib/libbsp/m68k/mvme162/include/page_table.h index a5685245f2..f434291de3 100644 --- a/c/src/lib/libbsp/m68k/mvme162/include/page_table.h +++ b/c/src/lib/libbsp/m68k/mvme162/include/page_table.h @@ -1,10 +1,13 @@ /* * $Id$ * - * This file was submitted by Eric Vaitl <vaitl@viasat.com> and + * This file was submitted by Eric Vaitl <vaitl@viasat.com> and * supports page table initialization. * * $Log$ + * Revision 1.2 1995/12/19 20:10:12 joel + * changes remerged after disk crash -- history lost + * * Revision 1.1 1995/12/19 19:22:36 joel * file lost in crash and re-added * @@ -28,16 +31,16 @@ extern void page_table_teardown(void); extern void page_table_init(void); extern int page_table_map(void *addr, unsigned long size, int cache_type); -enum { - CACHE_WRITE_THROUGH, - CACHE_COPYBACK, +enum { + CACHE_WRITE_THROUGH, + CACHE_COPYBACK, CACHE_NONE_SERIALIZED, - CACHE_NONE + CACHE_NONE }; -enum { - PTM_SUCCESS, - PTM_BAD_ADDR, - PTM_BAD_SIZE, +enum { + PTM_SUCCESS, + PTM_BAD_ADDR, + PTM_BAD_SIZE, PTM_BAD_CACHE, PTM_NO_TABLE_SPACE }; diff --git a/c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c index cc581d62cf..ec26fdf77e 100644 --- a/c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c @@ -27,7 +27,7 @@ #include <rtems/libio.h> #include <rtems/libcsupport.h> #include <page_table.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -43,7 +43,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/m68k/mvme162/startup/page_table.c b/c/src/lib/libbsp/m68k/mvme162/startup/page_table.c index 35fd0dd6b2..2629aa053c 100644 --- a/c/src/lib/libbsp/m68k/mvme162/startup/page_table.c +++ b/c/src/lib/libbsp/m68k/mvme162/startup/page_table.c @@ -1,4 +1,4 @@ -/* +/* * $Id$ * * This file was submitted by Eric Vaitl <vaitl@viasat.com>. @@ -85,15 +85,15 @@ static unsigned long *table_alloc(int size){ illegal. */ void page_table_init(){ - + /* put everything in a known state */ page_table_teardown(); root_table=table_alloc(ROOT_TABLE_SIZE); - /* First set up TTR. + /* First set up TTR. base address = 0x80000000 - address mask = 0x7f + address mask = 0x7f Ignore FC2 for match. Noncachable. Not write protected.*/ @@ -117,7 +117,7 @@ void page_table_init(){ asm volatile ("movec %0,%%cacr" :: "d" (0x80008000)); } - + void page_table_teardown(){ next_avail=(unsigned long *)BASE_TABLE_ADDR; /* Turn off paging. Turn off the cache. Flush the cache. Tear down @@ -156,7 +156,7 @@ int page_table_map(void *addr, unsigned long size, int cache_type){ root_index &= 0x7f; if(root_table[root_index]){ - pointer_table = + pointer_table = (unsigned long *) (root_table[root_index] & 0xfffffe00); }else{ if(!(pointer_table=table_alloc(POINTER_TABLE_SIZE))){ @@ -164,21 +164,21 @@ int page_table_map(void *addr, unsigned long size, int cache_type){ } root_table[root_index]=((unsigned long)pointer_table) + 0x03; } - + pointer_index=(unsigned long)addr; pointer_index >>=18; pointer_index &= 0x7f; - + if(pointer_table[pointer_index]){ - page_table = - (unsigned long *) (pointer_table[pointer_index] & + page_table = + (unsigned long *) (pointer_table[pointer_index] & 0xffffff00); }else{ if(!(page_table=table_alloc(PAGE_TABLE_SIZE))){ return PTM_NO_TABLE_SPACE; } pointer_table[pointer_index]= - ((unsigned long)page_table) + 0x03; + ((unsigned long)page_table) + 0x03; } page_index=(unsigned long)addr; diff --git a/c/src/lib/libbsp/m68k/mvme162/timer/timer.c b/c/src/lib/libbsp/m68k/mvme162/timer/timer.c index 0b08bd63a3..9072e3ce54 100644 --- a/c/src/lib/libbsp/m68k/mvme162/timer/timer.c +++ b/c/src/lib/libbsp/m68k/mvme162/timer/timer.c @@ -45,7 +45,7 @@ rtems_isr timerisr(); void Timer_initialize() { (void) set_vector( timerisr, VBR0 * 0x10 + 0x8, 0 ); - + Ttimer_val = 0; /* clear timer ISR count */ lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ lcsr->intr_clear |= 0x01000000; /* clear pending interrupt */ @@ -63,7 +63,7 @@ void Timer_initialize() /* (3 countdowns) to start/stop the timer. */ #define LEAST_VALID 10U /* Don't trust a value lower than this */ -int Read_timer() +int Read_timer() { uint32_t total; diff --git a/c/src/lib/libbsp/m68k/mvme162/tod/tod.c b/c/src/lib/libbsp/m68k/mvme162/tod/tod.c index 7eaeac487c..4fe802ffd4 100644 --- a/c/src/lib/libbsp/m68k/mvme162/tod/tod.c +++ b/c/src/lib/libbsp/m68k/mvme162/tod/tod.c @@ -4,7 +4,7 @@ * Author: * COPYRIGHT (C) 1997 * by Katsutoshi Shibuya - BU Denken Co.,Ltd. - Sapporo - JAPAN - * ALL RIGHTS RESERVED + * ALL RIGHTS RESERVED * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -15,7 +15,7 @@ * RTEMS above. * * $Id$ - */ + */ #include <rtems.h> #include <tod.h> diff --git a/c/src/lib/libbsp/m68k/mvme162/tools/sload.c b/c/src/lib/libbsp/m68k/mvme162/tools/sload.c index 1fe0ecd421..4cb1e659de 100644 --- a/c/src/lib/libbsp/m68k/mvme162/tools/sload.c +++ b/c/src/lib/libbsp/m68k/mvme162/tools/sload.c @@ -54,7 +54,7 @@ int MVMEControl(u_long entry, int reset, int go); unsigned int ahdtoi(unsigned char digit) /* converts a hexadecimal char to an integer - * + * * entry : digit = character to convert * : 0..15 = result * : -1 = char is not a digit @@ -77,7 +77,7 @@ unsigned int ahdtoi(unsigned char digit) int issrec(char *str) /* attempts to identify the type of Srecord string passed - * + * * entry : str = pointer to null terminated string * returns : 0,1,2,3,5,7,8,9 for S0..S9 except S6 & S4 * : -1 = invalid header or header not found @@ -106,7 +106,7 @@ int issrec(char *str) int validrec(char *str) /* Tests for a valid srecord. tests checksum & for nondigit characters * doesn't rely on any other srecord routines. - * + * * entry : str = pointer to null terminated string * returns : -1 = srecord contains invalid characters * : -2 = srecord checksum is invalid @@ -141,7 +141,7 @@ int validrec(char *str) void hdr2str(char *sstr, char *pstr) /* converts header record (S0) string into a plain string - * + * * entry : sstr = pointer to S0 string record * exit : pstr = pointer to string long enough to hold string * (caller must allocate enough space for string) @@ -157,7 +157,7 @@ void hdr2str(char *sstr, char *pstr) unsigned long getaddr(char *str) /* returns the address of the srecord in str. assumes record is valid. - * + * * entry : str = pointer to srecord string * exit : address of data, word or long. */ @@ -165,23 +165,23 @@ unsigned long getaddr(char *str) unsigned long addr=0; switch (issrec(str)) { - case 0 : - case 1 : - case 5 : + case 0 : + case 1 : + case 5 : case 9 : addr = ahdtoi(str[4])*0x1000 + ahdtoi(str[5])*0x100 + ahdtoi(str[6])*0x10 + ahdtoi(str[7]); return(addr); - case 2 : + case 2 : case 8 : addr = ahdtoi(str[4])*0x100000 + ahdtoi(str[5])*0x10000 + ahdtoi(str[6])*0x1000 + ahdtoi(str[7])*0x100 + ahdtoi(str[8])*0x10 + ahdtoi(str[9]); return(addr); - case 3 : + case 3 : case 7 : addr = ahdtoi(str[4])*0x10000000 + ahdtoi(str[5])*0x1000000 + ahdtoi(str[6])*0x100000 + ahdtoi(str[7])*0x10000 + ahdtoi(str[8])*0x1000 + ahdtoi(str[9])*0x100 + ahdtoi(str[10])*0x10 + ahdtoi(str[11]); - return(addr); + return(addr); default : return(-1); } } @@ -189,7 +189,7 @@ unsigned long getaddr(char *str) unsigned int datasize(char *str) /* * returns the number of data bytes in the srecord. assumes record is valid. - * + * * entry : str = pointer to srecord string * exit : number of bytes of data in the data field. */ @@ -227,8 +227,8 @@ void usage (void) int MVMEControl(u_long entry, int reset, int go) /* Controls MVME-162 from other VME master: * if entry != 0, loads it as start address - * if go != 0, starts program execution from entry - * if reset != 0, resets mvme162's local bus + * if go != 0, starts program execution from entry + * if reset != 0, resets mvme162's local bus * Depends upon #define'ed GROUP_BASE_ADDRESS and BOARD_BASE_ADDRESS * which in turn are set by the 162-BUG's ENV command. */ @@ -239,7 +239,7 @@ int MVMEControl(u_long entry, int reset, int go) struct gcsr *gcsr_map; pagesize = sysconf(_SC_PAGESIZE); /* mmap likes to be page-aligned */ - + if ((vme = open(vmedev, O_RDWR)) == -1) { perror("open"); fprintf(stderr, "Cannot open vme as %s to access GCSR\n", vmedev); @@ -258,7 +258,7 @@ int MVMEControl(u_long entry, int reset, int go) /* * use GCSR to start execution in MVME162 - * adjust pointer to compensate for page alignement + * adjust pointer to compensate for page alignement */ gcsr_map = (struct gcsr *)((u_long)gcsr_map + (u_long)gcsr_vme % pagesize); @@ -283,10 +283,10 @@ main(int argc, char *argv[]) int i, j, k, result, size, line=0, lastrec=0; long addr, tsize=0, naddr=0, blksize=0, blknum=1; FILE *in; - char infile[256] = ""; + char infile[256] = ""; char vmedev[32] = "/dev/vme32d32"; /* Assume "/dev/vme32d32" */ int vme, verbose = 0, go = 0, reset = 0, havefile = 0; - + /* Parse the command line */ --argc; @@ -325,11 +325,11 @@ main(int argc, char *argv[]) } exit(0); } - + if ((in = fopen(infile, "r")) == NULL) { perror("open"); fprintf(stderr, "Cannot open input file %s\n", infile); - exit(1); + exit(1); } if ((vme = open(vmedev, O_RDWR)) == -1) { @@ -340,12 +340,12 @@ main(int argc, char *argv[]) line++; if (validrec(inpstr) == 0) { switch (issrec(inpstr)) { - case 0 : + case 0 : hdr2str(inpstr, hdrstr); if (verbose) printf("HEADER string = `%s'\n", hdrstr); lastrec=HEADER; break; - case 1 : + case 1 : addr = getaddr(inpstr); size = datasize(inpstr); if (blksize == 0) { @@ -381,7 +381,7 @@ main(int argc, char *argv[]) } } break; - case 2 : + case 2 : addr = getaddr(inpstr); size = datasize(inpstr); if (blksize == 0) { @@ -417,7 +417,7 @@ main(int argc, char *argv[]) } } break; - case 3 : + case 3 : addr = getaddr(inpstr); size = datasize(inpstr); if (blksize == 0) { @@ -453,7 +453,7 @@ main(int argc, char *argv[]) } } break; - case 7 : + case 7 : if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} @@ -463,7 +463,7 @@ main(int argc, char *argv[]) printf("\nExecution address = $%08lX\n", addr); lastrec=TERMINATOR; break; - case 8 : + case 8 : if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} @@ -473,7 +473,7 @@ main(int argc, char *argv[]) printf("\nExecution address = $%06lX\n", addr); lastrec=TERMINATOR; break; - case 9 : + case 9 : if (lastrec==DATA19){if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);} if (lastrec==DATA28){if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);} if (lastrec==DATA37){if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);} diff --git a/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c index f152900e0a..b2576028d8 100644 --- a/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/mvme167/clock/ckinit.c @@ -25,7 +25,7 @@ * * $Id$ */ - + #include <stdlib.h> #include <bsp.h> #include <rtems/libio.h> @@ -59,7 +59,7 @@ rtems_device_minor_number rtems_clock_minor; volatile uint32_t Clock_driver_ticks; -/* +/* * Clock_isrs is the number of clock ISRs until the next invocation of the * RTEMS clock tick routine. This clock tick device driver gets an interrupt * once a millisecond and counts down until the length of time between the @@ -104,16 +104,16 @@ rtems_isr VMEchip2_T2_isr( char overflow; /* Content of overflow counter */ long i; long ct; /* Number of T2 ticks per RTEMS ticks */ - + ct = BSP_Configuration.microseconds_per_tick / 1000; - + /* * May have missed interrupts, so should look at the overflow counter. */ lcsr->intr_clear |= 0x02000000; /* Clear the interrupt */ overflow = (lcsr->board_ctl >> 12) & 0xF; lcsr->board_ctl |= 0x400; /* Reset overflow counter */ - + /* Attempt to protect against one more period */ if ( overflow == 0 ) overflow = 16; @@ -128,7 +128,7 @@ rtems_isr VMEchip2_T2_isr( /* Reset the counter */ Clock_isrs = (uint32_t)-i; } - else + else Clock_isrs -= overflow; } @@ -138,7 +138,7 @@ rtems_isr VMEchip2_T2_isr( * * Initialize the VMEchip2 Tick Timer #2. * - * THE VMECHIP2 PRESCALER REGISTER IS ASSUMED TO BE SET! + * THE VMECHIP2 PRESCALER REGISTER IS ASSUMED TO BE SET! * The prescaler is used by all VMEchip2 timers, including the VMEbus grant * timeout counter, the DMAC time off timer, the DMAC timer on timer, and the * VMEbus global timeout timer. The prescaler value is normally set by the @@ -211,7 +211,7 @@ void clock_exit( void ) * * Return values: * rtems_device_driver status code - */ + */ rtems_device_driver Clock_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -219,13 +219,13 @@ rtems_device_driver Clock_initialize( ) { VMEchip2_T2_initialize(); - + /* * Make major/minor avail to others such as shared memory driver */ rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -251,10 +251,10 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if ( args == 0 ) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... @@ -269,7 +269,7 @@ rtems_device_driver Clock_control( set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/mvme167/console/console-recording.h b/c/src/lib/libbsp/m68k/mvme167/console/console-recording.h index 81ea4461a9..9aa0d597b8 100644 --- a/c/src/lib/libbsp/m68k/mvme167/console/console-recording.h +++ b/c/src/lib/libbsp/m68k/mvme167/console/console-recording.h @@ -5,7 +5,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. */ - + /* CD2401 CONSOLE DRIVER DEBUG INFO RECORDING */ #ifdef CD2401_RECORD_DEBUG_INFO @@ -243,8 +243,8 @@ int cd2401_get_record_size( /* Not the best way to do this */ return size + 4; } - - + + void cd2401_record_write_info( int len, const char * buf, @@ -252,9 +252,9 @@ void cd2401_record_write_info( ) { int max_length; - + max_length = (len < CD2401_DEBUG_CHAR_BUFSIZE ) ? len : CD2401_DEBUG_CHAR_BUFSIZE; - + memset( &(cd2401_debug_buffer[cd2401_debug_index]), '\0', sizeof( struct cd2401_debug_info ) ); cd2401_debug_buffer[cd2401_debug_index].discriminant = CD2401_WRITE_INFO; cd2401_debug_buffer[cd2401_debug_index].record_size = @@ -262,7 +262,7 @@ void cd2401_record_write_info( cd2401_debug_buffer[cd2401_debug_index].u.write_info.length = len; memcpy ( &(cd2401_debug_buffer[cd2401_debug_index].u.write_info.buffer), buf, max_length ); cd2401_debug_buffer[cd2401_debug_index].u.write_info.dmabuf = dmabuf; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -274,7 +274,7 @@ void cd2401_record_tx_isr_info( unsigned char final_ier, uint8_t txEmpty ) -{ +{ memset( &(cd2401_debug_buffer[cd2401_debug_index]), '\0', sizeof( struct cd2401_debug_info ) ); cd2401_debug_buffer[cd2401_debug_index].discriminant = CD2401_TX_ISR_INFO; cd2401_debug_buffer[cd2401_debug_index].record_size = @@ -284,7 +284,7 @@ void cd2401_record_tx_isr_info( cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_info.initial_ier = initial_ier; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_info.final_ier = final_ier; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_info.txEmpty = txEmpty; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -308,7 +308,7 @@ void cd2401_record_tx_isr_spurious_info( cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_spurious_info.final_ier = final_ier; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_spurious_info.spurdev = spur_dev; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_spurious_info.spurcount = spur_cnt; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -332,7 +332,7 @@ void cd2401_record_tx_isr_buserr_info( cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_buserr_info.buserr = buserr; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_buserr_info.type = buserr_type; cd2401_debug_buffer[cd2401_debug_index].u.tx_isr_buserr_info.addr = buserr_addr; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -344,16 +344,16 @@ void cd2401_record_rx_isr_info( ) { int max_length; - + max_length = (total < CD2401_DEBUG_CHAR_BUFSIZE ) ? total : CD2401_DEBUG_CHAR_BUFSIZE; - + memset( &(cd2401_debug_buffer[cd2401_debug_index]), '\0', sizeof( struct cd2401_debug_info ) ); cd2401_debug_buffer[cd2401_debug_index].discriminant = CD2401_RX_ISR_INFO; cd2401_debug_buffer[cd2401_debug_index].record_size = cd2401_get_record_size( sizeof( struct cd2401_rx_isr_info ) ); cd2401_debug_buffer[cd2401_debug_index].u.rx_isr_info.length = max_length; memcpy ( &(cd2401_debug_buffer[cd2401_debug_index].u.rx_isr_info.buffer), buffer, max_length ); - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -373,7 +373,7 @@ void cd2401_record_rx_isr_spurious_info( cd2401_debug_buffer[cd2401_debug_index].u.rx_isr_spurious_info.status = status; cd2401_debug_buffer[cd2401_debug_index].u.rx_isr_spurious_info.spurdev = spur_dev; cd2401_debug_buffer[cd2401_debug_index].u.rx_isr_spurious_info.spurcount = spur_cnt; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -391,7 +391,7 @@ void cd2401_record_re_isr_spurious_info( cd2401_debug_buffer[cd2401_debug_index].u.re_isr_spurious_info.channel = ch; cd2401_debug_buffer[cd2401_debug_index].u.re_isr_spurious_info.spurdev = spur_dev; cd2401_debug_buffer[cd2401_debug_index].u.re_isr_spurious_info.spurcount = spur_cnt; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -409,7 +409,7 @@ void cd2401_record_modem_isr_spurious_info( cd2401_debug_buffer[cd2401_debug_index].u.modem_isr_spurious_info.channel = ch; cd2401_debug_buffer[cd2401_debug_index].u.modem_isr_spurious_info.spurdev = spur_dev; cd2401_debug_buffer[cd2401_debug_index].u.modem_isr_spurious_info.spurcount = spur_cnt; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -425,7 +425,7 @@ void cd2401_record_first_open_info( cd2401_get_record_size( sizeof( struct cd2401_first_open_info ) ); cd2401_debug_buffer[cd2401_debug_index].u.first_open_info.channel = ch; cd2401_debug_buffer[cd2401_debug_index].u.first_open_info.init_count = init_count; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -441,7 +441,7 @@ void cd2401_record_last_close_info( cd2401_get_record_size( sizeof( struct cd2401_last_close_info ) ); cd2401_debug_buffer[cd2401_debug_index].u.last_close_info.channel = ch; cd2401_debug_buffer[cd2401_debug_index].u.last_close_info.init_count = init_count; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -455,7 +455,7 @@ void cd2401_record_start_remote_tx_info( cd2401_debug_buffer[cd2401_debug_index].record_size = cd2401_get_record_size( sizeof( struct cd2401_start_remote_tx_info ) ); cd2401_debug_buffer[cd2401_debug_index].u.start_remote_tx_info.channel = ch; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -469,12 +469,12 @@ void cd2401_record_stop_remote_tx_info( cd2401_debug_buffer[cd2401_debug_index].record_size = cd2401_get_record_size( sizeof( struct cd2401_stop_remote_tx_info ) ); cd2401_debug_buffer[cd2401_debug_index].u.stop_remote_tx_info.channel = ch; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } -void cd2401_record_set_attributes_info( +void cd2401_record_set_attributes_info( int minor, uint8_t need_reinit, uint8_t csize, @@ -526,7 +526,7 @@ void cd2401_record_set_attributes_info( cd2401_debug_buffer[cd2401_debug_index].u.set_attribute_info.rx_period = rx_period; cd2401_debug_buffer[cd2401_debug_index].u.set_attribute_info.out_baud = out_baud; cd2401_debug_buffer[cd2401_debug_index].u.set_attribute_info.in_baud = in_baud; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -544,7 +544,7 @@ void cd2401_record_drain_output_info( cd2401_debug_buffer[cd2401_debug_index].u.drain_output_info.txEmpty = txEmpty; cd2401_debug_buffer[cd2401_debug_index].u.drain_output_info.own_buf_A = own_buf_A; cd2401_debug_buffer[cd2401_debug_index].u.drain_output_info.own_buf_B = own_buf_B; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } @@ -564,7 +564,7 @@ void cd2401_record_delay_info( cd2401_debug_buffer[cd2401_debug_index].u.delay_info.end = end; cd2401_debug_buffer[cd2401_debug_index].u.delay_info.current = current; cd2401_debug_buffer[cd2401_debug_index].u.delay_info.loop_count = loop_count; - + cd2401_debug_index = (cd2401_debug_index + 1 ) % CD2401_DEBUG_BUFFER_SIZE; } diff --git a/c/src/lib/libbsp/m68k/mvme167/console/console.c b/c/src/lib/libbsp/m68k/mvme167/console/console.c index a68737c342..3d760e14a8 100644 --- a/c/src/lib/libbsp/m68k/mvme167/console/console.c +++ b/c/src/lib/libbsp/m68k/mvme167/console/console.c @@ -224,16 +224,16 @@ rtems_isr_entry Prev_modem_isr; /* Previous modem/timer isr */ { unsigned long i = 20000; /* In case clock is off */ rtems_interval ticks_per_second, start_ticks, end_ticks, current_ticks; - + rtems_clock_get( RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second ); rtems_clock_get( RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks ); end_ticks = start_ticks + delay; - + do { rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, ¤t_ticks); } while ( --i && (current_ticks <= end_ticks) ); - - CD2401_RECORD_DELAY_INFO(( start_ticks, end_ticks, current_ticks, i )); + + CD2401_RECORD_DELAY_INFO(( start_ticks, end_ticks, current_ticks, i )); } @@ -744,7 +744,7 @@ int cd2401_firstOpen( } CD2401_RECORD_FIRST_OPEN_INFO(( minor, Init_count )); - + rtems_interrupt_enable (level); /* Return something */ @@ -771,7 +771,7 @@ int cd2401_lastClose( rtems_interrupt_level level; rtems_interrupt_disable (level); - + /* Mark that the channel is no longer is use */ CD2401_Channel_Info[minor].tty = NULL; @@ -787,7 +787,7 @@ int cd2401_lastClose( } CD2401_RECORD_LAST_CLOSE_INFO(( minor, Init_count )); - + rtems_interrupt_enable (level); /* return something */ @@ -1004,14 +1004,14 @@ int cd2401_setAttributes( cd2401->car = minor; /* Select channel */ read_enabled = cd2401->csr & 0x80 ? TRUE : FALSE; - + if ( (t->c_cflag & CREAD ? TRUE : FALSE ) != read_enabled ) { /* Read enable status is changing */ need_reinitialization = TRUE; } - - if ( need_reinitialization ) { - /* + + if ( need_reinitialization ) { + /* * Could not find a way to test whether the CD2401 was done transmitting. * The TxEmpty interrupt does not seem to indicate that the FIFO is empty * in DMA mode. So, just wait a while for output to drain. May not be @@ -1019,7 +1019,7 @@ int cd2401_setAttributes( * 9600 bsp)... */ cd2401_udelay( 2000L ); - + /* Clear channel */ cd2401_chan_cmd (minor, 0x40, 1); @@ -1033,11 +1033,11 @@ int cd2401_setAttributes( cd2401->cor6 = igncr | icrnl | inlcr | ignbrk | brkint | parmrk | inpck; cd2401->cor7 = istrip; /* No LNext; ignore XON/XOFF if frame error; no tx translations */ /* Special char 1: XON character */ - cd2401->u1.async.schr1 = t->c_cc[VSTART]; + cd2401->u1.async.schr1 = t->c_cc[VSTART]; /* special char 2: XOFF character */ cd2401->u1.async.schr2 = t->c_cc[VSTOP]; - - /* + + /* * Special chars 3 and 4, char range, LNext, RFAR[1..4] and CRC * are unused, left as is. */ @@ -1047,10 +1047,10 @@ int cd2401_setAttributes( cd2401->rcor = (unsigned char)(rx_period >> 8); /* no DPLL */ cd2401->tbpr = (unsigned char)tx_period; cd2401->tcor = (tx_period >> 3) & 0xE0; /* no x1 ext clk, no loopback */ - + /* Timeout for 4 chars at 9600, 8 bits per char, 1 stop bit */ cd2401->u2.w.rtpr = 0x04; /* NEED TO LOOK AT THIS LINE! */ - + if ( t->c_cflag & CREAD ) { /* Re-initialize channel, enable rx and tx */ cd2401_chan_cmd (minor, 0x2A, 1); @@ -1060,8 +1060,8 @@ int cd2401_setAttributes( /* Re-initialize channel, enable tx, disable rx */ cd2401_chan_cmd (minor, 0x29, 1); } - } - + } + CD2401_RECORD_SET_ATTRIBUTES_INFO(( minor, need_reinitialization, csize, cstopb, parodd, parenb, ignpar, inpck, hw_flow_ctl, sw_flow_ctl, extra_flow_ctl, @@ -1070,11 +1070,11 @@ int cd2401_setAttributes( out_baud, in_baud )); rtems_interrupt_enable (level); - - /* + + /* * Looks like the CD2401 needs time to settle after initialization. Give it * 10 ms. I don't really believe it, but if output resumes to quickly after - * this call, the first few characters are not right. + * this call, the first few characters are not right. */ if ( need_reinitialization ) cd2401_udelay( 10000L ); @@ -1117,7 +1117,7 @@ int cd2401_startRemoteTx( cd2401->stcr = 0x01; /* Send SCHR1 ahead of chars in FIFO */ CD2401_RECORD_START_REMOTE_TX_INFO(( minor )); - + rtems_interrupt_enable (level); /* Return something */ @@ -1256,11 +1256,11 @@ int cd2401_drainOutput( CD2401_RECORD_DRAIN_OUTPUT_INFO(( CD2401_Channel_Info[minor].txEmpty, CD2401_Channel_Info[minor].own_buf_A, CD2401_Channel_Info[minor].own_buf_B )); - - while( ! (CD2401_Channel_Info[minor].txEmpty && + + while( ! (CD2401_Channel_Info[minor].txEmpty && CD2401_Channel_Info[minor].own_buf_A && CD2401_Channel_Info[minor].own_buf_B) ); - + /* Return something */ return RTEMS_SUCCESSFUL; } @@ -1291,13 +1291,13 @@ int _167Bug_pollRead( unsigned char c; rtems_interrupt_level previous_level; - /* + /* * Redirection of .INSTAT does not work: 167-Bug crashes. * Switch the input stream to the specified port. * Make sure this is atomic code. */ rtems_interrupt_disable( previous_level ); - + asm volatile( "movew %1, -(%%sp)\n\t"/* Channel */ "trap #15\n\t" /* Trap to 167Bug */ ".short 0x61\n\t" /* Code for .REDIR_I */ @@ -1320,7 +1320,7 @@ int _167Bug_pollRead( : "=d" (c) : ); rtems_interrupt_enable( previous_level ); - + return (int)c; } @@ -1409,7 +1409,7 @@ rtems_status_code do_poll_read( * Output characters through 167Bug. Returns only once every character has * been sent. * - * CR is transmitted AFTER a LF on output. + * CR is transmitted AFTER a LF on output. * * Input parameters: * major - ignored. Should be the major number for this driver. @@ -1453,8 +1453,8 @@ void _BSP_output_char(char c) { rtems_device_minor_number printk_minor; char cr ='\r'; - - /* + + /* * Can't rely on console_initialize having been called before this function * is used. */ @@ -1463,13 +1463,13 @@ void _BSP_output_char(char c) printk_minor = (nvram->console_printk_port & 0x30) >> 4; else printk_minor = PRINTK_MINOR; - + _167Bug_pollWrite(printk_minor, &c, 1); if ( c == '\n' ) _167Bug_pollWrite(printk_minor, &cr, 1); } - + /* *************** * BOILERPLATE * @@ -1496,7 +1496,7 @@ rtems_device_driver console_initialize( if ( NVRAM_CONFIGURE ) { /* J1-4 is on, use NVRAM info for configuration */ console_minor = nvram->console_printk_port & 0x03; - + if ( nvram->console_mode & 0x01 ) /* termios */ rtems_termios_initialize (); @@ -1559,7 +1559,7 @@ rtems_device_driver console_open( NULL, /* startRemoteTx */ 0 /* outputUsesInterrupts */ }; - + static const rtems_termios_callbacks intrCallbacks = { cd2401_firstOpen, /* firstOpen */ cd2401_lastClose, /* lastClose */ @@ -1572,7 +1572,7 @@ rtems_device_driver console_open( }; if ( NVRAM_CONFIGURE ) - /* J1-4 is on, use NVRAM info for configuration */ + /* J1-4 is on, use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ if ( nvram->console_mode & 0x02 ) @@ -1612,7 +1612,7 @@ rtems_device_driver console_close( ) { if ( NVRAM_CONFIGURE ) { - /* J1-4 is on, use NVRAM info for configuration */ + /* J1-4 is on, use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ return rtems_termios_close (arg); @@ -1642,7 +1642,7 @@ rtems_device_driver console_read( ) { if ( NVRAM_CONFIGURE ) { - /* J1-4 is on, use NVRAM info for configuration */ + /* J1-4 is on, use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ return rtems_termios_read (arg); @@ -1672,7 +1672,7 @@ rtems_device_driver console_write( ) { if ( NVRAM_CONFIGURE ) { - /* J1-4 is on, use NVRAM info for configuration */ + /* J1-4 is on, use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ return rtems_termios_write (arg); @@ -1702,7 +1702,7 @@ rtems_device_driver console_control( ) { if ( NVRAM_CONFIGURE ) { - /* J1-4 is on, use NVRAM info for configuration */ + /* J1-4 is on, use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ return rtems_termios_ioctl (arg); diff --git a/c/src/lib/libbsp/m68k/mvme167/fatal/bspfatal.c b/c/src/lib/libbsp/m68k/mvme167/fatal/bspfatal.c index afdd124382..b93a08fee1 100644 --- a/c/src/lib/libbsp/m68k/mvme167/fatal/bspfatal.c +++ b/c/src/lib/libbsp/m68k/mvme167/fatal/bspfatal.c @@ -36,7 +36,7 @@ static int mystrcat( ) { int i; - + for ( i = 0; ( *destination++ = *source++) != '\0'; i++ ); return i; } @@ -45,7 +45,7 @@ static int mystrcat( /* * bsp_fatal_error_occurred * - * Called when rtems_fatal_error_occurred() is called. Returns control to + * Called when rtems_fatal_error_occurred() is called. Returns control to * 167Bug. The _Internal_error_Occurred() function has already saved the * parameters in Internal_errors_What_happened. If the function returns, * RTEMS will halt the CPU. @@ -72,33 +72,33 @@ User_extensions_routine bsp_fatal_error_occurred( char index; /* First byte is number of chars in strbuf */ char strbuf[254]; /* In case count is bumped up by one by 167Bug */ } my_p_str; - + my_p_str.index = 0; my_p_str.index += mystrcat( my_p_str.strbuf + my_p_str.index, "\r\nRTEMS Fatal Error Occurred:\r\n the_source = " ); - + switch ( the_source ) { case INTERNAL_ERROR_CORE: - my_p_str.index += mystrcat( + my_p_str.index += mystrcat( my_p_str.strbuf + my_p_str.index, "INTERNAL_ERROR_CORE\r\n is_internal = " ); break; - + case INTERNAL_ERROR_RTEMS_API: - my_p_str.index += mystrcat( + my_p_str.index += mystrcat( my_p_str.strbuf + my_p_str.index, "INTERNAL_ERROR_RTEMS_API\r\n is_internal = " ); break; - + case INTERNAL_ERROR_POSIX_API: - my_p_str.index += mystrcat( + my_p_str.index += mystrcat( my_p_str.strbuf + my_p_str.index, "INTERNAL_ERROR_POSIX_API\r\n is_internal = " ); break; - + default: - my_p_str.index += mystrcat( + my_p_str.index += mystrcat( my_p_str.strbuf + my_p_str.index, "UNKNOWN\r\n is_internal = " ); break; @@ -106,22 +106,22 @@ User_extensions_routine bsp_fatal_error_occurred( if ( is_internal ) my_p_str.index += mystrcat( - my_p_str.strbuf + my_p_str.index, + my_p_str.strbuf + my_p_str.index, "TRUE\r\n the_error = 0x|10,8|\r\n" ); else - my_p_str.index += mystrcat( - my_p_str.strbuf + my_p_str.index, + my_p_str.index += mystrcat( + my_p_str.strbuf + my_p_str.index, "FALSE\r\n the_error = 0x|10,8|\r\n" ); - + lcsr->intr_ena = 0; /* disable interrupts */ m68k_set_vbr(0xFFE00000); /* restore 167Bug vectors */ - + asm volatile( "movel %0, -(%%a7)\n\t" "pea (%%a7)\n\t" "pea (%1)\n\t" "trap #15\n\t" /* trap to 167Bug (.WRITDLN) */ ".short 0x25\n\t" "trap #15\n\t" - ".short 0x63" + ".short 0x63" :: "d" (the_error), "a" (&my_p_str) ); } diff --git a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h index bc93a8e58b..a1aa2727c7 100644 --- a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h @@ -43,7 +43,7 @@ extern "C" { #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 4 #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) - + #include <mvme16x_hw.h> /* GCSR is in mvme16x_hw.h */ @@ -153,7 +153,7 @@ typedef volatile struct memc040_regs_ { * nearly identical to the ones of the MEMC040, and the memc040_X structures * can be used to read those first eight registers. */ - + /* * Representation of the Cirrus Logic CL-CD2401 Multi-Protocol Controller @@ -189,7 +189,7 @@ typedef volatile struct cd2401_regs_ { unsigned char rfar2; /* 0xFFF4501E - Receive Frame Address 2 */ unsigned char rfar1; /* 0xFFF4501F - Receive Frame Address 1 */ } sync; - } u1; + } u1; unsigned char reserved4[2]; unsigned char scrh; /* 0xFFF45022 - Special Character Range High */ unsigned char scrl; /* 0xFFF45023 - Special Character Range Low */ @@ -263,7 +263,7 @@ typedef volatile struct cd2401_regs_ { unsigned char risrh; /* 0xFFF45088 - Receive Interrupt Status High */ unsigned char risrl; /* 0xFFF45089 - Receive Interrupt Status Low */ } b; - } u5; + } u5; unsigned char tisr; /* 0xFFF4508A - Transmit Interrupt Status */ unsigned char misr; /* 0xFFF4508B - Modem/Timer Interrupt Status */ unsigned char reserved13[2]; @@ -334,7 +334,7 @@ m68k_isr_entry set_vector( /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ @@ -365,7 +365,7 @@ extern m68k_isr_entry M68Kvec[]; /* vector table address */ #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ /* - * Define the interrupt mechanism for Time Test 27 + * Define the interrupt mechanism for Time Test 27 * * NOTE: We use software interrupt 0 */ diff --git a/c/src/lib/libbsp/m68k/mvme167/include/fatal.h b/c/src/lib/libbsp/m68k/mvme167/include/fatal.h index ae5e0cf50f..ee04905486 100644 --- a/c/src/lib/libbsp/m68k/mvme167/include/fatal.h +++ b/c/src/lib/libbsp/m68k/mvme167/include/fatal.h @@ -8,7 +8,7 @@ * * $Id$ */ - + #include <rtems/score/interr.h> #include <rtems/score/userext.h> diff --git a/c/src/lib/libbsp/m68k/mvme167/include/page_table.h b/c/src/lib/libbsp/m68k/mvme167/include/page_table.h index e831f21350..eb463ab146 100644 --- a/c/src/lib/libbsp/m68k/mvme167/include/page_table.h +++ b/c/src/lib/libbsp/m68k/mvme167/include/page_table.h @@ -1,6 +1,6 @@ /* page_table.h * - * This file was submitted by Eric Vaitl <vaitl@viasat.com> and + * This file was submitted by Eric Vaitl <vaitl@viasat.com> and * supports page table initialization. * * For now, we only use the transparent translation registers. Page tables @@ -27,17 +27,17 @@ void page_table_teardown( void ); void page_table_init( rtems_configuration_table *config_table ); -enum { - CACHE_WRITE_THROUGH, - CACHE_COPYBACK, +enum { + CACHE_WRITE_THROUGH, + CACHE_COPYBACK, CACHE_NONE_SERIALIZED, - CACHE_NONE + CACHE_NONE }; -enum { - PTM_SUCCESS, - PTM_BAD_ADDR, - PTM_BAD_SIZE, +enum { + PTM_SUCCESS, + PTM_BAD_ADDR, + PTM_BAD_SIZE, PTM_BAD_CACHE, PTM_NO_TABLE_SPACE }; diff --git a/c/src/lib/libbsp/m68k/mvme167/network/network.c b/c/src/lib/libbsp/m68k/mvme167/network/network.c index 73ec6fc1d3..8ab46e8ee9 100644 --- a/c/src/lib/libbsp/m68k/mvme167/network/network.c +++ b/c/src/lib/libbsp/m68k/mvme167/network/network.c @@ -5,12 +5,12 @@ #define KERNEL -/* +/* * Selectively define to debug the network driver. If you define any of these * you must run with polled console I/O. */ - -/* + +/* #define DBG_ADD_CMD #define DBG_WAIT #define DBG_SEND @@ -261,10 +261,10 @@ static i596_scp * uti596_scp_alloc( #endif return sc->pScp; } - + /* allocate enough memory for the Scp block to be aligned on 16 byte boundary */ malloc_16byte_aligned( (void *)&(sc->base_scp), (void *)&(sc->pScp), sizeof( i596_scp ) ); - + #ifdef DBG_MEM printk(("uti596_scp_alloc: Scp base address is %p\n", sc->base_scp)) printk(("uti596_scp_alloc: Scp aligned address is : %p\n",sc->pScp)) @@ -276,9 +276,9 @@ static i596_scp * uti596_scp_alloc( /* * uti596_writePortFunction - * + * * Write the command into the PORT. - * + * * Input parameters: * addr - 16-byte aligned address to write into the PORT. * cmd - 4-bit cmd to write into the PORT @@ -286,7 +286,7 @@ static i596_scp * uti596_scp_alloc( * Output parameters: NONE * * Return value: NONE - * + * * The Motorola manual swapped the high and low registers. */ RTEMS_INLINE_ROUTINE void uti596_writePortFunction( @@ -301,9 +301,9 @@ RTEMS_INLINE_ROUTINE void uti596_writePortFunction( /* * uti596_portReset - * + * * Issue a port Reset to the uti596 - * + * * Input parameters: NONE * * Output parameters: NONE @@ -338,14 +338,14 @@ static unsigned long uti596_portSelfTest( ) { rtems_interval ticks_per_second, start_ticks, end_ticks; - + stp->results = 0xFFFFFFFF; uti596_writePortFunction( stp, UTI596_SELFTEST_PORT_FUNCTION ); rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second); rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks); - end_ticks = start_ticks + ticks_per_second; - + end_ticks = start_ticks + ticks_per_second; + do { if( stp->results != 0xFFFFFFFF ) break; @@ -370,7 +370,7 @@ static unsigned long uti596_portSelfTest( } #endif - + /* currently unused by RTEMS */ #if 0 /* @@ -393,14 +393,14 @@ static int uti596_portDump( ) { rtems_interval ticks_per_second, start_ticks, end_ticks; - + dp->dump_status = 0; uti596_writePortFunction( dp, UTI596_DUMP_PORT_FUNCTION ); rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second); rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks); - end_ticks = start_ticks + ticks_per_second; - + end_ticks = start_ticks + ticks_per_second; + do { if( dp->dump_status != 0xA006 ) break; @@ -428,7 +428,7 @@ static int uti596_portDump( * uti596_wait * * Wait for a certain condition. - * + * * Input parameters: * sc - pointer to the uti596_softc struct * wait_type - UTI596_NO_WAIT @@ -454,7 +454,7 @@ static int uti596_wait( end_ticks = start_ticks + ticks_per_second; switch( waitType ) { - + case UTI596_NO_WAIT: return 0; @@ -465,9 +465,9 @@ static int uti596_wait( break; else rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks); - + } while (start_ticks <= end_ticks); - + if( (sc->scb.command != 0) || (start_ticks > end_ticks) ) { printf("i82596 timed out with status %x, cmd %x.\n", sc->scb.status, sc->scb.command); @@ -475,7 +475,7 @@ static int uti596_wait( } else return 0; - + case UTI596_WAIT_FOR_INITIALIZATION: do { if( !sc->iscp.busy ) @@ -504,7 +504,7 @@ static int uti596_wait( else rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks); } while (start_ticks <= end_ticks); - + if (start_ticks > end_ticks ) { #ifdef DBG_WAIT printk(("uti596_initMem: timed out - STAT_C not obtained\n" )) @@ -520,14 +520,14 @@ static int uti596_wait( } return -1; } - - + + /* * uti596_issueCA * * Issue a Channel Attention command. Possibly wait for the * command to start or complete. - * + * * Input parameters: * sc - pointer to the uti596_softc * wait_type - UTI596_NO_WAIT @@ -546,21 +546,21 @@ static int uti596_issueCA( { /* Issue Channel Attention */ i82596->chan_attn = 0x00000000; - + return (uti596_wait ( sc, waitType )); } /* * uti596_addCmd - * + * * Add a uti596_cmd onto the end of the CBL command chain, * or to the start if the chain is empty. - * + * * Input parameters: * pCmd - a pointer to the command to be added. * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE */ @@ -580,7 +580,7 @@ static void uti596_addCmd( pCmd->next = I596_NULL; _ISR_Disable(level); - + if (uti596_softc.pCmdHead == I596_NULL) { uti596_softc.pCmdHead = uti596_softc.pCmdTail = uti596_softc.scb.pCmd = pCmd; uti596_softc.scb.cmd_pointer = word_swap ((unsigned long)pCmd); @@ -588,7 +588,7 @@ static void uti596_addCmd( uti596_wait ( &uti596_softc, UTI596_WAIT_FOR_CU_ACCEPT ); uti596_softc.scb.command = CUC_START; uti596_issueCA ( &uti596_softc, UTI596_NO_WAIT ); - + _ISR_Enable(level); } else { @@ -607,10 +607,10 @@ static void uti596_addCmd( /* * uti596_addPolledCmd - * + * * Add a single uti596_cmd to the end of the command block list * for processing, send a CU_START and wait for its acceptance - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -653,11 +653,11 @@ void uti596_addPolledCmd( #if 0 /* * uti596_CU_dump - * + * * Dump the LANC 82596 registers * The outcome is the same as the portDump() but executed * via the CU instead of via a PORT access. - * + * * Input parameters: * drp - a pointer to a i596_dump_result structure. * @@ -681,10 +681,10 @@ static void uti596_CU_dump ( i596_dump_result * drp) /* * uti596_dump_scb - * + * * Dump the system control block * This function expands to nothing when using interrupt driven I/O - * + * * Input parameters: NONE * * Output parameters: NONE @@ -735,7 +735,7 @@ static int uti596_setScpAndScb( sc->pCmdHead = sc->scb.pCmd = I596_NULL; /* all 1's */ uti596_writePortFunction( sc->pScp, UTI596_SCP_PORT_FUNCTION ); - + /* Issue CA: pass the scb address to the 596 */ return ( uti596_issueCA ( sc, UTI596_WAIT_FOR_INITIALIZATION ) ); } @@ -743,9 +743,9 @@ static int uti596_setScpAndScb( /* * uti596_diagnose - * + * * Send a diagnose command to the CU - * + * * Input parameters: NONE * * Output parameters: NONE @@ -771,10 +771,10 @@ static int uti596_diagnose( void ) /* * uti596_configure - * + * * Send the CU a configure command with the desired * configuration structure - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -783,7 +783,7 @@ static int uti596_diagnose( void ) * Return value: * 0 if successful, -1 otherwise */ -static int uti596_configure ( +static int uti596_configure ( uti596_softc_ * sc ) { @@ -799,10 +799,10 @@ static int uti596_configure ( /* * uti596_IAsetup - * + * * Send the CU an Individual Address setup command with * the ethernet hardware address - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -816,7 +816,7 @@ static int uti596_IAsetup ( ) { int i; - + sc->set_add.cmd.command = CmdSASetup; for ( i=0; i<6; i++) { sc->set_add.data[i]=sc->arpcom.ac_enaddr[i]; @@ -832,10 +832,10 @@ static int uti596_IAsetup ( /* * uti596_initTBD - * + * * Initialize transmit buffer descriptors * dynamically allocate mem for the number of tbd's required - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -880,10 +880,10 @@ static int uti596_initTBD ( uti596_softc_ * sc ) /* * uti596_initRFA - * + * * Initialize the Receive Frame Area * dynamically allocate mem for the number of rfd's required - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -919,7 +919,7 @@ static int uti596_initRFA( int num ) pRfd = (i596_rfd *) calloc (1, sizeof (struct i596_rfd) ); if ( pRfd != NULL ) { uti596_softc.countRFD++; /* update count */ - uti596_softc.pEndRFA->next = + uti596_softc.pEndRFA->next = (i596_rfd *) word_swap ((unsigned long) pRfd); /* write the link */ uti596_softc.pEndRFA = pRfd; /* move the end */ } @@ -964,10 +964,10 @@ static int uti596_initRFA( int num ) /* * uti596_initMem - * + * * Initialize the 82596 memory structures for Tx and Rx * dynamically allocate mem for the number of tbd's required - * + * * Input parameters: * sc - a pointer to the uti596_softc struct * @@ -994,7 +994,7 @@ void uti596_initMem( if ( i < sc->rxBdCount ) { printk(("init_rfd: only able to allocate %d receive frame descriptors\n", i)) } - + /* * Write the SCB with a pointer to the receive frame area * and keep a pointer for our use. @@ -1033,7 +1033,7 @@ void uti596_initMem( * uti596_initialize * * Reset the 82596 and initialize it with a new SCP. - * + * * Input parameters: * sc - pointer to the uti596_softc * @@ -1055,7 +1055,7 @@ void uti596_initialize( * internal triggering, linear mode */ sc->pScp->sysbus = 0x54; - + /* provide the iscp to the scp, keep a pointer for our use */ sc->pScp->iscp_pointer = word_swap((unsigned long)&sc->iscp); sc->pScp->iscp = &sc->iscp; @@ -1070,7 +1070,7 @@ void uti596_initialize( /* Set up the 82596 */ uti596_setScpAndScb( sc ); - + /* clear the scb command word */ sc->scb.command = 0; } @@ -1081,7 +1081,7 @@ void uti596_initialize( * * Reset the 82596 and initialize it with a new SCP. Enable bus snooping. * Install the interrupt handlers. - * + * * Input parameters: * sc - pointer to the uti596_softc * @@ -1101,7 +1101,7 @@ void uti596_initialize_hardware( pccchip2->LANC_berr_ctl = 0x40; uti596_initialize( sc ); - + /* * Configure interrupt control in PCCchip2 */ @@ -1111,10 +1111,10 @@ void uti596_initialize_hardware( * will supply dirty data and leave dirty data * on read access and sink any data on write */ - /* + /* * Install the interrupt handler * calls rtems_interrupt_catch - */ + */ dummy = (rtems_isr_entry) set_vector( uti596_DynamicInterruptHandler, 0x57, 1 ); /* Initialize the 82596 memory */ @@ -1130,7 +1130,7 @@ void uti596_initialize_hardware( * uti596_reset_hardware * * Reset the 82596 and initialize it with an SCP. - * + * * Input parameters: * sc - pointer to the uti596_softc * @@ -1155,7 +1155,7 @@ void uti596_reset_hardware( printk(("uti596_reset_hardware\n")) #endif uti596_initialize( sc ); - + /* * Wake the transmitter if needed. */ @@ -1178,13 +1178,13 @@ void uti596_reset_hardware( /* * uti596_clearListStatus - * + * * Clear the stat fields for all RFDs - * + * * Input parameters: * pRfd - a pointer to the head of the RFA * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE */ @@ -1201,12 +1201,12 @@ void uti596_clearListStatus( /* * uti596_reset - * + * * Reset the 82596 and reconfigure - * + * * Input parameters: NONE * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE */ @@ -1223,7 +1223,7 @@ void uti596_reset( void ) */ sc->resetDone = 0; uti596_wait ( sc, UTI596_WAIT_FOR_CU_ACCEPT ); - uti596_reset_hardware ( &uti596_softc ); + uti596_reset_hardware ( &uti596_softc ); #ifdef DBG_RESET uti596_diagnose(); @@ -1257,7 +1257,7 @@ void uti596_reset( void ) } /* Re-address the head of the RFA in the SCB */ - sc->scb.pRfd = sc->pBeginRFA; + sc->scb.pRfd = sc->pBeginRFA; sc->scb.rfd_pointer = word_swap((unsigned long)sc->pBeginRFA); /* Clear the status of all RFDs */ @@ -1270,7 +1270,7 @@ void uti596_reset( void ) sc->started = 1; /* assume that the start is accepted */ sc->resetDone = 1; uti596_issueCA ( sc, UTI596_WAIT_FOR_CU_ACCEPT ); - + UTI_596_ASSERT(sc->pCmdHead == I596_NULL, "Reset: CMD not cleared\n") #ifdef DBG_RESET @@ -1281,13 +1281,13 @@ void uti596_reset( void ) /* * uti596_dequeue - * + * * Remove an RFD from the received fram queue - * + * * Input parameters: * ppQ - a pointer to a i596_rfd pointer * - * Output parameters: NONE + * Output parameters: NONE * * Return value: * pRfd - a pointer to the dequeued RFD @@ -1298,7 +1298,7 @@ i596_rfd * uti596_dequeue( { ISR_Level level; i596_rfd * pRfd; - + _ISR_Disable(level); /* invalid address, or empty queue or emptied queue */ @@ -1306,12 +1306,12 @@ i596_rfd * uti596_dequeue( _ISR_Enable(level); return I596_NULL; } - - /* + + /* * Point to the dequeued buffer, then * adjust the queue pointer and detach the buffer */ - pRfd = *ppQ; + pRfd = *ppQ; *ppQ = (i596_rfd *) word_swap ((unsigned long) pRfd->next); pRfd->next = I596_NULL; /* unlink the rfd being returned */ @@ -1322,18 +1322,18 @@ i596_rfd * uti596_dequeue( /* * uti596_append - * + * * Remove an RFD buffer from the RFA and tack it on to * the received frame queue for processing. - * + * * Input parameters: * ppQ - a pointer to the queue pointer * pRfd - a pointer to the buffer to be returned * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE - */ + */ void uti596_append( i596_rfd ** ppQ, @@ -1370,14 +1370,14 @@ void uti596_append( /* * uti596_supplyFD - * + * * Return a buffer (RFD) to the receive frame area (RFA). * Call with interrupts disabled. - * + * * Input parameters: * pRfd - a pointer to the buffer to be returned * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE */ @@ -1388,7 +1388,7 @@ void uti596_supplyFD ( i596_rfd *pLastRfd; UTI_596_ASSERT(pRfd != I596_NULL, "Supplying NULL RFD!\n") - + pRfd -> cmd = CMD_EOL; pRfd -> pRbd = I596_NULL; pRfd -> next = I596_NULL; @@ -1408,7 +1408,7 @@ void uti596_supplyFD ( uti596_softc.countRFD = 1; return; } - + /* * Check if the last RFD is used/read by the 596. */ @@ -1416,7 +1416,7 @@ void uti596_supplyFD ( /* C = complete, B = busy (prefetched) */ if ( pLastRfd != I596_NULL && ! (pLastRfd -> stat & ( STAT_C | STAT_B ) )) { - + /* * Not yet too late to add it */ @@ -1454,13 +1454,13 @@ void uti596_supplyFD ( } else { - + uti596_softc.pEndRFA = pRfd; /* the RFA has been extended */ - + if ( ( uti596_softc.scb.status & SCB_STAT_RNR || uti596_softc.scb.status & RU_NO_RESOURCES ) && uti596_softc.countRFD > 1 ) { - + /* Ensure that beginRFA is not EOL */ uti596_softc.pBeginRFA -> cmd &= ~CMD_EOL; @@ -1476,10 +1476,10 @@ void uti596_supplyFD ( UTI_596_ASSERT(uti596_softc.pBeginRFA != I596_NULL, "rx start w/ NULL begin! \n") uti596_softc.scb.pRfd = uti596_softc.pBeginRFA; uti596_softc.scb.rfd_pointer = word_swap ((unsigned long) uti596_softc.pBeginRFA); - + /* Don't ack RNR! The receiver should be stopped in this case */ uti596_softc.scb.command = RX_START | SCB_STAT_RNR; - + UTI_596_ASSERT( !(uti596_softc.scb.status & SCB_STAT_FR),"FRAME RECEIVED INT COMING!\n") /* send CA signal */ @@ -1506,15 +1506,15 @@ void uti596_supplyFD ( /* * send_packet - * + * * Send a raw ethernet packet, add a * transmit command to the CBL - * + * * Input parameters: * ifp - a pointer to the ifnet structure * m - a pointer to the mbuf being sent * - * Output parameters: NONE + * Output parameters: NONE * * Return value: NONE */ @@ -1701,12 +1701,12 @@ int uti596_attach( else ifp->if_mtu = ETHERMTU; - /* + /* * Check whether parameters should be obtained from NVRAM. If * yes, and if an IP address, netmask, or ethernet address are * provided in NVRAM, cheat, and stuff them into the ifconfig * structure, OVERRIDING and existing or NULL values. - * + * * Warning: If values are provided in NVRAM, the ifconfig entries * must be NULL because buffer memory allocated to hold the * structure values is unrecoverable and would be lost here. @@ -1718,7 +1718,7 @@ int uti596_attach( #if defined(mvme167) if ( !(j1 & 0x10) ) { /* Jumper J1-4 is on, configure from NVRAM */ - + if ( (addr = nvram->ipaddr) ) { /* We have a non-zero entry, copy the value */ if ( (pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT )) ) @@ -1726,7 +1726,7 @@ int uti596_attach( else rtems_panic("Can't allocate ip_address buffer!\n"); } - + if ( (addr = nvram->netmask) ) { /* We have a non-zero entry, copy the value */ if ( (pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT )) ) @@ -1739,7 +1739,7 @@ int uti596_attach( * the arpcom struct. The following if construct serves only to give the * NVRAM parameter the highest priority if J1-4 indicates we are configuring * from NVRAM. - * + * * If the ethernet address is specified in NVRAM, go ahead and copy it. * (ETHER_ADDR_LEN = 6 bytes). */ @@ -1827,11 +1827,11 @@ static void uti596_start( ) { uti596_softc_ *sc = ifp->if_softc; - + #ifdef DBG_START printk(("uti596_start: begins\n")) #endif - + rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); ifp->if_flags |= IFF_OACTIVE; } @@ -1890,14 +1890,14 @@ void uti596_init( #endif sc->scb.command = RX_START; uti596_issueCA ( sc, UTI596_WAIT_FOR_CU_ACCEPT ); - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; #ifdef DBG_INIT printk(("uti596_init: completed.\n")) - #endif + #endif } /*********************************************************************** @@ -1940,9 +1940,9 @@ void uti596_init( * Function: void uti596_txDaemon * * Description: Transmit task - * + * * Algorithm: Get mbufs to be transmitted, stuff into RFDs, send - * + * ***********************************************************************/ void uti596_txDaemon( @@ -2181,16 +2181,16 @@ void uti596_resetDaemon( if ( scbStatus ) { /* acknowledge interrupts */ - + /* Write to the ICLR bit in the PCCchip2 control registers to clear * the INT status bit. Clearing INT here *before* sending the CA signal * to the 82596 should ensure that interrupts won't be lost. */ pccchip2->LANC_int_ctl |=0x08; pccchip2->LANC_berr_ctl |=0x08; - + /* printk(("***INFO: ACK %x\n", scbStatus))*/ - + /* Send the CA signal to acknowledge interrupt */ uti596_softc.scb.command = scbStatus; uti596_issueCA ( &uti596_softc, UTI596_NO_WAIT ); @@ -2242,7 +2242,7 @@ void uti596_resetDaemon( } else { printk(("*****WARNING: RNR condition with NULL BeginRFA\n")) - } + } } /* @@ -2251,7 +2251,7 @@ void uti596_resetDaemon( */ if ( scbStatus & SCB_STAT_FR ) { uti596_softc.rxInterrupts++; - + #ifdef DBG_ISR printk(("uti596_DynamicInterruptHandler: Frame received\n")) #endif @@ -2353,7 +2353,7 @@ void uti596_resetDaemon( * ( Perhaps AddCmd is bad? ) */ UTI_596_ASSERT(uti596_softc.pCmdHead == I596_NULL, "****ERROR: command serialization failed\n") - + /* What if the command did not complete OK? */ switch ( pIsrCmd->command & 0x7) { case CmdConfigure: @@ -2448,9 +2448,9 @@ void uti596_resetDaemon( printk(("****WARNING: more commands in list, but no start to NIC\n")) } } /* end if pIsrCmd != NULL && pIsrCmd->stat & STAT_C */ - + else { - if ( pIsrCmd != I596_NULL ) { + if ( pIsrCmd != I596_NULL ) { /* The command MAY be NULL from a RESET */ /* Reset the ethernet card, and wake the transmitter (if necessary) */ printk(("****INFO: Request board reset ( tx )\n")) @@ -2475,7 +2475,7 @@ void uti596_resetDaemon( } /* end if command complete */ - /* + /* * If the receiver has stopped, * check if this is a No Resources scenario, * Try to add more RFD's ( no RBDs are used ) @@ -2606,8 +2606,8 @@ void uti596_resetDaemon( printk(("uti596_DynamicInterruptHandler: X\n")) #endif count_rx=0; - - + + /* Do this last, to ensure that the reset is called at the right time. */ if ( uti596_softc.nic_reset ) { uti596_softc.nic_reset = 0; @@ -2625,9 +2625,9 @@ void uti596_resetDaemon( * Description: * driver ioctl function * handles SIOCGIFADDR, SIOCSIFADDR, SIOCSIFFLAGS - * + * ***********************************************************************/ - + static int uti596_ioctl( struct ifnet *ifp, int command, @@ -2684,7 +2684,7 @@ static int uti596_ioctl( error = EINVAL; break; } - + return error; } @@ -2756,24 +2756,24 @@ static void dumpQ( void ) i596_rfd *pRfd; printk(("savedQ:\n")) - + for( pRfd = uti596_softc.pSavedRfdQueue; pRfd != I596_NULL; pRfd = pRfd -> next) { printk(("pRfd: %p, stat: 0x%x cmd: 0x%x\n",pRfd,pRfd -> stat,pRfd -> cmd)) } - + printk(("Inbound:\n")) - + for( pRfd = uti596_softc.pInboundFrameQueue; pRfd != I596_NULL; pRfd = pRfd -> next) { printk(("pRfd: %p, stat: 0x%x cmd: 0x%x\n",pRfd,pRfd -> stat,pRfd -> cmd)) } - + printk(("Last Unk: %p\n", uti596_softc.pLastUnkRFD )) printk(("RFA:\n")) - + for( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL; pRfd = pRfd -> next) { @@ -2784,7 +2784,7 @@ static void dumpQ( void ) /* * show_buffers - * + * * Print out the RFA and frame queues */ static void show_buffers (void) @@ -2797,7 +2797,7 @@ static void show_buffers (void) uti596_softc.countRFD)) printk(("\nRFA: \n")) - + for ( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL; pRfd = pRfd->next) { @@ -2805,7 +2805,7 @@ static void show_buffers (void) pRfd, pRfd->stat, pRfd->cmd)) } printk(("\nInbound: \n")) - + for ( pRfd = uti596_softc.pInboundFrameQueue; pRfd != I596_NULL; pRfd = pRfd->next) { @@ -2814,14 +2814,14 @@ static void show_buffers (void) } printk(("\nSaved: \n")) - + for ( pRfd = uti596_softc.pSavedRfdQueue; pRfd != I596_NULL; pRfd = pRfd->next) { printk(("Frame @ %p, status: %2.2x, cmd: %2.2x\n", pRfd, pRfd->stat, pRfd->cmd)) } - + printk(("\nUnknown: %p\n",uti596_softc.pLastUnkRFD)) } @@ -2850,7 +2850,7 @@ static void show_queues(void) printk(("End saved Q 0x%p\n", uti596_softc.pEndSavedQueue)) printk(("\nRFA:\n")) - + for ( pRfd = uti596_softc.pBeginRFA; pRfd != I596_NULL && pRfd != NULL; @@ -2887,11 +2887,11 @@ static void print_eth( for (i = 6; i < 12; i++) { printk ((" %2.2X", add[i])) } - + printk (("\n")) printk (("frame type %2.2X%2.2X\n", add[12], add[13])) - if ( add[12] == 0x08 && add[13] == 0x06 ) { + if ( add[12] == 0x08 && add[13] == 0x06 ) { /* an ARP */ printk (("Hardware type : %2.2X%2.2X\n", add[14],add[15])) printk (("Protocol type : %2.2X%2.2X\n", add[16],add[17])) @@ -2905,13 +2905,13 @@ static void print_eth( } printk (("%x\n", add[27])) printk (("Sender IP addr: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[28 + i])) } printk (("%u\n", add[31])) printk (("Target Enet addr: ")) - + for ( i=0; i< 5 ; i++) { printk (( "%x:", add[32 + i])) } @@ -2936,13 +2936,13 @@ static void print_eth( add[22],add[23],add[24],add[25])) printk (("IP packet type: %2.2X code %2.2X\n", add[34],add[35])) printk (("Source IP address: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[26 + i])) } printk (("%u\n", add[29])) printk (("Destination IP address: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[30 + i])) } @@ -3010,15 +3010,15 @@ static void print_pkt( } printk (("%x\n", add[27])) printk (("Sender IP addr: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[28 + i])) } printk (("%u\n", add[31])) printk (("Target Enet addr: ")) - + for ( i=0; i< 5 ; i++) { - printk (( "%x:", add[32 + i])) + printk (( "%x:", add[32 + i])) } printk (("%x\n", add[37])) printk (("Target IP addr: ")) @@ -3040,20 +3040,20 @@ static void print_pkt( add[22],add[23],add[24],add[25])) printk (("IP packet type: %2.2X code %2.2X\n", add[34],add[35])) printk (("Source IP address: ")) - + for ( i=0; i< 3 ; i++) { printk(( "%u.", add[26 + i])) } printk(("%u\n", add[29])) printk(("Destination IP address: ")) - + for ( i=0; i< 3 ; i++) { printk(( "%u.", add[30 + i])) } printk(("%u\n", add[33])) printk(("********************IP Packet Data*******************\n")) length -=20; - + for ( i=0; i < length ; i++) { printk(("0x%2.2x ", add[34+i])) } @@ -3081,7 +3081,7 @@ static void print_echo( printk (("print_echo: begins")) - if ( add[12] == 0x08 && add[13] == 0x00 ) { + if ( add[12] == 0x08 && add[13] == 0x00 ) { /* an IP packet */ printk (("Packet Location %p\n", add)) printk (("Dest ")) @@ -3097,7 +3097,7 @@ static void print_echo( } printk (("\n")) printk (("frame type %2.2X%2.2X\n", add[12], add[13])) - + printk (("*********************IP HEADER******************\n")) printk (("IP version/IPhdr length: %2.2X TOS: %2.2X\n", add[14] , add[15])) printk (("IP total length: %2.2X %2.2X, decimal %d\n", add[16], add[17], length = (add[16]<<8 | add[17] ))) @@ -3107,20 +3107,20 @@ static void print_echo( add[22],add[23],add[24],add[25])) printk (("IP packet type: %2.2X code %2.2X\n", add[34],add[35])) printk (("Source IP address: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[26 + i])) } printk (("%u\n", add[29])) printk (("Destination IP address: ")) - + for ( i=0; i< 3 ; i++) { printk (("%u.", add[30 + i])) } printk (("%u\n", add[33])) printk(("********************IP Packet Data*******************\n")) length -=20; - + for ( i=0; i < length ; i++) { printk(("0x%2.2x ", add[34+i])) } diff --git a/c/src/lib/libbsp/m68k/mvme167/network/uti596.h b/c/src/lib/libbsp/m68k/mvme167/network/uti596.h index 38b22af0c5..bc97ac2455 100644 --- a/c/src/lib/libbsp/m68k/mvme167/network/uti596.h +++ b/c/src/lib/libbsp/m68k/mvme167/network/uti596.h @@ -105,13 +105,13 @@ struct enet_statistics{ struct i596_tbd; /* necessary forward declaration */ enum commands { - CmdNOp = 0, - CmdSASetup = 1, - CmdConfigure = 2, + CmdNOp = 0, + CmdSASetup = 1, + CmdConfigure = 2, CmdMulticastList = 3, - CmdTx = 4, - CmdTDR = 5, - CmdDump = 6, + CmdTx = 4, + CmdTDR = 5, + CmdDump = 6, CmdDiagnose = 7 }; @@ -127,7 +127,7 @@ typedef volatile struct i596_dump_result { unsigned short tx_crc_byte01; unsigned short tx_crc_byte23; unsigned short rx_crc_byte01; - unsigned short rx_crc_byte23; + unsigned short rx_crc_byte23; unsigned short rx_temp_mem01; unsigned short rx_temp_mem23; unsigned short rx_temp_mem45; @@ -201,10 +201,10 @@ typedef volatile struct i596_selftest { unsigned long results; } i596_selftest; -/* +/* * Action commands * (big endian, linear mode) - */ + */ typedef volatile struct i596_cmd { unsigned short status; unsigned short command; @@ -251,7 +251,7 @@ typedef volatile struct i596_tbd { unsigned short size; unsigned short pad; volatile struct i596_tbd *next; - char *data; + char *data; } i596_tbd; /* @@ -262,7 +262,7 @@ typedef volatile struct i596_rbd { unsigned short count; unsigned short offset; volatile struct i596_rbd *next; - char *data; + char *data; unsigned short size; unsigned short pad; } i596_rbd; @@ -274,10 +274,10 @@ typedef volatile struct i596_rfd { unsigned short stat; unsigned short cmd; volatile struct i596_rfd *next; - i596_rbd *pRbd; + i596_rbd *pRbd; unsigned short count; unsigned short size; - char data [1532]; + char data [1532]; } i596_rfd; /* @@ -300,7 +300,7 @@ typedef volatile struct i596_scb { i596_rfd *pRfd; } i596_scb; -/* +/* * Intermediate System Configuration Pointer */ typedef volatile struct i596_iscp { @@ -333,7 +333,7 @@ typedef volatile struct uti596_softc { i596_set_add set_add; i596_configure set_conf; i596_tdr tdr; - i596_nop nop; + i596_nop nop; i596_tx *pTxCmd; i596_tbd *pTbd; diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c b/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c index 3446711e32..b4084e6558 100644 --- a/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c +++ b/c/src/lib/libbsp/m68k/mvme167/startup/bspclean.c @@ -45,7 +45,7 @@ static void bsp_return_to_monitor_trap( void ) m68k_set_vbr(0xFFE00000); /* restore 167Bug vectors */ asm volatile( "trap #15\n\t" /* trap to 167Bug */ ".short 0x63" ); /* return to 167Bug (.RETURN) */ - + /* restart program */ start_addr = start; asm volatile( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) ); @@ -61,7 +61,7 @@ static void bsp_return_to_monitor_trap( void ) * function that makes a 167Bug .RETURN syscall in the trap 13 entry in the * exception vector, and then issues a trap 13 call. It is also possible that * the code was copied from some other OS that does run tasks in user mode. - * In any case, it appears to be a bit of paranoia, and could lead to + * In any case, it appears to be a bit of paranoia, and could lead to * problems if 167Bug is invoked before we get to switch the VBR back to * 167Bug because trap 13 is documented as being reserved for the internal * use of the debugger. diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c index ab716e2dad..f4c640063d 100644 --- a/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mvme167/startup/bspstart.c @@ -17,7 +17,7 @@ * * $Id$ */ - + #include <string.h> @@ -78,7 +78,7 @@ void bsp_pretasking_hook(void); /* m68k version */ void bsp_start( void ) { void M68KFPSPInstallExceptionHandlers (void); - + extern m68k_isr_entry M68Kvec[]; extern void *_WorkspaceBase; extern void *_RamSize; @@ -88,7 +88,7 @@ void bsp_start( void ) int index; _M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */ - + /* * 167Bug Vectors are at 0xFFE00000 */ @@ -96,7 +96,7 @@ void bsp_start( void ) m68k_set_vbr( rom_monitor_vector_table ); - /* + /* * Copy 167Bug Bus Error handler into our exception vector. All 167Bug * exception vectors are the same and point to the generalized exception * handler. The bus error handler is the one that Motorola says to copy @@ -108,7 +108,7 @@ void bsp_start( void ) /* Any exceptions during initialization should be trapped by 167Bug */ m68k_set_vbr( &M68Kvec ); - + /* Install the 68040 FPSP here */ M68KFPSPInstallExceptionHandlers(); @@ -120,7 +120,7 @@ void bsp_start( void ) /* Set the Interrupt Base Vectors */ lcsr->vector_base = (VBR0 << 28) | (VBR1 << 24); - /* + /* * Initialize address translation * May need to pass the multiprocessor configuration table. */ @@ -132,8 +132,8 @@ void bsp_start( void ) Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec; /* Must match value in start.s */ Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; - - /* + + /* * If the application has not overriden the default User_extension_table, * supply one with our own fatal error handler that returns control to * 167Bug. @@ -142,7 +142,7 @@ void bsp_start( void ) user_extension_table.fatal = bsp_fatal_error_occurred; BSP_Configuration.User_extension_table = &user_extension_table; } - + /* * Need to "allocate" the memory for the RTEMS Workspace and * tell the RTEMS configuration where it is. This memory is diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c index 34f6683aa7..985144224d 100644 --- a/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c +++ b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c @@ -17,7 +17,7 @@ * is mapped to physical address 0x12345678. With this mapping, the MMU is * only used to control the caching modes for the various regions of memory. * Mapping the virtual addresses to their corresponding physical address makes - * it unnecessary to map addresses under software control during the + * it unnecessary to map addresses under software control during the * initialization of RTEMS, before address translation is turned on. * * With the above approach, address translation may be set up either with the @@ -50,13 +50,13 @@ /* * page_table_init - * + * * Map the virtual range 0x00000000--0x7FFFFFFF to the physical range * 0x00000000--0x7FFFFFFF. Rely on the hardware to raise exceptions when * addressing non-existent memory. Use only the transparent translation * registers (for now). * - * On all processors, the local virtual address range 0xFF000000--0xFFFFFFFF + * On all processors, the local virtual address range 0xFF000000--0xFFFFFFFF * is mapped to the physical address range 0xFF000000--0xFFFFFFFF as * caching disabled, serialized access. * @@ -74,7 +74,7 @@ void page_table_init( unsigned char j1; /* State of J1 jumpers */ register unsigned long dtt0; /* Content of dtt0 */ register unsigned long cacr; /* Content of cacr */ - + /* * Logical base addr = 0x00 map starting at 0x00000000 * Logical address mask = 0x7F map up to 0x7FFFFFFF @@ -85,9 +85,9 @@ void page_table_init( * W = 0b0 read/write access allowed */ dtt0 = 0x007FC020; - + cacr = 0x00000000; /* Data and instruction cache off */ - + /* Read the J1 header */ j1 = (unsigned char)(lcsr->vector_base & 0xFF); @@ -105,15 +105,15 @@ void page_table_init( } else { /* Configure according to other jumper settings */ - + if ( !(j1 & 0x80) ) /* Jumper J1-7 if on, enable data caching */ cacr |= 0x80000000; - + if ( !(j1 & 0x40) ) /* Jumper J1-6 if on, enable instruction caching */ cacr |= 0x00008000; - + if ( j1 & 0x20 ) /* Jumper J1-5 is off, enable writethrough caching */ dtt0 &= 0xFFFFFF9F; @@ -131,7 +131,7 @@ void page_table_init( :: "d" (0), "d" (dtt0), "d" (0xFF00C040), "d" (cacr)); } - + /* * page_table_teardown * diff --git a/c/src/lib/libbsp/m68k/mvme167/timer/timer.c b/c/src/lib/libbsp/m68k/mvme167/timer/timer.c index 0b718c085f..2d78f91685 100644 --- a/c/src/lib/libbsp/m68k/mvme167/timer/timer.c +++ b/c/src/lib/libbsp/m68k/mvme167/timer/timer.c @@ -63,7 +63,7 @@ rtems_isr timerisr(); * It is important that the timer start/stop overhead be * determined when porting or modifying this code. * - * THE VMECHIP2 PRESCALER REGISTER IS ASSUMED TO BE SET! + * THE VMECHIP2 PRESCALER REGISTER IS ASSUMED TO BE SET! * The prescaler is used by all VMEchip2 timers, including the VMEbus grant * timeout counter, the DMAC time off timer, the DMAC timer on timer, and the * VMEbus global timeout timer. The prescaler value is normally set by the @@ -73,7 +73,7 @@ rtems_isr timerisr(); void Timer_initialize() { (void) set_vector( timerisr, TIMER_VECTOR, 0 ); - + Ttimer_val = 0; /* clear timer ISR count */ lcsr->intr_ena &= 0xFEFFFFFF; /* disable tick timer 1 interrupt */ lcsr->intr_clear |= 0x01000000; /* clear tick timer 1 interrupt */ @@ -106,7 +106,7 @@ void Timer_initialize() * LEAST_VALID is the lowest number this routine should trust. Numbers * below this are "noise" and zero is returned. */ -int Read_timer() +int Read_timer() { uint32_t total; diff --git a/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c b/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c index 95c9024d81..eff3b5580f 100644 --- a/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c +++ b/c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c @@ -50,11 +50,11 @@ volatile uint32_t Clock_driver_ticks; uint32_t Clock_isrs; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -112,17 +112,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + rtems_device_driver Clock_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -131,15 +131,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr( CLOCK_VECTOR); @@ -150,7 +150,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/m68k/ods68302/console/console.c b/c/src/lib/libbsp/m68k/ods68302/console/console.c index 292d9396f8..f471b44a71 100644 --- a/c/src/lib/libbsp/m68k/ods68302/console/console.c +++ b/c/src/lib/libbsp/m68k/ods68302/console/console.c @@ -43,10 +43,10 @@ rtems_device_driver console_initialize( major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -91,9 +91,9 @@ rtems_boolean is_character_ready( char inbyte( void ) { char ch; - + while (!is_character_ready(&ch)); - + return ch; } @@ -128,7 +128,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -156,7 +156,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -175,7 +175,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/m68k/ods68302/include/bare.h b/c/src/lib/libbsp/m68k/ods68302/include/bare.h index 3942ce9732..81352f4f3d 100644 --- a/c/src/lib/libbsp/m68k/ods68302/include/bare.h +++ b/c/src/lib/libbsp/m68k/ods68302/include/bare.h @@ -13,7 +13,7 @@ Chip selects are programmed as required. Three are controlled in the boot code. They are RAM, ROM, and peripherals. You can optionally configure the other two chip selects. - + SYSTEM_CLOCK - You must defined this. It is used for setting the baud rate. @@ -30,7 +30,7 @@ CSEL_1, CSEL_2 - If defined the other macros needed to define the chip select must be defined. If not defined they are not programmed and registers are left in the reset state. - + Card Specific Devices - The MVF card uses a chip select to address a range of peripherials (CSEL_2). These include front panel leds, and 4 digit diagnostic display device. Put what ever you need. @@ -45,7 +45,7 @@ This file allows a range of common parameters which vary from one variant of card to another to placed in a central file. - + */ /*****************************************************************************/ @@ -53,7 +53,7 @@ #define _BARE_H_ #if __cplusplus -extern "C" +extern "C" { #endif @@ -84,8 +84,8 @@ extern "C" #define CSEL_2_SIZE (0x00040000) #define CSEL_2_WAIT_STATES (OR_DTACK_EXT) -/* - * Need to define a watchdog period +/* + * Need to define a watchdog period */ #define WATCHDOG_TIMEOUT_PERIOD (3000 * 2) @@ -182,42 +182,42 @@ extern "C" #define PIA_BASE (PERIPHERIALS_BASE + 0x0001C000) #define LED_1 0x0002 -#define LED_1_GREEN 0xFFFD +#define LED_1_GREEN 0xFFFD #define LED_1_RED 0xFFFF -#define LED_1_OFF 0xFFFC +#define LED_1_OFF 0xFFFC #define LED_2 0x0001 -#define LED_2_GREEN 0xFFFE +#define LED_2_GREEN 0xFFFE #define LED_2_RED 0xFFFF #define LED_2_OFF 0xFFFC #define LED_3 0x0000 -#define LED_3_GREEN 0xFFFC +#define LED_3_GREEN 0xFFFC #define LED_3_RED 0xFFFC #define LED_3_OFF 0xFFFC #define LED_4 0x0000 -#define LED_4_GREEN 0xFFFC +#define LED_4_GREEN 0xFFFC #define LED_4_RED 0xFFFC #define LED_4_OFF 0xFFFC #define LED_5 0x0000 -#define LED_5_GREEN 0xFFFC +#define LED_5_GREEN 0xFFFC #define LED_5_RED 0xFFFC #define LED_5_OFF 0xFFFC #define LED_6 0x0000 -#define LED_6_GREEN 0xFFFC +#define LED_6_GREEN 0xFFFC #define LED_6_RED 0xFFFC #define LED_6_OFF 0xFFFC #define LED_7 0x0000 -#define LED_7_GREEN 0xFFFC +#define LED_7_GREEN 0xFFFC #define LED_7_RED 0xFFFC #define LED_7_OFF 0xFFFC #define LED_8 0x0000 -#define LED_8_GREEN 0xFFFC +#define LED_8_GREEN 0xFFFC #define LED_8_RED 0xFFFC #define LED_8_OFF 0xFFFC @@ -239,7 +239,7 @@ extern "C" #else #define GDB_RUN_MONITOR() (1 == 0) #endif - + #if __cplusplus } #endif diff --git a/c/src/lib/libbsp/m68k/ods68302/include/bsp.h b/c/src/lib/libbsp/m68k/ods68302/include/bsp.h index 8d9cfbafde..5e36be8064 100644 --- a/c/src/lib/libbsp/m68k/ods68302/include/bsp.h +++ b/c/src/lib/libbsp/m68k/ods68302/include/bsp.h @@ -110,7 +110,7 @@ extern "C" { /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/ods68302/include/crc.h b/c/src/lib/libbsp/m68k/ods68302/include/crc.h index c245c39a15..1c5be55e32 100644 --- a/c/src/lib/libbsp/m68k/ods68302/include/crc.h +++ b/c/src/lib/libbsp/m68k/ods68302/include/crc.h @@ -14,7 +14,7 @@ F U N C T I O N S */ #if __cplusplus -extern "C" +extern "C" { #endif diff --git a/c/src/lib/libbsp/m68k/ods68302/include/debugport.h b/c/src/lib/libbsp/m68k/ods68302/include/debugport.h index a54756e514..0ce0f66b94 100644 --- a/c/src/lib/libbsp/m68k/ods68302/include/debugport.h +++ b/c/src/lib/libbsp/m68k/ods68302/include/debugport.h @@ -11,23 +11,23 @@ #define _DEBUGPORT_H_ #if __cplusplus -extern "C" +extern "C" { #endif /* normall automatic, only need when re-initialising */ void debug_port_initialise(void); - + unsigned char debug_port_status(const unsigned char status); unsigned char debug_port_in(void); - void debug_port_out(const unsigned char character); + void debug_port_out(const unsigned char character); void debug_port_write(const char *buffer); void debug_port_write_buffer(const char *buffer, unsigned int size); void debug_port_write_hex_uint(const unsigned int value); void debug_port_write_hex_ulong(const unsigned long value); - + /* * special banner message for CPU specific boot code, * initialises the debug port diff --git a/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h b/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h index d6eb37ccda..4b8b72a328 100644 --- a/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h +++ b/c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h @@ -1,7 +1,7 @@ /*****************************************************************************/ /* $Id$ - + M68302 Scc Polled Uart Support */ @@ -11,7 +11,7 @@ #define _M68302SCC_H_ #if __cplusplus -extern "C" +extern "C" { #endif @@ -21,11 +21,11 @@ extern "C" #define SCC_38400 (3) #define SCC_57600 (4) #define SCC_115700 (5) - + void scc_initialise(int channel, int baud_rate, int lf_translate); unsigned char scc_status(int channel, const unsigned char status); unsigned char scc_in(int channel); -void scc_out(int channel, const unsigned char character); +void scc_out(int channel, const unsigned char character); #if __cplusplus } diff --git a/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S b/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S index 60e7277245..915621b8b5 100644 --- a/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S +++ b/c/src/lib/libbsp/m68k/ods68302/start/debugreset.S @@ -1,21 +1,21 @@ -/* +/* * $Id$ * * Re-written the gen68302 start-up code. - * + * * Uses gas syntax only, removed the OAR asm.h. - * + * * Supplies a complete vector table in ROM. - * + * * Manages all vectors with seperate handlers to trap unhandled * execptions. - * - * Uses the target specific header file to get the runtime + * + * Uses the target specific header file to get the runtime * configuration - * + * * COPYRIGHT (c) 1996 * Objective Design Systems Pty Ltd (ODS) - * + * * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. * On-Line Applications Research Corporation (OAR). * @@ -31,7 +31,7 @@ | | Entered from a hardware reset. | - + .global start | Default entry point for GNU start: @@ -45,9 +45,9 @@ zerobss: moveal #_clear_end,%a0 | find end of .bss moveal #_clear_start,%a1 | find beginning of .bss moveq #0,%d0 - + zerobss_loop: - + movel %d0,%a1@+ | to zero out uninitialized cmpal %a0,%a1 jlt zerobss_loop | loop until end reached @@ -60,14 +60,14 @@ zerobss_loop: jsr boot_phase_3 -| +| | Initialised data | .sect .data - + .global start_frame - + start_frame: .space 4,0 @@ -76,10 +76,10 @@ start_frame: | .sect .bss - + .global environ .align 2 - + environ: .long 0 diff --git a/c/src/lib/libbsp/m68k/ods68302/start/reset.S b/c/src/lib/libbsp/m68k/ods68302/start/reset.S index b07588e9b2..c6f80950f1 100644 --- a/c/src/lib/libbsp/m68k/ods68302/start/reset.S +++ b/c/src/lib/libbsp/m68k/ods68302/start/reset.S @@ -1,21 +1,21 @@ -/* +/* * $Id$ * * Re-written the gen68302 start-up code. - * + * * Uses gas syntax only, removed the OAR asm.h. - * + * * Supplies a complete vector table in ROM. - * + * * Manages all vectors with seperate handlers to trap unhandled * execptions. - * - * Uses the target specific header file to get the runtime + * + * Uses the target specific header file to get the runtime * configuration - * + * * COPYRIGHT (c) 1996 * Objective Design Systems Pty Ltd (ODS) - * + * * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. * On-Line Applications Research Corporation (OAR). * @@ -36,16 +36,16 @@ .sect .resettext .global M68Kvec | Vector Table - + M68Kvec: | standard location for vectors - + | | Make relative, can have the code positioned any where | V___ISSP: .long MC68302_BASE + MC68302_SYS_RAM_SIZE V____IPC: .long start - V___ISSP - + | | Create the rest of the vector table to point to the unhandled expection | handler @@ -64,7 +64,7 @@ MAKE_EXCEPTION_VECTOR(6) MAKE_EXCEPTION_VECTOR(7) MAKE_EXCEPTION_VECTOR(8) MAKE_EXCEPTION_VECTOR(9) - + MAKE_EXCEPTION_VECTOR(10) MAKE_EXCEPTION_VECTOR(11) MAKE_EXCEPTION_VECTOR(12) @@ -86,7 +86,7 @@ MAKE_EXCEPTION_VECTOR(26) MAKE_EXCEPTION_VECTOR(27) MAKE_EXCEPTION_VECTOR(28) MAKE_EXCEPTION_VECTOR(29) - + MAKE_EXCEPTION_VECTOR(30) MAKE_EXCEPTION_VECTOR(31) MAKE_EXCEPTION_VECTOR(32) @@ -97,7 +97,7 @@ MAKE_EXCEPTION_VECTOR(36) MAKE_EXCEPTION_VECTOR(37) MAKE_EXCEPTION_VECTOR(38) MAKE_EXCEPTION_VECTOR(39) - + MAKE_EXCEPTION_VECTOR(40) MAKE_EXCEPTION_VECTOR(41) MAKE_EXCEPTION_VECTOR(42) @@ -108,7 +108,7 @@ MAKE_EXCEPTION_VECTOR(46) MAKE_EXCEPTION_VECTOR(47) MAKE_EXCEPTION_VECTOR(48) MAKE_EXCEPTION_VECTOR(49) - + MAKE_EXCEPTION_VECTOR(50) MAKE_EXCEPTION_VECTOR(51) MAKE_EXCEPTION_VECTOR(52) @@ -119,7 +119,7 @@ MAKE_EXCEPTION_VECTOR(56) MAKE_EXCEPTION_VECTOR(57) MAKE_EXCEPTION_VECTOR(58) MAKE_EXCEPTION_VECTOR(59) - + MAKE_EXCEPTION_VECTOR(60) MAKE_EXCEPTION_VECTOR(61) MAKE_EXCEPTION_VECTOR(62) @@ -130,7 +130,7 @@ MAKE_EXCEPTION_VECTOR(66) MAKE_EXCEPTION_VECTOR(67) MAKE_EXCEPTION_VECTOR(68) MAKE_EXCEPTION_VECTOR(69) - + MAKE_EXCEPTION_VECTOR(70) MAKE_EXCEPTION_VECTOR(71) MAKE_EXCEPTION_VECTOR(72) @@ -141,7 +141,7 @@ MAKE_EXCEPTION_VECTOR(76) MAKE_EXCEPTION_VECTOR(77) MAKE_EXCEPTION_VECTOR(78) MAKE_EXCEPTION_VECTOR(79) - + MAKE_EXCEPTION_VECTOR(80) MAKE_EXCEPTION_VECTOR(81) MAKE_EXCEPTION_VECTOR(82) @@ -152,7 +152,7 @@ MAKE_EXCEPTION_VECTOR(86) MAKE_EXCEPTION_VECTOR(87) MAKE_EXCEPTION_VECTOR(88) MAKE_EXCEPTION_VECTOR(89) - + MAKE_EXCEPTION_VECTOR(90) MAKE_EXCEPTION_VECTOR(91) MAKE_EXCEPTION_VECTOR(92) @@ -163,7 +163,7 @@ MAKE_EXCEPTION_VECTOR(96) MAKE_EXCEPTION_VECTOR(97) MAKE_EXCEPTION_VECTOR(98) MAKE_EXCEPTION_VECTOR(99) - + MAKE_EXCEPTION_VECTOR(100) MAKE_EXCEPTION_VECTOR(101) MAKE_EXCEPTION_VECTOR(102) @@ -174,7 +174,7 @@ MAKE_EXCEPTION_VECTOR(106) MAKE_EXCEPTION_VECTOR(107) MAKE_EXCEPTION_VECTOR(108) MAKE_EXCEPTION_VECTOR(109) - + MAKE_EXCEPTION_VECTOR(110) MAKE_EXCEPTION_VECTOR(111) MAKE_EXCEPTION_VECTOR(112) @@ -196,7 +196,7 @@ MAKE_EXCEPTION_VECTOR(126) MAKE_EXCEPTION_VECTOR(127) MAKE_EXCEPTION_VECTOR(128) MAKE_EXCEPTION_VECTOR(129) - + MAKE_EXCEPTION_VECTOR(130) MAKE_EXCEPTION_VECTOR(131) MAKE_EXCEPTION_VECTOR(132) @@ -207,7 +207,7 @@ MAKE_EXCEPTION_VECTOR(136) MAKE_EXCEPTION_VECTOR(137) MAKE_EXCEPTION_VECTOR(138) MAKE_EXCEPTION_VECTOR(139) - + MAKE_EXCEPTION_VECTOR(140) MAKE_EXCEPTION_VECTOR(141) MAKE_EXCEPTION_VECTOR(142) @@ -218,7 +218,7 @@ MAKE_EXCEPTION_VECTOR(146) MAKE_EXCEPTION_VECTOR(147) MAKE_EXCEPTION_VECTOR(148) MAKE_EXCEPTION_VECTOR(149) - + MAKE_EXCEPTION_VECTOR(150) MAKE_EXCEPTION_VECTOR(151) MAKE_EXCEPTION_VECTOR(152) @@ -229,7 +229,7 @@ MAKE_EXCEPTION_VECTOR(156) MAKE_EXCEPTION_VECTOR(157) MAKE_EXCEPTION_VECTOR(158) MAKE_EXCEPTION_VECTOR(159) - + MAKE_EXCEPTION_VECTOR(160) MAKE_EXCEPTION_VECTOR(161) MAKE_EXCEPTION_VECTOR(162) @@ -240,7 +240,7 @@ MAKE_EXCEPTION_VECTOR(166) MAKE_EXCEPTION_VECTOR(167) MAKE_EXCEPTION_VECTOR(168) MAKE_EXCEPTION_VECTOR(169) - + MAKE_EXCEPTION_VECTOR(170) MAKE_EXCEPTION_VECTOR(171) MAKE_EXCEPTION_VECTOR(172) @@ -251,7 +251,7 @@ MAKE_EXCEPTION_VECTOR(176) MAKE_EXCEPTION_VECTOR(177) MAKE_EXCEPTION_VECTOR(178) MAKE_EXCEPTION_VECTOR(179) - + MAKE_EXCEPTION_VECTOR(180) MAKE_EXCEPTION_VECTOR(181) MAKE_EXCEPTION_VECTOR(182) @@ -262,7 +262,7 @@ MAKE_EXCEPTION_VECTOR(186) MAKE_EXCEPTION_VECTOR(187) MAKE_EXCEPTION_VECTOR(188) MAKE_EXCEPTION_VECTOR(189) - + MAKE_EXCEPTION_VECTOR(190) MAKE_EXCEPTION_VECTOR(191) MAKE_EXCEPTION_VECTOR(192) @@ -273,7 +273,7 @@ MAKE_EXCEPTION_VECTOR(196) MAKE_EXCEPTION_VECTOR(197) MAKE_EXCEPTION_VECTOR(198) MAKE_EXCEPTION_VECTOR(199) - + MAKE_EXCEPTION_VECTOR(200) MAKE_EXCEPTION_VECTOR(201) MAKE_EXCEPTION_VECTOR(202) @@ -284,7 +284,7 @@ MAKE_EXCEPTION_VECTOR(206) MAKE_EXCEPTION_VECTOR(207) MAKE_EXCEPTION_VECTOR(208) MAKE_EXCEPTION_VECTOR(209) - + MAKE_EXCEPTION_VECTOR(210) MAKE_EXCEPTION_VECTOR(211) MAKE_EXCEPTION_VECTOR(212) @@ -295,7 +295,7 @@ MAKE_EXCEPTION_VECTOR(216) MAKE_EXCEPTION_VECTOR(217) MAKE_EXCEPTION_VECTOR(218) MAKE_EXCEPTION_VECTOR(219) - + MAKE_EXCEPTION_VECTOR(220) MAKE_EXCEPTION_VECTOR(221) MAKE_EXCEPTION_VECTOR(222) @@ -306,7 +306,7 @@ MAKE_EXCEPTION_VECTOR(226) MAKE_EXCEPTION_VECTOR(227) MAKE_EXCEPTION_VECTOR(228) MAKE_EXCEPTION_VECTOR(229) - + MAKE_EXCEPTION_VECTOR(230) MAKE_EXCEPTION_VECTOR(231) MAKE_EXCEPTION_VECTOR(232) @@ -317,7 +317,7 @@ MAKE_EXCEPTION_VECTOR(236) MAKE_EXCEPTION_VECTOR(237) MAKE_EXCEPTION_VECTOR(238) MAKE_EXCEPTION_VECTOR(239) - + MAKE_EXCEPTION_VECTOR(240) MAKE_EXCEPTION_VECTOR(241) MAKE_EXCEPTION_VECTOR(242) @@ -328,20 +328,20 @@ MAKE_EXCEPTION_VECTOR(246) MAKE_EXCEPTION_VECTOR(247) MAKE_EXCEPTION_VECTOR(248) MAKE_EXCEPTION_VECTOR(249) - + MAKE_EXCEPTION_VECTOR(250) MAKE_EXCEPTION_VECTOR(251) MAKE_EXCEPTION_VECTOR(252) MAKE_EXCEPTION_VECTOR(253) MAKE_EXCEPTION_VECTOR(254) -MAKE_EXCEPTION_VECTOR(255) +MAKE_EXCEPTION_VECTOR(255) | | Start | | Entered from a hardware reset. | - + .global start | Default entry point for GNU start: @@ -368,27 +368,27 @@ start: | watch for sign extended maths with the linker on (boot_phase_1-V___ISSP) | manage the address with code, limited address of 2K at reset for CS0 | - + move.l #boot_phase_1,%d0 and.l #0x1FFF,%d0 move.l %d0,%a0 jsr %a0@(0) | programs all basic 302 registers - + | | Map to the 68302 registers | - + move.l #MC68302_BASE,%a5 - + | | Make a vector table in RAM | - + move.l #RAM_BASE,%a0 | a0 -> rom vector table moveal #ROM_BASE,%a1 | d1 -> start of tmp SRAM - + move.l #255,%d0 - + copy_vec_table: move.l (%a0)+,%d1 @@ -397,7 +397,7 @@ copy_vec_table: subq.l #1,%d0 bne copy_vec_table -#if defined(SYSTEM_TABLE_ANCHOR_OFFSET) +#if defined(SYSTEM_TABLE_ANCHOR_OFFSET) | | Clear the system table | @@ -405,11 +405,11 @@ copy_vec_table: move.l #SYSTEM_TABLE_ANCHOR_OFFSET,%a0 move.l #0,(%a0) #endif - + | | Copy the chip select swap code to DPRAM and run it | - + move.l #boot_phase_2,%d0 and.l #(ROM_SIZE - 1),%d0 move.l %d0,%a0 | a0 -> remap code @@ -418,7 +418,7 @@ copy_vec_table: move.l #boot_phase_3,%d0 and.l #(ROM_SIZE - 1),%d0 sub.l %a0,%d0 - + copy_remap: move.b (%a0)+,(%a1)+ | copy dbra %d0,copy_remap @@ -432,9 +432,9 @@ copy_remap: | | Map to the 68302 registers | - + move.l #MC68302_BASE,%a5 - + | | Copy initialized data area from ROM to RAM | @@ -443,13 +443,13 @@ copy_data: moveal #_etext,%a0 | find the end of .text moveal #_copy_start,%a1 | find the beginning of .data moveal #_edata,%a2 | find the end of .data - + copy_data_loop: - + movel %a0@+,%a1@+ | copy the data cmpal %a2,%a1 jlt copy_data_loop | loop until edata reached - + | | zero out uninitialized data area | @@ -458,16 +458,16 @@ zerobss: moveal #_clear_end,%a0 | find end of .bss moveal #_clear_start,%a1 | find beginning of .bss moveq #0,%d0 - + zerobss_loop: - + movel %d0,%a1@+ | to zero out uninitialized cmpal %a0,%a1 jlt zerobss_loop | loop until _end reached movel #stack_end,%d0 andl #0xfffffffc,%d0 | align it on 16 byte boundary - + movw #0x3700,%sr | SUPV MODE,INTERRUPTS OFF!!! movel %d0,%a7 | set master stack pointer movel %d0,%a6 | set base pointer @@ -478,17 +478,17 @@ zerobss_loop: | Create an unhandled exception jump table. The table has an entry for | each vector in the vector table. The entry pushes the vector number onto | the stack and then calls a common exception handler using PIC. -| +| | The macros are to create the labels and format vectors. | - + #define FORMAT_ID(n) (n << 2) #define EXPAND(x) x #define EXCEPTION_HANDLER(h, n) EH__##n: move.w EXPAND(h) FORMAT_ID(n),-(%sp) ; \ bra common_exception_handler unhandled_exception: - + EXCEPTION_HANDLER(#, 0) EXCEPTION_HANDLER(#, 1) EXCEPTION_HANDLER(#, 2) @@ -499,7 +499,7 @@ EXCEPTION_HANDLER(#, 6) EXCEPTION_HANDLER(#, 7) EXCEPTION_HANDLER(#, 8) EXCEPTION_HANDLER(#, 9) - + EXCEPTION_HANDLER(#, 10) EXCEPTION_HANDLER(#, 11) EXCEPTION_HANDLER(#, 12) @@ -521,7 +521,7 @@ EXCEPTION_HANDLER(#, 26) EXCEPTION_HANDLER(#, 27) EXCEPTION_HANDLER(#, 28) EXCEPTION_HANDLER(#, 29) - + EXCEPTION_HANDLER(#, 30) EXCEPTION_HANDLER(#, 31) EXCEPTION_HANDLER(#, 32) @@ -532,7 +532,7 @@ EXCEPTION_HANDLER(#, 36) EXCEPTION_HANDLER(#, 37) EXCEPTION_HANDLER(#, 38) EXCEPTION_HANDLER(#, 39) - + EXCEPTION_HANDLER(#, 40) EXCEPTION_HANDLER(#, 41) EXCEPTION_HANDLER(#, 42) @@ -543,7 +543,7 @@ EXCEPTION_HANDLER(#, 46) EXCEPTION_HANDLER(#, 47) EXCEPTION_HANDLER(#, 48) EXCEPTION_HANDLER(#, 49) - + EXCEPTION_HANDLER(#, 50) EXCEPTION_HANDLER(#, 51) EXCEPTION_HANDLER(#, 52) @@ -554,7 +554,7 @@ EXCEPTION_HANDLER(#, 56) EXCEPTION_HANDLER(#, 57) EXCEPTION_HANDLER(#, 58) EXCEPTION_HANDLER(#, 59) - + EXCEPTION_HANDLER(#, 60) EXCEPTION_HANDLER(#, 61) EXCEPTION_HANDLER(#, 62) @@ -565,7 +565,7 @@ EXCEPTION_HANDLER(#, 66) EXCEPTION_HANDLER(#, 67) EXCEPTION_HANDLER(#, 68) EXCEPTION_HANDLER(#, 69) - + EXCEPTION_HANDLER(#, 70) EXCEPTION_HANDLER(#, 71) EXCEPTION_HANDLER(#, 72) @@ -576,7 +576,7 @@ EXCEPTION_HANDLER(#, 76) EXCEPTION_HANDLER(#, 77) EXCEPTION_HANDLER(#, 78) EXCEPTION_HANDLER(#, 79) - + EXCEPTION_HANDLER(#, 80) EXCEPTION_HANDLER(#, 81) EXCEPTION_HANDLER(#, 82) @@ -587,7 +587,7 @@ EXCEPTION_HANDLER(#, 86) EXCEPTION_HANDLER(#, 87) EXCEPTION_HANDLER(#, 88) EXCEPTION_HANDLER(#, 89) - + EXCEPTION_HANDLER(#, 90) EXCEPTION_HANDLER(#, 91) EXCEPTION_HANDLER(#, 92) @@ -598,7 +598,7 @@ EXCEPTION_HANDLER(#, 96) EXCEPTION_HANDLER(#, 97) EXCEPTION_HANDLER(#, 98) EXCEPTION_HANDLER(#, 99) - + EXCEPTION_HANDLER(#, 100) EXCEPTION_HANDLER(#, 101) EXCEPTION_HANDLER(#, 102) @@ -609,7 +609,7 @@ EXCEPTION_HANDLER(#, 106) EXCEPTION_HANDLER(#, 107) EXCEPTION_HANDLER(#, 108) EXCEPTION_HANDLER(#, 109) - + EXCEPTION_HANDLER(#, 110) EXCEPTION_HANDLER(#, 111) EXCEPTION_HANDLER(#, 112) @@ -631,7 +631,7 @@ EXCEPTION_HANDLER(#, 126) EXCEPTION_HANDLER(#, 127) EXCEPTION_HANDLER(#, 128) EXCEPTION_HANDLER(#, 129) - + EXCEPTION_HANDLER(#, 130) EXCEPTION_HANDLER(#, 131) EXCEPTION_HANDLER(#, 132) @@ -642,7 +642,7 @@ EXCEPTION_HANDLER(#, 136) EXCEPTION_HANDLER(#, 137) EXCEPTION_HANDLER(#, 138) EXCEPTION_HANDLER(#, 139) - + EXCEPTION_HANDLER(#, 140) EXCEPTION_HANDLER(#, 141) EXCEPTION_HANDLER(#, 142) @@ -653,7 +653,7 @@ EXCEPTION_HANDLER(#, 146) EXCEPTION_HANDLER(#, 147) EXCEPTION_HANDLER(#, 148) EXCEPTION_HANDLER(#, 149) - + EXCEPTION_HANDLER(#, 150) EXCEPTION_HANDLER(#, 151) EXCEPTION_HANDLER(#, 152) @@ -664,7 +664,7 @@ EXCEPTION_HANDLER(#, 156) EXCEPTION_HANDLER(#, 157) EXCEPTION_HANDLER(#, 158) EXCEPTION_HANDLER(#, 159) - + EXCEPTION_HANDLER(#, 160) EXCEPTION_HANDLER(#, 161) EXCEPTION_HANDLER(#, 162) @@ -675,7 +675,7 @@ EXCEPTION_HANDLER(#, 166) EXCEPTION_HANDLER(#, 167) EXCEPTION_HANDLER(#, 168) EXCEPTION_HANDLER(#, 169) - + EXCEPTION_HANDLER(#, 170) EXCEPTION_HANDLER(#, 171) EXCEPTION_HANDLER(#, 172) @@ -686,7 +686,7 @@ EXCEPTION_HANDLER(#, 176) EXCEPTION_HANDLER(#, 177) EXCEPTION_HANDLER(#, 178) EXCEPTION_HANDLER(#, 179) - + EXCEPTION_HANDLER(#, 180) EXCEPTION_HANDLER(#, 181) EXCEPTION_HANDLER(#, 182) @@ -697,7 +697,7 @@ EXCEPTION_HANDLER(#, 186) EXCEPTION_HANDLER(#, 187) EXCEPTION_HANDLER(#, 188) EXCEPTION_HANDLER(#, 189) - + EXCEPTION_HANDLER(#, 190) EXCEPTION_HANDLER(#, 191) EXCEPTION_HANDLER(#, 192) @@ -708,7 +708,7 @@ EXCEPTION_HANDLER(#, 196) EXCEPTION_HANDLER(#, 197) EXCEPTION_HANDLER(#, 198) EXCEPTION_HANDLER(#, 199) - + EXCEPTION_HANDLER(#, 200) EXCEPTION_HANDLER(#, 201) EXCEPTION_HANDLER(#, 202) @@ -719,7 +719,7 @@ EXCEPTION_HANDLER(#, 206) EXCEPTION_HANDLER(#, 207) EXCEPTION_HANDLER(#, 208) EXCEPTION_HANDLER(#, 209) - + EXCEPTION_HANDLER(#, 210) EXCEPTION_HANDLER(#, 211) EXCEPTION_HANDLER(#, 212) @@ -730,7 +730,7 @@ EXCEPTION_HANDLER(#, 216) EXCEPTION_HANDLER(#, 217) EXCEPTION_HANDLER(#, 218) EXCEPTION_HANDLER(#, 219) - + EXCEPTION_HANDLER(#, 220) EXCEPTION_HANDLER(#, 221) EXCEPTION_HANDLER(#, 222) @@ -741,7 +741,7 @@ EXCEPTION_HANDLER(#, 226) EXCEPTION_HANDLER(#, 227) EXCEPTION_HANDLER(#, 228) EXCEPTION_HANDLER(#, 229) - + EXCEPTION_HANDLER(#, 230) EXCEPTION_HANDLER(#, 231) EXCEPTION_HANDLER(#, 232) @@ -752,7 +752,7 @@ EXCEPTION_HANDLER(#, 236) EXCEPTION_HANDLER(#, 237) EXCEPTION_HANDLER(#, 238) EXCEPTION_HANDLER(#, 239) - + EXCEPTION_HANDLER(#, 240) EXCEPTION_HANDLER(#, 241) EXCEPTION_HANDLER(#, 242) @@ -763,15 +763,15 @@ EXCEPTION_HANDLER(#, 246) EXCEPTION_HANDLER(#, 247) EXCEPTION_HANDLER(#, 248) EXCEPTION_HANDLER(#, 249) - + EXCEPTION_HANDLER(#, 250) EXCEPTION_HANDLER(#, 251) EXCEPTION_HANDLER(#, 252) EXCEPTION_HANDLER(#, 253) EXCEPTION_HANDLER(#, 254) -EXCEPTION_HANDLER(#, 255) +EXCEPTION_HANDLER(#, 255) -common_exception_handler: +common_exception_handler: | | Need to put the format/vector above the PC and status register @@ -792,14 +792,14 @@ common_exception_handler: beq ceh_10 bra ceh_20 -ceh_10: +ceh_10: move.w %d0,12(%sp) | need to move the format/id move.l (%sp)+,%d0 | recover d0 addq #8,%sp | trash the stack move.l %d0,-(%sp) | free a register, again move.w 4(%sp),%d0 | get the format/vector id - + ceh_20: move.w 6(%sp),4(%sp) @@ -829,7 +829,7 @@ ceh_20: move.l %d0,%a0 | need an address register for jumping jsr %a0@(0) -ceh_30: +ceh_30: jmp ceh_30 | @@ -840,17 +840,17 @@ ceh_30: .global vector_table -vector_table: +vector_table: .space (256 * 4),0 -| +| | Initialised data | .sect .data - + .global start_frame - + start_frame: .space 4,0 @@ -860,10 +860,10 @@ start_frame: | .sect .bss - + .global environ .align 2 - + environ: .long 0 @@ -873,7 +873,7 @@ environ: .global stack_size .set stack_size,0x1000 .global stack_start - + stack_start: stack_base: .space 0x2000, 0 diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/bspstart.c b/c/src/lib/libbsp/m68k/ods68302/startup/bspstart.c index eb5bde8e54..09c38108d0 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ @@ -54,7 +54,7 @@ void bsp_start( void ) extern unsigned long _M68k_Ramsize; _M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */ - + #if 0 Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/; #endif diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c b/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c index 29fdcf9de9..25fd3ddc75 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c @@ -26,9 +26,9 @@ This code executes with a valid C environment. That is the data section has been intialised and the bss section set to 0. This phase performs any special card initialisation and then calls boot card. - + $Id$ - + */ /*****************************************************************************/ @@ -62,12 +62,12 @@ void boot_phase_1() WRITE_OR(CSEL_1, CSEL_1_SIZE, CSEL_1_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); WRITE_BR(CSEL_1, CSEL_1_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED); #endif - + #if defined(CSEL_2) WRITE_OR(CSEL_2, CSEL_2_SIZE, CSEL_2_WAIT_STATES, OR_MASK_RW, OR_MASK_FC); WRITE_BR(CSEL_2, CSEL_2_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED); #endif - + m302.reg.ipr = m302.reg.imr = m302.reg.isr = 0; m302.reg.gimr = 0x0080; @@ -86,7 +86,7 @@ void boot_phase_1() #if defined(LED_CONTROL) LED_CONTROL(LED_1_RED, LED_2_OFF, LED_3_OFF, LED_4_OFF, LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF); -#endif +#endif } /* @@ -96,15 +96,15 @@ void boot_phase_1() void boot_phase_2(void) { uint32_t stack; - + #if defined(LED_CONTROL) LED_CONTROL(LED_1_RED, LED_2_RED, LED_3_OFF, LED_4_OFF, LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF); #endif - + WRITE_BR(CSEL_ROM, _ROM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED); WRITE_BR(CSEL_RAM, _RAM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED); - + #if defined(LED_CONTROL) LED_CONTROL(LED_1_GREEN, LED_2_RED, LED_3_OFF, LED_4_OFF, LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF); @@ -130,11 +130,11 @@ void boot_phase_3(void) set_debug_traps(); breakpoint(); } - + debug_port_banner(); - + /* FIXME : add RAM and ROM checks */ - + /* boot the bsp, what ever this means */ boot_card(); diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/debugport.c b/c/src/lib/libbsp/m68k/ods68302/startup/debugport.c index be9da857b5..7ef16eb9a8 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/debugport.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/debugport.c @@ -3,7 +3,7 @@ High Level Debug Port Functions $Id$ - + */ /*****************************************************************************/ @@ -28,10 +28,10 @@ unsigned char debug_port_status(const unsigned char status) { if (!initialised) { - initialised = 1; + initialised = 1; debug_port_initialise(); } - + return scc_status(CONSOLE_PORT, status); } @@ -39,10 +39,10 @@ unsigned char debug_port_in(void) { if (!initialised) { - initialised = 1; + initialised = 1; debug_port_initialise(); } - + return scc_in(CONSOLE_PORT); } @@ -50,10 +50,10 @@ void debug_port_out(const unsigned char character) { if (!initialised) { - initialised = 1; + initialised = 1; debug_port_initialise(); } - + scc_out(CONSOLE_PORT, character); } @@ -137,7 +137,7 @@ void debug_port_printf(const char *format, ...) written = vsprintf(buffer, format, args); /* try an trap format buffer overflows */ - if ((buffer[BUFFER_SIZE - 2] != '\xAA') || + if ((buffer[BUFFER_SIZE - 2] != '\xAA') || (buffer[BUFFER_SIZE - 1] != '\x55')) { debug_port_write("debug port buffer overflow, halting..."); @@ -155,7 +155,7 @@ void debug_port_printf(const char *format, ...) void debug_port_banner(void) { #define CARD_LABEL "ods68302-" #VARIANT - + debug_port_write("\n\n\r"); debug_port_write(_Copyright_Notice); debug_port_write("\n\r " CARD_ID "\n\r"); diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/gdb-hooks.c b/c/src/lib/libbsp/m68k/ods68302/startup/gdb-hooks.c index 3c3cb72582..957535389a 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/gdb-hooks.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/gdb-hooks.c @@ -1,7 +1,7 @@ /*****************************************************************************/ /* $Id$ - + Hooks for GDB */ @@ -21,7 +21,7 @@ void putDebugChar(char ch) scc_initialise(DEBUG_PORT, DEBUG_BAUD, 0); initialised = 1; } - + scc_out(DEBUG_PORT, ch); } @@ -34,8 +34,8 @@ char getDebugChar(void) } while (!scc_status(DEBUG_PORT, 0)); - - return scc_in(DEBUG_PORT); + + return scc_in(DEBUG_PORT); } /* @@ -65,7 +65,7 @@ static GDB_HANDLER_ENTRY gdb_jump_table[256]; void exceptionHandler(unsigned int vector, void *handler) { uint32_t *interrupt_table = 0; - + gdb_jump_table[vector].move_a7 = M68K_MOVE_A7; gdb_jump_table[vector].format_id = vector; gdb_jump_table[vector].jmp = M68K_JMP; diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/m68302scc.c b/c/src/lib/libbsp/m68k/ods68302/startup/m68302scc.c index 542ad8d9ad..4b7c7d9440 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/m68302scc.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/m68302scc.c @@ -1,7 +1,7 @@ /*****************************************************************************/ /* $Id$ - + M68302 SCC Polled Driver */ @@ -27,29 +27,29 @@ static const uint16_t baud_clocks[] = (SYSTEM_CLOCK / ( 57600 * 16)), (SYSTEM_CLOCK / (115700 * 16)) }; - + void scc_initialise(int channel, int baud, int translate) { uint16_t scon; - + if (channel < M68302_SCC_COUNT) { scc[channel] = &m302.scc1 + channel; scc_reg[channel] = &m302.reg.scc[channel]; scc_translate[channel] = translate; - + scon = (baud_clocks[baud] & 0xF800) == 0 ? 0 : 1; scon |= (((baud_clocks[baud] / (1 + scon * 3)) - 1) << 1) & 0x0FFE; - + scc_reg[channel]->scon = scon; scc_reg[channel]->scm = 0x0171; - scc[channel]->bd.tx[0].status = 0x2000; + scc[channel]->bd.tx[0].status = 0x2000; scc[channel]->bd.tx[0].length = 0; scc[channel]->bd.tx[0].buffer = (uint8_t*) &(scc[channel]->bd.tx[1].buffer); - scc[channel]->bd.rx[0].status = 0x2000; + scc[channel]->bd.rx[0].status = 0x2000; scc[channel]->bd.rx[0].length = 0; scc[channel]->bd.rx[0].buffer = (uint8_t*) &(scc[channel]->bd.rx[1].buffer); @@ -73,7 +73,7 @@ void scc_initialise(int channel, int baud, int translate) scc_reg[channel]->sccm = 0x15; scc_reg[channel]->scm = 0x17d; - } + } } unsigned char scc_status(int channel, unsigned char status) @@ -84,7 +84,7 @@ unsigned char scc_status(int channel, unsigned char status) if ((channel < M68302_SCC_COUNT) && scc[channel]) { - rx_status = scc[channel]->bd.rx[0].status; + rx_status = scc[channel]->bd.rx[0].status; if ((rx_status & 0x8000) == 0) { @@ -98,7 +98,7 @@ unsigned char scc_status(int channel, unsigned char status) } } } - + return 0; } @@ -115,11 +115,11 @@ unsigned char scc_in(int channel) c = *(scc[channel]->bd.rx[0].buffer); scc[channel]->bd.rx[0].status = 0xa000; - + return c; } } - + return 0; } @@ -139,11 +139,11 @@ void scc_out(int channel, unsigned char character) scc[channel]->bd.tx[0].status = 0xa000; if (scc_translate[channel]) - { + { if (character == '\n') - { + { scc_out(channel, '\r'); } } - } + } } diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/m68k-stub.c b/c/src/lib/libbsp/m68k/ods68302/startup/m68k-stub.c index cf9b4c2e39..95e404677f 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/m68k-stub.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/m68k-stub.c @@ -1,9 +1,9 @@ /**************************************************************************** - THIS SOFTWARE IS NOT COPYRIGHTED - + THIS SOFTWARE IS NOT COPYRIGHTED + HP offers the following for use in the public domain. HP makes no - warranty with regard to the software or it's performance and the + warranty with regard to the software or it's performance and the user accepts the software "AS IS" with all faults. HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD @@ -13,22 +13,22 @@ ****************************************************************************/ /**************************************************************************** - * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ + * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ * - * Module name: remcom.c $ + * Module name: remcom.c $ * Revision: 1.34 $ * Date: 91/03/09 12:29:49 $ * Contributor: Lake Stevens Instrument Division$ - * + * * Description: low level support for gdb debugger. $ * * Considerations: only works on target hardware $ * * Written by: Glenn Engel $ - * ModuleState: Experimental $ + * ModuleState: Experimental $ * * NOTES: See Below $ - * + * * To enable debugger support, two things need to happen. One, a * call to set_debug_traps() is necessary in order to allow any breakpoints * or error conditions to be properly intercepted and reported to gdb. @@ -39,15 +39,15 @@ * there either should be a standard breakpoint instruction, or the protocol * should be extended to provide some means to communicate which breakpoint * instruction is in use (or have the stub insert the breakpoint). - * + * * Some explanation is probably necessary to explain how exceptions are * handled. When an exception is encountered the 68000 pushes the current * program counter and status register onto the supervisor stack and then * transfers execution to a location specified in it's vector table. * The handlers for the exception vectors are hardwired to jmp to an address - * given by the relation: (exception - 256) * 6. These are decending + * given by the relation: (exception - 256) * 6. These are decending * addresses starting from -6, -12, -18, ... By allowing 6 bytes for - * each entry, a jsr, jmp, bsr, ... can be used to enter the exception + * each entry, a jsr, jmp, bsr, ... can be used to enter the exception * handler. Using a jsr to handle an exception has an added benefit of * allowing a single handler to service several exceptions and use the * return address as the key differentiation. The vector number can be @@ -59,50 +59,50 @@ * For 68020 machines, the ability to have a return address around just * so the vector can be determined is not necessary because the '020 pushes an * extra word onto the stack containing the vector offset - * + * * Because gdb will sometimes write to the stack area to execute function * calls, this program cannot rely on using the supervisor stack so it - * uses it's own stack area reserved in the int array remcomStack. - * + * uses it's own stack area reserved in the int array remcomStack. + * ************* * * The following gdb commands are supported: - * + * * command function Return value - * + * * g return the value of the CPU registers hex data or ENN * G set the value of the CPU registers OK or ENN - * + * * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN - * + * * c Resume at current address SNN ( signal NN) * cAA..AA Continue at address AA..AA SNN - * + * * s Step one instruction SNN * sAA..AA Step one instruction from AA..AA SNN - * + * * k kill * * ? What was the last sigval ? SNN (signal NN) - * - * All commands and responses are sent with a packet which includes a - * checksum. A packet consists of - * + * + * All commands and responses are sent with a packet which includes a + * checksum. A packet consists of + * * $<packet info>#<checksum>. - * + * * where * <packet info> :: <characters representing the command or response> * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>> - * + * * When a packet is received, it is first acknowledged with either '+' or '-'. * '+' indicates a successful transfer. '-' indicates a failed transfer. - * + * * Example: - * + * * Host: Reply: * $m0,10#2a +$00010203040506070809101112131415#42 - * + * * $Id$ * ****************************************************************************/ @@ -116,7 +116,7 @@ /************************************************************************ * - * external low-level support routines + * external low-level support routines */ typedef void (*ExceptionHook)(int); /* pointer to function with int parm */ typedef void (*Function)(void); /* pointer to a function */ @@ -153,15 +153,15 @@ void breakpoint(void); static char initialized; /* boolean flag. != 0 means we've been initialized */ int remote_debug; -/* debug > 0 prints ill-formed commands in valid packets & checksum errors */ +/* debug > 0 prints ill-formed commands in valid packets & checksum errors */ static const char hexchars[]="0123456789abcdef"; /* there are 180 bytes of registers on a 68020 w/68881 */ /* many of the fpa registers are 12 byte (96 bit) registers */ #define NUMREGBYTES 180 -enum regnames {D0,D1,D2,D3,D4,D5,D6,D7, - A0,A1,A2,A3,A4,A5,A6,A7, +enum regnames {D0,D1,D2,D3,D4,D5,D6,D7, + A0,A1,A2,A3,A4,A5,A6,A7, PS,PC, FP0,FP1,FP2,FP3,FP4,FP5,FP6,FP7, FPCONTROL,FPSTATUS,FPIADDR @@ -205,7 +205,7 @@ static int* stackPtr = &remcomStack[STACKSIZE/sizeof(int) - 1]; /* * In many cases, the system will want to continue exception processing - * when a continue command is given. + * when a continue command is given. * oldExceptionHook is a function to invoke in this case. */ @@ -351,11 +351,11 @@ extern void _catchException(void); * stack on entry: stack on exit: * N bytes of junk exception # MSWord * Exception Format Word exception # MSWord - * Program counter LSWord - * Program counter MSWord - * Status Register - * - * + * Program counter LSWord + * Program counter MSWord + * Status Register + * + * */ asm(" \n\ .text\n\ @@ -371,7 +371,7 @@ asm("\n\ moveml %d0-%d7/%a0-%a6,registers /* save registers */\n\ movel lastFrame,%a0 /* last frame pointer */\n\ "); -SAVE_FP_REGS(); +SAVE_FP_REGS(); asm("\n\ lea registers,%a5 /* get address of registers */\n\ movew %sp@,%d1 /* get status register */\n\ @@ -445,14 +445,14 @@ a7saveDone:\n\ /* This function is called when an exception occurs. It translates the * return address found on the stack into an exception vector # which * is then handled by either handle_exception or a system handler. - * _catchException provides a front end for both. + * _catchException provides a front end for both. * * stack on entry: stack on exit: - * Program counter MSWord exception # MSWord + * Program counter MSWord exception # MSWord * Program counter LSWord exception # MSWord - * Status Register - * Return Address MSWord - * Return Address LSWord + * Status Register + * Return Address MSWord + * Return Address LSWord */ asm("\n\ .text\n\ @@ -466,7 +466,7 @@ asm("\n\ movel lastFrame,%a0 /* last frame pointer */\n\ "); -SAVE_FP_REGS(); +SAVE_FP_REGS(); asm("\n\ moveq.l #0,%d2\n\ movew %sp@+,%d2\n\ @@ -566,7 +566,7 @@ void _returnFromException(Frame *frame) frame->pc = registers[(int) PC]; if (registers[(int) PS] & 0x2000) - { + { /* return to supervisor mode... */ return_to_super(); } @@ -592,15 +592,15 @@ void getpacket(char *buffer) int i; int count; char ch; - + do { /* wait around for the start character, ignore all other characters */ - while ((ch = (getDebugChar() & 0x7f)) != '$'); + while ((ch = (getDebugChar() & 0x7f)) != '$'); checksum = 0; xmitcsum = -1; - + count = 0; - + /* now, read until a # or end of buffer is found */ while (count < BUFMAX) { ch = getDebugChar() & 0x7f; @@ -618,8 +618,8 @@ void getpacket(char *buffer) debug_port_printf ("bad checksum. My count = 0x%x, sent=0x%x. buf=%s\n", checksum,xmitcsum,buffer); } - - if (checksum != xmitcsum) putDebugChar('-'); /* failed checksum */ + + if (checksum != xmitcsum) putDebugChar('-'); /* failed checksum */ else { putDebugChar('+'); /* successful transfer */ /* if a sequence char is present, reply the sequence ID */ @@ -629,13 +629,13 @@ void getpacket(char *buffer) /* remove sequence chars from buffer */ count = strlen(buffer); for (i=3; i <= count; i++) buffer[i-3] = buffer[i]; - } - } - } - } while (checksum != xmitcsum); + } + } + } + } while (checksum != xmitcsum); } -/* send the packet in buffer. The host get's one chance to read it. +/* send the packet in buffer. The host get's one chance to read it. This routine does not wait for a positive acknowledge. */ @@ -645,25 +645,25 @@ putpacket(char *buffer) unsigned char checksum; int count; char ch; - + /* $<packet info>#<checksum>. */ do { putDebugChar('$'); checksum = 0; count = 0; - + while ((ch=buffer[count])) { if (! putDebugChar(ch)) return; checksum += ch; count += 1; } - + putDebugChar('#'); putDebugChar(hexchars[checksum >> 4]); putDebugChar(hexchars[checksum % 16]); } while (1 == 0); /* (getDebugChar() != '+'); */ - + } char remcomInBuffer[BUFMAX]; @@ -676,16 +676,16 @@ char *mem2hex(char *mem, char *buf, int count) { int i; unsigned char ch; - + if (remote_debug) - debug_port_printf("mem=0x%x, count=0x%x\n", mem, count); - + debug_port_printf("mem=0x%x, count=0x%x\n", mem, count); + for (i=0;i<count;i++) { ch = *mem++; *buf++ = hexchars[ch >> 4]; *buf++ = hexchars[ch % 16]; } - *buf = 0; + *buf = 0; return(buf); } @@ -695,10 +695,10 @@ char *hex2mem(char *buf, char *mem, int count) { int i; unsigned char ch; - + if (remote_debug) - debug_port_printf("mem=0x%x, count=0x%x\n", mem, count); - + debug_port_printf("mem=0x%x, count=0x%x\n", mem, count); + for (i=0;i<count;i++) { ch = hex(*buf++) << 4; ch = ch + hex(*buf++); @@ -715,7 +715,7 @@ void handle_buserror() longjmp(remcomEnv,1); } -/* this function takes the 68000 exception number and attempts to +/* this function takes the 68000 exception number and attempts to translate this number into a unix compatible signal value */ int computeSignal(int exceptionVector) { @@ -752,7 +752,7 @@ int computeSignal(int exceptionVector) case 52: sigval = 8; break; /* operand error */ case 53: sigval = 8; break; /* overflow */ case 54: sigval = 8; break; /* NAN */ - default: + default: sigval = 7; /* "software generated"*/ } return (sigval); @@ -766,7 +766,7 @@ int hexToInt(char **ptr, int *intValue) { int numChars = 0; int hexValue; - + *intValue = 0; while (**ptr) @@ -779,7 +779,7 @@ int hexToInt(char **ptr, int *intValue) } else break; - + (*ptr)++; } @@ -796,11 +796,11 @@ void handle_exception(int exceptionVector) char * ptr; int newPC; Frame *frame; - + if (remote_debug) - printf("vector=%d, sr=0x%x, pc=0x%x\n", + printf("vector=%d, sr=0x%x, pc=0x%x\n", exceptionVector, - registers[ PS ], + registers[ PS ], registers[ PC ]); /* reply to host that an exception has occurred */ @@ -810,9 +810,9 @@ void handle_exception(int exceptionVector) remcomOutBuffer[2] = hexchars[sigval % 16]; remcomOutBuffer[3] = 0; - putpacket(remcomOutBuffer); + putpacket(remcomOutBuffer); - while (1==1) { + while (1==1) { error = 0; remcomOutBuffer[0] = 0; getpacket(remcomInBuffer); @@ -821,19 +821,19 @@ void handle_exception(int exceptionVector) remcomOutBuffer[1] = hexchars[sigval >> 4]; remcomOutBuffer[2] = hexchars[sigval % 16]; remcomOutBuffer[3] = 0; - break; + break; case 'd' : remote_debug = !(remote_debug); /* toggle debug flag */ debug_port_printf("debug mode "); if (remote_debug) - { + { debug_port_printf("on\n"); } else - { + { debug_port_printf("off\n"); - } - break; + } + break; case 'g' : /* return the value of the CPU registers */ mem2hex((char*) registers, remcomOutBuffer, NUMREGBYTES); break; @@ -841,18 +841,18 @@ void handle_exception(int exceptionVector) hex2mem(&remcomInBuffer[1], (char*) registers, NUMREGBYTES); strcpy(remcomOutBuffer,"OK"); break; - + /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ - case 'm' : + case 'm' : if (setjmp(remcomEnv) == 0) { - exceptionHandler(2,handle_buserror); + exceptionHandler(2,handle_buserror); /* TRY TO READ %x,%x. IF SUCCEED, SET PTR = 0 */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) if (*(ptr++) == ',') - if (hexToInt(&ptr,&length)) + if (hexToInt(&ptr,&length)) { ptr = 0; mem2hex((char*) addr, remcomOutBuffer, length); @@ -863,24 +863,24 @@ void handle_exception(int exceptionVector) strcpy(remcomOutBuffer,"E01"); if (remote_debug) printf("malformed read memory command: %s",remcomInBuffer); - } - } + } + } else { - exceptionHandler(2,_catchException); + exceptionHandler(2,_catchException); strcpy(remcomOutBuffer,"E03"); if (remote_debug) printf("bus error"); - } - + } + /* restore handler for bus error */ - exceptionHandler(2,_catchException); + exceptionHandler(2,_catchException); break; - + /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ - case 'M' : + case 'M' : if (setjmp(remcomEnv) == 0) { - exceptionHandler(2,handle_buserror); - + exceptionHandler(2,handle_buserror); + /* TRY TO READ '%x,%x:'. IF SUCCEED, SET PTR = 0 */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) @@ -897,43 +897,43 @@ void handle_exception(int exceptionVector) strcpy(remcomOutBuffer,"E02"); if (remote_debug) printf("malformed write memory command: %s",remcomInBuffer); - } - } + } + } else { - exceptionHandler(2,_catchException); + exceptionHandler(2,_catchException); strcpy(remcomOutBuffer,"E03"); if (remote_debug) printf("bus error"); - } + } /* restore handler for bus error */ - exceptionHandler(2,_catchException); + exceptionHandler(2,_catchException); break; - + /* cAA..AA Continue at address AA..AA(optional) */ /* sAA..AA Step one instruction from AA..AA(optional) */ - case 'c' : - case 's' : + case 'c' : + case 's' : /* try to read optional parameter, pc unchanged if no parm */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) registers[ PC ] = addr; - + newPC = registers[ PC]; - + /* clear the trace bit */ registers[ PS ] &= 0x7fff; - + /* set the trace bit if we're stepping */ if (remcomInBuffer[0] == 's') registers[ PS ] |= 0x8000; - + /* * look for newPC in the linked list of exception frames. * if it is found, use the old frame it. otherwise, * fake up a dummy frame in returnFromException(). */ if (remote_debug) debug_port_printf("new pc = 0x%x\n",newPC); - + frame = lastFrame; while (frame) { @@ -951,24 +951,24 @@ void handle_exception(int exceptionVector) (frame->exceptionPC == newPC)) break; if (frame == frame->previous) { - frame = 0; /* no match found */ - break; + frame = 0; /* no match found */ + break; } frame = frame->previous; } - + /* * If we found a match for the PC AND we are not returning * as a result of a breakpoint (33), * trace exception (9), nmi (31), jmp to * the old exception handler as if this code never ran. */ - if (frame) + if (frame) { - if ((frame->exceptionVector != 9) && - (frame->exceptionVector != 31) && + if ((frame->exceptionVector != 9) && + (frame->exceptionVector != 31) && (frame->exceptionVector != 33)) - { + { /* * invoke the previous handler. */ @@ -986,13 +986,13 @@ void handle_exception(int exceptionVector) _returnFromException( frame ); /* this is a jump */ } } - } + } /* if we couldn't find a frame, create one */ if (frame == 0) { frame = lastFrame -1 ; - + /* by using a bunch of print commands with breakpoints, it's possible for the frame stack to creep down. If it creeps too far, give up and reset it to the top. Normal use should @@ -1001,28 +1001,28 @@ void handle_exception(int exceptionVector) if ((unsigned int) (frame-2) < (unsigned int) &gdbFrameStack) { initializeRemcomErrorFrame(); - frame = lastFrame; + frame = lastFrame; } frame->previous = lastFrame; lastFrame = frame; - frame = 0; /* null so _return... will properly initialize it */ - } - + frame = 0; /* null so _return... will properly initialize it */ + } + _returnFromException( frame ); /* this is a jump */ break; - + /* kill the program */ case 'k' : /* reset the board */ WATCHDOG_TRIGGER(); while (1 == 1); break; - - } /* switch */ - + + } /* switch */ + /* reply to the request */ - putpacket(remcomOutBuffer); + putpacket(remcomOutBuffer); } } @@ -1033,13 +1033,13 @@ void initializeRemcomErrorFrame() lastFrame->previous = lastFrame; } -/* this function is used to set up exception handlers for tracing and +/* this function is used to set up exception handlers for tracing and breakpoints */ void set_debug_traps() { extern void _debug_level7(void); extern void remcomHandler(void); - + int exception; initializeRemcomErrorFrame(); @@ -1047,39 +1047,39 @@ void set_debug_traps() registers[ PC ] = 0x400; registers[ PS ] = 0x2700; - + for (exception = 2; exception <= 30; exception++) - exceptionHandler(exception,_catchException); + exceptionHandler(exception,_catchException); /* level 7 interrupt */ - exceptionHandler(31,_debug_level7); - + exceptionHandler(31,_debug_level7); + for (exception = 32; exception <= 47; exception++) - exceptionHandler(exception,_catchException); + exceptionHandler(exception,_catchException); /* exclude the unassigned, reserved vector locations */ - + for (exception = 64; exception <= 255; exception++) - exceptionHandler(exception,_catchException); + exceptionHandler(exception,_catchException); if (oldExceptionHook != (ExceptionHook) remcomHandler) { oldExceptionHook = exceptionHook; exceptionHook = (ExceptionHook) remcomHandler; } - + initialized = 1; -#if defined(UPDATE_DISPLAY) +#if defined(UPDATE_DISPLAY) UPDATE_DISPLAY("gdb "); -#endif +#endif } /* This function will generate a breakpoint exception. It is used at the beginning of a program to sync up with a debugger and can be used otherwise as a quick means to stop program execution and "break" into the debugger. */ - + void breakpoint() { if (initialized) BREAKPOINT(); diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/memcheck.c b/c/src/lib/libbsp/m68k/ods68302/startup/memcheck.c index 4341a88e37..140a62e1e5 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/memcheck.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/memcheck.c @@ -8,7 +8,7 @@ The boot test is a minimal, non-desctructive. The partial memory test performs a scetion at a time, and gets called in a repeated fashion to completely check the memory, - + */ /*****************************************************************************/ diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/trace.c b/c/src/lib/libbsp/m68k/ods68302/startup/trace.c index a712c0bb52..7d0945bc9a 100644 --- a/c/src/lib/libbsp/m68k/ods68302/startup/trace.c +++ b/c/src/lib/libbsp/m68k/ods68302/startup/trace.c @@ -1,7 +1,7 @@ /*****************************************************************************/ /* $Id$ - + Trace Exception dumps a back trace to the debug serial port */ @@ -135,13 +135,13 @@ void trace_exception(unsigned long d0, } else { - debug_port_out(' '); + debug_port_out(' '); } - + ch = (*(((char*) &index) + index) >> 4) & 0x0F; - + if (ch < 10) - { + { ch += '0'; } else @@ -152,9 +152,9 @@ void trace_exception(unsigned long d0, debug_port_out((char) ch); ch = *(((char*) &index) + index) & 0x0F; - + if (ch < 10) - { + { ch += '0'; } else @@ -167,9 +167,9 @@ void trace_exception(unsigned long d0, debug_port_write("\nhalting cpu..."); #if defined(UPDATE_DISPLAY) - UPDATE_DISPLAY("HALT"); + UPDATE_DISPLAY("HALT"); #endif - + WATCHDOG_TRIGGER(); while (1 == 1); } diff --git a/c/src/lib/libbsp/m68k/ods68302/timer/timer.c b/c/src/lib/libbsp/m68k/ods68302/timer/timer.c index 6e53830bdf..b3927487c7 100644 --- a/c/src/lib/libbsp/m68k/ods68302/timer/timer.c +++ b/c/src/lib/libbsp/m68k/ods68302/timer/timer.c @@ -6,7 +6,7 @@ * * Output parameters: NONE * - * NOTE: It is important that the timer start/stop overhead be + * NOTE: It is important that the timer start/stop overhead be * determined when porting or modifying this code. * * COPYRIGHT (c) 1989-1999. diff --git a/c/src/lib/libbsp/m68k/shared/bspspuriousinit.c b/c/src/lib/libbsp/m68k/shared/bspspuriousinit.c index db17841227..86ae13a3f1 100644 --- a/c/src/lib/libbsp/m68k/shared/bspspuriousinit.c +++ b/c/src/lib/libbsp/m68k/shared/bspspuriousinit.c @@ -1,7 +1,7 @@ /* * CXX Spurious Trap Handler Install Routine * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. @@ -20,7 +20,7 @@ /* * bsp_spurious_initialize * - * Install the spurious handler for most vectors. + * Install the spurious handler for most vectors. */ rtems_isr bsp_spurious_handler( diff --git a/c/src/lib/libbsp/m68k/shared/gdbstub/gdb_if.h b/c/src/lib/libbsp/m68k/shared/gdbstub/gdb_if.h index 6d7b94effb..5dbb72185c 100644 --- a/c/src/lib/libbsp/m68k/shared/gdbstub/gdb_if.h +++ b/c/src/lib/libbsp/m68k/shared/gdbstub/gdb_if.h @@ -55,7 +55,7 @@ int rtems_gdb_stub_get_current_thread(void); int rtems_gdb_stub_get_next_thread(int); int rtems_gdb_stub_get_offsets( unsigned char **text_addr, - unsigned char **data_addr, + unsigned char **data_addr, unsigned char **bss_addr ); int rtems_gdb_stub_get_thread_regs( @@ -66,7 +66,7 @@ int rtems_gdb_stub_set_thread_regs( int thread, unsigned int *registers ); -void rtems_gdb_process_query( +void rtems_gdb_process_query( char *inbuffer, char *outbuffer, int do_threads, @@ -77,8 +77,8 @@ void rtems_gdb_process_query( /* there are 180 bytes of registers on a 68020 w/68881 */ /* many of the fpa registers are 12 byte (96 bit) registers */ #define NUMREGBYTES 180 -enum regnames {D0,D1,D2,D3,D4,D5,D6,D7, - A0,A1,A2,A3,A4,A5,A6,A7, +enum regnames {D0,D1,D2,D3,D4,D5,D6,D7, + A0,A1,A2,A3,A4,A5,A6,A7, PS,PC, FP0,FP1,FP2,FP3,FP4,FP5,FP6,FP7, FPCONTROL,FPSTATUS,FPIADDR diff --git a/c/src/lib/libbsp/m68k/shared/gdbstub/m68k-stub.c b/c/src/lib/libbsp/m68k/shared/gdbstub/m68k-stub.c index 4599dba2db..4ad7482f27 100644 --- a/c/src/lib/libbsp/m68k/shared/gdbstub/m68k-stub.c +++ b/c/src/lib/libbsp/m68k/shared/gdbstub/m68k-stub.c @@ -1,10 +1,10 @@ #define GDB_STUB_ENABLE_THREAD_SUPPORT 1 /**************************************************************************** - THIS SOFTWARE IS NOT COPYRIGHTED - + THIS SOFTWARE IS NOT COPYRIGHTED + HP offers the following for use in the public domain. HP makes no - warranty with regard to the software or it's performance and the + warranty with regard to the software or it's performance and the user accepts the software "AS IS" with all faults. HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD @@ -14,22 +14,22 @@ ****************************************************************************/ /**************************************************************************** - * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ + * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ * - * Module name: remcom.c $ + * Module name: remcom.c $ * Revision: 1.34 $ * Date: 91/03/09 12:29:49 $ * Contributor: Lake Stevens Instrument Division$ - * + * * Description: low level support for gdb debugger. $ * * Considerations: only works on target hardware $ * * Written by: Glenn Engel $ - * ModuleState: Experimental $ + * ModuleState: Experimental $ * * NOTES: See Below $ - * + * * To enable debugger support, two things need to happen. One, a * call to set_debug_traps() is necessary in order to allow any breakpoints * or error conditions to be properly intercepted and reported to gdb. @@ -40,15 +40,15 @@ * there either should be a standard breakpoint instruction, or the protocol * should be extended to provide some means to communicate which breakpoint * instruction is in use (or have the stub insert the breakpoint). - * + * * Some explanation is probably necessary to explain how exceptions are * handled. When an exception is encountered the 68000 pushes the current * program counter and status register onto the supervisor stack and then * transfers execution to a location specified in it's vector table. * The handlers for the exception vectors are hardwired to jmp to an address - * given by the relation: (exception - 256) * 6. These are decending + * given by the relation: (exception - 256) * 6. These are decending * addresses starting from -6, -12, -18, ... By allowing 6 bytes for - * each entry, a jsr, jmp, bsr, ... can be used to enter the exception + * each entry, a jsr, jmp, bsr, ... can be used to enter the exception * handler. Using a jsr to handle an exception has an added benefit of * allowing a single handler to service several exceptions and use the * return address as the key differentiation. The vector number can be @@ -60,50 +60,50 @@ * For 68020 machines, the ability to have a return address around just * so the vector can be determined is not necessary because the '020 pushes an * extra word onto the stack containing the vector offset - * + * * Because gdb will sometimes write to the stack area to execute function * calls, this program cannot rely on using the supervisor stack so it - * uses it's own stack area reserved in the int array remcomStack. - * + * uses it's own stack area reserved in the int array remcomStack. + * ************* * * The following gdb commands are supported: - * + * * command function Return value - * + * * g return the value of the CPU registers hex data or ENN * G set the value of the CPU registers OK or ENN - * + * * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN - * + * * c Resume at current address SNN ( signal NN) * cAA..AA Continue at address AA..AA SNN - * + * * s Step one instruction SNN * sAA..AA Step one instruction from AA..AA SNN - * + * * k kill * * ? What was the last sigval ? SNN (signal NN) - * - * All commands and responses are sent with a packet which includes a - * checksum. A packet consists of - * + * + * All commands and responses are sent with a packet which includes a + * checksum. A packet consists of + * * $<packet info>#<checksum>. - * + * * where * <packet info> :: <characters representing the command or response> * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>> - * + * * When a packet is received, it is first acknowledged with either '+' or '-'. * '+' indicates a successful transfer. '-' indicates a failed transfer. - * + * * Example: - * + * * Host: Reply: * $m0,10#2a +$00010203040506070809101112131415#42 - * + * *************************************************************************** * added 05/27/02 by IMD, Thomas Doerfler: * XAA..AA,LLLL: Write LLLL binary bytes at address AA.AA OK or ENN @@ -124,7 +124,7 @@ int current_thread_registers[NUMREGBYTES/4]; /************************************************************************ * - * external low-level support routines + * external low-level support routines */ typedef void (*ExceptionHook)(int); /* pointer to function with int parm */ typedef void (*Function)(); /* pointer to a function */ @@ -148,7 +148,7 @@ initializeRemcomErrorFrame (); static char initialized; /* boolean flag. != 0 means we've been initialized */ int remote_debug; -/* debug > 0 prints ill-formed commands in valid packets & checksum errors */ +/* debug > 0 prints ill-formed commands in valid packets & checksum errors */ const char gdb_hexchars[]="0123456789abcdef"; #define highhex(x) gdb_hexchars [(x >> 4) & 0xf] @@ -193,12 +193,12 @@ static int* stackPtr = &remcomStack[STACKSIZE/sizeof(int) - 1]; /* * In many cases, the system will want to continue exception processing - * when a continue command is given. + * when a continue command is given. * oldExceptionHook is a function to invoke in this case. */ static ExceptionHook oldExceptionHook; -/* the size of the exception stack on the 68020/30/40/CPU32 varies with +/* the size of the exception stack on the 68020/30/40/CPU32 varies with * the type of exception. The following table is the number of WORDS used * for each exception format. * This table should be common for all 68k with VBR @@ -217,7 +217,7 @@ jmp_buf remcomEnv; /* do an fsave, then remember the address to begin a restore from */ #define SAVE_FP_REGS() asm(" fsave -(%a0)"); \ asm(" fmovem.x %fp0-%fp7,registers+72"); \ - asm(" fmovem.l %fpcr/%fpsr/%fpi,registers+168"); + asm(" fmovem.l %fpcr/%fpsr/%fpi,registers+168"); #define RESTORE_FP_REGS() \ asm(" \n\ fmovem.l registers+168,%fpcr/%fpsr/%fpi \n\ @@ -255,9 +255,9 @@ void m68k_exceptionHandler ExceptionHook exceptionHook; /* hook variable for errors/exceptions */ -void m68k_stub_dummy_asm_wrapper() +void m68k_stub_dummy_asm_wrapper() /* - * this dummy wrapper function ensures, + * this dummy wrapper function ensures, * that the C compiler manages sections properly */ { @@ -289,9 +289,9 @@ copyUserLoop: \n\ move.w -(%a1),-(%sp) \n\ dbf %d0,copyUserLoop \n\ "); - RESTORE_FP_REGS() - asm(" movem.l registers,%d0-%d7/%a0-%a6"); - asm(" rte"); /* pop and go! */ + RESTORE_FP_REGS() + asm(" movem.l registers,%d0-%d7/%a0-%a6"); + asm(" rte"); /* pop and go! */ #define DISABLE_INTERRUPTS() asm(" oriw #0x0700,%sr"); #define BREAKPOINT() asm(" trap #2"); @@ -333,11 +333,11 @@ asm(" rte"); * stack on entry: stack on exit: * N bytes of junk exception # MSWord * Exception Format Word exception # MSWord - * Program counter LSWord - * Program counter MSWord - * Status Register - * - * + * Program counter LSWord + * Program counter MSWord + * Status Register + * + * */ asm(" \n\ .text \n\ @@ -348,7 +348,7 @@ asm(" \n\ movem.l %d0-%d7/%a0-%a6,registers /* save registers */ \n\ move.l lastFrame,%a0 /* last frame pointer */ \n\ "); -SAVE_FP_REGS(); +SAVE_FP_REGS(); asm("\n\ lea registers,%a5 /* get address of registers */\n\ move.w (%sp),%d1 /* get status register */\n\ @@ -422,14 +422,14 @@ a7saveDone:\n\ /* This function is called when an exception occurs. It translates the * return address found on the stack into an exception vector # which * is then handled by either handle_exception or a system handler. - * _catchException provides a front end for both. + * _catchException provides a front end for both. * * stack on entry: stack on exit: - * Program counter MSWord exception # MSWord + * Program counter MSWord exception # MSWord * Program counter LSWord exception # MSWord - * Status Register - * Return Address MSWord - * Return Address LSWord + * Status Register + * Return Address MSWord + * Return Address LSWord */ asm("\n\ .text\n\ @@ -440,7 +440,7 @@ asm("\ moveml %d0-%d7/%a0-%a6,registers /* save registers */ \n\ movel lastFrame,%a0 /* last frame pointer */ \n\ "); -SAVE_FP_REGS(); +SAVE_FP_REGS(); asm(" \n\ lea registers,%a5 /* get address of registers */ \n\ movel (%sp)+,%d2 /* pop return address */ \n\ @@ -534,7 +534,7 @@ void _returnFromException( Frame *frame ) frame->pc = registers[(int) PC]; if (registers[(int) PS] & 0x2000) - { + { /* return to supervisor mode... */ return_to_super(); } @@ -563,15 +563,15 @@ char * buffer; int i; int count; char ch; - + do { /* wait around for the start character, ignore all other characters */ - while ((ch = getDebugChar()) != '$'); + while ((ch = getDebugChar()) != '$'); checksum = 0; xmitcsum = -1; - + count = 0; - + /* now, read until a # or end of buffer is found */ while (count < BUFMAX) { ch = getDebugChar(); @@ -589,8 +589,8 @@ char * buffer; fprintf (stderr,"bad checksum. My count = 0x%x, sent=0x%x. buf=%s\n", checksum,xmitcsum,buffer); } - - if (checksum != xmitcsum) putDebugChar('-'); /* failed checksum */ + + if (checksum != xmitcsum) putDebugChar('-'); /* failed checksum */ else { putDebugChar('+'); /* successful transfer */ /* if a sequence char is present, reply the sequence ID */ @@ -600,14 +600,14 @@ char * buffer; /* remove sequence chars from buffer */ count = strlen(buffer); for (i=3; i <= count; i++) buffer[i-3] = buffer[i]; - } - } - } + } + } + } } while (checksum != xmitcsum); - + } -/* send the packet in buffer. The host get's one chance to read it. +/* send the packet in buffer. The host get's one chance to read it. This routine does not wait for a positive acknowledge. */ @@ -687,7 +687,7 @@ int count; *buf++ = gdb_hexchars[ch >> 4]; *buf++ = gdb_hexchars[ch % 16]; } - *buf = 0; + *buf = 0; return(buf); } @@ -753,7 +753,7 @@ void handle_buserror() longjmp(remcomEnv,1); } -/* this function takes the 68000 exception number and attempts to +/* this function takes the 68000 exception number and attempts to translate this number into a unix compatible signal value */ int computeSignal( exceptionVector ) int exceptionVector; @@ -792,7 +792,7 @@ int exceptionVector; case 52: sigval = 8; break; /* operand error */ case 53: sigval = 8; break; /* overflow */ case 54: sigval = 8; break; /* NAN */ - default: + default: sigval = 7; /* "software generated"*/ } return (sigval); @@ -806,7 +806,7 @@ int hexToInt(char **ptr, int *intValue) { int numChars = 0; int hexValue; - + *intValue = 0; while (**ptr) @@ -819,7 +819,7 @@ int hexToInt(char **ptr, int *intValue) } else break; - + (*ptr)++; } @@ -849,21 +849,21 @@ void gdb_stub_report_exception_info( *optr++ = highhex(A7); *optr++ = lowhex(A7); *optr++ = ':'; - optr = mem2hstr(optr, - (unsigned char *)&(regs[A7]), + optr = mem2hstr(optr, + (unsigned char *)&(regs[A7]), sizeof(regs[A7])); *optr++ = ';'; - + *optr++ = highhex(PC); *optr++ = lowhex(PC); *optr++ = ':'; - optr = mem2hstr(optr, - (unsigned char *)&(regs[PC]), + optr = mem2hstr(optr, + (unsigned char *)&(regs[PC]), sizeof(regs[PC]) ); *optr++ = ';'; #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) - if (do_threads) + if (do_threads) { *optr++ = 't'; *optr++ = 'h'; @@ -894,9 +894,9 @@ void handle_exception(int exceptionVector) void *regptr; int binary; - if (remote_debug) printf("vector=%d, sr=0x%x, pc=0x%x\n", + if (remote_debug) printf("vector=%d, sr=0x%x, pc=0x%x\n", exceptionVector, - registers[ PS ], + registers[ PS ], registers[ PC ]); thread = 0; @@ -906,7 +906,7 @@ void handle_exception(int exceptionVector) } #endif current_thread = thread; - + #if 0 /* reply to host that an exception has occurred */ sigval = computeSignal( exceptionVector ); @@ -919,9 +919,9 @@ void handle_exception(int exceptionVector) gdb_stub_report_exception_info(exceptionVector, registers, thread); #endif - putpacket(remcomOutBuffer); + putpacket(remcomOutBuffer); - while (!(host_has_detached)) { + while (!(host_has_detached)) { binary = 0; error = 0; remcomOutBuffer[0] = 0; @@ -932,7 +932,7 @@ void handle_exception(int exceptionVector) remcomOutBuffer[1] = gdb_hexchars[sigval >> 4]; remcomOutBuffer[2] = gdb_hexchars[sigval % 16]; remcomOutBuffer[3] = 0; - break; + break; #else case '?' : gdb_stub_report_exception_info(exceptionVector, registers, @@ -940,11 +940,11 @@ void handle_exception(int exceptionVector) break; #endif case 'd' : remote_debug = !(remote_debug); /* toggle debug flag */ - break; + break; case 'D' : /* host has detached */ strcpy(remcomOutBuffer,"OK"); host_has_detached = 1; - break; + break; case 'g': /* return the values of the CPU registers */ regptr = registers; #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) @@ -961,8 +961,8 @@ void handle_exception(int exceptionVector) if (do_threads && current_thread != thread ) regptr = ¤t_thread_registers; #endif - if (hex2mem (&remcomInBuffer[1], - regptr, + if (hex2mem (&remcomInBuffer[1], + regptr, sizeof registers)) { strcpy (remcomOutBuffer, "OK"); } @@ -970,18 +970,18 @@ void handle_exception(int exceptionVector) strcpy (remcomOutBuffer, "E00"); /* E00 = bad "set register" command */ } break; - + /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ - case 'm' : + case 'm' : if (setjmp(remcomEnv) == 0) { - m68k_exceptionHandler(2,handle_buserror); + m68k_exceptionHandler(2,handle_buserror); /* TRY TO READ %x,%x. IF SUCCEED, SET PTR = 0 */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) if (*(ptr++) == ',') - if (hexToInt(&ptr,&length)) + if (hexToInt(&ptr,&length)) { ptr = 0; mem2hex((char*) addr, remcomOutBuffer, length); @@ -991,27 +991,27 @@ void handle_exception(int exceptionVector) { strcpy(remcomOutBuffer,"E01"); debug_error("malformed read memory command: %s",remcomInBuffer); - } - } + } + } else { - m68k_exceptionHandler(2,_catchException); + m68k_exceptionHandler(2,_catchException); strcpy(remcomOutBuffer,"E03"); debug_error("bus error", 0); - } - + } + /* restore handler for bus error */ - m68k_exceptionHandler(2,_catchException); + m68k_exceptionHandler(2,_catchException); break; - + /* XAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ /* Transfer is in binary, '$', '#' and 0x7d is escaped with 0x7d */ - case 'X' : + case 'X' : binary = 1; /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ - case 'M' : + case 'M' : if (setjmp(remcomEnv) == 0) { - m68k_exceptionHandler(2,handle_buserror); - + m68k_exceptionHandler(2,handle_buserror); + /* TRY TO READ '%x,%x:'. IF SUCCEED, SET PTR = 0 */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) @@ -1032,35 +1032,35 @@ void handle_exception(int exceptionVector) { strcpy(remcomOutBuffer,"E02"); debug_error("malformed write memory command: %s",remcomInBuffer); - } - } + } + } else { - m68k_exceptionHandler(2,_catchException); + m68k_exceptionHandler(2,_catchException); strcpy(remcomOutBuffer,"E03"); debug_error("bus error", 0); - } + } /* restore handler for bus error */ - m68k_exceptionHandler(2,_catchException); + m68k_exceptionHandler(2,_catchException); break; /* cAA..AA Continue at address AA..AA(optional) */ /* sAA..AA Step one instruction from AA..AA(optional) */ - case 'c' : - case 's' : + case 'c' : + case 's' : /* try to read optional parameter, pc unchanged if no parm */ ptr = &remcomInBuffer[1]; if (hexToInt(&ptr,&addr)) registers[ PC ] = addr; - + newPC = registers[ PC]; - + /* clear the trace bit */ registers[ PS ] &= 0x7fff; - + /* set the trace bit if we're stepping */ if (remcomInBuffer[0] == 's') registers[ PS ] |= 0x8000; - + /* * look for newPC in the linked list of exception frames. * if it is found, use the old frame it. otherwise, @@ -1085,24 +1085,24 @@ void handle_exception(int exceptionVector) (frame->exceptionPC == (newPC+2))) break; if (frame == frame->previous) { - frame = 0; /* no match found */ - break; + frame = 0; /* no match found */ + break; } frame = frame->previous; } - + /* * If we found a match for the PC AND we are not returning * as a result of a breakpoint (33), * trace exception (9), nmi (31), jmp to * the old exception handler as if this code never ran. */ - if (frame) + if (frame) { - if ((frame->exceptionVector != 9) && - (frame->exceptionVector != 31) && + if ((frame->exceptionVector != 9) && + (frame->exceptionVector != 31) && (frame->exceptionVector != 33)) - { + { /* * invoke the previous handler. */ @@ -1121,13 +1121,13 @@ void handle_exception(int exceptionVector) _returnFromException( frame ); /* this is a jump */ } } - } + } /* if we couldn't find a frame, create one */ if (frame == 0) { frame = lastFrame -1 ; - + /* by using a bunch of print commands with breakpoints, it's possible for the frame stack to creep down. If it creeps too far, give up and reset it to the top. Normal use should @@ -1136,22 +1136,22 @@ void handle_exception(int exceptionVector) if ((unsigned int) (frame-2) < (unsigned int) &gdbFrameStack) { initializeRemcomErrorFrame(); - frame = lastFrame; + frame = lastFrame; } frame->previous = lastFrame; lastFrame = frame; - frame = 0; /* null so _return... will properly initialize it */ - } - + frame = 0; /* null so _return... will properly initialize it */ + } + _returnFromException( frame ); /* this is a jump */ break; - + case 'q': /* queries */ #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) - rtems_gdb_process_query( remcomInBuffer, - remcomOutBuffer, - do_threads, + rtems_gdb_process_query( remcomInBuffer, + remcomOutBuffer, + do_threads, thread ); #endif break; @@ -1161,7 +1161,7 @@ void handle_exception(int exceptionVector) { int testThread; - if( vhstr2thread(&remcomInBuffer[1], &testThread) == NULL ) + if( vhstr2thread(&remcomInBuffer[1], &testThread) == NULL ) { strcpy(remcomOutBuffer, "E01"); break; @@ -1178,20 +1178,20 @@ void handle_exception(int exceptionVector) } break; #endif - + case 'H': /* set new thread */ #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) if (remcomInBuffer[1] != 'g') { break; } - + if (!do_threads) { break; } - + { int tmp, ret; - + /* Set new generic thread */ if (vhstr2thread(&remcomInBuffer[2], &tmp) == NULL) { strcpy(remcomOutBuffer, "E01"); @@ -1209,7 +1209,7 @@ void handle_exception(int exceptionVector) break; } - /* Save current thread registers if necessary */ + /* Save current thread registers if necessary */ if (current_thread != thread) { ret = rtems_gdb_stub_set_thread_regs( current_thread, (unsigned int *) ¤t_thread_registers); @@ -1226,7 +1226,7 @@ void handle_exception(int exceptionVector) break; } } - + current_thread = tmp; strcpy(remcomOutBuffer, "OK"); } @@ -1236,10 +1236,10 @@ void handle_exception(int exceptionVector) /* kill the program */ case 'k' : /* do nothing */ break; - } /* switch */ - + } /* switch */ + /* reply to the request */ - putpacket(remcomOutBuffer); + putpacket(remcomOutBuffer); } } @@ -1251,7 +1251,7 @@ initializeRemcomErrorFrame() lastFrame->previous = lastFrame; } -/* this function is used to set up exception handlers for tracing and +/* this function is used to set up exception handlers for tracing and breakpoints */ void set_debug_traps() { @@ -1263,33 +1263,33 @@ void set_debug_traps() stackPtr = &remcomStack[STACKSIZE/sizeof(int) - 1]; for (exception = 2; exception <= 23; exception++) - m68k_exceptionHandler(exception,_catchException); + m68k_exceptionHandler(exception,_catchException); /* level 7 interrupt */ - m68k_exceptionHandler(31,_debug_level7); - + m68k_exceptionHandler(31,_debug_level7); + /* GDB breakpoint exception (trap #1) */ m68k_exceptionHandler(33,_catchException); /* coded breakpoint exception (trap #2) */ m68k_exceptionHandler(34,_catchException); - + /* This is a trap #8 instruction. Apparently it is someone's software convention for some sort of SIGFPE condition. Whose? How many people are being screwed by having this code the way it is? Is there a clean solution? */ m68k_exceptionHandler(40,_catchException); - + /* 48 to 54 are floating point coprocessor errors */ for (exception = 48; exception <= 54; exception++) - m68k_exceptionHandler(exception,_catchException); + m68k_exceptionHandler(exception,_catchException); if (oldExceptionHook != remcomHandler) { oldExceptionHook = exceptionHook; exceptionHook = remcomHandler; } - + initialized = 1; } @@ -1298,7 +1298,7 @@ void set_debug_traps() beginning of a program to sync up with a debugger and can be used otherwise as a quick means to stop program execution and "break" into the debugger. */ - + void breakpoint() { if (initialized) BREAKPOINT(); diff --git a/c/src/lib/libbsp/m68k/shared/m68000spurious.c b/c/src/lib/libbsp/m68k/shared/m68000spurious.c index 8bcc3a2ad0..a178cf0cdc 100644 --- a/c/src/lib/libbsp/m68k/shared/m68000spurious.c +++ b/c/src/lib/libbsp/m68k/shared/m68000spurious.c @@ -1,7 +1,7 @@ /* * C3X Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * COPYRIGHT (c) 1989-1999. @@ -24,7 +24,7 @@ */ void bsp_spurious_handler_assistant( - rtems_vector_number /*, + rtems_vector_number /*, CPU_Interrupt_frame * */ ); diff --git a/c/src/lib/libbsp/m68k/shared/m68kpretaskinghook.c b/c/src/lib/libbsp/m68k/shared/m68kpretaskinghook.c index dc0132053c..4cc1584087 100644 --- a/c/src/lib/libbsp/m68k/shared/m68kpretaskinghook.c +++ b/c/src/lib/libbsp/m68k/shared/m68kpretaskinghook.c @@ -1,4 +1,4 @@ -/* +/* * This routine is an implementation of the bsp_pretasking_hook * that can be used by all m68k BSPs following linkcmds conventions * regarding heap, stack, and workspace allocation. diff --git a/c/src/lib/libbsp/m68k/shared/mvme/mvme16x_hw.h b/c/src/lib/libbsp/m68k/shared/mvme/mvme16x_hw.h index f388ed891d..967faa8d24 100644 --- a/c/src/lib/libbsp/m68k/shared/mvme/mvme16x_hw.h +++ b/c/src/lib/libbsp/m68k/shared/mvme/mvme16x_hw.h @@ -26,7 +26,7 @@ extern "C" { /* * Network driver configuration */ - + struct rtems_bsdnet_ifconfig; int uti596_attach(struct rtems_bsdnet_ifconfig * pConfig, int attaching ); #define RTEMS_BSP_NETWORK_DRIVER_NAME "uti1" @@ -91,14 +91,14 @@ typedef volatile struct { unsigned long vector_base; } lcsr_regs; -/* +/* * Base address of VMEchip2 LCSR * Not configurable on the MVME167. * XXX what about 162? */ #define lcsr ((lcsr_regs * const) 0xFFF40000) -/* +/* * Vector numbers for the interrupts from the VMEchip2. Use the values * "recommended" by Motorola. * See pages 2-70 to 2-92, and table 2-3. @@ -178,7 +178,7 @@ typedef volatile struct pccchip2_regs_ { * we have to reconcile them later. */ -/* +/* * Vector numbers for the interrupts from the PCCchip2. Use the values * "recommended" by Motorola. * See page 3-15. diff --git a/c/src/lib/libbsp/m68k/shared/setvec.c b/c/src/lib/libbsp/m68k/shared/setvec.c index 13dc820374..90323fbd51 100644 --- a/c/src/lib/libbsp/m68k/shared/setvec.c +++ b/c/src/lib/libbsp/m68k/shared/setvec.c @@ -1,7 +1,7 @@ -/* +/* * * This routine installs an interrupt vector using the basic - * RTEMS mechanisms. This implementation should be suitable for + * RTEMS mechanisms. This implementation should be suitable for * most m68k based boards. However, if the board has an unusual * interrupt controller or most somehow manipulate board specific * hardware to enable/disable, mask, prioritize, etc an interrupt diff --git a/c/src/lib/libbsp/m68k/sim68000/clock/clockdrv.c b/c/src/lib/libbsp/m68k/sim68000/clock/clockdrv.c index 43347867a5..f3aac18351 100644 --- a/c/src/lib/libbsp/m68k/sim68000/clock/clockdrv.c +++ b/c/src/lib/libbsp/m68k/sim68000/clock/clockdrv.c @@ -16,9 +16,9 @@ typedef struct { volatile uint8_t cr; /* 0 - 0 : Timer Control Register */ volatile uint8_t pad0; /* 1 - 1 : pad */ volatile uint8_t ivr; /* 2 - 2 : Timer Interrupt Vector Register */ - volatile uint8_t pad1; /* 3 - 3 : pad */ + volatile uint8_t pad1; /* 3 - 3 : pad */ volatile uint32_t cpr; /* 4 - 7 : Timer Counter Preload Register */ - volatile uint8_t pad2[12]; /* 8 - 19 : pad */ + volatile uint8_t pad2[12]; /* 8 - 19 : pad */ volatile uint32_t sr; /* 20 - 23 : Timer Status Register */ } timer_hw_t; @@ -40,10 +40,10 @@ void Clock_driver_support_initialize_hardware() void Clock_driver_support_at_tick() { timer_hw_t *t = TIMER_BASE; - + t->sr = 0xA0; /* Negate timer interrupt request */ } - + void Clock_driver_support_shutdown_hardware() { diff --git a/c/src/lib/libbsp/m68k/sim68000/include/bsp.h b/c/src/lib/libbsp/m68k/sim68000/include/bsp.h index 595facf166..5a85923fe1 100644 --- a/c/src/lib/libbsp/m68k/sim68000/include/bsp.h +++ b/c/src/lib/libbsp/m68k/sim68000/include/bsp.h @@ -53,9 +53,9 @@ extern "C" { #define Install_tm27_vector( handler ) /* set_vector( (handler), 6, 1 ) */ -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() @@ -89,7 +89,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/m68k/sim68000/start/start.S b/c/src/lib/libbsp/m68k/sim68000/start/start.S index 11aefb7d3c..9c08095c91 100644 --- a/c/src/lib/libbsp/m68k/sim68000/start/start.S +++ b/c/src/lib/libbsp/m68k/sim68000/start/start.S @@ -1,21 +1,21 @@ -/* +/* * $Id$ * * Re-written the gen68302 start-up code. - * + * * Uses gas syntax only, removed the OAR asm.h. - * + * * Supplies a complete vector table in ROM. - * + * * Manages all vectors with seperate handlers to trap unhandled * execptions. - * - * Uses the target specific header file to get the runtime + * + * Uses the target specific header file to get the runtime * configuration - * + * * COPYRIGHT (c) 1996 * Objective Design Systems Pty Ltd (ODS) - * + * * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. * On-Line Applications Research Corporation (OAR). * @@ -32,17 +32,17 @@ .global _start | program entry .global M68Kvec | Vector Table - + _start: | standard name for program entry M68Kvec: | standard location for vectors - + | | Make relative, can have the code positioned any where | V___ISSP: .long STACK_AT_RESET V____IPC: .long start - V___ISSP - + | | Create the rest of the vector table to point to the unhandled expection | handler @@ -63,7 +63,7 @@ MAKE_EXCEPTION_VECTOR(6) MAKE_EXCEPTION_VECTOR(7) MAKE_EXCEPTION_VECTOR(8) MAKE_EXCEPTION_VECTOR(9) - + MAKE_EXCEPTION_VECTOR(10) MAKE_EXCEPTION_VECTOR(11) MAKE_EXCEPTION_VECTOR(12) @@ -85,7 +85,7 @@ MAKE_EXCEPTION_VECTOR(26) MAKE_EXCEPTION_VECTOR(27) MAKE_EXCEPTION_VECTOR(28) MAKE_EXCEPTION_VECTOR(29) - + MAKE_EXCEPTION_VECTOR(30) MAKE_EXCEPTION_VECTOR(31) MAKE_EXCEPTION_VECTOR(32) @@ -96,7 +96,7 @@ MAKE_EXCEPTION_VECTOR(36) MAKE_EXCEPTION_VECTOR(37) MAKE_EXCEPTION_VECTOR(38) MAKE_EXCEPTION_VECTOR(39) - + MAKE_EXCEPTION_VECTOR(40) MAKE_EXCEPTION_VECTOR(41) MAKE_EXCEPTION_VECTOR(42) @@ -107,7 +107,7 @@ MAKE_EXCEPTION_VECTOR(46) MAKE_EXCEPTION_VECTOR(47) MAKE_EXCEPTION_VECTOR(48) MAKE_EXCEPTION_VECTOR(49) - + MAKE_EXCEPTION_VECTOR(50) MAKE_EXCEPTION_VECTOR(51) MAKE_EXCEPTION_VECTOR(52) @@ -118,7 +118,7 @@ MAKE_EXCEPTION_VECTOR(56) MAKE_EXCEPTION_VECTOR(57) MAKE_EXCEPTION_VECTOR(58) MAKE_EXCEPTION_VECTOR(59) - + MAKE_EXCEPTION_VECTOR(60) MAKE_EXCEPTION_VECTOR(61) MAKE_EXCEPTION_VECTOR(62) @@ -129,7 +129,7 @@ MAKE_EXCEPTION_VECTOR(66) MAKE_EXCEPTION_VECTOR(67) MAKE_EXCEPTION_VECTOR(68) MAKE_EXCEPTION_VECTOR(69) - + MAKE_EXCEPTION_VECTOR(70) MAKE_EXCEPTION_VECTOR(71) MAKE_EXCEPTION_VECTOR(72) @@ -140,7 +140,7 @@ MAKE_EXCEPTION_VECTOR(76) MAKE_EXCEPTION_VECTOR(77) MAKE_EXCEPTION_VECTOR(78) MAKE_EXCEPTION_VECTOR(79) - + MAKE_EXCEPTION_VECTOR(80) MAKE_EXCEPTION_VECTOR(81) MAKE_EXCEPTION_VECTOR(82) @@ -151,7 +151,7 @@ MAKE_EXCEPTION_VECTOR(86) MAKE_EXCEPTION_VECTOR(87) MAKE_EXCEPTION_VECTOR(88) MAKE_EXCEPTION_VECTOR(89) - + MAKE_EXCEPTION_VECTOR(90) MAKE_EXCEPTION_VECTOR(91) MAKE_EXCEPTION_VECTOR(92) @@ -162,7 +162,7 @@ MAKE_EXCEPTION_VECTOR(96) MAKE_EXCEPTION_VECTOR(97) MAKE_EXCEPTION_VECTOR(98) MAKE_EXCEPTION_VECTOR(99) - + MAKE_EXCEPTION_VECTOR(100) MAKE_EXCEPTION_VECTOR(101) MAKE_EXCEPTION_VECTOR(102) @@ -173,7 +173,7 @@ MAKE_EXCEPTION_VECTOR(106) MAKE_EXCEPTION_VECTOR(107) MAKE_EXCEPTION_VECTOR(108) MAKE_EXCEPTION_VECTOR(109) - + MAKE_EXCEPTION_VECTOR(110) MAKE_EXCEPTION_VECTOR(111) MAKE_EXCEPTION_VECTOR(112) @@ -195,7 +195,7 @@ MAKE_EXCEPTION_VECTOR(126) MAKE_EXCEPTION_VECTOR(127) MAKE_EXCEPTION_VECTOR(128) MAKE_EXCEPTION_VECTOR(129) - + MAKE_EXCEPTION_VECTOR(130) MAKE_EXCEPTION_VECTOR(131) MAKE_EXCEPTION_VECTOR(132) @@ -206,7 +206,7 @@ MAKE_EXCEPTION_VECTOR(136) MAKE_EXCEPTION_VECTOR(137) MAKE_EXCEPTION_VECTOR(138) MAKE_EXCEPTION_VECTOR(139) - + MAKE_EXCEPTION_VECTOR(140) MAKE_EXCEPTION_VECTOR(141) MAKE_EXCEPTION_VECTOR(142) @@ -217,7 +217,7 @@ MAKE_EXCEPTION_VECTOR(146) MAKE_EXCEPTION_VECTOR(147) MAKE_EXCEPTION_VECTOR(148) MAKE_EXCEPTION_VECTOR(149) - + MAKE_EXCEPTION_VECTOR(150) MAKE_EXCEPTION_VECTOR(151) MAKE_EXCEPTION_VECTOR(152) @@ -228,7 +228,7 @@ MAKE_EXCEPTION_VECTOR(156) MAKE_EXCEPTION_VECTOR(157) MAKE_EXCEPTION_VECTOR(158) MAKE_EXCEPTION_VECTOR(159) - + MAKE_EXCEPTION_VECTOR(160) MAKE_EXCEPTION_VECTOR(161) MAKE_EXCEPTION_VECTOR(162) @@ -239,7 +239,7 @@ MAKE_EXCEPTION_VECTOR(166) MAKE_EXCEPTION_VECTOR(167) MAKE_EXCEPTION_VECTOR(168) MAKE_EXCEPTION_VECTOR(169) - + MAKE_EXCEPTION_VECTOR(170) MAKE_EXCEPTION_VECTOR(171) MAKE_EXCEPTION_VECTOR(172) @@ -250,7 +250,7 @@ MAKE_EXCEPTION_VECTOR(176) MAKE_EXCEPTION_VECTOR(177) MAKE_EXCEPTION_VECTOR(178) MAKE_EXCEPTION_VECTOR(179) - + MAKE_EXCEPTION_VECTOR(180) MAKE_EXCEPTION_VECTOR(181) MAKE_EXCEPTION_VECTOR(182) @@ -261,7 +261,7 @@ MAKE_EXCEPTION_VECTOR(186) MAKE_EXCEPTION_VECTOR(187) MAKE_EXCEPTION_VECTOR(188) MAKE_EXCEPTION_VECTOR(189) - + MAKE_EXCEPTION_VECTOR(190) MAKE_EXCEPTION_VECTOR(191) MAKE_EXCEPTION_VECTOR(192) @@ -272,7 +272,7 @@ MAKE_EXCEPTION_VECTOR(196) MAKE_EXCEPTION_VECTOR(197) MAKE_EXCEPTION_VECTOR(198) MAKE_EXCEPTION_VECTOR(199) - + MAKE_EXCEPTION_VECTOR(200) MAKE_EXCEPTION_VECTOR(201) MAKE_EXCEPTION_VECTOR(202) @@ -283,7 +283,7 @@ MAKE_EXCEPTION_VECTOR(206) MAKE_EXCEPTION_VECTOR(207) MAKE_EXCEPTION_VECTOR(208) MAKE_EXCEPTION_VECTOR(209) - + MAKE_EXCEPTION_VECTOR(210) MAKE_EXCEPTION_VECTOR(211) MAKE_EXCEPTION_VECTOR(212) @@ -294,7 +294,7 @@ MAKE_EXCEPTION_VECTOR(216) MAKE_EXCEPTION_VECTOR(217) MAKE_EXCEPTION_VECTOR(218) MAKE_EXCEPTION_VECTOR(219) - + MAKE_EXCEPTION_VECTOR(220) MAKE_EXCEPTION_VECTOR(221) MAKE_EXCEPTION_VECTOR(222) @@ -305,7 +305,7 @@ MAKE_EXCEPTION_VECTOR(226) MAKE_EXCEPTION_VECTOR(227) MAKE_EXCEPTION_VECTOR(228) MAKE_EXCEPTION_VECTOR(229) - + MAKE_EXCEPTION_VECTOR(230) MAKE_EXCEPTION_VECTOR(231) MAKE_EXCEPTION_VECTOR(232) @@ -316,7 +316,7 @@ MAKE_EXCEPTION_VECTOR(236) MAKE_EXCEPTION_VECTOR(237) MAKE_EXCEPTION_VECTOR(238) MAKE_EXCEPTION_VECTOR(239) - + MAKE_EXCEPTION_VECTOR(240) MAKE_EXCEPTION_VECTOR(241) MAKE_EXCEPTION_VECTOR(242) @@ -327,13 +327,13 @@ MAKE_EXCEPTION_VECTOR(246) MAKE_EXCEPTION_VECTOR(247) MAKE_EXCEPTION_VECTOR(248) MAKE_EXCEPTION_VECTOR(249) - + MAKE_EXCEPTION_VECTOR(250) MAKE_EXCEPTION_VECTOR(251) MAKE_EXCEPTION_VECTOR(252) MAKE_EXCEPTION_VECTOR(253) MAKE_EXCEPTION_VECTOR(254) -MAKE_EXCEPTION_VECTOR(255) +MAKE_EXCEPTION_VECTOR(255) #endif | @@ -341,7 +341,7 @@ MAKE_EXCEPTION_VECTOR(255) | | Entered from a hardware reset. | - + .global start | Default entry point for GNU start: @@ -353,13 +353,13 @@ copy_data: moveal #_etext,%a0 | find the end of .text moveal #_copy_start,%a1 | find the beginning of .data moveal #_edata,%a2 | find the end of .data - + copy_data_loop: - + movel %a0@+,%a1@+ | copy the data cmpal %a2,%a1 jlt copy_data_loop | loop until edata reached - + | | zero out uninitialized data area | @@ -368,9 +368,9 @@ zerobss: moveal #_clear_end,%a0 | find end of .bss moveal #_clear_start,%a1 | find beginning of .bss moveq #0,%d0 - + zerobss_loop: - + movel %d0,%a1@+ | to zero out uninitialized cmpal %a0,%a1 jlt zerobss_loop | loop until _end reached @@ -392,23 +392,23 @@ bsp_exitted: jmp bsp_exitted -| +| | Initialised data | .sect .data - + | | Uninitialised data | .sect .bss - + env: .long 0 arg: .long 0 .global environ .align 2 - + environ: .long env diff --git a/c/src/lib/libbsp/m68k/sim68000/startup/bspstart.c b/c/src/lib/libbsp/m68k/sim68000/startup/bspstart.c index debdb8d169..9c242457b7 100644 --- a/c/src/lib/libbsp/m68k/sim68000/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/sim68000/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c b/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c index b89cbb622f..1ae41b405a 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c +++ b/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c @@ -13,8 +13,8 @@ * $Id$ */ -#include <bsp.h> - +#include <bsp.h> + #include <libchip/serial.h> #include <libchip/mg5uart.h> @@ -88,6 +88,6 @@ rtems_device_minor_number Console_Port_Minor; #include <rtems/bspIo.h> void GENMG5_output_char(char c) { write( 2, &c, 1 ); } - + BSP_output_char_function_type BSP_output_char = GENMG5_output_char; BSP_polling_getchar_function_type BSP_poll_char = NULL; diff --git a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h index fb62ae37b5..3beb8dc513 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h +++ b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h @@ -45,7 +45,7 @@ extern "C" { -/* +/* * assertSoftwareInt defined in vectorisrs.c the prototype is here so * userspace code can get to it directly. * */ @@ -83,26 +83,26 @@ extern void assertSoftwareInterrupt(uint32_t); #if 1 #define Install_tm27_vector( handler ) \ - (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); + (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); #define Cause_tm27_intr() assertSoftwareInterrupt(0); -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() #else #define Install_tm27_vector( handler ) \ - (void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 ); + (void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 ); #define Cause_tm27_intr() \ do { \ ; \ } while(0) -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() #endif @@ -120,7 +120,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ @@ -130,7 +130,7 @@ extern rtems_configuration_table BSP_Configuration; void bsp_cleanup( void ); rtems_isr_entry set_vector( rtems_isr_entry, rtems_vector_number, int ); - + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/mips/genmongoosev/start/start.S b/c/src/lib/libbsp/mips/genmongoosev/start/start.S index 1647d4d34a..5c997d7449 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/start/start.S +++ b/c/src/lib/libbsp/mips/genmongoosev/start/start.S @@ -43,7 +43,7 @@ #include "mg5.h" - + #ifdef __mips16 /* This file contains 32 bit assembly code. */ .set nomips16 @@ -136,14 +136,14 @@ _branch: or t0,t2 jal t0 nop - - - + + + li k0,0 li k1,0 - + move t1,a1 nop li t2,0xa0000000 /* lower limit of kseg1 */ @@ -152,13 +152,13 @@ _branch: subu t0,t1,t2 srl t0,31 /* shift high bit down to bit 0 */ bnez t0,1f /* booting from below kseg1 */ - + subu t0,t3,t1 srl t0,31 /* shift high bit down to bit 0 */ bnez t0,1f /* booting from above kseg1 */ - - + + /* ** Call IcacheFlush. Masking used to call EEPROM address of IcacheFlush. Label is RAM label. */ @@ -211,7 +211,7 @@ _branch: nop -1: +1: /* ** Print ' RTEMS b'. Show that we are booting. */ @@ -431,7 +431,7 @@ _initialize_rtems: la a0,_promIcache sw k0,0(a0) nop - + la a0,_promDcache sw k1,0(a0) nop @@ -801,34 +801,34 @@ _cpuinit: - - + + /********************************************************************** ** ** Keep the boot-time address of the I & D cache reset code for -** later on. If we need to clear the I/D caches, we <must> run from -** non-cached memory. This means the relocated versions are useless, +** later on. If we need to clear the I/D caches, we <must> run from +** non-cached memory. This means the relocated versions are useless, ** thankfully they are quite small. */ - + _promIcache: .word 0 _promDcache: .word 0 - + .globl promCopyIcacheFlush .ent promCopyIcacheFlush .set noreorder -promCopyIcacheFlush: +promCopyIcacheFlush: move a0,ra - + la t1,_promIcache lw t0,0(t1) nop beqz t0,1f - + jal t0 nop @@ -836,20 +836,20 @@ promCopyIcacheFlush: nop .set reorder .end promCopyIcacheFlush - - + + .globl promCopyDcacheFlush .ent promCopyDcacheFlush .set noreorder -promCopyDcacheFlush: +promCopyDcacheFlush: move a0,ra - + la t1,_promDcache lw t0,0(t1) nop beqz t0,1f - + jal t0 nop @@ -857,11 +857,11 @@ promCopyDcacheFlush: nop .set reorder .end promCopyDcacheFlush - - - - + + + + /******************************************************************************* ** Function Name: IcacheFlush ** Description: This functions flushes the on chip icache. @@ -879,7 +879,7 @@ IcacheFlush: li t0, M_BIU lw t1, 0(t0) - /* + /* ** Isolate I cache */ mfc0 t3, C0_SR /* Read Status Register */ diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c index 05eedcb8b2..649cd64a0e 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c +++ b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c @@ -91,7 +91,7 @@ void bsp_start( void ) extern int WorkspaceBase; extern void mips_install_isr_entries(); extern void mips_gdb_stub_install(void); - + /* Configure Number of Register Caches */ Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ @@ -142,7 +142,7 @@ void bsp_start( void ) /* mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); */ /* to start up, only enable coprocessor 0 & timer int. per-task - ** processor settings will be applied as they are created, this + ** processor settings will be applied as they are created, this ** is just to configure the processor for startup */ mips_set_sr( (SR_CU0 | 0x400) ); @@ -166,7 +166,7 @@ void clear_cache( void ) /* - + //Structure filled in by get_mem_info. diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c index 2b36051053..4c6ee61736 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c +++ b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c @@ -70,7 +70,7 @@ int mg5rdbgOpenGDBuart(int breakoninit) /* set up vectoring for gdb */ mips_gdb_stub_install(-1); - /* + /* this is a rough approximation of our memory map. Yours is probably different. It only needs to be sufficient for the stub to know what it can and can't do and where. @@ -81,10 +81,10 @@ int mg5rdbgOpenGDBuart(int breakoninit) gdbstub_add_memsegment(0x81500000, 0x81ffffff, MEMOPT_READABLE | MEMOPT_WRITEABLE ); - if( breakoninit ) + if( breakoninit ) { printf("gdbstub: GDB stub entered, connect host debugger now\n"); - /* + /* break to gdb. We'll wait there for the operator to get their gdb going, then they can 'continue' or do whatever. */ @@ -145,10 +145,10 @@ void putDebugChar (char c) * configure dcic for trapping, user & kernel mode, PC traps and enable it * dcic = DCIC_TR | DCIC_UD | DCIC_KD | DCIC_PCE | DCIC_DE; * dcic = DCIC_UD | DCIC_KD | DCIC_PCE | DCIC_DE; * - mips_set_dcic( dcic ); + mips_set_dcic( dcic ); mips_get_bpcrm( reg, mask ); - mips_get_dcic( dcic ); + mips_get_dcic( dcic ); * printf("bpc is %08X, bpc_mask is %08X, dcic is now %08X\n", reg, mask, dcic ); * } */ diff --git a/c/src/lib/libbsp/mips/genmongoosev/timer/timer.c b/c/src/lib/libbsp/mips/genmongoosev/timer/timer.c index 6b6b99413c..24cf366dfb 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/timer/timer.c +++ b/c/src/lib/libbsp/mips/genmongoosev/timer/timer.c @@ -1,4 +1,4 @@ -/* +/* * This file implements a benchmark timer using a MONGOOSE-V timer. * * COPYRIGHT (c) 1989-2001. @@ -68,8 +68,8 @@ int Read_timer() tcr = MONGOOSEV_READ_REGISTER( TIMER_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER ); - MONGOOSEV_WRITE_REGISTER( TIMER_BASE, - MONGOOSEV_TIMER_CONTROL_REGISTER, + MONGOOSEV_WRITE_REGISTER( TIMER_BASE, + MONGOOSEV_TIMER_CONTROL_REGISTER, 0 ); if ( tcr & MONGOOSEV_TIMER_CONTROL_TIMEOUT ) diff --git a/c/src/lib/libbsp/mips/jmr3904/console/console-io.c b/c/src/lib/libbsp/mips/jmr3904/console/console-io.c index f6ede9e1db..9f5d59c3b0 100644 --- a/c/src/lib/libbsp/mips/jmr3904/console/console-io.c +++ b/c/src/lib/libbsp/mips/jmr3904/console/console-io.c @@ -93,7 +93,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ diff --git a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h index 83ebc69e80..cf65dde83f 100644 --- a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h +++ b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h @@ -57,7 +57,7 @@ extern "C" { #define CLOCK_VECTOR TX3904_IRQ_TMR0 -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() #else @@ -100,7 +100,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/mips/jmr3904/start/start.S b/c/src/lib/libbsp/mips/jmr3904/start/start.S index d071f40a91..b415cfc2a7 100644 --- a/c/src/lib/libbsp/mips/jmr3904/start/start.S +++ b/c/src/lib/libbsp/mips/jmr3904/start/start.S @@ -33,9 +33,9 @@ # else # define LA(t,x) la t,x-PICBASE ; addu t,s0,t # endif -#else /* __mips_embedded_pic */ +#else /* __mips_embedded_pic */ # define LA(t,x) la t,x -#endif /* __mips_embedded_pic */ +#endif /* __mips_embedded_pic */ .text .align 2 @@ -76,7 +76,7 @@ relocate: nop .end _start - + .globl _start_in_ram .ent _start_in_ram _start_in_ram: @@ -118,7 +118,7 @@ _start_in_ram: li v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX mtc0 v0, C0_SR 2: -/* Fix high bits, if any, of the PC so that exception handling +/* Fix high bits, if any, of the PC so that exception handling doesn't get confused. */ LA (v0, 3f) jr v0 @@ -141,12 +141,12 @@ zerobss: bltu v0,v1,3b addiu v0,v0,4 # executed in delay slot - la t0, _stack_init # initialize stack so we + la t0, _stack_init # initialize stack so we /* We must subtract 24 bytes for the 3 8 byte arguments to main, in case main wants to write them back to the stack. The caller is supposed to allocate stack space for parameters in registers in the old MIPS ABIs. We must do this even though we aren't passing - arguments, because main might be declared to have them. + arguments, because main might be declared to have them. Some ports need a larger alignment for the stack, so we subtract 32, which satisifes the stack for the arguments and keeps the @@ -169,7 +169,7 @@ init: /* destructors */ move a0,v0 /* pass through the exit code */ .end init - + /* * _sys_exit -- Exit from the application. Normally we cause a user trap * to return to the ROM monitor for another run. NOTE: This is diff --git a/c/src/lib/libbsp/mips/jmr3904/startup/bspstart.c b/c/src/lib/libbsp/mips/jmr3904/startup/bspstart.c index 74a0fce605..bd41945129 100644 --- a/c/src/lib/libbsp/mips/jmr3904/startup/bspstart.c +++ b/c/src/lib/libbsp/mips/jmr3904/startup/bspstart.c @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int HeapBase; @@ -68,7 +68,7 @@ void bsp_pretasking_hook(void) #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c index 101f6e4aa8..75bfb1477e 100644 --- a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c +++ b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c @@ -1,4 +1,4 @@ -/* +/* * This file implements a benchmark timer using a TX39 timer. * * NOTE: On the simulator, the count directly reflects instructions. diff --git a/c/src/lib/libbsp/mips/p4000/console/console.c b/c/src/lib/libbsp/mips/p4000/console/console.c index 43d63b1ef2..1183b06237 100644 --- a/c/src/lib/libbsp/mips/p4000/console/console.c +++ b/c/src/lib/libbsp/mips/p4000/console/console.c @@ -65,16 +65,16 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + status = rtems_io_register_name( "/dev/console", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -179,7 +179,7 @@ rtems_device_driver console_open( #endif return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -211,7 +211,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -230,7 +230,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/mips/p4000/include/bsp.h b/c/src/lib/libbsp/mips/p4000/include/bsp.h index 82aee0b5b7..4f78ec1106 100644 --- a/c/src/lib/libbsp/mips/p4000/include/bsp.h +++ b/c/src/lib/libbsp/mips/p4000/include/bsp.h @@ -73,8 +73,8 @@ extern uint32_t mips_get_timer( void ); * Simple spin delay in microsecond units for device drivers. * This is very dependent on the clock speed of the target. * - * NOTE: This macro generates a warning like "integer constant out - * of range" which is safe to ignore. In 64 bit mode, uint32_t + * NOTE: This macro generates a warning like "integer constant out + * of range" which is safe to ignore. In 64 bit mode, uint32_t * types are actually 64 bits long so that comparisons between * uint32_t types and pointers are valid. The warning is caused * by code in the delay macro that is necessary for 64 bit mode. @@ -108,7 +108,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/mips/p4000/start/start.S b/c/src/lib/libbsp/mips/p4000/start/start.S index 1421c8b8d2..4bcd885e6a 100644 --- a/c/src/lib/libbsp/mips/p4000/start/start.S +++ b/c/src/lib/libbsp/mips/p4000/start/start.S @@ -21,7 +21,7 @@ COPYRIGHT IDT CORPORATION 1996 LICENSED MATERIAL - PROGRAM PROPERTY OF IDT $Id$ -*/ +*/ /************************************************************************* ** @@ -44,7 +44,7 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT .text -#define TMP_STKSIZE 1024 +#define TMP_STKSIZE 1024 /************************************************************************** ** @@ -57,7 +57,7 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT ** c) Clear all IntMask Enables ** d) Set kernel/disabled mode ** 2) Initialize Cause Register -** a) clear software interrupt bits +** a) clear software interrupt bits ** 3) Determine FPU installed or not ** if not, clear CoProcessor 1 usable bit ** 4) Clear bss area @@ -69,15 +69,15 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT ** 9) Flush Instruction and Data caches ** 10) If there is a Translation Lookaside Buffer, Clear the TLB ** 11) Execute initialization code if the IDT/c library is to be used -** +** ** 12) Jump to user's "main()" (boot_card() for RTEMS) ** 13) Jump to promexit ** -** IDT/C 5.x defines _R3000, IDT/C 6.x defines _R4000 internally. +** IDT/C 5.x defines _R3000, IDT/C 6.x defines _R4000 internally. ** This is used to mark code specific to R3xxx or R4xxx processors. -** IDT/C 6.x defines __mips to be the ISA level for which we're -** generating code. This is used to make sure the stack etc. is -** double word aligned, when using -mips3 (default) or -mips2, +** IDT/C 6.x defines __mips to be the ISA level for which we're +** generating code. This is used to make sure the stack etc. is +** double word aligned, when using -mips3 (default) or -mips2, ** when compiling with IDT/C6.x ** ***************************************************************************/ @@ -109,10 +109,10 @@ FRAME(start,sp,0,ra) #endif /* -** check to see if an fpu is really plugged in +** check to see if an fpu is really plugged in */ li t3,0xaaaa5555 /* put a's and 5's in t3 */ - mtc1 t3,fp0 /* try to write them into fp0 */ + mtc1 t3,fp0 /* try to write them into fp0 */ mtc1 zero,fp1 /* try to write zero in fp */ mfc1 t0,fp0 mfc1 t1,fp1 @@ -136,13 +136,13 @@ FRAME(start,sp,0,ra) mtc0 v0, C0_SR /* reset status register */ 2: - la gp, _gp + la gp, _gp la v0,_fbss /* clear bss before using it */ la v1,end /* end of bss */ 3: sw zero,0(v0) bltu v0,v1,3b - add v0,4 + add v0,4 /************************************************************************ @@ -156,7 +156,7 @@ FRAME(start,sp,0,ra) *************************************************************************/ #if __mips==3 /* For MIPS 3, we need to be sure that the stack is aligned on a - * double word boundary. + * double word boundary. */ andi t0, v0, 0x7 beqz t0, 11f /* Last three bits Zero, already aligned */ @@ -169,11 +169,11 @@ FRAME(start,sp,0,ra) add v1, v0, TMP_STKSIZE /* end of bss + length of tmp stack */ sub v1, v1, (4*4) /* overhead */ move sp, v1 /* set sp to top of stack */ -4: sw zero, 0(v0) +4: sw zero, 0(v0) bltu v0, v1, 4b /* clear out temp stack */ - add v0, 4 - - jal mips_install_isr_entries/* install exception handlers */ + add v0, 4 + + jal mips_install_isr_entries/* install exception handlers */ nop /* MUST do before memory probes */ la v0, 5f @@ -191,7 +191,7 @@ FRAME(start,sp,0,ra) jal config_Icache nop jal config_Dcache /* determine size of D & I caches */ - nop + nop #endif #ifdef _R4000 jal config_cache /* determine size of D & I caches */ @@ -202,7 +202,7 @@ FRAME(start,sp,0,ra) #if __mips==3 /* For MIPS 3, we need to be sure that the stack (and hence v0 - * here) is aligned on a double word boundary. + * here) is aligned on a double word boundary. */ andi t0, v0, 0x7 beqz t0, 12f /* Last three bits Zero, already aligned */ @@ -221,9 +221,9 @@ FRAME(start,sp,0,ra) /************************************************************************** ** -** Permanent Stack - now know top of memory, put permanent stack there +** Permanent Stack - now know top of memory, put permanent stack there ** -***************************************************************************/ +***************************************************************************/ la t2, _fbss /* cache mode as linked */ and t2, 0xF0000000 /* isolate segment */ @@ -237,16 +237,16 @@ FRAME(start,sp,0,ra) move v1, v0 subu v1, P_STACKSIZE /* clear requested stack size */ -7: sw zero, 0(v1) /* clear P_STACKSIZE stack */ +7: sw zero, 0(v1) /* clear P_STACKSIZE stack */ bltu v1,v0,7b - add v1, 4 + add v1, 4 .set reorder -#ifdef _R3000 - jal flush_Icache +#ifdef _R3000 + jal flush_Icache jal flush_Dcache /* flush Data & Instruction caches */ #endif -#ifdef _R4000 +#ifdef _R4000 jal flush_cache_nowrite /* flush Data & Instruction caches */ #endif @@ -256,7 +256,7 @@ FRAME(start,sp,0,ra) ** ** If this chip supports a Translation Lookaside Buffer, clear it ** -***************************************************************************/ +***************************************************************************/ .set noreorder mfc0 t1, C0_SR /* look at Status Register */ @@ -265,7 +265,7 @@ FRAME(start,sp,0,ra) #ifdef _R3000 li t2, SR_TS /* TLB Shutdown bit */ and t1,t2 /* TLB Shutdown if 1 */ - bnez t1, 8f /* skip clearing if no TLB */ + bnez t1, 8f /* skip clearing if no TLB */ #endif #ifndef R4650 @@ -275,7 +275,7 @@ FRAME(start,sp,0,ra) /************************************************************************ ** -** Initialization required if using IDT/c or libc.a, standard C Lib +** Initialization required if using IDT/c or libc.a, standard C Lib ** ** can SKIP if not necessary for application ** diff --git a/c/src/lib/libbsp/mips/p4000/startup/bspstart.c b/c/src/lib/libbsp/mips/p4000/startup/bspstart.c index 7ff8a8e381..a9fb9bce0a 100644 --- a/c/src/lib/libbsp/mips/p4000/startup/bspstart.c +++ b/c/src/lib/libbsp/mips/p4000/startup/bspstart.c @@ -26,7 +26,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -43,7 +43,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -60,7 +60,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + #define LIBC_HEAP_SIZE (64 * 1024) void bsp_pretasking_hook(void) @@ -78,7 +78,7 @@ void bsp_pretasking_hook(void) rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + extern int end; /* defined by linker */ /* diff --git a/c/src/lib/libbsp/mips/p4000/startup/idtmem.S b/c/src/lib/libbsp/mips/p4000/startup/idtmem.S index 3e2b373d72..eb843984ea 100644 --- a/c/src/lib/libbsp/mips/p4000/startup/idtmem.S +++ b/c/src/lib/libbsp/mips/p4000/startup/idtmem.S @@ -34,8 +34,8 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT **************************************************************************/ /* - * 950313: Ketan fixed bugs in mfc0/mtc0 hazards, and removed hack - * to set mem_size. + * 950313: Ketan fixed bugs in mfc0/mtc0 hazards, and removed hack + * to set mem_size. */ #include <rtems/mips/iregdef.h> @@ -44,12 +44,12 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT .data mem_size: - .word 0 + .word 0 dcache_size: - .word 0 + .word 0 icache_size: #if __mips == 1 - .word MINCACHE + .word MINCACHE #endif #if __mips == 3 .word 0 @@ -71,11 +71,11 @@ scache_linesize: .text #if __mips == 1 -#define CONFIGFRM ((2*4)+4) +#define CONFIGFRM ((2*4)+4) /************************************************************************* ** -** Config_Dcache() -- determine size of Data cache +** Config_Dcache() -- determine size of Data cache ** **************************************************************************/ @@ -100,7 +100,7 @@ FRAME(config_Dcache,sp, CONFIGFRM, ra) addu sp,CONFIGFRM /* pop stack */ j ra ENDFRAME(config_Dcache) - + /************************************************************************* ** @@ -123,7 +123,7 @@ FRAME(config_Icache,sp, CONFIGFRM, ra) .set reorder jal _size_cache /* returns instruction cache size */ .set noreorder - mtc0 zero,C0_SR /* swap back caches */ + mtc0 zero,C0_SR /* swap back caches */ nop and s0,~SR_PE /* do not inadvertantly clear PE */ mtc0 s0,C0_SR /* restore SR */ @@ -198,7 +198,7 @@ ENDFRAME(_size_cache) ** ****************************************************************************/ FRAME(flush_Dcache,sp,FLUSHFRM,ra) - lw t2, dcache_size + lw t2, dcache_size .set noreorder mfc0 t3,C0_SR /* save SR */ nop @@ -240,7 +240,7 @@ ENDFRAME(flush_Dcache) ** ****************************************************************************/ FRAME(flush_Icache,sp,FLUSHFRM,ra) - lw t1,icache_size + lw t1,icache_size .set noreorder mfc0 t3,C0_SR /* save SR */ nop @@ -346,7 +346,7 @@ FRAME(clear_Icache,sp,0,ra) */ .set noreorder mfc0 t3,C0_SR /* save SR */ - nop + nop la v0,1f li v1,K1BASE or v0,v1 @@ -386,7 +386,7 @@ ENDFRAME(clear_Icache) /************************************************************************** ** -** get_mem_conf - get memory configuration +** get_mem_conf - get memory configuration ** ***************************************************************************/ @@ -398,7 +398,7 @@ FRAME(get_mem_conf,sp,0,ra) lw t7, icache_size sw t7, 4(a0) lw t8, dcache_size - sw t8, 8(a0) + sw t8, 8(a0) j ra ENDFRAME(get_mem_conf) @@ -429,24 +429,24 @@ label: /* This is a bit of a hack really because it relies on minaddr=a0 */ #define _doop1(op1) \ - cache op1,0(a0) + cache op1,0(a0) #define _doop2(op1, op2) \ cache op1,0(a0) ; \ - cache op2,0(a0) + cache op2,0(a0) /* specials for cache initialisation */ #define _doop1lw1(op1) \ cache op1,0(a0) ; \ lw zero,0(a0) ; \ - cache op1,0(a0) + cache op1,0(a0) #define _doop121(op1,op2) \ cache op1,0(a0) ; \ nop; \ cache op2,0(a0) ; \ nop; \ - cache op1,0(a0) + cache op1,0(a0) #define _oploopn(minaddr, maxaddr, linesize, tag, ops) \ .set noreorder ; \ @@ -481,7 +481,7 @@ label: /* * static void _size_cache() R4000 - * + * * Internal routine to determine cache sizes by looking at R4000 config * register. Sizes are returned in registers, as follows: * t2 icache size @@ -508,20 +508,20 @@ LEAF(_size_cache) and t1,t0,CFG_IB bnez t1,1f li t4,16 -1: +1: li t5,32 and t1,t0,CFG_DB bnez t1,1f li t5,16 -1: +1: move t6,zero # default to no scache move t7,zero # and t1,t0,CFG_C_UNCACHED # test config register bnez t1,1f # no scache if uncached/non-coherent - + li t6,0x100000 # assume 1Mb scache <<-NOTE and t1,t0,CFG_SBMASK srl t1,CFG_SBSHIFT @@ -533,7 +533,7 @@ END(_size_cache) /* * void config_cache() R4000 - * + * * Work out size of I, D & S caches, assuming they are already initialised. */ LEAF(config_cache) @@ -563,7 +563,7 @@ LEAF(_init_cache) move v0,ra bal _size_cache move ra,v0 - + /* * The caches may be in an indeterminate state, * so we force good parity into them by doing an @@ -603,7 +603,7 @@ LEAF(_init_cache) 1: mtc0 v0,C0_SR j ra END(_init_cache) - + /* * void flush_cache (void) R4000 @@ -620,7 +620,7 @@ LEAF(flush_cache) icacheop(a0,a1,a2,a3,Index_Writeback_Inv_SD) b 2f -1: +1: lw a2,icache_size blez a2,2f lw a3,icache_linesize @@ -636,7 +636,7 @@ LEAF(flush_cache) 2: j ra END(flush_cache) - + /* * void flush_cache_nowrite (void) R4000 * @@ -673,7 +673,7 @@ LEAF(flush_cache_nowrite) 2: mtc0 v0,C0_SR j ra END(flush_cache_nowrite) - + /* * void clean_cache (unsigned kva, size_t n) R4000 * @@ -706,7 +706,7 @@ XLEAF(clear_cache) 2: j ra END(clean_cache) - + /* * void clean_dcache (unsigned kva, size_t n) R4000 * @@ -721,7 +721,7 @@ LEAF(clean_dcache) 2: j ra END(clean_dcache) - + /* * void clean_dcache_indexed (unsigned kva, size_t n) R4000 * @@ -745,7 +745,7 @@ LEAF(clean_dcache_indexed) 2: j ra END(clean_dcache_indexed) - + /* * void clean_dcache_nowrite (unsigned kva, size_t n) R4000 * @@ -760,7 +760,7 @@ LEAF(clean_dcache_nowrite) 2: j ra END(clean_dcache_nowrite) - + /* * void clean_dcache_nowrite_indexed (unsigned kva, size_t n) R4000 * @@ -792,7 +792,7 @@ LEAF(clean_dcache_nowrite_indexed) 2: mtc0 v0,C0_SR j ra END(clean_dcache_nowrite_indexed) - + /* * void clean_icache (unsigned kva, size_t n) R4000 * @@ -807,7 +807,7 @@ LEAF(clean_icache) 2: j ra END(clean_icache) - + /* * void clean_icache_indexed (unsigned kva, size_t n) R4000 * @@ -831,7 +831,7 @@ LEAF(clean_icache_indexed) 2: j ra END(clean_icache_indexed) - + /* @@ -847,7 +847,7 @@ LEAF(clean_scache) 2: j ra END(clean_scache) - + /* * void clean_scache_indexed (unsigned kva, size_t n) R4000 * @@ -862,7 +862,7 @@ LEAF(clean_scache_indexed) 2: j ra END(clean_scache_indexed) - + /* * void clean_scache_nowrite (unsigned kva, size_t n) R4000 * @@ -877,7 +877,7 @@ LEAF(clean_scache_nowrite) 2: j ra END(clean_scache_nowrite) - + /* * void clean_scache_nowrite_indexed (unsigned kva, size_t n) R4000 * @@ -900,7 +900,7 @@ LEAF(clean_scache_nowrite_indexed) 2: mtc0 v0,C0_SR j ra END(clean_scache_nowrite_indexed) - + /************************************************************************** ** ** get_mem_conf - get memory configuration R4000 @@ -915,9 +915,9 @@ FRAME(get_mem_conf,sp,0,ra) lw t7, icache_size sw t7, 4(a0) lw t8, dcache_size - sw t8, 8(a0) + sw t8, 8(a0) lw t7, scache_size - sw t7, 12(a0) + sw t7, 12(a0) j ra ENDFRAME(get_mem_conf) @@ -925,7 +925,7 @@ ENDFRAME(get_mem_conf) #endif /* __mips == 3 */ /* - * void set_mem_size (mem_size) + * void set_mem_size (mem_size) * * config_memory()'s memory size gets written into mem_size here. * Now we don't need to call config_cache() with memory size - New to IDTC6.0 diff --git a/c/src/lib/libbsp/mips/p4000/startup/idttlb.S b/c/src/lib/libbsp/mips/p4000/startup/idttlb.S index e1267dbbc8..bfe741afcc 100644 --- a/c/src/lib/libbsp/mips/p4000/startup/idttlb.S +++ b/c/src/lib/libbsp/mips/p4000/startup/idttlb.S @@ -186,7 +186,7 @@ ENDFRAME(ret_tlbhi) FRAME(ret_tlbpid,sp,0,ra) #if __mips == 1 .set noreorder - mfc0 v0,C0_TLBHI # fetch tlb high + mfc0 v0,C0_TLBHI # fetch tlb high nop and v0,TLBHI_PIDMASK # isolate and position srl v0,TLBHI_PIDSHIFT @@ -219,8 +219,8 @@ FRAME(tlbprobe,sp,0,ra) mfc0 t0,C0_SR /* fetch status reg */ and a0,TLBHI_VPNMASK /* isolate just the vpn */ and t0,~SR_PE /* don't inadvertantly clear pe */ - mtc0 zero,C0_SR - mfc0 t1,C0_TLBHI + mtc0 zero,C0_SR + mfc0 t1,C0_TLBHI sll a1,TLBHI_PIDSHIFT /* possition the pid */ and a1,TLBHI_PIDMASK or a0,a1 /* build entry hi value */ @@ -271,7 +271,7 @@ ENDFRAME(tlbprobe) FRAME(resettlb,sp,0,ra) #if __mips == 1 .set noreorder - mfc0 t0,C0_TLBHI # fetch the current hi + mfc0 t0,C0_TLBHI # fetch the current hi mfc0 v0,C0_SR # fetch the status reg. li t2,K0BASE&TLBHI_VPNMASK and v0,~SR_PE # dont inadvertantly clear PE @@ -329,13 +329,13 @@ FRAME(map_tlb,sp,0,ra) mtc0 zero,C0_SR mtc0 a1,C0_TLBHI # set the hi entry - mtc0 a2,C0_TLBLO # set the lo entry + mtc0 a2,C0_TLBLO # set the lo entry mtc0 a0,C0_INX # load the index nop tlbwi # put the hi/lo in tlb entry indexed nop - mtc0 a3,C0_TLBHI # put back the tlb hi reg - mtc0 v0,C0_SR # restore the status register + mtc0 a3,C0_TLBHI # put back the tlb hi reg + mtc0 v0,C0_SR # restore the status register j ra nop .set reorder @@ -357,7 +357,7 @@ FRAME(map_tlb4000,sp,0,ra) mfc0 t1,C0_TLBHI # save current TLBPID mfc0 v0,C0_SR # save SR and disable interrupts mtc0 zero,C0_SR - mtc0 t2,C0_PAGEMASK # set + mtc0 t2,C0_PAGEMASK # set mtc0 a1,C0_TLBHI # set VPN and TLBPID mtc0 a2,C0_TLBLO0 # set PPN and access bits mtc0 a3,C0_TLBLO1 # set PPN and access bits diff --git a/c/src/lib/libbsp/mips/shared/gdbstub/gdb_if.h b/c/src/lib/libbsp/mips/shared/gdbstub/gdb_if.h index e2d94a89e5..bc8efb72ae 100644 --- a/c/src/lib/libbsp/mips/shared/gdbstub/gdb_if.h +++ b/c/src/lib/libbsp/mips/shared/gdbstub/gdb_if.h @@ -55,7 +55,7 @@ int rtems_gdb_stub_get_current_thread(void); int rtems_gdb_stub_get_next_thread(int); int rtems_gdb_stub_get_offsets( unsigned char **text_addr, - unsigned char **data_addr, + unsigned char **data_addr, unsigned char **bss_addr ); int rtems_gdb_stub_get_thread_regs( @@ -66,7 +66,7 @@ int rtems_gdb_stub_set_thread_regs( int thread, unsigned int *registers ); -void rtems_gdb_process_query( +void rtems_gdb_process_query( char *inbuffer, char *outbuffer, int do_threads, diff --git a/c/src/lib/libbsp/mips/shared/gdbstub/mips-stub.c b/c/src/lib/libbsp/mips/shared/gdbstub/mips-stub.c index a2d4c5fd61..fc0f867d8b 100644 --- a/c/src/lib/libbsp/mips/shared/gdbstub/mips-stub.c +++ b/c/src/lib/libbsp/mips/shared/gdbstub/mips-stub.c @@ -252,7 +252,7 @@ struct z0break /* the address pointer, really, really must be a pointer to ** a 32 bit quantity (likely 64 on the R4k), so the full instruction is read & - ** written. Making it a char * as on the i386 will cause + ** written. Making it a char * as on the i386 will cause ** the zbreaks to mess up the breakpoint instructions */ unsigned *address; @@ -921,7 +921,7 @@ void gdb_stub_report_exception_info( *optr++ = ':'; optr = mem2hstr(optr, (unsigned char *)&frame->sp, R_SZ ); *optr++ = ';'; - + *optr++ = highhex(PC); /*gdb_hexchars[PC]; */ *optr++ = lowhex(PC); *optr++ = ':'; @@ -929,7 +929,7 @@ void gdb_stub_report_exception_info( *optr++ = ';'; #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) - if (do_threads) + if (do_threads) { *optr++ = 't'; *optr++ = 'h'; @@ -974,7 +974,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) long long regval; void *regptr; int binary; - + registers = (mips_register_t *)frame; @@ -991,7 +991,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) /* reapply all breakpoints regardless of how we came in */ struct z0break *z0, *zother; - for (zother=z0break_list; zother!=NULL; zother=zother->next) + for (zother=z0break_list; zother!=NULL; zother=zother->next) { if( zother->instr == 0xffffffff ) { @@ -1008,9 +1008,9 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) if( *((unsigned *)frame->epc) == BREAK_INSTR ) { /* see if its one of our zbreaks */ - for (z0=z0break_list; z0!=NULL; z0=z0->next) + for (z0=z0break_list; z0!=NULL; z0=z0->next) { - if( (unsigned)z0->address == frame->epc) + if( (unsigned)z0->address == frame->epc) break; } if( z0 ) @@ -1020,7 +1020,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) /* flag the breakpoint */ z0->instr = 0xffffffff; - /* + /* now when we return, we'll execute the original code in the original state. This leaves our breakpoint inactive since the break instruction isn't there, but we'll reapply @@ -1208,7 +1208,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) { int testThread; - if( vhstr2thread(&inBuffer[1], &testThread) == NULL ) + if( vhstr2thread(&inBuffer[1], &testThread) == NULL ) { strcpy(outBuffer, "E01"); break; @@ -1225,20 +1225,20 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) } break; #endif - + case 'H': /* set new thread */ #if defined(GDB_STUB_ENABLE_THREAD_SUPPORT) if (inBuffer[1] != 'g') { break; } - + if (!do_threads) { break; } - + { int tmp, ret; - + /* Set new generic thread */ if (vhstr2thread(&inBuffer[2], &tmp) == NULL) { strcpy(outBuffer, "E01"); @@ -1256,7 +1256,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) break; } - /* Save current thread registers if necessary */ + /* Save current thread registers if necessary */ if (current_thread != thread) { ret = rtems_gdb_stub_set_thread_regs( current_thread, (unsigned int *) ¤t_thread_registers); @@ -1274,7 +1274,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) break; } } - + current_thread = tmp; strcpy(outBuffer, "OK"); } @@ -1285,7 +1285,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) case 'Z': /* Add breakpoint */ - { + { int ret, type, len; unsigned *address; struct z0break *z0; @@ -1334,7 +1334,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) /* Let us copy memory from address add stuff the break point in */ /* *if (mem2hstr(z0->buf, address, 1) == NULL || - !hstr2mem(address, "cc" , 1)) { + !hstr2mem(address, "cc" , 1)) { * Memory error * z0->next = z0break_avail; @@ -1367,7 +1367,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) z0->prev = NULL; z0->next = znxt; - + if( znxt ) znxt->prev = z0; z0break_list = z0; } @@ -1378,18 +1378,18 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) case 'z': /* remove breakpoint */ - if (inBuffer[1] == 'z') + if (inBuffer[1] == 'z') { goto dumpzbreaks; - + /* * zz packet - remove all breaks * z0last = NULL; - for (z0=z0break_list; z0!=NULL; z0=z0->next) + for (z0=z0break_list; z0!=NULL; z0=z0->next) { - if(!hstr2mem(z0->address, z0->buf, R_SZ)) + if(!hstr2mem(z0->address, z0->buf, R_SZ)) { ret = 0; } @@ -1416,7 +1416,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) int ret, type, len; unsigned *address; struct z0break *z0; - + ret = parse_zbreak(inBuffer, &type, (unsigned char **)&address, &len); if (!ret) { @@ -1433,20 +1433,20 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) strcpy(outBuffer, "E02"); break; } - + /* Let us check whether this break point set */ for (z0=z0break_list; z0!=NULL; z0=z0->next) { if (z0->address == address) { break; } } - + if (z0 == NULL) { /* Unknown breakpoint */ strcpy(outBuffer, "E03"); break; } - + /* if (!hstr2mem(z0->address, z0->buf, R_SZ)) { strcpy(outBuffer, "E04"); @@ -1458,7 +1458,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) /* put the old instruction back */ *(z0->address) = z0->instr; } - + /* Unlink entry */ { struct z0break *zprv = z0->prev, *znxt = z0->next; @@ -1474,7 +1474,7 @@ void handle_exception (rtems_vector_number vector, CPU_Interrupt_frame *frame) z0->prev = NULL; z0->next = znxt; } - + strcpy(outBuffer, "OK"); } break; @@ -1605,7 +1605,7 @@ static int is_steppable(unsigned ptr) static char initialized = 0; /* 0 means we are not initialized */ -void mips_gdb_stub_install(int enableThreads) +void mips_gdb_stub_install(int enableThreads) { /* These are the RTEMS-defined vectors for all the MIPS exceptions @@ -1632,7 +1632,7 @@ void mips_gdb_stub_install(int enableThreads) int i; rtems_isr_entry old; - if (initialized) + if (initialized) { ASSERT(0); return; @@ -1653,16 +1653,16 @@ void mips_gdb_stub_install(int enableThreads) z0break_avail = NULL; z0break_list = NULL; - + /* z0breaks list init, now we'll do it so it makes sense... */ - for (i=0; i<BREAKNUM; i++) + for (i=0; i<BREAKNUM; i++) { memset( (z0= &z0break_arr[i]), 0, sizeof(struct z0break)); z0->next = z0break_avail; z0break_avail = z0; } - } + } for(i=0; exceptionVector[i] > -1; i++) { diff --git a/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c b/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c index e4954ab9af..f5aaeb9eac 100644 --- a/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c +++ b/c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c @@ -49,7 +49,7 @@ uint32_t Clock_isrs; /* ISRs until next tick */ /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -136,14 +136,14 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -155,15 +155,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -174,7 +174,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/no_cpu/no_bsp/console/console.c b/c/src/lib/libbsp/no_cpu/no_bsp/console/console.c index 567098dd59..7dd9d12f1b 100644 --- a/c/src/lib/libbsp/no_cpu/no_bsp/console/console.c +++ b/c/src/lib/libbsp/no_cpu/no_bsp/console/console.c @@ -34,16 +34,16 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + status = rtems_io_register_name( "/dev/console", major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -130,7 +130,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -158,7 +158,7 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -177,7 +177,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h b/c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h index 8728b23c51..d07e510138 100644 --- a/c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h +++ b/c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h @@ -86,7 +86,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c b/c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c index e5ade81327..8b90945d91 100644 --- a/c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c +++ b/c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c @@ -19,7 +19,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -36,7 +36,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int end; @@ -69,7 +69,7 @@ void bsp_pretasking_hook(void) rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + /* * bsp_start * diff --git a/c/src/lib/libbsp/or32/orp/clock/clockdrv.c b/c/src/lib/libbsp/or32/orp/clock/clockdrv.c index 236fa46b88..c0a15042c8 100644 --- a/c/src/lib/libbsp/or32/orp/clock/clockdrv.c +++ b/c/src/lib/libbsp/or32/orp/clock/clockdrv.c @@ -51,7 +51,7 @@ uint32_t Clock_isrs; /* ISRs until next tick */ /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -87,7 +87,7 @@ void Clock_isr(uint32_t vector, if(old_handler) (*old_handler)(vector,pc,ear,sr); } - + /* * Install_clock * @@ -132,7 +132,7 @@ void Install_clock() Or1k_Interrupt_Vectors[8] = (uint32_t)Clock_isr; asm volatile ("l.mtspr r0,%0,0x11\n\t":: "r" (sr)); - + Clock_driver_ticks = 0; /* @@ -182,14 +182,14 @@ rtems_device_driver Clock_initialize( ) { Install_clock(); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -201,15 +201,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR,0,0,0); @@ -220,7 +220,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/or32/orp/console/console.c b/c/src/lib/libbsp/or32/orp/console/console.c index a6cddc419f..5630f8cd60 100644 --- a/c/src/lib/libbsp/or32/orp/console/console.c +++ b/c/src/lib/libbsp/or32/orp/console/console.c @@ -48,7 +48,7 @@ void console_interrupt(unsigned int vector,unsigned int pc, if(pending) { reason = uart->read.IIR; - + switch(reason) { case 0: /* Interrupt because of modem status */ @@ -124,10 +124,10 @@ rtems_device_driver console_initialize( major, (rtems_device_minor_number) 0 ); - + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - + return RTEMS_SUCCESSFUL; } @@ -220,7 +220,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -248,13 +248,13 @@ rtems_device_driver console_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; maximum = rw_args->count; - + for (count = 0; count < maximum; count++) { buffer[ count ] = inbyte(); @@ -285,7 +285,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( @@ -343,7 +343,7 @@ rtems_device_driver console_control( param = (int)(request->data); switch(param) { - case 50: + case 50: case 150: case 300: case 600: diff --git a/c/src/lib/libbsp/or32/orp/console/console.h b/c/src/lib/libbsp/or32/orp/console/console.h index 6225298cf4..6e8efb24f8 100644 --- a/c/src/lib/libbsp/or32/orp/console/console.h +++ b/c/src/lib/libbsp/or32/orp/console/console.h @@ -1,11 +1,11 @@ /* console.h -- console header file for the Bender board using the * Or1k architecture. - * + * * Copyright (C) 2001 Chris Ziomkowski, chris@asics.ws * * This file is distributed as part of the RTEMS package from * OAR Corporation, and follows the licensing and distribution - * terms as stated for RTEMS. + * terms as stated for RTEMS. * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). diff --git a/c/src/lib/libbsp/or32/orp/include/bsp.h b/c/src/lib/libbsp/or32/orp/include/bsp.h index f0e813fd4b..13e318254b 100644 --- a/c/src/lib/libbsp/or32/orp/include/bsp.h +++ b/c/src/lib/libbsp/or32/orp/include/bsp.h @@ -86,7 +86,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/or32/orp/start/start.S b/c/src/lib/libbsp/or32/orp/start/start.S index 7c7ce0dd1c..af2a2d07d5 100644 --- a/c/src/lib/libbsp/or32/orp/start/start.S +++ b/c/src/lib/libbsp/or32/orp/start/start.S @@ -1,11 +1,11 @@ /* start.S -- bootup code for the Bender board using the Or1k * architecture. - * + * * Copyright (C) 2001 Chris Ziomkowski, chris@asics.ws * * This file is distributed as part of the RTEMS package from * OAR Corporation, and follows the licensing and distribution - * terms as stated for RTEMS. + * terms as stated for RTEMS. * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -14,7 +14,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. */ - + #include <rtems/asm.h> @@ -36,10 +36,10 @@ return a bus error when accessed. */ .file "start.S" - + .data PUBLIC(Or1k_Interrupt_Vectors) -SYM (Or1k_Interrupt_Vectors): +SYM (Or1k_Interrupt_Vectors): .word 0x00000000 # No Vector .word _start # Reset Vector (Ignored) .word __Internal_error_Occurred # Bus Error @@ -58,17 +58,17 @@ SYM (Or1k_Interrupt_Vectors): /* PUBLIC(BOTTOM_OF_MEMORY) -SYM (BOTTOM_OF_MEMORY): +SYM (BOTTOM_OF_MEMORY): .word 0x10000000 # Assume RAM @ 0 for the sim PUBLIC(TOP_OF_MEMORY) -SYM (TOP_OF_MEMORY): +SYM (TOP_OF_MEMORY): .word 0x10800000 # Assume RAM @ 0 for the sim -*/ +*/ PUBLIC(_mem_end) SYM (_mem_end): .word 0x10800000 - + BEGIN_CODE .org 0x0 /**************/ @@ -76,7 +76,7 @@ SYM (_mem_end): /**************/ /* Place the panic vector at 0 */ - + .proc __panic .def __panic .val __panic @@ -85,10 +85,10 @@ SYM (_mem_end): .endef .global __panic __panic: - + l.jal __exit l.nop - + .endproc __panic .def __panic .val . @@ -106,7 +106,7 @@ __panic: values, and finally disable exceptions, restore EPCR and ESR (EEAR is not essential to restore) and then return from the interrupt. */ - + /******************************************/ /* Normal exception handling */ /* Called with 80 bytes allocated on the */ @@ -121,7 +121,7 @@ __panic: .type 044 .endef .global ___standard_exception -___standard_exception: +___standard_exception: l.sfeqi r11,0 /* Ignore it if it is zero */ l.bf L2_2 l.sw 4(r1),r4 /* Save r4 */ @@ -133,11 +133,11 @@ ___standard_exception: l.sw 8(r1),r5 l.sw 12(r1),r6 l.sw 16(r1),r7 - + l.mfspr r4,r0,0x20 /* Save EPCR */ l.mfspr r5,r0,0x30 /* Save EEAR */ l.mfspr r6,r0,0x40 /* Save ESR */ - + l.mfspr r7,r0,17 l.ori r7,r7,2 l.mtspr r0,r7,17 /* Reenable exceptions */ @@ -187,7 +187,7 @@ ___standard_exception: l.mfspr r3,r0,17 /* Get SR value */ l.and r3,r3,r6 /* Clear exception bit */ l.mfspr r0,r3,17 /* Disable exceptions */ - + l.lwz r6,76(r1) /* Recover ESR */ l.lwz r4,72(r1) /* Recover EPCR */ l.mtspr r0,r4,0x20 /* Restore ESR */ @@ -203,7 +203,7 @@ L2_2: l.nop /* The document doesn't say this is a delay slot instruction, but the simulator doesn't work without this. */ - + .endproc ___standard_exception .def ___standard_exception .val . @@ -228,7 +228,7 @@ SYM (TOP_OF_MEMORY): are being used here. If you add code to the above routine, make sure it isn't more than 7 instructions or you will overflow into the reset vector. **/ - + /****************************/ /* Reset vector static code */ /****************************/ @@ -240,7 +240,7 @@ ___rst: l.movhi r1,hi(_TOP_OF_MEMORY) l.ori r1,r1,lo(_TOP_OF_MEMORY) l.lwz r1,0(r1) /* Dereference it */ - + /* Set the frame pointer */ l.add r2,r0,r1 @@ -262,7 +262,7 @@ ___rst: /* error vector, which is why it is left to the _start */ /* routine. */ /***********************************************************/ - + /********************************/ /* Bus Error vector static code */ /********************************/ @@ -278,17 +278,17 @@ ___bus_error: l.lwz r11,8(r11) l.j ___standard_exception l.addi r3,r0,2 - + .endproc ___bus_error /* Put _Internal_error_Occurred and _int_reenable here */ /* No reason to waste space...it'll be filled with 0 if */ /* we don't... */ - + /********************************/ /* _Internal_error_Occurred */ /********************************/ - + .proc __Internal_error_Occurred .def __Internal_error_Occurred .val __Internal_error_Occurred @@ -297,21 +297,21 @@ ___bus_error: .endef .global __Internal_error_Occurred __Internal_error_Occurred: - + l.jal __panic l.nop - + .endproc __Internal_error_Occurred .def __Internal_error_Occurred .val . .scl -1 .endef - + /*********************/ /* _int_reenable */ /*********************/ - + .proc __int_reenable .def __int_reenable .val __int_reenable @@ -320,12 +320,12 @@ __Internal_error_Occurred: .endef .global __int_reenable __int_reenable: - + l.mfspr r11,r0,17 l.ori r11,r11,0x04 l.jr r9 l.mtspr r0,r11,17 - + .endproc __int_reenable .def __int_reenable .val . @@ -335,7 +335,7 @@ __int_reenable: /*********************&**/ /* ___user_function */ /************************/ - + .proc ___user_function .def ___user_function .val ___user_function @@ -347,18 +347,18 @@ ___user_function: /* r11 contains the address to call. We can modify r7, r8, r12, and r14 at will */ - + l.movhi r7,hi(__Thread_Dispatch_disable_level) l.ori r7,r7,lo(__Thread_Dispatch_disable_level) l.lwz r8,0(r7) - + l.addi r1,r1,-8 # Stack must be DWORD aligned l.sw 0(r1),r9 # Save the return address l.addi r8,r8,1 # Increment __Thread_Dispatch... l.jalr r11 l.sw 0(r7),r8 # Disable thread dispatching - + /* Now, we need to determine if we need to service the RTEMS environment. RTEMS tries to draw a distinction between a RAW handler @@ -387,20 +387,20 @@ ___user_function: place of the interrupt stack. We don't use a separate exception stack, so this should not be an issue for us. */ - + l.movhi r7,hi(__Thread_Dispatch_disable_level) l.ori r7,r7,lo(__Thread_Dispatch_disable_level) l.lwz r8,0(r7) l.addi r8,r8,-1 # Decrement __Thread_Dispatch... - l.sw 0(r7),r8 # Memory stall likely here... + l.sw 0(r7),r8 # Memory stall likely here... l.sfeqi r8,0 # Skip if _Thread_Dispatch != 0 l.bnf L4_2 l.movhi r7,hi(__Context_Switch_necessary) - + l.ori r7,r7,lo(__Context_Switch_necessary) l.lwz r8,0(r7) - + l.movhi r7,hi(__ISR_Signals_to_thread_executing) l.ori r7,r7,lo(__ISR_Signals_to_thread_executing) l.lwz r12,0(r7) @@ -408,28 +408,28 @@ ___user_function: l.sfeqi r8,0 # Skip if __Context... is false l.bf L4_2 l.movhi r14,hi(__Thread_Dispatch) - + l.sfeqi r12,0 # Skip if __ISR... is true l.bnf L4_2 l.ori r14,r14,lo(__Thread_Dispatch) - + l.jalr r14 l.sw 0(r7),r0 # Set __ISR... to false - -L4_2: + +L4_2: l.lwz r9,0(r1) # Recover the return address l.jr r9 l.addi r1,r1,8 # Reset the stack - + .endproc ___user_function .def ___user_function .val . .scl -1 .endef - + /* Code wasted between here and 0x300 */ - + /**************************************/ /* Data Page Fault vector static code */ /**************************************/ @@ -448,7 +448,7 @@ ___data_page_fault: .endproc ___data_page_fault /* Code wasted between here and 0x400 */ - + /*********************************************/ /* Instruction Page Fault vector static code */ /*********************************************/ @@ -467,7 +467,7 @@ ___insn_page_fault: .endproc ___insn_page_fault /* Code wasted between here and 0x500 */ - + /**************************************/ /* Low Priority Interrupt static code */ /**************************************/ @@ -490,7 +490,7 @@ ___low_priority_int: .endproc ___low_priority_int /* Code wasted between here and 0x600 */ - + /******************************************/ /* Alignment Exception vector static code */ /******************************************/ @@ -509,7 +509,7 @@ ___alignment_exception: .endproc ___alignment_exception /* Code wasted between here and 0x700 */ - + /******************************************/ /* Illegal Instruction vector static code */ /******************************************/ @@ -528,7 +528,7 @@ ___illegal_instruction: .endproc ___illegal_instruction /* Code wasted between here and 0x800 */ - + /***************************************/ /* High Priority Interrupt static code */ /***************************************/ @@ -551,7 +551,7 @@ ___high_priority_int: .endproc ___high_priority_int /* Code wasted between here and 0x900 */ - + /********************************/ /* ITBL Miss vector static code */ /********************************/ @@ -570,7 +570,7 @@ ___ITBL_miss_exception: .endproc ___ITBL_miss_exception /* Code wasted between here and 0xA00 */ - + /********************************/ /* DTBL Miss vector static code */ /********************************/ @@ -589,7 +589,7 @@ ___DTBL_miss_exception: .endproc ___DTBL_miss_exception /* Code wasted between here and 0xB00 */ - + /**************************************/ /* Range Exception vector static code */ /**************************************/ @@ -608,7 +608,7 @@ ___range_exception: .endproc ___range_exception /* Code wasted between here and 0xC00 */ - + /**********************************/ /* System Call vector static code */ /**********************************/ @@ -627,7 +627,7 @@ ___system_call: .endproc ___system_call /* Code wasted between here and 0xD00 */ - + /**********************************/ /* Breakpoint vector static code */ /**********************************/ @@ -648,7 +648,7 @@ ___breakpoint: .endproc ___breakpoint /* Code wasted between here and 0xE00 */ - + /*************************************/ /* Trap Exception vector static code */ /*************************************/ @@ -667,13 +667,13 @@ ___trap_exception: .endproc ___trap_exception /* Code wasted between here and 0x2000 */ - + /* Exceptions from 0xF00 to 0x1F00 are not defined */ /* in the Or1k architecture. They should be filled */ /* in here for other implementations. */ .org 0x2000 /* Start after exception vector table */ - + /*********************/ /* start */ /*********************/ @@ -688,13 +688,13 @@ ___trap_exception: information by probing, as the scheme would be too complex and inherently unreliable. */ - /* Initialize strings and structures here */ -L_program: + /* Initialize strings and structures here */ +L_program: .ascii "RTEMS_or1k\000" .align 4 -L_argv: +L_argv: .word L_program - + .proc _start .def _start .val _start @@ -702,11 +702,11 @@ L_argv: .type 044 .endef .global _start -_start: +_start: /* Initialize the memory controller here! Discussions with Rudi have stated that - the first few bytes of the ROM image should + the first few bytes of the ROM image should contain a RAM map as opposed to trying to figure out what to do based on probing. This means a separate build of the OS for every @@ -714,12 +714,12 @@ _start: doesn't seem to be a better alternative. */ /*** FIX ME! Initialize the external memory controller! ***/ - + /* Move the data segment to RAM. Alternatively, we may copy the text segment as well. For now, we'll assume that the cache gives us sufficient performance that this is not necessary. It will be very easy to add this later. - */ + */ l.movhi r4,hi(_etext) l.ori r4,r4,lo(_etext) l.movhi r5,hi(_BOTTOM_OF_MEMORY) @@ -730,8 +730,8 @@ _start: l.ori r3,r3,lo(_edata) l.movhi r5,hi(_data_start) l.ori r5,r5,lo(_data_start) - -L3_0: + +L3_0: l.lwz r6,0(r4) l.addi r5,r5,4 l.addi r4,r4,4 @@ -747,7 +747,7 @@ L3_0: l.sfleu r3,r5 l.bf L3_2 # Check for no BSS segment! l.nop - + L3_1: l.addi r5,r5,4 l.sfeq r5,r3 @@ -759,44 +759,44 @@ L3_2: l.movhi r4,hi(__mem_end) l.ori r4,r4,lo(__mem_end) l.sw 0(r4),r5 - + /* Due to what I consider a bug in RTEMS, the entire heap must be zeroed. I think this is the dumbest thing I've ever heard, but whatever turns them on. I'd rather see the code which depends on this behavior fixed. I myself have never written code which assumes zeroes - will be returned from memory allocated from the heap. + will be returned from memory allocated from the heap. Anyway, if I don't do it here, I have to set a flag in the CPU structure which then will do it anyway, but from less efficient C code! Zero from here to the stack pointer... One day when I'm old and gray maybe I'll set this to random values instead and fix whatever breaks. */ - + l.sw 0(r5),r0 l.sfeq r5,r1 l.bnf L3_3 - l.addi r5,r5,4 - + l.addi r5,r5,4 + L3_3: l.addi r3,r0,1 /* Set argc to 1 */ l.movhi r4,hi(L_argv) /* Initialize argv */ l.ori r4,r4,lo(L_argv) l.addi r5,r5,0 /* Set envp to NULL */ - + l.mfspr r11,r0,17 /* Get SR value */ l.ori r11,r11,0x4 /* Set interrupt enable bit */ l.jal _boot_card /* Boot up the card...run the OS */ l.mtspr r0,r11,17 /* Enable exceptions (DELAY) */ - + /* We're done. We exited normally. Shut down. */ l.jal __exit l.nop - + .endproc _start .def _start .val . .scl -1 .endef - + END_CODE diff --git a/c/src/lib/libbsp/or32/orp/startup/bspstart.c b/c/src/lib/libbsp/or32/orp/startup/bspstart.c index 16506ba11f..27bfb58a9e 100644 --- a/c/src/lib/libbsp/or32/orp/startup/bspstart.c +++ b/c/src/lib/libbsp/or32/orp/startup/bspstart.c @@ -18,12 +18,12 @@ #include <bsp.h> #include <rtems/libio.h> - + #include <rtems/libcsupport.h> - + #include <string.h> extern int _mem_end; - + /* * The original table from the application and our copy of it with * some changes. @@ -38,7 +38,7 @@ rtems_cpu_table Cpu_table; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -55,7 +55,7 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { uint32_t heap_start; @@ -70,7 +70,7 @@ void bsp_pretasking_hook(void) rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + /* * bsp_start * @@ -96,7 +96,7 @@ void bsp_start( void ) BSP_Configuration.work_space_start = _mem_end; _mem_end += BSP_Configuration.work_space_size + 512; ( BSP_Configuration.work_space_size + 512 ); - + BSP_Configuration.work_space_start = (void *) ((unsigned int)((char *)BSP_Configuration.work_space_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1)); /* diff --git a/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c b/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c index b3a1fc1c29..b768a20541 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c +++ b/c/src/lib/libbsp/powerpc/dmv177/clock/clock.c @@ -48,11 +48,11 @@ rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -142,11 +142,11 @@ void Install_clock( void Clock_exit( void ) { - /* nothing to do */; + /* nothing to do */; /* do not restore old vector */ } - + /*PAGE * * Clock_initialize @@ -174,17 +174,17 @@ rtems_device_driver Clock_initialize( BSP_Configuration.microseconds_per_tick; Install_clock( (rtems_isr_entry) Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /* PAGE * * Clock_control @@ -210,15 +210,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr( CLOCK_VECTOR, pargp ); @@ -229,7 +229,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/powerpc/dmv177/console/conscfg.c b/c/src/lib/libbsp/powerpc/dmv177/console/conscfg.c index 80f12e9954..106819a7aa 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/console/conscfg.c +++ b/c/src/lib/libbsp/powerpc/dmv177/console/conscfg.c @@ -32,7 +32,7 @@ * all others being given the name indicated. */ -mc68681_baud_t +mc68681_baud_t dmv177_mc68681_baud_table[4][RTEMS_TERMIOS_NUMBER_BAUD_RATES] = { { /* ACR[7] = 0, X = 0 */ MC68681_BAUD_NOT_VALID, /* B0 */ @@ -125,7 +125,7 @@ mc68681_baud_t }; #define MC68681_PORT_CONFIG \ - (MC68681_DATA_BAUD_RATE_SET_1|MC68681_XBRG_ENABLED) + (MC68681_DATA_BAUD_RATE_SET_1|MC68681_XBRG_ENABLED) /* * Based on BSP configuration information decide whether to do polling IO diff --git a/c/src/lib/libbsp/powerpc/dmv177/console/debugio.c b/c/src/lib/libbsp/powerpc/dmv177/console/debugio.c index bc4f97a69d..6b3234ef06 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/console/debugio.c +++ b/c/src/lib/libbsp/powerpc/dmv177/console/debugio.c @@ -38,7 +38,7 @@ extern console_data Console_Port_Data[]; extern rtems_device_minor_number Console_Port_Minor; - + /* PAGE * * DEBUG_puts @@ -95,7 +95,7 @@ void DEBUG_puth( unsigned long i,d; uint32_t Irql; void (*poll)(int minor, char cChar); - + poll = Console_Port_Tbl[Console_Port_Minor].pDeviceFns->deviceWritePolled; rtems_interrupt_disable(Irql); diff --git a/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h b/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h index cf003774c9..1c37e843b2 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h @@ -25,7 +25,7 @@ extern "C" { #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 4 #define CONFIGURE_INTERRUPT_STACK_MEMORY (12 * 1024) - + #ifdef ASM /* Definition of where to store registers in alignment handler */ #define ALIGN_REGS 0x0140 @@ -118,15 +118,15 @@ int rtems_dmv177_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config); /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* * Information placed in the linkcmds file. @@ -147,12 +147,12 @@ extern int end; /* last address in the program */ /* * How many libio files we want */ - + #define BSP_LIBIO_MAX_FDS 20 /* functions */ -/* +/* * genvec.c */ rtems_isr_entry set_EE_vector( diff --git a/c/src/lib/libbsp/powerpc/dmv177/include/dmv170.h b/c/src/lib/libbsp/powerpc/dmv177/include/dmv170.h index f22feb636d..4a54fd7573 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/include/dmv170.h +++ b/c/src/lib/libbsp/powerpc/dmv177/include/dmv170.h @@ -2,9 +2,9 @@ * * This include file contains information pertaining to the DMV170. * - * NOTE: Other than where absolutely required, this version currently - * supports only the peripherals and bits used by the basic board - * support package. This includes at least significant pieces of + * NOTE: Other than where absolutely required, this version currently + * supports only the peripherals and bits used by the basic board + * support package. This includes at least significant pieces of * the following items: * * + UART Channels A and B @@ -18,7 +18,7 @@ * * $Id$ */ - + #ifndef _INCLUDE_DMV170_h #define _INCLUDE_DMV170_h @@ -59,7 +59,7 @@ extern "C" { #define SONIC_BASE_ADDRESS DMV170_SONIC_ADDR #define SONIC_VECTOR DMV170_ETHERNET_IRQ -/* base address for the SCC (85C30) */ +/* base address for the SCC (85C30) */ #define Z85C30_ADDR 0xfb000010 #define Z85C30_CTRL_A 0xfb000010 #define Z85C30_DATA_A 0xfb000018 @@ -127,7 +127,7 @@ extern "C" { #define DMV170_LOWER_STATUS_LED_CONTROL_MASK 0x2000 #define DMV170_LOWER_STATUS_LED_IS_OFF 0x2000 #define DMV170_LOWER_STATUS_LED_IS_ON 0x0000 -#ifdef DMV176 +#ifdef DMV176 /* The following are not available for the DMV171 */ #define DMV170_RAM_TYPE_MASK 0x4000 #define DMV170_RAM_TYPE_IS_DRAM 0x4000 @@ -136,7 +136,7 @@ extern "C" { #define DMV170_IACK_VECTOR_AUTOVECTOR_IS_VECTOR 0x8000 #define DMV170_IACK_VECTOR_AUTOVECTOR_IS_NOT_VECTOR 0x0000 #endif - + /* * The following defines the bits in the Timer Control Register. */ @@ -220,7 +220,7 @@ extern "C" { * DUART Baud Rate Definitions. */ -#define DMV170_DUART_9621 MC68681_BAUD_RATE_MASK_600 /* close to 9600 */ +#define DMV170_DUART_9621 MC68681_BAUD_RATE_MASK_600 /* close to 9600 */ #define DMV170_RTC_FREQUENCY 0x0000 @@ -248,10 +248,10 @@ extern "C" { #define DMV170_ETHERNET_IRQ DMV170_LIRQ5 #define DMV170_SCSI_IRQ DMV170_LIRQ5 #define DMV170_SCC_IRQ DMV170_LIRQ5 -#define DMV170_MEZZANINE_IRQ_0 DMV170_LIRQ4 +#define DMV170_MEZZANINE_IRQ_0 DMV170_LIRQ4 #define DMV170_TICK_IRQ DMV170_LIRQ3 -#define DMV170_LOCATION_MON_IRQ DMV170_LIRQ2 -#define DMV170_SCV64_IRQ DMV170_LIRQ1 +#define DMV170_LOCATION_MON_IRQ DMV170_LIRQ2 +#define DMV170_SCV64_IRQ DMV170_LIRQ1 #define DMV170_RTC_IRQ DMV170_LIRQ0 #define DMV170_ACFAIL_IRQ DMV170_L7IACF @@ -283,6 +283,6 @@ uint32_t SCV64_Get_Interrupt_Enable(); #ifdef __cplusplus } #endif - + #endif /* !_INCLUDE_DMV170_h */ /* end of include file */ diff --git a/c/src/lib/libbsp/powerpc/dmv177/scv64/scv64.c b/c/src/lib/libbsp/powerpc/dmv177/scv64/scv64.c index 5e67698b3a..e7e357d0d2 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/scv64/scv64.c +++ b/c/src/lib/libbsp/powerpc/dmv177/scv64/scv64.c @@ -14,23 +14,23 @@ typedef struct { /* DARF Registers */ - volatile uint32_t DMALAR; /* 0x00 */ - volatile uint32_t DMAVAR; /* 0x04 */ - volatile uint32_t DMATC; /* 0x08 */ - volatile uint32_t DCSR; /* 0x0c */ - volatile uint32_t VMEBAR; /* 0x10 */ - volatile uint32_t RXDATA; /* 0x14 */ - volatile uint32_t RXADDR; /* 0x18 */ - volatile uint32_t RXCTL; /* 0x1c */ - volatile uint32_t BUSSEL; /* 0x20 */ - volatile uint32_t IVECT; /* 0x24 */ - volatile uint32_t APBR; /* 0x28 */ - volatile uint32_t TXDATA; /* 0x2c */ - volatile uint32_t TXADDR; /* 0x30 */ - volatile uint32_t TXCTL; /* 0x34 */ - volatile uint32_t LMFIFO; /* 0x38 */ - volatile uint32_t MODE; /* 0x3c */ - volatile uint32_t SA64BAR; /* 0x40 */ + volatile uint32_t DMALAR; /* 0x00 */ + volatile uint32_t DMAVAR; /* 0x04 */ + volatile uint32_t DMATC; /* 0x08 */ + volatile uint32_t DCSR; /* 0x0c */ + volatile uint32_t VMEBAR; /* 0x10 */ + volatile uint32_t RXDATA; /* 0x14 */ + volatile uint32_t RXADDR; /* 0x18 */ + volatile uint32_t RXCTL; /* 0x1c */ + volatile uint32_t BUSSEL; /* 0x20 */ + volatile uint32_t IVECT; /* 0x24 */ + volatile uint32_t APBR; /* 0x28 */ + volatile uint32_t TXDATA; /* 0x2c */ + volatile uint32_t TXADDR; /* 0x30 */ + volatile uint32_t TXCTL; /* 0x34 */ + volatile uint32_t LMFIFO; /* 0x38 */ + volatile uint32_t MODE; /* 0x3c */ + volatile uint32_t SA64BAR; /* 0x40 */ volatile uint32_t MA64BAR; /* 0x44 */ volatile uint32_t LAG; /* 0x48 */ volatile uint32_t DMAVTC; /* 0x4c */ @@ -39,38 +39,38 @@ typedef struct { volatile uint32_t reserved_50_7F[12]; /* ACC Registers */ - volatile uint8_t STAT0_pad[3]; /* 0x80 */ - volatile uint8_t STAT0; - volatile uint8_t STAT1_pad[3]; /* 0x84 */ - volatile uint8_t STAT1; - volatile uint8_t GENCTL_pad[3]; /* 0x88 */ - volatile uint8_t GENCTL; - volatile uint8_t VINT_pad[3]; /* 0x8c */ - volatile uint8_t VINT; - volatile uint8_t VREQ_pad[3]; /* 0x90 */ - volatile uint8_t VREQ; - volatile uint8_t VARB_pad[3]; /* 0x94 */ - volatile uint8_t VARB; - volatile uint8_t ID_pad[3]; /* 0x98 */ - volatile uint8_t ID; - volatile uint8_t NA_pad[3]; /* 0x9c */ - volatile uint8_t NA; - volatile uint8_t _7IS_pad[3]; /* 0xa0 */ - volatile uint8_t _7IS; - volatile uint8_t LIS_pad[3]; /* 0xa4 */ - volatile uint8_t LIS; - volatile uint8_t UIE_pad[3]; /* 0xa8 */ - volatile uint8_t UIE; - volatile uint8_t LIE_pad[3]; /* 0xac */ - volatile uint8_t LIE; - volatile uint8_t VIE_pad[3]; /* 0xb0 */ - volatile uint8_t VIE; - volatile uint8_t IC10_pad[3]; /* 0xb4 */ - volatile uint8_t IC10; - volatile uint8_t IC32_pad[3]; /* 0xb8 */ - volatile uint8_t IC32; - volatile uint8_t IC54_pad[3]; /* 0xbc */ - volatile uint8_t IC54; + volatile uint8_t STAT0_pad[3]; /* 0x80 */ + volatile uint8_t STAT0; + volatile uint8_t STAT1_pad[3]; /* 0x84 */ + volatile uint8_t STAT1; + volatile uint8_t GENCTL_pad[3]; /* 0x88 */ + volatile uint8_t GENCTL; + volatile uint8_t VINT_pad[3]; /* 0x8c */ + volatile uint8_t VINT; + volatile uint8_t VREQ_pad[3]; /* 0x90 */ + volatile uint8_t VREQ; + volatile uint8_t VARB_pad[3]; /* 0x94 */ + volatile uint8_t VARB; + volatile uint8_t ID_pad[3]; /* 0x98 */ + volatile uint8_t ID; + volatile uint8_t NA_pad[3]; /* 0x9c */ + volatile uint8_t NA; + volatile uint8_t _7IS_pad[3]; /* 0xa0 */ + volatile uint8_t _7IS; + volatile uint8_t LIS_pad[3]; /* 0xa4 */ + volatile uint8_t LIS; + volatile uint8_t UIE_pad[3]; /* 0xa8 */ + volatile uint8_t UIE; + volatile uint8_t LIE_pad[3]; /* 0xac */ + volatile uint8_t LIE; + volatile uint8_t VIE_pad[3]; /* 0xb0 */ + volatile uint8_t VIE; + volatile uint8_t IC10_pad[3]; /* 0xb4 */ + volatile uint8_t IC10; + volatile uint8_t IC32_pad[3]; /* 0xb8 */ + volatile uint8_t IC32; + volatile uint8_t IC54_pad[3]; /* 0xbc */ + volatile uint8_t IC54; /* Utility Registers */ volatile uint32_t MISC; volatile uint32_t delay_line[3]; @@ -90,7 +90,7 @@ typedef struct { #define LOCAL_INTERRUPT_ENABLE_4 0x10 #define LOCAL_INTERRUPT_ENABLE_5 0x20 -/* +/* * IC54 Register */ #define AUTOVECTOR_5 0x80 @@ -110,7 +110,7 @@ SCV64_Registers *SCV64 = (void *)DMV170_SCV64_BASE_ADDRESS; void SCV64_Initialize() { SCV64->LIE = 0; } - + /*PAGE * * SCV64_Generate_DUART_Interrupts @@ -121,7 +121,7 @@ void SCV64_Initialize() { void SCV64_Generate_DUART_Interrupts() { uint8_t data; - + /* * Set Local Interrupt 5 enable */ @@ -146,7 +146,7 @@ void SCV64_Generate_DUART_Interrupts() { uint32_t SCV64_Get_Interrupt() { uint8_t data; - + /* * Put the LIS data into the lower byte of the result */ diff --git a/c/src/lib/libbsp/powerpc/dmv177/sonic/dmvsonic.c b/c/src/lib/libbsp/powerpc/dmv177/sonic/dmvsonic.c index f769f4e635..faf189a627 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/sonic/dmvsonic.c +++ b/c/src/lib/libbsp/powerpc/dmv177/sonic/dmvsonic.c @@ -97,8 +97,8 @@ uint32_t dmv177_sonic_read_register( #endif sonic_configuration_t dmv177_sonic_configuration = { - SONIC_BASE_ADDRESS, /* base address */ - SONIC_VECTOR, /* vector number */ + SONIC_BASE_ADDRESS, /* base address */ + SONIC_VECTOR, /* vector number */ SONIC_DCR, /* DCR register value */ SONIC_DC2, /* DC2 register value */ TDA_COUNT, /* number of transmit descriptors */ @@ -110,5 +110,5 @@ sonic_configuration_t dmv177_sonic_configuration = { int rtems_dmv177_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config) { return rtems_sonic_driver_attach( config, &dmv177_sonic_configuration ); - + } diff --git a/c/src/lib/libbsp/powerpc/dmv177/start/start.S b/c/src/lib/libbsp/powerpc/dmv177/start/start.S index e3e4bc3fb3..33d793ad98 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/start/start.S +++ b/c/src/lib/libbsp/powerpc/dmv177/start/start.S @@ -66,7 +66,7 @@ _start: */ bl .Laddr /* get current address */ - + .Laddr: mflr r4 /* real address of .Laddr */ lwz r5,(.Lptr-.Laddr)(r4) /* linker generated address of .LCTOC1 */ diff --git a/c/src/lib/libbsp/powerpc/dmv177/startup/bspstart.c b/c/src/lib/libbsp/powerpc/dmv177/startup/bspstart.c index 971a6bb4e4..0a1ef09de1 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/dmv177/startup/bspstart.c @@ -21,7 +21,7 @@ * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; rtems_cpu_table Cpu_table; @@ -67,7 +67,7 @@ void bsp_pretasking_hook(void) * bsp_predriver_hook * * Initialization before drivers are setup. - */ + */ void bsp_predriver_hook(void) { @@ -93,14 +93,14 @@ void bsp_start( void ) */ _CPU_MSR_SET( msr_value ); - + /* * Need to "allocate" the memory for the RTEMS Workspace and * tell the RTEMS configuration where it is. This memory is * not malloc'ed. It is just "pulled from the air". */ - work_space_start = + work_space_start = (unsigned char *)&RAM_END - BSP_Configuration.work_space_size; if ( work_space_start <= (unsigned char *)&end ) { diff --git a/c/src/lib/libbsp/powerpc/dmv177/startup/genpvec.c b/c/src/lib/libbsp/powerpc/dmv177/startup/genpvec.c index 4661a718bc..5b3d292c78 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/startup/genpvec.c +++ b/c/src/lib/libbsp/powerpc/dmv177/startup/genpvec.c @@ -7,7 +7,7 @@ * * The external exception vector numbers begin with DMV170_IRQ_FIRST. * DMV170_IRQ_FIRST is defined to be one greater than the last processor - * interrupt. + * interrupt. * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -26,8 +26,8 @@ #define NUM_LIRQ_HANDLERS 20 #define NUM_LIRQ ( MAX_BOARD_IRQS - PPC_IRQ_LAST ) -/* - * Structure to for one of possible multiple interrupt handlers for +/* + * Structure to for one of possible multiple interrupt handlers for * a given interrupt. */ typedef struct @@ -42,7 +42,7 @@ typedef struct * handlers at a later time. */ EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; -uint16_t Nodes_Used; +uint16_t Nodes_Used; Chain_Control ISR_Array [NUM_LIRQ]; /*PAGE @@ -56,22 +56,22 @@ Chain_Control ISR_Array [NUM_LIRQ]; * * Output parameters: NONE * - * Return values: + * Return values: */ rtems_isr external_exception_ISR ( rtems_vector_number vector /* IN */ ) -{ +{ uint16_t index; rtems_boolean is_active=FALSE; uint32_t scv64_status; Chain_Node *node; EE_ISR_Type *ee_isr; - + /* - * Get all active interrupts. + * Get all active interrupts. */ scv64_status = SCV64_Get_Interrupt(); scv64_status &= SCV64_Get_Interrupt_Enable(); @@ -121,7 +121,7 @@ rtems_isr external_exception_ISR ( * initialize_external_exception_vector * * This routine initializes the external exception vector - * + * * Input parameters: NONE * * Output parameters: NONE @@ -134,24 +134,24 @@ void initialize_external_exception_vector () int i; rtems_isr_entry previous_isr; rtems_status_code status; - extern void SCV64_Initialize( void ); + extern void SCV64_Initialize( void ); Nodes_Used = 0; /* * Initialize the SCV64 chip */ - SCV64_Initialize(); + SCV64_Initialize(); for (i=0; i <NUM_LIRQ; i++) Chain_Initialize_empty( &ISR_Array[i] ); - /* - * Install external_exception_ISR () as the handler for + /* + * Install external_exception_ISR () as the handler for * the General Purpose Interrupt. */ - status = rtems_interrupt_catch( external_exception_ISR, + status = rtems_interrupt_catch( external_exception_ISR, PPC_IRQ_EXTERNAL , (rtems_isr_entry *) &previous_isr ); } @@ -160,7 +160,7 @@ void initialize_external_exception_vector () * * set_EE_vector * - * This routine installs one of multiple ISRs for the general purpose + * This routine installs one of multiple ISRs for the general purpose * inerrupt. * * Input parameters: @@ -179,12 +179,12 @@ rtems_isr_entry set_EE_vector( { uint16_t vec_idx = vector - DMV170_IRQ_FIRST; uint32_t index; - - /* + + /* * Verify that all of the nodes have not been used. */ assert (Nodes_Used < NUM_LIRQ_HANDLERS); - + /* * If we have already installed this handler for this vector, then * just reset it. @@ -200,8 +200,8 @@ rtems_isr_entry set_EE_vector( * Increment the number of nedes used and set the index for the node * array. */ - - Nodes_Used++; + + Nodes_Used++; index = Nodes_Used - 1; /* @@ -211,8 +211,8 @@ rtems_isr_entry set_EE_vector( ISR_Nodes[index].vector = vector; /* - * Connect this node to the chain at the location of the - * vector index. + * Connect this node to the chain at the location of the + * vector index. */ Chain_Append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node ); diff --git a/c/src/lib/libbsp/powerpc/dmv177/startup/setvec.c b/c/src/lib/libbsp/powerpc/dmv177/startup/setvec.c index 16b94f5503..614a9b8205 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/startup/setvec.c +++ b/c/src/lib/libbsp/powerpc/dmv177/startup/setvec.c @@ -41,7 +41,7 @@ rtems_isr_entry set_vector( /* returns old vector */ rtems_isr_entry previous_isr; rtems_status_code status; - /* + /* * vectors greater than PPC603e_IRQ_LAST are handled by the General purpose * interupt handler. */ diff --git a/c/src/lib/libbsp/powerpc/dmv177/timer/timer.c b/c/src/lib/libbsp/powerpc/dmv177/timer/timer.c index e912c018da..c9a406f6bf 100644 --- a/c/src/lib/libbsp/powerpc/dmv177/timer/timer.c +++ b/c/src/lib/libbsp/powerpc/dmv177/timer/timer.c @@ -21,8 +21,8 @@ rtems_boolean Timer_driver_Find_average_overhead; /*PAGE * * Timer_initialize - * - * This routine initializes the timer. + * + * This routine initializes the timer. * * Input parameters: NONE * @@ -40,7 +40,7 @@ void Timer_initialize() Timer_driver_Start_time = PPC_Get_timebase_register(); - + } @@ -97,7 +97,7 @@ int Read_timer() * * Input parameters: NONE * - * Output parameters: + * Output parameters: * status code of successful * * Return values: NONE @@ -115,7 +115,7 @@ rtems_status_code Empty_function( void ) * * This routine sets a global boolean to the value passed in. * - * Input parameters: + * Input parameters: * find_flag - flag to indicate to find the average overhead. * * Output parameters: NONE diff --git a/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c b/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c index 389836e389..e9cce22c8a 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c @@ -56,7 +56,7 @@ canInterruptHandler (rtems_vector_number v) } tmpTail = rxMsgBufTail[dev]; while (1) { - if ((tmpTail == rxMsgBufHead[dev]) && + if ((tmpTail == rxMsgBufHead[dev]) && (rxMsgBuf[dev][tmpTail].ctrl1 & I82527_MSG_CTRL_NEWDAT)) { break; /* Buf is full */ } @@ -69,7 +69,7 @@ canInterruptHandler (rtems_vector_number v) rxMsgBuf[dev][tmpTail].ctrl1 = candev[dev]->msg15.ctrl1; rxMsgBuf[dev][tmpTail].arb = candev[dev]->msg15.arb; rxMsgBuf[dev][tmpTail].cfg = candev[dev]->msg15.cfg; - + pkt_len = (rxMsgBuf[dev][tmpTail].cfg >> 4) & 0xf; for (i=0; i<pkt_len; i++) { rxMsgBuf[dev][tmpTail].data[i] = candev[dev]->msg15.data[i]; @@ -97,7 +97,7 @@ canInterruptHandler (rtems_vector_number v) candev[dev]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_INTPND_CLR); - candev[dev]->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | + candev[dev]->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | I82527_MSG_CTRL_RMTPND_CLR); candev[dev]->status = 0x0; } @@ -117,7 +117,7 @@ rtems_device_driver canbus_initialize( #endif rtems_status_code status; rtems_isr_entry old_handler; - + #if (NUM_CAN_DEVS > 0) candev[0]=&canbus0; rtems_interrupt_catch (canInterruptHandler, @@ -135,7 +135,7 @@ rtems_device_driver canbus_initialize( rtems_interrupt_catch (canInterruptHandler, PPC_IRQ_IRQ2, &old_handler); - + /* Right now, we only support 3 CAN interfaces */ #else #error NUM_CAN_DEVS is too big. Fix it, damnit! @@ -147,7 +147,7 @@ rtems_device_driver canbus_initialize( for (i=0; i < NUM_CAN_DEVS; i++) { - + /* clear rx buffers */ rxMsgBufHead[i] = 0; rxMsgBufTail[i] = 0; @@ -158,10 +158,10 @@ rtems_device_driver canbus_initialize( candev[i]->ctrl = I82527_CTRL_CCE | /* Enable cfg reg writes */ I82527_CTRL_INIT; /* Disable external xfers */ - + candev[i]->cir = I82527_CIR_DMC; /* Divide memory clock by 2 */ - + /* We want 250 kbps so assuming an input clock rate of 10 MHz: * DSC = 0 => SCLK = 10 MHz, tSCLK = 100ns * BRP = 1 => tq = 200ns @@ -181,7 +181,7 @@ rtems_device_driver canbus_initialize( candev[i]->gms = 0xffff; /* addresses must match exactly */ candev[i]->gml = 0xffffffff; /* addresses must match exactly */ - + candev[i]->mlm = 0x0; /* all addresses accepted */ candev[i]->p2conf = 0xff; /* make all outputs */ @@ -190,85 +190,85 @@ rtems_device_driver canbus_initialize( candev[i]->msg1.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg2.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg2.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg3.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg3.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg4.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg4.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR | /* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg5.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg5.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg6.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg6.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg7.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg7.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg8.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg8.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg9.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg9.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg10.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg10.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR | /* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg11.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg11.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg12.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg12.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg13.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg13.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg14.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg14.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg15.cfg = 0 ; /* dir is rcv */ candev[i]->msg15.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ @@ -306,7 +306,7 @@ rtems_device_driver canbus_open( /* msg is in use, rx interrupts are enabled */ candev[minor]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_RXIE_SET); - + candev[minor]->ctrl |= I82527_CTRL_IE; candev[minor]->ctrl &= ~(I82527_CTRL_CCE | I82527_CTRL_INIT); switch (minor) { @@ -329,10 +329,10 @@ rtems_device_driver canbus_close( candev[minor]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_CLR | I82527_MSG_CTRL_RXIE_CLR | I82527_MSG_CTRL_TXIE_CLR); - + /* Take transceiver off the bus, enable cfg. reg. writes */ candev[minor]->ctrl |= (I82527_CTRL_CCE | I82527_CTRL_INIT); - + return RTEMS_SUCCESSFUL; } @@ -351,7 +351,7 @@ rtems_device_driver canbus_read( tmpHead = rxMsgBufHead[minor]; while (1){ - if ((tmpHead == rxMsgBufTail[minor]) && + if ((tmpHead == rxMsgBufTail[minor]) && !(rxMsgBuf[minor][tmpHead].ctrl1 & I82527_MSG_CTRL_NEWDAT)) { break; } @@ -361,7 +361,7 @@ rtems_device_driver canbus_read( msg->ctrl1 = rxMsgBuf[minor][tmpHead].ctrl1; msg->arb = rxMsgBuf[minor][tmpHead].arb; msg->cfg = rxMsgBuf[minor][tmpHead].cfg; - + pkt_len = (msg->cfg >> 4) & 0xf; for (i=0; i<pkt_len; i++) { msg->data[i] = rxMsgBuf[minor][tmpHead].data[i]; @@ -390,7 +390,7 @@ rtems_device_driver canbus_read( return RTEMS_UNSATISFIED; } - + rtems_device_driver canbus_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -436,7 +436,7 @@ rtems_device_driver canbus_control( /* part of old canbus_read */ -#if 0 +#if 0 for (i=0; i < RX_CAN_BUF_SIZE) { if (rxMsgBuf[minor][i].ctrl1 & I82527_MSG_CTRL_NEWDAT) break; @@ -447,17 +447,17 @@ rtems_device_driver canbus_control( int j; msg.arb = rxMsgBuf[minor][i].arb; msg.cfg = rxMsgBuf[minor][i].cfg; - + pkt_len = (msg.cfg >> 4) & 0xf; - for (j=0; j < pkt_len; j++) + for (j=0; j < pkt_len; j++) msg.data[j] = rxMsgBuf[minor][i].data[j]; - - + + /* wait until there is a msg */ while (!(candev->msg15.ctrl1 & I82527_MSG_CTRL_NEWDAT)) continue; - + msg->ctrl1 = candev->msg15.ctrl1; msg->cfg = candev->msg15.cfg; msg->arb = candev->msg15.arb; @@ -468,7 +468,7 @@ rtems_device_driver canbus_control( candev->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_INTPND_CLR); - candev->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | + candev->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | I82527_MSG_CTRL_RMTPND_CLR); candev->status = 0x0; diff --git a/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c b/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c index 4a79f81864..b4bf7ca93e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c @@ -28,7 +28,7 @@ static rtems_irq_connect_data clockIrqData = {BSP_PERIODIC_TIMER, (rtems_irq_enable)clockOn, (rtems_irq_disable)clockOff, (rtems_irq_is_enabled)clockIsOn}; - + int BSP_get_clock_irq_level() { /* @@ -65,6 +65,6 @@ int BSP_connect_clock_handler (rtems_irq_hdl hdl) clockIrqData.on = (rtems_irq_enable)clockOn; clockIrqData.off = (rtems_irq_enable)clockOff; clockIrqData.isOn = (rtems_irq_is_enabled)clockIsOn; - + return BSP_install_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/console/console.c b/c/src/lib/libbsp/powerpc/eth_comm/console/console.c index 411e279ef2..d9d98c5a91 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/console/console.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/console/console.c @@ -1,10 +1,10 @@ -#define I_WANT_TERMIOS +#define I_WANT_TERMIOS /* * BSP specific Serial I/O Functions for the eth-comm BSP * - * This file contains the BSP specific functions for + * This file contains the BSP specific functions for * performing serial I/O. These are the functions - * RTEMS uses (the 6 listed in the device driver + * RTEMS uses (the 6 listed in the device driver * structure) * * The SCCs and SMCs are assigned as follows @@ -21,7 +21,7 @@ * appear to work correctly yet. On startup, with termios enabled, * the board hangs for a few seconds before running correctly * - * Author: Jay Monkman (jmonkman@frasca.com) + * Author: Jay Monkman (jmonkman@frasca.com) * Copyright (C) 1998 by Frasca International, Inc. * * $Id$ @@ -42,7 +42,7 @@ rtems_device_driver console_initialize(rtems_device_major_number major, void *arg) { rtems_status_code status; - + #ifdef I_WANT_TERMIOS /* * Set up TERMIOS (for /dev/console) @@ -59,11 +59,11 @@ rtems_device_driver console_initialize(rtems_device_major_number major, * Do device-specific initialization */ m8xx_uart_smc_initialize(SMC1_MINOR); /* /dev/tty0 */ - m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ + m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ m8xx_uart_scc_initialize(SCC2_MINOR); /* /dev/tty2 */ m8xx_uart_scc_initialize(SCC3_MINOR); /* /dev/tty3 */ m8xx_uart_scc_initialize(SCC4_MINOR); /* /dev/tty4 */ - + /* * Register the devices */ @@ -84,7 +84,7 @@ rtems_device_driver console_initialize(rtems_device_major_number major, rtems_fatal_error_occurred (status); return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) @@ -116,7 +116,7 @@ rtems_device_driver console_open(rtems_device_major_number major, case 2: sccregs = &m8xx.scc1; break; - case 3: + case 3: sccregs = &m8xx.scc2; break; case 4: @@ -136,7 +136,7 @@ rtems_device_driver console_open(rtems_device_major_number major, if (minor == SCC2_MINOR) { return rtems_termios_open (major, minor, arg, &sccPollCallbacks); } - else { + else { return RTEMS_SUCCESSFUL; } #else @@ -207,7 +207,7 @@ rtems_device_driver console_write(rtems_device_major_number major, rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) -{ +{ #ifdef I_WANT_TERMIOS if (minor == SCC2_MINOR) { return rtems_termios_ioctl (arg); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h b/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h index 1a8f6b76f4..8c7f2e07fd 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h @@ -40,7 +40,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) - + /* * Network driver configuration */ @@ -98,7 +98,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h b/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h index 6b07b823dd..e32d3c6338 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h @@ -11,7 +11,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __CANBUS_H_ @@ -102,8 +102,8 @@ typedef struct i82527_t_ { #define I82527_DCR0 (1) #define I82527_BTR1_SPL (1<<7) #define I82527_MSG_CTRL_MSGVAL (2<<6) -#define I82527_MSG_CTRL_MSGVAL_NC (3<<6) -#define I82527_MSG_CTRL_MSGVAL_SET (2<<6) +#define I82527_MSG_CTRL_MSGVAL_NC (3<<6) +#define I82527_MSG_CTRL_MSGVAL_SET (2<<6) #define I82527_MSG_CTRL_MSGVAL_CLR (1<<6) #define I82527_MSG_CTRL_TXIE (2<<4) #define I82527_MSG_CTRL_TXIE_NC (3<<4) @@ -145,23 +145,23 @@ extern i82527_t canbus1; extern i82527_t canbus2; -rtems_device_driver canbus_initialize(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_initialize(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_open(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_open(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_close(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_close(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_read(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_read(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_write(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_write(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_control(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_control(rtems_device_major_number, + rtems_device_minor_number, void *); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/info.h b/c/src/lib/libbsp/powerpc/eth_comm/include/info.h index 305a1d1429..d205fed121 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/info.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/info.h @@ -25,7 +25,7 @@ typedef struct BoardInfoBlock_ { uint8_t fpn[16]; /* Frasca part number in ASCII */ uint16_t rev; /* Board revision */ uint32_t ip_num; /* Board IP number */ - + } boardinfo_t; #define IFACE_ARINC429_TX0 0x00000001; diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c index d5f7ff1655..fe4b7fa418 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c @@ -10,7 +10,7 @@ * * $Id$ */ - + #include <rtems/system.h> #include <bsp.h> #include <bsp/irq.h> @@ -65,9 +65,9 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine) /* - * masks used to mask off the interrupts. For exmaple, for ILVL2, the - * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 - * and ILVL7. + * masks used to mask off the interrupts. For exmaple, for ILVL2, the + * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 + * and ILVL7. * */ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] = @@ -131,10 +131,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 1; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_irq_index); @@ -144,10 +144,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 0; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); return (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr & (1 << cpm_irq_index)); } @@ -155,7 +155,7 @@ int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enable_at_siu(const rtems_irq_symbolic_name irqLine) { int siu_irq_index; - + if (!is_siu_irq(irqLine)) return 1; @@ -172,7 +172,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_symbolic_name irqLine) if (!is_siu_irq(irqLine)) return 1; - + siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET); ppc_cached_irq_mask &= ~(1 << (31-siu_irq_index)); ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; @@ -198,7 +198,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -219,14 +219,14 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * store the data provided by user */ rtems_hdl_tbl[irq->name] = *irq; - + if (is_cpm_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_cpm (irq->name); } - + if (is_siu_irq(irq->name)) { /* * Enable interrupt at SIU level @@ -244,7 +244,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -263,7 +263,7 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq) int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -295,7 +295,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* * disable exception at processor level */ - } + } /* * Disable interrupt on device @@ -411,7 +411,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[BSP_DECREMENTER].hdl(); _CPU_MSR_SET(msr); @@ -422,12 +422,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) */ #ifdef DISPATCH_HANDLER_STAT loopCounter = 0; -#endif +#endif while (1) { if ((ppc_cached_irq_mask & ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend) == 0) { #ifdef DISPATCH_HANDLER_STAT if (loopCounter > maxLoop) maxLoop = loopCounter; -#endif +#endif break; } irq = (((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26); @@ -442,12 +442,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) * Acknowledge current interrupt. This has no effect on internal level interrupt. */ ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = (1 << (31 - irq)); - + if (cpmIntr) { /* * We will reenable the SIU CPM interrupt to allow nesting of CPM interrupt. * We must before acknowledege the current irq at CPM level to avoid trigerring - * the interrupt again. + * the interrupt again. */ /* * Acknowledge and get the vector. @@ -467,7 +467,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[irq].hdl(); _CPU_MSR_SET(msr); @@ -480,12 +480,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; #ifdef DISPATCH_HANDLER_STAT ++ loopCounter; -#endif +#endif } } - - + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h index 6b30b759e9..635ee42fb8 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h @@ -69,7 +69,7 @@ typedef enum { * Some SIU IRQ symbolic name definition. Please note that * INT IRQ are defined but a single one will be used to * redirect all CPM interrupt. - */ + */ BSP_SIU_EXT_IRQ_0 = 0, BSP_SIU_INT_IRQ_0 = 1, @@ -78,19 +78,19 @@ typedef enum { BSP_SIU_EXT_IRQ_2 = 4, BSP_SIU_INT_IRQ_2 = 5, - + BSP_SIU_EXT_IRQ_3 = 6, BSP_SIU_INT_IRQ_3 = 7, - + BSP_SIU_EXT_IRQ_4 = 8, BSP_SIU_INT_IRQ_4 = 9, BSP_SIU_EXT_IRQ_5 = 10, BSP_SIU_INT_IRQ_5 = 11, - + BSP_SIU_EXT_IRQ_6 = 12, BSP_SIU_INT_IRQ_6 = 13, - + BSP_SIU_EXT_IRQ_7 = 14, BSP_SIU_INT_IRQ_7 = 15, /* @@ -110,18 +110,18 @@ typedef enum { BSP_CPM_IRQ_SPI = BSP_CPM_IRQ_LOWEST_OFFSET + 5, BSP_CPM_IRQ_PARALLEL_IO_PC6 = BSP_CPM_IRQ_LOWEST_OFFSET + 6, BSP_CPM_IRQ_TIMER_4 = BSP_CPM_IRQ_LOWEST_OFFSET + 7, - + BSP_CPM_IRQ_PARALLEL_IO_PC7 = BSP_CPM_IRQ_LOWEST_OFFSET + 9, BSP_CPM_IRQ_PARALLEL_IO_PC8 = BSP_CPM_IRQ_LOWEST_OFFSET + 10, BSP_CPM_IRQ_PARALLEL_IO_PC9 = BSP_CPM_IRQ_LOWEST_OFFSET + 11, BSP_CPM_IRQ_TIMER_3 = BSP_CPM_IRQ_LOWEST_OFFSET + 12, - + BSP_CPM_IRQ_PARALLEL_IO_PC10 = BSP_CPM_IRQ_LOWEST_OFFSET + 14, BSP_CPM_IRQ_PARALLEL_IO_PC11 = BSP_CPM_IRQ_LOWEST_OFFSET + 15, BSP_CPM_I2C = BSP_CPM_IRQ_LOWEST_OFFSET + 16, BSP_CPM_RISC_TIMER_TABLE = BSP_CPM_IRQ_LOWEST_OFFSET + 17, BSP_CPM_IRQ_TIMER_2 = BSP_CPM_IRQ_LOWEST_OFFSET + 18, - + BSP_CPM_IDMA2 = BSP_CPM_IRQ_LOWEST_OFFSET + 20, BSP_CPM_IDMA1 = BSP_CPM_IRQ_LOWEST_OFFSET + 21, BSP_CPM_SDMA_CHANNEL_BUS_ERR = BSP_CPM_IRQ_LOWEST_OFFSET + 22, @@ -138,10 +138,10 @@ typedef enum { * Some Processor exception handled as rtems IRQ symbolic name definition */ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET - + }rtems_irq_symbolic_name; -#define CPM_INTERRUPT +#define CPM_INTERRUPT /* @@ -171,9 +171,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at SIU and CPM level. RATIONALE : anyway @@ -209,7 +209,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -285,7 +285,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* @@ -328,7 +328,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); #ifdef __cplusplus diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S index 095e75aa51..38c7d2283d 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -15,22 +15,22 @@ * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> #include <libcpu/raw_exception.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* * let room for exception frame @@ -41,11 +41,11 @@ SYM (decrementer_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -56,12 +56,12 @@ SYM (external_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -72,17 +72,17 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) stw r2, GPR2_OFFSET(r1) stw r3, GPR3_OFFSET(r1) - + mfsrr0 r0 mfsrr1 r2 mfmsr r3 - + stw r0, SRR0_FRAME_OFFSET(r1) stw r2, SRR1_FRAME_OFFSET(r1) /* @@ -119,7 +119,7 @@ SYM (shared_raw_irq_code_entry): mfctr r6 mfxer r7 mflr r8 - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) @@ -157,9 +157,9 @@ SYM (shared_raw_irq_code_entry): cmpwi r2,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R2 */ addi r2,r2,1 @@ -176,7 +176,7 @@ nested: /* store new nesting level in _ISR_Nest_level */ stw r2, _ISR_Nest_level@l(r7) #endif - + addi r6, r6, 1 mfmsr r5 /* @@ -186,7 +186,7 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just @@ -195,7 +195,7 @@ nested: addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ @@ -219,7 +219,7 @@ nested: stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -227,14 +227,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -266,12 +266,12 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - + lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -286,21 +286,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -308,7 +308,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -337,7 +337,7 @@ easy_exit: /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r2, SRR0_FRAME_OFFSET(r1) lwz r3, GPR3_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c index 9ff513766e..53a8fb8975 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c @@ -79,7 +79,7 @@ void BSP_SIU_irq_init() ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel; } -/* +/* * Initialize CPM interrupt management */ void @@ -93,7 +93,7 @@ BSP_CPM_irq_init(void) (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | #else (CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#endif +#endif ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; @@ -104,7 +104,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) { rtems_raw_except_connect_data vectorDesc; int i; - + BSP_SIU_irq_init(); BSP_CPM_irq_init(); /* @@ -132,7 +132,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -154,7 +154,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc8xx_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/network/network.c b/c/src/lib/libbsp/powerpc/eth_comm/network/network.c index 5a280e4eae..4ed7a0daa1 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/network/network.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/network/network.c @@ -142,9 +142,9 @@ static void m860_scc1_interrupt_handler () */ if ((m8xx.scc1.sccm & 0x8) && (m8xx.scc1.scce & 0x8)) { m8xx.scc1.scce = 0x8; - /* I don't think the next line is needed. It was in + /* I don't think the next line is needed. It was in * the 68360 stuff, though. - * m8xx.scc1.sccm &= ~0x8; + * m8xx.scc1.sccm &= ~0x8; */ enet_driver[0].rxInterrupts++; rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); @@ -155,9 +155,9 @@ static void m860_scc1_interrupt_handler () */ if ((m8xx.scc1.sccm & 0x12) && (m8xx.scc1.scce & 0x12)) { m8xx.scc1.scce = 0x12; - /* I don't think the next line is needed. It was in + /* I don't think the next line is needed. It was in * the 68360 stuff, though. - * m8xx.scc1.sccm &= ~0x12; + * m8xx.scc1.sccm &= ~0x12; */ enet_driver[0].txInterrupts++; rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT); @@ -177,7 +177,7 @@ static void m860_fec_interrupt_handler () enet_driver[0].rxInterrupts++; rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); } - + /* * Buffer transmitted or transmitter error? */ @@ -203,17 +203,17 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) { int i; unsigned char *hwaddr; - + /* * Configure port A CLK1, CLK2, TXD1 and RXD1 pins */ m8xx.papar |= 0x303; m8xx.padir &= ~0x303; m8xx.paodr &= ~0x303; - + /* * Configure port C CTS1* and CD1* pins, and PC4-PC7 - * + * */ m8xx.pcpar &= ~0x30; m8xx.pcdir |= 0x0f00; @@ -221,28 +221,28 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.pcso |= 0x30; m8xx.pcdat &= ~0x0f00; /* Clear LOOP */ m8xx.pcdat |= 0x0700; /* Set FULDL, TPSQEL, TPAPCE */ - + /* * Connect CLK1 and CLK2 to SCC1 */ m8xx.sicr &= ~0xFF; m8xx.sicr |= (5 << 3) | 4; - + /* * Initialize SDMA configuration register */ m8xx.sdcr = 1; - + /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers",0); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -250,46 +250,46 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.scc1p.rbase = (char *)sc->rxBdBase - (char *)&m8xx; m8xx.scc1p.tbase = (char *)sc->txBdBase - (char *)&m8xx; - + /* * Send "Init parameters" command */ m8xx_cp_execute_cmd (M8xx_CR_OP_INIT_RX_TX | M8xx_CR_CHAN_SCC1); - + /* * Set receive and transmit function codes */ m8xx.scc1p.rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0); m8xx.scc1p.tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0); - + /* * Set maximum receive buffer length */ m8xx.scc1p.mrblr = RBUF_SIZE; - + /* * Set CRC parameters */ m8xx.scc1p.un.ethernet.c_pres = 0xFFFFFFFF; m8xx.scc1p.un.ethernet.c_mask = 0xDEBB20E3; - + /* * Clear diagnostic counters */ m8xx.scc1p.un.ethernet.crcec = 0; m8xx.scc1p.un.ethernet.alec = 0; m8xx.scc1p.un.ethernet.disfc = 0; - + /* * Set pad value */ m8xx.scc1p.un.ethernet.pads = 0x8888; - + /* * Set retry limit */ m8xx.scc1p.un.ethernet.ret_lim = 15; - + /* * Set maximum and minimum frame length */ @@ -297,7 +297,7 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.minflr = 64; m8xx.scc1p.un.ethernet.maxd1 = RBUF_SIZE; m8xx.scc1p.un.ethernet.maxd2 = RBUF_SIZE; - + /* * Clear group address hash table */ @@ -305,21 +305,21 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.gaddr2 = 0; m8xx.scc1p.un.ethernet.gaddr3 = 0; m8xx.scc1p.un.ethernet.gaddr4 = 0; - + /* * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.scc1p.un.ethernet.paddr_h = (hwaddr[5] << 8) | hwaddr[4]; m8xx.scc1p.un.ethernet.paddr_m = (hwaddr[3] << 8) | hwaddr[2]; m8xx.scc1p.un.ethernet.paddr_l = (hwaddr[1] << 8) | hwaddr[0]; - + /* * Aggressive retry */ m8xx.scc1p.un.ethernet.p_per = 0; - + /* * Clear individual address hash table */ @@ -327,14 +327,14 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.iaddr2 = 0; m8xx.scc1p.un.ethernet.iaddr3 = 0; m8xx.scc1p.un.ethernet.iaddr4 = 0; - + /* * Clear temp address */ m8xx.scc1p.un.ethernet.taddr_l = 0; m8xx.scc1p.un.ethernet.taddr_m = 0; m8xx.scc1p.un.ethernet.taddr_h = 0; - + /* * Set up receive buffer descriptors */ @@ -351,12 +351,12 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - + /* * Clear any outstanding events */ m8xx.scc1.scce = 0xFFFF; - + /* * Set up interrupts */ @@ -364,20 +364,20 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) rtems_panic ("Can't attach M8xx SCC1 interrupt handler\n",0); } m8xx.scc1.sccm = 0; /* No interrupts unmasked till necessary */ - + /* * Set up General SCC Mode Register * Ethernet configuration */ m8xx.scc1.gsmr_h = 0x0; m8xx.scc1.gsmr_l = 0x1088000c; - + /* * Set up data synchronization register * Ethernet synchronization pattern */ m8xx.scc1.dsr = 0xd555; - + /* * Set up protocol-specific mode register * No Heartbeat check @@ -395,13 +395,13 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) * Disable full-duplex operation */ m8xx.scc1.psmr = 0x080A | (sc->acceptBroadcast ? 0 : 0x100); - + /* * Enable the TENA (RTS1*) pin */ m8xx.pcpar |= 0x1; m8xx.pcdir &= ~0x1; - + /* * Enable receiver and transmitter */ @@ -433,7 +433,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) */ m8xx.fec.ecntrl=0x1; - /* + /* * Put ethernet transciever in reset */ m8xx.pgcra |= 0x80; @@ -452,10 +452,10 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Set SIU interrupt level to LVL2 - * + * */ m8xx.fec.ivec = ((((unsigned) BSP_FAST_ETHERNET_CTRL)/2) << 29); - + /* * Set the TX and RX fifo sizes. For now, we'll split it evenly */ @@ -468,7 +468,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.fec.addr_low = (hwaddr[0] << 24) | (hwaddr[1] << 16) | (hwaddr[2] << 8) | (hwaddr[3] << 0); m8xx.fec.addr_high = (hwaddr[4] << 24) | (hwaddr[5] << 16); @@ -487,13 +487,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers",0); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -501,7 +501,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.fec.r_des_start = (int)sc->rxBdBase; m8xx.fec.x_des_start = (int)sc->txBdBase; - + /* * Set up Receive Control Register: * Not promiscuous mode @@ -535,17 +535,17 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) m8xx.sdcr = 1; /* - * Set MII speed to 2.5 MHz for 25 Mhz system clock + * Set MII speed to 2.5 MHz for 25 Mhz system clock */ m8xx.fec.mii_speed = 0x0a; m8xx.fec.mii_data = 0x58021000; - + /* * Set up receive buffer descriptors */ for (i = 0 ; i < sc->rxBdCount ; i++) (sc->rxBdBase + i)->status = 0; - + /* * Set up transmit buffer descriptors */ @@ -555,13 +555,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - - + + /* * Mask all FEC interrupts and clear events */ - m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | + m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | M8xx_FEC_IEVENT_RFINT; m8xx.fec.ievent = ~0; @@ -589,7 +589,7 @@ m860Enet_retire_tx_bd (struct m860_enet_struct *sc) int i; int nRetired; struct mbuf *m, *n; - + i = sc->txBdTail; nRetired = 0; while ((sc->txBdActiveCount != 0) @@ -615,7 +615,7 @@ m860Enet_retire_tx_bd (struct m860_enet_struct *sc) enet_driver[0].txRetryLimit++; if (status & M8xx_BD_UNDERRUN) enet_driver[0].txUnderrun++; - + /* * Restart the transmitter */ @@ -661,7 +661,7 @@ scc_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -678,14 +678,14 @@ scc_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -694,7 +694,7 @@ scc_rxDaemon (void *arg) * Clear old events */ m8xx.scc1.scce = 0x8; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -704,19 +704,19 @@ scc_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.scc1.sccm |= 0x8; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -735,7 +735,7 @@ scc_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -743,7 +743,7 @@ scc_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -774,13 +774,13 @@ scc_rxDaemon (void *arg) if (status & M8xx_BD_COLLISION) sc->rxCollision++; } - + /* * Reenable the buffer descriptor */ rxBd->status = (status & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) | M8xx_BD_EMPTY; - + /* * Move to next buffer descriptor */ @@ -798,7 +798,7 @@ fec_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -816,14 +816,14 @@ fec_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -832,7 +832,7 @@ fec_rxDaemon (void *arg) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -842,19 +842,19 @@ fec_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.fec.ievent |= M8xx_FEC_IEVENT_RFINT; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -864,7 +864,7 @@ fec_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -872,7 +872,7 @@ fec_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -923,12 +923,12 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) struct mbuf *l = NULL; uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m860Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -947,7 +947,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.scc1.scce = 0x12; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -963,7 +963,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -976,13 +976,13 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1016,7 +1016,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) if (l != NULL) l->m_next = m; } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1043,12 +1043,12 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) /* struct mbuf *l = NULL; */ uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m860Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -1067,7 +1067,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -1083,7 +1083,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -1096,13 +1096,13 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1138,7 +1138,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) l->m_next = m; */ } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1168,13 +1168,13 @@ scc_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1198,16 +1198,16 @@ fec_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ - rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, - RTEMS_NO_TIMEOUT, + rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, + RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1231,7 +1231,7 @@ static void m860_enet_start (struct ifnet *ifp) { struct m860_enet_struct *sc = ifp->if_softc; - + rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); ifp->if_flags |= IFF_OACTIVE; } @@ -1244,22 +1244,22 @@ scc_init (void *arg) { struct m860_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m860_scc_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1267,12 +1267,12 @@ scc_init (void *arg) m8xx.scc1.psmr |= 0x200; else m8xx.scc1.psmr &= ~0x200; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1284,22 +1284,22 @@ fec_init (void *arg) { struct m860_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m860_fec_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, fec_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, fec_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1308,12 +1308,12 @@ fec_init (void *arg) else m8xx.fec.r_cntrl &= ~0x8; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1328,9 +1328,9 @@ static void scc_stop (struct m860_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1341,9 +1341,9 @@ static void fec_stop (struct m860_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1366,7 +1366,7 @@ enet_stats (struct m860_enet_struct *sc) printf (" Overrun:%-8lu", sc->rxOverrun); printf (" Collision:%-8lu\n", sc->rxCollision); printf (" Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc); - + printf (" Tx Interrupts:%-8lu", sc->txInterrupts); printf (" Deferred:%-8lu", sc->txDeferred); printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat); @@ -1385,37 +1385,37 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m860_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: scc_stop (sc); break; - + case IFF_UP: scc_init (sc); break; - + case IFF_UP | IFF_RUNNING: scc_stop (sc); scc_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1431,37 +1431,37 @@ fec_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m860_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: fec_stop (sc); break; - + case IFF_UP: fec_init (sc); break; - + case IFF_UP | IFF_RUNNING: fec_stop (sc); fec_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1482,7 +1482,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) struct ifnet *ifp; int mtu; int i; - + /* * Find a free driver */ @@ -1496,7 +1496,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) printf ("Too many SCC drivers.\n"); return 0; } - + /* * Process options */ @@ -1524,7 +1524,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1539,7 +1539,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ @@ -1554,7 +1554,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) struct m860_enet_struct *sc; struct ifnet *ifp; int mtu; - + /* * Find a free driver */ @@ -1563,7 +1563,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) if (ifp->if_softc != NULL) return 0; - + /* * Process options */ @@ -1591,7 +1591,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1606,7 +1606,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/start/start.S b/c/src/lib/libbsp/powerpc/eth_comm/start/start.S index a281c11ad6..288b7f3cd9 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/start/start.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/start/start.S @@ -39,7 +39,7 @@ * GDB likes to have debugging information for the entry veneer. * Here is some DWARF information. */ -/* +/* * There was some debugging info here, but I removed it because I * couldn't get it to work. It isn't really necessary as far as I * can tell. It should still be in the papyrus BSP. -Jay @@ -47,30 +47,30 @@ -/* +/* * On entry to download_entry, R3 will hold a pointer to a Board Info * Block (boardinfo_t). This should be copied as soon as possible * to the global M860_binfo. (The block should be copied, _NOT_ * the pointer) */ - .section ".entry" /* This might have to be the first thing in the + .section ".entry" /* This might have to be the first thing in the * text section. At one time, it had to be * first, but I don't believe it is true * andy more. */ PUBLIC_VAR (start) SYM(start): bl .startup -base_addr: +base_addr: /* * Parameters from linker */ -toc_pointer: +toc_pointer: .long s.got -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start PUBLIC_VAR (text_addr) @@ -83,16 +83,16 @@ text_length: /* - * Initialization code + * Initialization code */ .startup: /* Get start address */ mflr r1 - + /* clear the bss section */ bl bssclr -/* +/* * Copy the Board Info Block */ .extern SYM(M860_binfo) diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c index da674ec747..3d830a9f6e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c @@ -51,13 +51,13 @@ void bsp_libc_init( void *, uint32_t, int ); void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } /* @@ -73,14 +73,14 @@ void _BSP_Fatal_error(unsigned int v) * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int _end; uint32_t heap_start; - /* + /* * Let's check to see if the size of M860_binfo is what * it should be. It might not be if the info.h files * for RTEMS and the bootloader define boardinfo_t @@ -103,7 +103,7 @@ bsp_pretasking_hook(void) } /* set up a 256K heap */ bsp_libc_init((void *) heap_start, 256 * 1024, 0); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -121,7 +121,7 @@ void bsp_start(void) ppc_cpu_revision_t myCpuRevision; register unsigned char* intrStack; extern void cpu_init(void); - + /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function * store the result in global variables so that it can be used latter... @@ -134,19 +134,19 @@ void bsp_start(void) /* * Initialize some SPRG registers related to irq handling */ - + intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); /* Signal them that this BSP has fixed PR288 - eventually, this should go away */ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); - + /* * Install our own set of exception vectors */ initialize_exceptions(); - + /* * Allocate the memory for the RTEMS Work Space. This can come from * a variety of places: hard coded address, malloc'ed from outside @@ -172,7 +172,7 @@ void bsp_start(void) } BSP_Configuration.work_space_start = (void *)ws_start; - BSP_Configuration.work_space_size = 512 * 1024; + BSP_Configuration.work_space_size = 512 * 1024; /* * initialize the CPU table for this BSP @@ -195,7 +195,7 @@ void bsp_start(void) /* * Since we are currently autodetecting whether to use SCC1 or * the FEC for ethernet, we set up a register in the ethernet - * transciever that is used for 10/100 Mbps ethernet now, so that + * transciever that is used for 10/100 Mbps ethernet now, so that * we can attempt to read it later in rtems_enet_driver_attach() */ m8xx.fec.mii_speed = 0x0a; @@ -212,6 +212,6 @@ void bsp_start(void) BSP_rtems_irq_mng_init(0); #ifdef SHOW_MORE_INIT_SETTINGS printk("Exit from bspstart\n"); -#endif +#endif } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c index 6049f37878..99355ea11e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c @@ -1,8 +1,8 @@ -/* - * cpuinit.c - this file contains functions for initializing the CPU +/* + * cpuinit.c - this file contains functions for initializing the CPU * * Written by Jay Monkman (jmonkman@frasca.com) - * + * * $Id$ */ @@ -18,14 +18,14 @@ void cpu_init(void) { register unsigned long t1, t2; - /* Let's clear MSR[IR] and MSR[DR] */ + /* Let's clear MSR[IR] and MSR[DR] */ t2 = PPC_MSR_IR | PPC_MSR_DR; __asm__ volatile ( "mfmsr %0\n" "andc %0, %0, %1\n" "mtmsr %0\n" :"=r"(t1), "=r"(t2): "1"(t2)); - + t1 = M8xx_CACHE_CMD_UNLOCK; /* PUT_DC_CST(t1); */ PUT_IC_CST(t1); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c index f226e56df9..adc3c0491d 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c @@ -1,7 +1,7 @@ -/* +/* * mmutlbtab.c - * - * This file defines the MMU_TLB_table for the eth_comm board. + * + * This file defines the MMU_TLB_table for the eth_comm board. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -25,20 +25,20 @@ * The instruction and data TLBs each can hold 32 entries, so _TLB_Table must * not have more than 32 lines in it! * - * We set up the virtual memory map so that virtual address of a + * We set up the virtual memory map so that virtual address of a * location is equal to its real address. */ MMU_TLB_table_t MMU_TLB_table[] = { /* - * DRAM: CS1, Start address 0x00000000, 8M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 8M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for supervisor, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ { 0x00000200, 0x0D, 0x000001FD } /* DRAM - PS=PS=8M */ }; -/* +/* * MMU_N_TLB_Table_Entries is defined here because the size of the * MMU_TLB_table is only known in this file. */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S index 331c3e5f99..561f190225 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S @@ -2,26 +2,26 @@ * (c) 1999, Eric Valette valette@crf.canon.fr * * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * exception veneers for RTEMS. * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(default_exception_vector_code_prolog) SYM (default_exception_vector_code_prolog): /* @@ -34,7 +34,7 @@ SYM (default_exception_vector_code_prolog): stw r2, EXC_LR_OFFSET(r1) bl 0f 0: /* - * r3 = exception vector entry point + * r3 = exception vector entry point * (256 * vector number) + few instructions */ mflr r3 @@ -43,13 +43,13 @@ SYM (default_exception_vector_code_prolog): */ srwi r3,r3,8 ba push_normalized_frame - + PUBLIC_VAR (default_exception_vector_code_prolog_size) - + default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - + .p2align 5 -PUBLIC_VAR (push_normalized_frame) +PUBLIC_VAR (push_normalized_frame) SYM (push_normalized_frame): stw r3, EXCEPTION_NUMBER_OFFSET(r1) stw r0, GPR0_OFFSET(r1) @@ -63,7 +63,7 @@ SYM (push_normalized_frame): * Saved a few line above : R0 * * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance + * series of individual "stw" but who cares about performance * for the DEFAULT exception handler? */ stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ @@ -89,7 +89,7 @@ SYM (push_normalized_frame): ori r3,r3, MSR_RI | MSR_IR | MSR_DR mtmsr r3 SYNC - + /* * Call C exception handler */ @@ -130,12 +130,12 @@ SYM (push_normalized_frame): /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h index 8647d98ee4..3a366f5b83 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h @@ -1,4 +1,4 @@ -/* +/* * vectors.h Exception frame related contant and API. * * This include file describe the data structure and the functions implemented @@ -16,10 +16,10 @@ #define LIBBSP_POWERPC_ETH_COMM_VECTORS_H /* - * The callee (high level exception code written in C) + * The callee (high level exception code written in C) * will store the Link Registers (return address) at entry r1 + 4 !!!. * So let room for it!!!. - */ + */ #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 #define SRR0_FRAME_OFFSET 8 #define SRR1_FRAME_OFFSET 12 @@ -81,7 +81,7 @@ extern int default_exception_vector_code_prolog_size; * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); extern void initialize_exceptions(); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c index 332da08eda..489f9d5054 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c @@ -1,4 +1,4 @@ -/* +/* * vectors_init.c Exception hanlding initialisation (and generic handler). * * This include file describe the data structure and the functions implemented @@ -26,7 +26,7 @@ exception_handler_t globalExceptHdl; void C_exception_handler(BSP_Exception_frame* excPtr) { int recoverable = 0; - + printk("exception handler called for exception %d\n", excPtr->_EXC_number); printk("\t Next PC or Address of fault = %x\n", excPtr->EXC_SRR0); printk("\t Saved MSR = %x\n", excPtr->EXC_SRR1); @@ -70,7 +70,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) if (excPtr->_EXC_number == ASM_DEC_VECTOR) recoverable = 1; if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; diff --git a/c/src/lib/libbsp/powerpc/gen405/dlentry/dlentry.S b/c/src/lib/libbsp/powerpc/gen405/dlentry/dlentry.S index 97ca329573..bc9c28cdd0 100644 --- a/c/src/lib/libbsp/powerpc/gen405/dlentry/dlentry.S +++ b/c/src/lib/libbsp/powerpc/gen405/dlentry/dlentry.S @@ -7,9 +7,9 @@ * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP: + * This file has been derived from the papyrus BSP: * * This file contains the entry veneer for RTEMS programs * downloaded to Papyrus. @@ -31,8 +31,8 @@ * * $Id$ * - * derived from "helas403/dlentry.S": - * Id: dlentry.S,v 1.2 2000/08/02 16:30:57 joel Exp + * derived from "helas403/dlentry.S": + * Id: dlentry.S,v 1.2 2000/08/02 16:30:57 joel Exp */ #include <rtems/asm.h> @@ -52,7 +52,7 @@ * .text * .data * .bss - * see linker command file for section placement + * see linker command file for section placement * * The initial stack is set to stack.end * @@ -63,7 +63,7 @@ * GDB likes to have debugging information for the entry veneer. * Here was some DWARF information. IMD removed it, because we * could not check, whether it was still correct. Sorry. - + */ #if PPC_ASM == PPC_ASM_ELF @@ -75,20 +75,20 @@ PUBLIC_VAR (download_entry) SYM(download_entry): bl .startup -base_addr: +base_addr: /*--------------------------------------------------------------------------- * Parameters from linker *--------------------------------------------------------------------------*/ -toc_pointer: +toc_pointer: #if PPC_ASM == PPC_ASM_ELF .long s.got #else .long TOC[tc0] #endif -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start stack_top: .long stack.end @@ -105,7 +105,7 @@ stack_top: .extern SYM(__vectors) lis r2,__vectors@h /* set EVPR exc. vector prefix */ - mtspr evpr,r2 + mtspr evpr,r2 /*------------------------------------------------------------------- * C_setup. diff --git a/c/src/lib/libbsp/powerpc/gen405/include/bsp.h b/c/src/lib/libbsp/powerpc/gen405/include/bsp.h index a50344ff63..a7eedd807e 100644 --- a/c/src/lib/libbsp/powerpc/gen405/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/gen405/include/bsp.h @@ -3,12 +3,12 @@ * This include file contains all GEN405 board IO definitions. * * derived from helas403/include/bsp.h: - * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp + * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp * Author: Thomas Doerfler <td@imd.m.isar.de> * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. * This file has been derived from the papyrus BSP. * @@ -109,15 +109,15 @@ extern rtems_cpu_table Cpu_table; /* owned by BSP */ /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* functions */ rtems_isr_entry set_vector( /* returns old vector */ diff --git a/c/src/lib/libbsp/powerpc/gen405/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen405/startup/bspstart.c index 82ac8f0ac1..97f70ec440 100644 --- a/c/src/lib/libbsp/powerpc/gen405/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/gen405/startup/bspstart.c @@ -13,9 +13,9 @@ * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP: + * This file has been derived from the papyrus BSP: * * Author: Andrew Bray <andy@i-cubed.co.uk> * @@ -45,7 +45,7 @@ * the above copyright notice and this notice appears in all * copies. IMD makes no representations about the suitability * of this software for any purpose. - * + * * Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c: * * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. @@ -63,7 +63,7 @@ #include <rtems/libio.h> #include <rtems/libcsupport.h> #include <ictrl.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -81,7 +81,7 @@ void *bsp_ram_end = (void *)RAM_END; /* first addr behind avail. ram area */ /* Initialize whatever libc we are using * called from postdriver hook */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -90,7 +90,7 @@ void bsp_libc_init( void *, uint32_t, int ); * bsp_predriver_hook * * Before drivers are setup. - */ + */ void bsp_predriver_hook(void) { @@ -112,7 +112,7 @@ void bsp_predriver_hook(void) * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int _end; @@ -133,13 +133,13 @@ void bsp_pretasking_hook(void) heap_size = heap_end - heap_start; bsp_libc_init((void *) heap_start, heap_size, 0); /* 64 * 1024 */ - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + /* * bsp_start @@ -162,11 +162,11 @@ void bsp_start( void ) * tell the RTEMS configuration where it is. This memory is * not malloc'ed. It is just "pulled from the air". */ - /* FIME: plan usage of RAM better: + /* FIME: plan usage of RAM better: - make top of ram dynamic, - take out some part for persistant log - - make rest of ram to heap... - -remove RAM_END from bsp.h, this cannot be valid... + - make rest of ram to heap... + -remove RAM_END from bsp.h, this cannot be valid... or must be a function call */ BSP_Configuration.work_space_start = (void *) @@ -181,7 +181,7 @@ void bsp_start( void ) Cpu_table.postdriver_hook = bsp_postdriver_hook; Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; - Cpu_table.clicks_per_usec = 300; + Cpu_table.clicks_per_usec = 300; Cpu_table.serial_per_sec = 14625000; /* = (CPU Clock / UART Internal Clock Divisor) */ Cpu_table.serial_external_clock = 0; Cpu_table.timer_internal_clock = 1; diff --git a/c/src/lib/libbsp/powerpc/helas403/dlentry/dlentry.S b/c/src/lib/libbsp/powerpc/helas403/dlentry/dlentry.S index b2a3d16666..f0b8ee6738 100644 --- a/c/src/lib/libbsp/powerpc/helas403/dlentry/dlentry.S +++ b/c/src/lib/libbsp/powerpc/helas403/dlentry/dlentry.S @@ -7,9 +7,9 @@ * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP: + * This file has been derived from the papyrus BSP: * * This file contains the entry veneer for RTEMS programs * downloaded to Papyrus. @@ -49,7 +49,7 @@ * .text * .data * .bss - * see linker command file for section placement + * see linker command file for section placement * * The initial stack is set to stack.end * @@ -60,9 +60,9 @@ * GDB likes to have debugging information for the entry veneer. * Here was some DWARF information. IMD removed it, because we * could not check, whether it was still correct. Sorry. - + */ - + #if PPC_ASM == PPC_ASM_ELF .section .entry #else @@ -72,20 +72,20 @@ PUBLIC_VAR (download_entry) SYM(download_entry): bl .startup -base_addr: +base_addr: /*--------------------------------------------------------------------------- * Parameters from linker *--------------------------------------------------------------------------*/ -toc_pointer: +toc_pointer: #if PPC_ASM == PPC_ASM_ELF .long s.got #else .long TOC[tc0] #endif -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start stack_top: .long stack.end @@ -103,7 +103,7 @@ stack_top: lis r2,__vectors@h /* set EVPR exc. vector prefix */ mtspr evpr,r2 - + /*------------------------------------------------------------------- * C_setup. *------------------------------------------------------------------*/ diff --git a/c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.S b/c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.S index d5db474d54..d11babaa93 100644 --- a/c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.S +++ b/c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.S @@ -1,15 +1,15 @@ /* flashentry.s * * This file contains the entry code for RTEMS programs starting - * directly from Flash. + * directly from Flash. * * Author: Thomas Doerfler <td@imd.m.isar.de> * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP: + * This file has been derived from the papyrus BSP: * * This file contains the entry veneer for RTEMS programs * stored in Papyrus' flash ROM. @@ -39,7 +39,7 @@ * Reset_entry. *---------------------------------------------------------------------------*/ #if PPC_ASM == PPC_ASM_ELF - .section .reset,"ax",@progbits + .section .reset,"ax",@progbits /* this section MUST be located at absolute address 0xFFFFFFFC or last word of EPROM */ #else @@ -49,7 +49,7 @@ ba flash_entry /* this is the first instruction after reset */ .previous - + /*---------------------------------------------------------------------------- * ROM Vector area. *---------------------------------------------------------------------------*/ @@ -71,23 +71,23 @@ toc_pointer: #else .long TOC[tc0] #endif -text_length: +text_length: .long text.size text_addr: .long text.start -copy_src: +copy_src: .long copy.src copy_length: .long copy.size -copy_dest: +copy_dest: .long copy.dest -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start stack_top: .long stack.end - + /*---------------------------------------------------------------------------- * from Reset_entry. *---------------------------------------------------------------------------*/ @@ -99,12 +99,12 @@ stack_top: /* set up bank register BR0 for Flash-EPROM: * NOTE: bank size should stay 1MByte, this is standard size * after RESET - * base addr = Fffxxxxx -> 0b11111111........................ + * base addr = Fffxxxxx -> 0b11111111........................ * bank size = 1 MByte -> 0b........000..................... (std) * bank use = readonly -> 0b...........01................... - * seq. fill = targ frst-> 0b.............0.................. + * seq. fill = targ frst-> 0b.............0.................. * burst mode= enable -> 0b..............1................. - * bus width = 8 bit -> 0b...............00............... + * bus width = 8 bit -> 0b...............00............... * ready pin = disable -> 0b.................0.............. * first wait= 2 clocks -> 0b..................0010.......... * burst wait= 2 clocks -> 0b......................10........ @@ -130,12 +130,12 @@ stack_top: * test RAM config 16 MByte (1x4Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 for DRAM: - * base addr = 000xxxxx -> 0b00000000........................ + * base addr = 000xxxxx -> 0b00000000........................ * bank size = 16MByte -> 0b........100..................... * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -151,7 +151,7 @@ stack_top: */ lis r2,0x0099 ori r2,r2,0x2AB0 - mtdcr br7,r2 /* write to DCR BR7*/ + mtdcr br7,r2 /* write to DCR BR7*/ lis r2,0x0000 /* start address = 0x00000000 */ lis r3,0x0100 /* size 16 MB = 0x01000000 */ @@ -163,13 +163,13 @@ stack_top: * test RAM config 32 MByte (2x4Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 like above - * set up bank register BR6 for DRAM: - * base addr = 010xxxxx -> 0b00010000........................ + * set up bank register BR6 for DRAM: + * base addr = 010xxxxx -> 0b00010000........................ * bank size = 16MByte -> 0b........100..................... (for now) * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -185,29 +185,29 @@ stack_top: */ lis r2,0x1099 ori r2,r2,0x2AB0 - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ lis r2,0x0100 /* start address = 0x01000000 */ lis r3,0x0100 /* size 16 MB = 0x01000000 */ bl ramacc /* test memory accessibility */ cmpi 0,0,r4,0 /* memory ok? else test smaller size */ beq ramcfgok /* ok, we found configuration... +/ - + lis r2,0x0000 /* disable BR6, config not ok */ - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ b ramcfgok /* and finish configuration */ - -ramcfgt18: + +ramcfgt18: /*-------------------------------------------------------------------- * test RAM config 8 MByte (1x2Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 for DRAM: - * base addr = 000xxxxx -> 0b00000000........................ + * base addr = 000xxxxx -> 0b00000000........................ * bank size = 8MByte -> 0b........011..................... * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -223,7 +223,7 @@ ramcfgt18: */ lis r2,0x0079 ori r2,r2,0x2AB0 - mtdcr br7,r2 /* write to DCR BR7 */ + mtdcr br7,r2 /* write to DCR BR7 */ lis r2,0x0000 /* start address = 0x00000000 */ lis r3,0x0080 /* size 8 MB = 0x00800000 */ @@ -235,13 +235,13 @@ ramcfgt18: * test RAM config 16 MByte (2x2Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 like above - * set up bank register BR6 for DRAM: - * base addr = 008xxxxx -> 0b00001000........................ + * set up bank register BR6 for DRAM: + * base addr = 008xxxxx -> 0b00001000........................ * bank size = 08MByte -> 0b........011..................... (for now) * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -257,29 +257,29 @@ ramcfgt18: */ lis r2,0x0879 ori r2,r2,0x2AB0 - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ lis r2,0x0080 /* start address = 0x00800000 */ lis r3,0x0080 /* size 8 MB = 0x00800000 */ bl ramacc /* test memory accessibility */ cmpi 0,0,r4,0 /* memory ok? else test smaller size */ beq ramcfgok /* ok, we found configuration... +/ - + lis r2,0x0000 /* disable BR6, config not ok */ - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ b ramcfgok /* and finish configuration */ - -ramcfgt14: + +ramcfgt14: /*-------------------------------------------------------------------- * test RAM config 4 MByte (1x1Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 for DRAM: - * base addr = 000xxxxx -> 0b00000000........................ + * base addr = 000xxxxx -> 0b00000000........................ * bank size = 4MByte -> 0b........010..................... * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -299,19 +299,19 @@ ramcfgt14: */ lis r2,0x0059 ori r2,r2,0x2AB0 - mtdcr br7,r2 /* write to DCR BR7*/ + mtdcr br7,r2 /* write to DCR BR7*/ /*-------------------------------------------------------------------- * test RAM config 8 MByte (2x1Mx32Bit) *------------------------------------------------------------------*/ /* set up bank register BR7 like above - * set up bank register BR6 for DRAM: - * base addr = 004xxxxx -> 0b00000100........................ + * set up bank register BR6 for DRAM: + * base addr = 004xxxxx -> 0b00000100........................ * bank size = 4MByte -> 0b........010..................... (for now) * bank use = readwrite-> 0b...........11................... - * seq. fill = targ.frst-> 0b.............0.................. + * seq. fill = targ.frst-> 0b.............0.................. * early RAS = disabled -> 0b..............0................. - * bus width = 32bit -> 0b...............10............... + * bus width = 32bit -> 0b...............10............... * adr mux = internal -> 0b.................0.............. * RAS to CAS= 2 clocks -> 0b..................1............. * Alt. Rfrsh= normal -> 0b...................0............ @@ -327,19 +327,19 @@ ramcfgt14: */ lis r2,0x0459 ori r2,r2,0x2AB0 - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ lis r2,0x0040 /* start address = 0x00400000 */ lis r3,0x0040 /* size 4 MB = 0x00400000 */ bl ramacc /* test memory accessibility */ cmpi 0,0,r4,0 /* memory ok? else test smaller size */ beq ramcfgok /* ok, we found configuration... +/ - + lis r2,0x0000 /* disable BR6, config not ok */ - mtdcr br6,r2 /* write to DCR BR6*/ + mtdcr br6,r2 /* write to DCR BR6*/ b ramcfgok /* and finish configuration */ -ramcfgok: +ramcfgok: /*-------------------------------------------------------------------- * init the DRAM where STACK+ DATA+ BBS will be placed. If this is OK * we will return here. @@ -350,24 +350,24 @@ ramcfgok: addi r2,0,PPC_I_CACHE/PPC_CACHE_ALIGNMENT mtctr r2 /* count the loops needed... */ xor r2,r2,r2 /* start at adr zero */ -icinvlp: +icinvlp: iccci 0,r2 addi r2,r2,PPC_CACHE_ALIGNMENT bdnz icinvlp - + addi r2,r0,PPC_D_CACHE/PPC_CACHE_ALIGNMENT mtctr r2 /* count the loops needed... */ xor r2,r2,r2 /* start at adr 0 */ -dcinvlp: +dcinvlp: dccci 0,r2 addi r2,r2,PPC_CACHE_ALIGNMENT bdnz dcinvlp /*-------------------------------------------------------------------- * Enable two 128MB cachable regions. * FEPROM is cachable at 0xFFF00000..0xFFFFFFFF - * DRAM is cachable at 0x00000000..0x00FFFFFF + * DRAM is cachable at 0x00000000..0x00FFFFFF * FEPROM is noncachable at 0x7FF00000..0x7FFFFFFF - * DRAM is noncachable at 0x80000000..0x80FFFFFF + * DRAM is noncachable at 0x80000000..0x80FFFFFF *-------------------------------------------------------------------*/ addis r2,r0,0x8000 addi r2,r2,0x0001 @@ -386,17 +386,17 @@ dcinvlp: lis r2,0x0000 /* do not allow critical IRQ */ ori r2,r2,0x0000 mtdcr exier, r2 /* disable all external IRQs */ - + addi r2,r0,-1 /* r2 = 0xffffffff */ mtdcr exisr, r2 /* clear all pendingdisable IRQs */ - + /*-------------------------------------------------------------------- * C_setup. *-------------------------------------------------------------------*/ lwz r2,toc_pointer-base_addr(r1) /* set r2 to toc */ lwz r1,stack_top-base_addr(r1) /* set r1 to stack_top */ - + addi r1,r1,-56 /* start stack at data_addr - 56 */ addi r3,r0,0x0 /* clear r3 */ stw r3, 0(r1) /* Clear stack chain */ @@ -452,7 +452,7 @@ ramacc: xor r4,r4,r4 /* r4 = 0 */ stw r4,0(r2) /* init ram at start address */ addi r4,r0,0x04 /* set start shift */ -ramaccf1: +ramaccf1: cmp 0,0,r4,r3 /* compare with length */ bge ramaccfx /* r4 >= r3? then finished */ add r5,r4,r2 /* get next address to fill */ @@ -463,7 +463,7 @@ ramaccf1: ramaccfx: lwz r4,0(r2) /* get memory at start adr */ blr - + #if PPC_ABI == PPC_ABI_POWEROPEN DESCRIPTOR (startup) diff --git a/c/src/lib/libbsp/powerpc/helas403/include/bsp.h b/c/src/lib/libbsp/powerpc/helas403/include/bsp.h index b55f35a041..56aff201e1 100644 --- a/c/src/lib/libbsp/powerpc/helas403/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/helas403/include/bsp.h @@ -6,7 +6,7 @@ * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. * This file has been derived from the papyrus BSP. * @@ -106,15 +106,15 @@ extern rtems_cpu_table Cpu_table; /* owned by BSP */ /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* functions */ rtems_isr_entry set_vector( /* returns old vector */ diff --git a/c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c b/c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c index e5f5d7bc94..a769b7c380 100644 --- a/c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c @@ -13,9 +13,9 @@ * IMD Ingenieurbuero fuer Microcomputertechnik * * COPYRIGHT (c) 1998 by IMD - * + * * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP: + * This file has been derived from the papyrus BSP: * * Author: Andrew Bray <andy@i-cubed.co.uk> * @@ -45,7 +45,7 @@ * the above copyright notice and this notice appears in all * copies. IMD makes no representations about the suitability * of this software for any purpose. - * + * * Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c: * * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. @@ -61,7 +61,7 @@ #include <rtems/libio.h> #include <rtems/libcsupport.h> #include <ictrl.h> - + /* * The original table from the application and our copy of it with * some changes. @@ -79,7 +79,7 @@ void *bsp_ram_end = (void *)RAM_END; /* first addr behind avail. ram area */ /* Initialize whatever libc we are using * called from postdriver hook */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -88,7 +88,7 @@ void bsp_libc_init( void *, uint32_t, int ); * bsp_predriver_hook * * Before drivers are setup. - */ + */ void bsp_predriver_hook(void) { @@ -110,7 +110,7 @@ void bsp_predriver_hook(void) * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int _end; @@ -121,12 +121,12 @@ void bsp_pretasking_hook(void) heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); bsp_libc_init((void *) heap_start, 64 * 1024, 0); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif } - + /* * bsp_start @@ -149,11 +149,11 @@ void bsp_start( void ) * tell the RTEMS configuration where it is. This memory is * not malloc'ed. It is just "pulled from the air". */ - /* FIME: plan usage of RAM better: + /* FIME: plan usage of RAM better: - make top of ram dynamic, - take out some part for persistant log - - make rest of ram to heap... - -remove RAM_END from bsp.h, this cannot be valid... + - make rest of ram to heap... + -remove RAM_END from bsp.h, this cannot be valid... or must be a function call */ BSP_Configuration.work_space_start = (void *) diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/clock/p_clock.c b/c/src/lib/libbsp/powerpc/mbx8xx/clock/p_clock.c index 4a79f81864..b4bf7ca93e 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/clock/p_clock.c @@ -28,7 +28,7 @@ static rtems_irq_connect_data clockIrqData = {BSP_PERIODIC_TIMER, (rtems_irq_enable)clockOn, (rtems_irq_disable)clockOff, (rtems_irq_is_enabled)clockIsOn}; - + int BSP_get_clock_irq_level() { /* @@ -65,6 +65,6 @@ int BSP_connect_clock_handler (rtems_irq_hdl hdl) clockIrqData.on = (rtems_irq_enable)clockOn; clockIrqData.off = (rtems_irq_enable)clockOff; clockIrqData.isOn = (rtems_irq_is_enabled)clockIsOn; - + return BSP_install_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c index 7716cf3a85..efb7c6853b 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c @@ -45,7 +45,7 @@ * Interrupt-driven I/O requires termios. * * TESTS: - * + * * TO RUN THE TESTS, USE POLLED I/O WITHOUT TERMIOS SUPPORT. Some tests * play with the interrupt masks and turn off I/O. Those tests will hang * when interrupt-driven I/O is used. Other tests, such as cdtest, do I/O @@ -55,16 +55,16 @@ * should all be fixed to work with interrupt-driven I/O and to * produce output in the expected sequence. Obviously, the termios test * requires termios support in the driver. - * + * * Set CONSOLE_MINOR to the appropriate device minor number in the * config file. This allows the RTEMS application console to be different * from the EPPBug debug console or the GDB port. - * + * * This driver handles all five available serial ports: it distinguishes * the sub-devices using minor device numbers. It is not possible to have * other protocols running on the other ports when this driver is used as * currently written. - * + * * Based on code (alloc860.c in eth_comm port) by * Jay Monkman (jmonkman@frasca.com), * Copyright (C) 1998 by Frasca International, Inc. @@ -118,7 +118,7 @@ static int _EPPCBug_pollRead( volatile int simask; /* We must read and write m8xx.simask */ int retval; ISR_Level level; - + struct { int clun; int dlun; @@ -126,7 +126,7 @@ static int _EPPCBug_pollRead( int nbytes_requested; int reserved; } volatile input_params; - + struct { int status; union { @@ -145,30 +145,30 @@ static int _EPPCBug_pollRead( retval = -1; input_params.clun = 0; - + switch( minor ) { - case SMC1_MINOR: + case SMC1_MINOR: input_params.dlun = 0; /* Should be 4, but doesn't work with EPPCBug 1.1 */ break; - case SMC2_MINOR: + case SMC2_MINOR: input_params.dlun = 5; break; - case SCC2_MINOR: + case SCC2_MINOR: input_params.dlun = 1; break; #ifdef mpc860 - case SCC3_MINOR: + case SCC3_MINOR: input_params.dlun = 2; break; - case SCC4_MINOR: + case SCC4_MINOR: input_params.dlun = 3; break; #endif - default: + default: input_params.dlun = 0; break; } - + _ISR_Disable( level ); simask = m8xx.simask; @@ -180,21 +180,21 @@ static int _EPPCBug_pollRead( :: "g" (&input_params), "g" (&output_params) : "3", "4", "10" ); if ( (output_params.status == 0) && output_params.u.stat.input_char_available) { - + /* Read the char and return it */ input_params.inbuf = &c; input_params.nbytes_requested = 1; - + asm volatile( "li 10,0x200 /* Code for .CIO_READ */\n\ mr 3, %0 /* Address of input_params */\n\ mr 4, %1 /* Address of output_params */\n\ - sc" /* Call EPPCBUG */ + sc" /* Call EPPCBUG */ :: "g" (&input_params), "g" (&output_params) : "3", "4", "10" ); if ( (output_params.status == 0) && output_params.u.read.nbytes_received) retval = (int)c; } - + m8xx.simask = simask; _ISR_Enable( level ); return retval; @@ -227,7 +227,7 @@ static int _EPPCBug_pollWrite( volatile int simask; int i, retval; ISR_Level level; - + struct { int clun; int dlun; @@ -235,7 +235,7 @@ static int _EPPCBug_pollWrite( int nbytes_to_output; int reserved; } volatile input_params; - + struct { int status; union { @@ -255,26 +255,26 @@ static int _EPPCBug_pollWrite( input_params.clun = 0; input_params.reserved = 0; - + switch( minor ) { - case SMC1_MINOR: + case SMC1_MINOR: input_params.dlun = 0; /* Should be 4, but doesn't work with EPPCBug 1.1 */ break; - case SMC2_MINOR: + case SMC2_MINOR: input_params.dlun = 5; break; - case SCC2_MINOR: + case SCC2_MINOR: input_params.dlun = 1; break; #ifdef mpc860 - case SCC3_MINOR: + case SCC3_MINOR: input_params.dlun = 2; break; - case SCC4_MINOR: + case SCC4_MINOR: input_params.dlun = 3; break; #endif - default: + default: input_params.dlun = 0; break; } @@ -291,7 +291,7 @@ static int _EPPCBug_pollWrite( asm volatile( "li 10,0x202 /* Code for .CIO_STAT */\n\ mr 3, %0 /* Address of input_params */\n\ mr 4, %1 /* Address of output_params */\n\ - sc" /* Call EPPCBUG */ + sc" /* Call EPPCBUG */ :: "g" (&input_params), "g" (&output_params) : "3", "4", "10" ); if (output_params.status) @@ -301,11 +301,11 @@ static int _EPPCBug_pollWrite( /* Output the characters until done */ input_params.outbuf = &buf[i]; input_params.nbytes_to_output = len - i; - + asm volatile( "li 10,0x201 /* Code for .CIO_WRITE */\n\ mr 3, %0 /* Address of input_params */\n\ mr 4, %1 /* Address of output_params */\n\ - sc" /* Call EPPCBUG */ + sc" /* Call EPPCBUG */ :: "g" (&input_params), "g" (&output_params) : "3", "4", "10" ); if (output_params.status) @@ -313,7 +313,7 @@ static int _EPPCBug_pollWrite( i += output_params.u.write.nbytes_sent; } - + /* Return something */ m8xx.simask = simask; _ISR_Enable( level ); @@ -361,7 +361,7 @@ static rtems_status_code do_poll_read( #if NVRAM_CONFIGURE == 1 int (*pollRead)( int minor ); - + if ( (nvram->console_mode & 0x06) == 0x04 ) pollRead = _EPPCBug_pollRead; else @@ -399,7 +399,7 @@ static rtems_status_code do_poll_read( * Output characters through polled I/O. Returns only once every character has * been sent. * - * CR is transmitted AFTER a LF on output. + * CR is transmitted AFTER a LF on output. * * Input parameters: * major - ignored. Should be the major number for this driver. @@ -427,7 +427,7 @@ static rtems_status_code do_poll_write( #if NVRAM_CONFIGURE == 1 int (*pollWrite)(int minor, const char *buf, int len); - + if ( (nvram->console_mode & 0x06) == 0x04 ) pollWrite = _EPPCBug_pollWrite; else @@ -468,8 +468,8 @@ static rtems_status_code do_poll_write( static void _BSP_output_char( char c ) { char cr = '\r'; - - /* + + /* * Can't rely on console_initialize having been called before this function * is used, so it may fail unless output is done through EPPC-Bug. */ @@ -489,8 +489,8 @@ static void _BSP_output_char( char c ) if( c == '\n' ) m8xx_uart_pollWrite( PRINTK_MINOR, &cr, 1 ); } - -#else + +#else #if PRINTK_IO_MODE == 2 #define PRINTK_WRITE _EPPCBug_pollWrite @@ -501,7 +501,7 @@ static void _BSP_output_char( char c ) PRINTK_WRITE( PRINTK_MINOR, &c, 1 ); if( c == '\n' ) PRINTK_WRITE( PRINTK_MINOR, &cr, 1 ); - + #endif } @@ -543,7 +543,7 @@ serial_init() bd_t *bd; bd = eppcbugInfo; - + cp = cpmp; sp = (smc_t*)&(cp->cp_smc[SMC_INDEX]); up = (smc_uart_t *)&cp->cp_dparam[PROFF_CONS]; @@ -723,14 +723,14 @@ rtems_device_driver console_initialize( { rtems_status_code status; rtems_device_minor_number console_minor; - + /* * Set up TERMIOS if needed */ #if NVRAM_CONFIGURE == 1 /* Use NVRAM info for configuration */ console_minor = nvram->console_printk_port & 0x07; - + if ( nvram->console_mode & 0x01 ) /* termios */ rtems_termios_initialize (); @@ -739,7 +739,7 @@ rtems_device_driver console_initialize( * Do common initialization. */ m8xx_uart_initialize(); - + /* * Do device-specific initialization */ @@ -750,12 +750,12 @@ rtems_device_driver console_initialize( if ( ((nvram->console_mode & 0x30) != 0x20) || (((nvram->console_printk_port & 0x30) >> 4) != SMC2_MINOR) ) - m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ + m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ if ( ((nvram->console_mode & 0x30) != 0x20) || (((nvram->console_printk_port & 0x30) >> 4) != SCC2_MINOR) ) m8xx_uart_scc_initialize(SCC2_MINOR); /* /dev/tty2 */ - + #ifdef mpc860 if ( ((nvram->console_mode & 0x30) != 0x20) || @@ -771,18 +771,18 @@ rtems_device_driver console_initialize( #else /* NVRAM_CONFIGURE != 1 */ console_minor = CONSOLE_MINOR; - + #if UARTS_USE_TERMIOS == 1 rtems_termios_initialize (); - + #endif /* UARTS_USE_TERMIOS */ - + /* * Do common initialization. */ m8xx_uart_initialize(); - + /* * Do device-specific initialization */ @@ -791,13 +791,13 @@ rtems_device_driver console_initialize( #endif #if PRINTK_IO_MODE != 2 || PRINTK_MINOR != SMC2_MINOR - m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ + m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ #endif #if PRINTK_IO_MODE != 2 || PRINTK_MINOR != SCC2_MINOR m8xx_uart_scc_initialize(SCC2_MINOR); /* /dev/tty2 */ #endif - + #ifdef mpc860 #if PRINTK_IO_MODE != 2 || PRINTK_MINOR != SCC3_MINOR @@ -818,31 +818,31 @@ rtems_device_driver console_initialize( status = rtems_io_register_name ("/dev/tty0", major, SMC1_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + status = rtems_io_register_name ("/dev/tty1", major, SMC2_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + status = rtems_io_register_name ("/dev/tty2", major, SCC2_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + #ifdef mpc860 status = rtems_io_register_name ("/dev/tty3", major, SCC3_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + status = rtems_io_register_name ("/dev/tty4", major, SCC4_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + #endif /* mpc860 */ - + /* Now register the RTEMS console */ status = rtems_io_register_name ("/dev/console", major, console_minor); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + return RTEMS_SUCCESSFUL; } @@ -881,12 +881,12 @@ rtems_device_driver console_open( 0 /* outputUsesInterrupts */ }; rtems_status_code sc; - - + + #if (NVRAM_CONFIGURE == 1) || \ ((NVRAM_CONFIGURE != 1) && (UARTS_USE_TERMIOS == 1) && \ (UARTS_IO_MODE == 1)) - + static const rtems_termios_callbacks intrCallbacks = { NULL, /* firstOpen */ NULL, /* lastClose */ @@ -898,13 +898,13 @@ rtems_device_driver console_open( 1 /* outputUsesInterrupts */ }; #endif - - if ( minor > NUM_PORTS-1 ) + + if ( minor > NUM_PORTS-1 ) return RTEMS_INVALID_NUMBER; #if NVRAM_CONFIGURE == 1 - /* Use NVRAM info for configuration */ + /* Use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) { /* Use termios */ if ( (nvram->console_mode & 0x06) == 0x02 ) { @@ -923,7 +923,7 @@ rtems_device_driver console_open( else /* no termios -- default to polled I/O */ return RTEMS_SUCCESSFUL; - + #else /* NVRAM_CONFIGURE != 1 */ #if UARTS_USE_TERMIOS == 1 @@ -943,7 +943,7 @@ rtems_device_driver console_open( #endif /* UARTS_USE_TERMIOS != 1 */ return sc; - + #endif /* NVRAM_CONFIGURE != 1 */ } @@ -962,7 +962,7 @@ rtems_device_driver console_close( #if NVRAM_CONFIGURE == 1 - /* Use NVRAM info for configuration */ + /* Use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* use termios */ return rtems_termios_close( arg ); @@ -996,7 +996,7 @@ rtems_device_driver console_read( #if NVRAM_CONFIGURE == 1 - /* Use NVRAM info for configuration */ + /* Use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* use termios */ return rtems_termios_read( arg ); @@ -1030,7 +1030,7 @@ rtems_device_driver console_write( #if NVRAM_CONFIGURE == 1 - /* Use NVRAM info for configuration */ + /* Use NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* use termios */ return rtems_termios_write( arg ); @@ -1059,13 +1059,13 @@ rtems_device_driver console_control( rtems_device_minor_number minor, void *arg ) -{ +{ if ( minor > NUM_PORTS-1 ) return RTEMS_INVALID_NUMBER; #if NVRAM_CONFIGURE == 1 - /* Uuse NVRAM info for configuration */ + /* Uuse NVRAM info for configuration */ if ( nvram->console_mode & 0x01 ) /* termios */ return rtems_termios_ioctl( arg ); diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ide/idecfg.c b/c/src/lib/libbsp/powerpc/mbx8xx/ide/idecfg.c index eb9f6c135b..6dee967b54 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/ide/idecfg.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/ide/idecfg.c @@ -45,5 +45,5 @@ ide_controller_bsp_table_t IDE_Controller_Table[] = { }; /* Number of rows in IDE_Controller_Table */ -unsigned long IDE_Controller_Count = +unsigned long IDE_Controller_Count = sizeof(IDE_Controller_Table)/sizeof(IDE_Controller_Table[0]); diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ide/pcmcia_ide.c b/c/src/lib/libbsp/powerpc/mbx8xx/ide/pcmcia_ide.c index 6c6d2d368d..9e9d3069fc 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/ide/pcmcia_ide.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/ide/pcmcia_ide.c @@ -33,8 +33,8 @@ /* #define DATAREG_16BIT */ /* 16 bit mode not yet working */ /* #define DEBUG_OUT */ -/* - * support functions for PCMCIA IDE IF +/* + * support functions for PCMCIA IDE IF */ /*=========================================================================*\ | Function: | @@ -55,11 +55,11 @@ boolean mbx8xx_pcmciaide_probe \*=========================================================================*/ { boolean ide_card_plugged = TRUE; /* assume: we have a card plugged in */ - + /* * check, that the CD# pins are low -> a PCMCIA card is plugged in */ - if ((m8xx.pipr + if ((m8xx.pipr & (M8xx_PCMCIA_PIPR_CACD1 | M8xx_PCMCIA_PIPR_CACD2)) != 0x00) { ide_card_plugged = FALSE; } @@ -79,7 +79,7 @@ boolean mbx8xx_pcmciaide_probe int cis_pos = 0; boolean fixed_disk_tuple_found = FALSE; boolean ata_disk_tuple_found = FALSE; - + while ((cis_pos < 256) && (CIS_BYTE(cis_pos) != 0xff) && (!fixed_disk_tuple_found || !ata_disk_tuple_found)) { @@ -95,10 +95,10 @@ boolean mbx8xx_pcmciaide_probe (CIS_BYTE(cis_pos+3) == 0x01)) { ata_disk_tuple_found = TRUE; } - /* - * advance using the length field + /* + * advance using the length field */ - cis_pos += CIS_BYTE(cis_pos+1)+2; + cis_pos += CIS_BYTE(cis_pos+1)+2; } ide_card_plugged = fixed_disk_tuple_found && ata_disk_tuple_found; } @@ -127,7 +127,7 @@ void mbx8xx_pcmciaide_initialize * FIXME: enable interrupts, if needed */ /* - * FIXME: set programming voltage as requested + * FIXME: set programming voltage as requested */ } @@ -155,14 +155,14 @@ void mbx8xx_pcmciaide_read_reg if (reg == IDE_REGISTER_DATA_WORD) { #ifdef DATAREG_16BIT - *value = *(volatile uint16_t*)(port+reg); + *value = *(volatile uint16_t*)(port+reg); #else - *value = ((*(volatile uint8_t*)(port+reg) << 8) + - (*(volatile uint8_t*)(port+reg+1) )); + *value = ((*(volatile uint8_t*)(port+reg) << 8) + + (*(volatile uint8_t*)(port+reg+1) )); #endif } else { - *value = *(volatile uint8_t*)(port+reg); + *value = *(volatile uint8_t*)(port+reg); } #ifdef DEBUG_OUT printk("mbx8xx_pcmciaide_read_reg(0x%x)=0x%x\r\n",reg,*value & 0xff); @@ -196,14 +196,14 @@ void mbx8xx_pcmciaide_write_reg #endif if (reg == IDE_REGISTER_DATA_WORD) { #ifdef DATAREG_16BIT - *(volatile uint16_t*)(port+reg) = value; + *(volatile uint16_t*)(port+reg) = value; #else - *(volatile uint8_t*)(port+reg) = value >> 8; - *(volatile uint8_t*)(port+reg+1) = value; + *(volatile uint8_t*)(port+reg) = value >> 8; + *(volatile uint8_t*)(port+reg+1) = value; #endif } else { - *(volatile uint8_t*)(port+reg)= value; + *(volatile uint8_t*)(port+reg)= value; } } @@ -218,9 +218,9 @@ void mbx8xx_pcmciaide_read_block +---------------------------------------------------------------------------+ | Input Parameters: | \*-------------------------------------------------------------------------*/ - int minor, - uint16_t block_size, - blkdev_sg_buffer *bufs, + int minor, + uint16_t block_size, + blkdev_sg_buffer *bufs, uint32_t *cbuf, uint32_t *pos ) @@ -242,17 +242,17 @@ void mbx8xx_pcmciaide_read_block ((uint8_t*)(bufs[(*cbuf)].buffer) + (*pos)); #endif uint32_t llength = bufs[(*cbuf)].length; - - while (((*(volatile uint8_t*)(port+IDE_REGISTER_STATUS)) - & IDE_REGISTER_STATUS_DRQ) && + + while (((*(volatile uint8_t*)(port+IDE_REGISTER_STATUS)) + & IDE_REGISTER_STATUS_DRQ) && (cnt < block_size)) { #ifdef DATAREG_16BIT *lbuf++ = *(volatile uint16_t*)(port+8); /* 16 bit data port */ - cnt += 2; + cnt += 2; (*pos) += 2; #else *lbuf++ = *(volatile uint8_t*)(port+IDE_REGISTER_DATA); - cnt += 1; + cnt += 1; (*pos) += 1; #endif if ((*pos) == llength) { @@ -261,7 +261,7 @@ void mbx8xx_pcmciaide_read_block lbuf = bufs[(*cbuf)].buffer; llength = bufs[(*cbuf)].length; } - } + } } /*=========================================================================*\ @@ -275,9 +275,9 @@ void mbx8xx_pcmciaide_write_block +---------------------------------------------------------------------------+ | Input Parameters: | \*-------------------------------------------------------------------------*/ - int minor, - uint16_t block_size, - blkdev_sg_buffer *bufs, + int minor, + uint16_t block_size, + blkdev_sg_buffer *bufs, uint32_t *cbuf, uint32_t *pos ) @@ -300,17 +300,17 @@ void mbx8xx_pcmciaide_write_block ((uint8_t*)(bufs[(*cbuf)].buffer) + (*pos)); #endif uint32_t llength = bufs[(*cbuf)].length; - - while (((*(volatile uint8_t*)(port+IDE_REGISTER_STATUS)) - & IDE_REGISTER_STATUS_DRQ) && + + while (((*(volatile uint8_t*)(port+IDE_REGISTER_STATUS)) + & IDE_REGISTER_STATUS_DRQ) && (cnt < block_size)) { #ifdef DATAREG_16BIT *(volatile uint16_t*)(port+8) = *lbuf++; /* 16 bit data port */ - cnt += 2; + cnt += 2; (*pos) += 2; #else *(volatile uint8_t*)(port+IDE_REGISTER_DATA) = *lbuf++; - cnt += 1; + cnt += 1; (*pos) += 1; #endif if ((*pos) == llength) { @@ -319,7 +319,7 @@ void mbx8xx_pcmciaide_write_block lbuf = bufs[(*cbuf)].buffer; llength = bufs[(*cbuf)].length; } - } + } } /*=========================================================================*\ @@ -368,7 +368,7 @@ rtems_status_code mbx8xx_pcmciaide_config_io_speed } /* - * The following table configures the functions used for IDE drivers + * The following table configures the functions used for IDE drivers * in this BSP. */ diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h b/c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h index b86bbd8e31..9beb406672 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h @@ -107,7 +107,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c index 1b8f8c2da1..2a5afa4569 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c @@ -10,7 +10,7 @@ * * $Id$ */ - + #include <rtems/system.h> #include <bsp.h> #include <bsp/irq.h> @@ -66,9 +66,9 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine) /* - * masks used to mask off the interrupts. For exmaple, for ILVL2, the - * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 - * and ILVL7. + * masks used to mask off the interrupts. For exmaple, for ILVL2, the + * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 + * and ILVL7. * */ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] = @@ -132,10 +132,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 1; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_irq_index); @@ -145,10 +145,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 0; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); return (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr & (1 << cpm_irq_index)); } @@ -156,7 +156,7 @@ int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enable_at_siu(const rtems_irq_symbolic_name irqLine) { int siu_irq_index; - + if (!is_siu_irq(irqLine)) return 1; @@ -173,7 +173,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_symbolic_name irqLine) if (!is_siu_irq(irqLine)) return 1; - + siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET); ppc_cached_irq_mask &= ~(1 << (31-siu_irq_index)); ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; @@ -199,7 +199,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -220,14 +220,14 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * store the data provided by user */ rtems_hdl_tbl[irq->name] = *irq; - + if (is_cpm_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_cpm (irq->name); } - + if (is_siu_irq(irq->name)) { /* * Enable interrupt at SIU level @@ -245,7 +245,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -264,7 +264,7 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq) int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -296,7 +296,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* * disable exception at processor level */ - } + } /* * Disable interrupt on device @@ -412,7 +412,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[BSP_DECREMENTER].hdl(); _CPU_MSR_SET(msr); @@ -423,12 +423,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) */ #ifdef DISPATCH_HANDLER_STAT loopCounter = 0; -#endif +#endif while (1) { if ((ppc_cached_irq_mask & ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend) == 0) { #ifdef DISPATCH_HANDLER_STAT if (loopCounter > maxLoop) maxLoop = loopCounter; -#endif +#endif break; } irq = (((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26); @@ -443,12 +443,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) * Acknowledge current interrupt. This has no effect on internal level interrupt. */ ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = (1 << (31 - irq)); - + if (cpmIntr) { /* * We will reenable the SIU CPM interrupt to allow nesting of CPM interrupt. * We must before acknowledege the current irq at CPM level to avoid trigerring - * the interrupt again. + * the interrupt again. */ /* * Acknowledge and get the vector. @@ -468,7 +468,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[irq].hdl(); _CPU_MSR_SET(msr); @@ -481,12 +481,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; #ifdef DISPATCH_HANDLER_STAT ++ loopCounter; -#endif +#endif } } - - + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h index a3b2f71f0c..49e720a6b5 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h @@ -69,7 +69,7 @@ typedef enum { * Some SIU IRQ symbolic name definition. Please note that * INT IRQ are defined but a single one will be used to * redirect all CPM interrupt. - */ + */ BSP_SIU_EXT_IRQ_0 = 0, BSP_SIU_INT_IRQ_0 = 1, @@ -78,19 +78,19 @@ typedef enum { BSP_SIU_EXT_IRQ_2 = 4, BSP_SIU_INT_IRQ_2 = 5, - + BSP_SIU_EXT_IRQ_3 = 6, BSP_SIU_INT_IRQ_3 = 7, - + BSP_SIU_EXT_IRQ_4 = 8, BSP_SIU_INT_IRQ_4 = 9, BSP_SIU_EXT_IRQ_5 = 10, BSP_SIU_INT_IRQ_5 = 11, - + BSP_SIU_EXT_IRQ_6 = 12, BSP_SIU_INT_IRQ_6 = 13, - + BSP_SIU_EXT_IRQ_7 = 14, BSP_SIU_INT_IRQ_7 = 15, /* @@ -110,18 +110,18 @@ typedef enum { BSP_CPM_IRQ_SPI = BSP_CPM_IRQ_LOWEST_OFFSET + 5, BSP_CPM_IRQ_PARALLEL_IO_PC6 = BSP_CPM_IRQ_LOWEST_OFFSET + 6, BSP_CPM_IRQ_TIMER_4 = BSP_CPM_IRQ_LOWEST_OFFSET + 7, - + BSP_CPM_IRQ_PARALLEL_IO_PC7 = BSP_CPM_IRQ_LOWEST_OFFSET + 9, BSP_CPM_IRQ_PARALLEL_IO_PC8 = BSP_CPM_IRQ_LOWEST_OFFSET + 10, BSP_CPM_IRQ_PARALLEL_IO_PC9 = BSP_CPM_IRQ_LOWEST_OFFSET + 11, BSP_CPM_IRQ_TIMER_3 = BSP_CPM_IRQ_LOWEST_OFFSET + 12, - + BSP_CPM_IRQ_PARALLEL_IO_PC10 = BSP_CPM_IRQ_LOWEST_OFFSET + 14, BSP_CPM_IRQ_PARALLEL_IO_PC11 = BSP_CPM_IRQ_LOWEST_OFFSET + 15, BSP_CPM_I2C = BSP_CPM_IRQ_LOWEST_OFFSET + 16, BSP_CPM_RISC_TIMER_TABLE = BSP_CPM_IRQ_LOWEST_OFFSET + 17, BSP_CPM_IRQ_TIMER_2 = BSP_CPM_IRQ_LOWEST_OFFSET + 18, - + BSP_CPM_IDMA2 = BSP_CPM_IRQ_LOWEST_OFFSET + 20, BSP_CPM_IDMA1 = BSP_CPM_IRQ_LOWEST_OFFSET + 21, BSP_CPM_SDMA_CHANNEL_BUS_ERR = BSP_CPM_IRQ_LOWEST_OFFSET + 22, @@ -138,10 +138,10 @@ typedef enum { * Some Processor exception handled as rtems IRQ symbolic name definition */ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET - + }rtems_irq_symbolic_name; -#define CPM_INTERRUPT +#define CPM_INTERRUPT /* @@ -171,9 +171,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at SIU and CPM level. RATIONALE : anyway @@ -209,7 +209,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -285,7 +285,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* @@ -328,7 +328,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); #ifdef __cplusplus diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S index 1d3e1d2fcf..fa877aafaf 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -15,22 +15,22 @@ * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> #include <libcpu/raw_exception.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* * let room for exception frame @@ -38,32 +38,32 @@ SYM (decrementer_exception_vector_prolog_code): stwu r1, - (EXCEPTION_FRAME_END)(r1) stw r4, GPR4_OFFSET(r1) #ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* + /* * save link register */ mflr r4 stw r4, EXC_LR_OFFSET(r1) - /* + /* * make link register contain shared_raw_irq_code_entry * address */ lis r4,shared_raw_irq_code_entry@h ori r4,r4,shared_raw_irq_code_entry@l mtlr r4 - + li r4, ASM_DEC_VECTOR blr #else li r4, ASM_DEC_VECTOR ba shared_raw_irq_code_entry -#endif +#endif PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -71,12 +71,12 @@ SYM (external_exception_vector_prolog_code): stwu r1, - (EXCEPTION_FRAME_END)(r1) stw r4, GPR4_OFFSET(r1) #ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* + /* * save link register */ mflr r4 stw r4, EXC_LR_OFFSET(r1) - /* + /* * make link register contain shared_raw_irq_code_entry * address */ @@ -90,14 +90,14 @@ SYM (external_exception_vector_prolog_code): li r4, ASM_EXT_VECTOR ba shared_raw_irq_code_entry #endif - + PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -108,17 +108,17 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) stw r2, GPR2_OFFSET(r1) stw r3, GPR3_OFFSET(r1) - + mfsrr0 r0 mfsrr1 r2 mfmsr r3 - + stw r0, SRR0_FRAME_OFFSET(r1) stw r2, SRR1_FRAME_OFFSET(r1) /* @@ -157,14 +157,14 @@ SYM (shared_raw_irq_code_entry): #ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE mflr r8 #endif - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) -#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE +#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE stw r8, EXC_LR_OFFSET(r1) #endif - + /* * Add some non volatile registers to store information * that will be used when returning from C handler @@ -197,9 +197,9 @@ SYM (shared_raw_irq_code_entry): cmpwi r2,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R2 */ addi r2,r2,1 @@ -216,7 +216,7 @@ nested: /* store new nesting level in _ISR_Nest_level */ stw r2, _ISR_Nest_level@l(r7) #endif - + addi r6, r6, 1 mfmsr r5 /* @@ -226,7 +226,7 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just @@ -235,7 +235,7 @@ nested: addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ @@ -259,7 +259,7 @@ nested: stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -267,14 +267,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -306,12 +306,12 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - + lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -326,21 +326,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -348,7 +348,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -377,7 +377,7 @@ easy_exit: /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r2, SRR0_FRAME_OFFSET(r1) lwz r3, GPR3_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c index 01d2d14cd4..98406a91b5 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c @@ -80,7 +80,7 @@ void BSP_SIU_irq_init() ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel; } -/* +/* * Initialize CPM interrupt management */ void @@ -94,7 +94,7 @@ BSP_CPM_irq_init(void) (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | #else (CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#endif +#endif ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; @@ -105,7 +105,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) { rtems_raw_except_connect_data vectorDesc; int i; - + BSP_SIU_irq_init(); BSP_CPM_irq_init(); /* @@ -133,7 +133,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -155,7 +155,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc8xx_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/network/network.c b/c/src/lib/libbsp/powerpc/mbx8xx/network/network.c index 1c2d20ec70..32c08798f5 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/network/network.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/network/network.c @@ -7,7 +7,7 @@ * Right now, we only do 10 Mbps, even with the FEC. The function * rtems_enet_driver_attach determines which one to use. Currently, * only one may be used at a time. - * + * * Based on the MC68360 network driver by * W. Eric Norum * Saskatchewan Accelerator Laboratory @@ -180,7 +180,7 @@ static void m860_fec_interrupt_handler () enet_driver[0].rxInterrupts++; rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); } - + /* * Buffer transmitted or transmitter error? */ @@ -208,7 +208,7 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) { int i; unsigned char *hwaddr; - + /* * Configure port A * PA15 is enet RxD. Set PAPAR(15) to 1, PADIR(15) to 0. @@ -219,7 +219,7 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) m8xx.papar |= 0x303; m8xx.padir &= ~0x303; m8xx.paodr &= ~0x2; - + /* * Configure port C * PC11 is CTS1*. Set PCPAR(11) to 0, PCDIR(11) to 0, and PCSO(11) to 1. @@ -228,7 +228,7 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) m8xx.pcpar &= ~0x30; m8xx.pcdir &= ~0x30; m8xx.pcso |= 0x30; - + /* * Connect CLK1 and CLK2 to SCC1 in the SICR. * CLK1 is TxClk, CLK2 is RxClk. No grant mechanism, SCC1 is directly @@ -237,22 +237,22 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) * T1CS = 0b100 (CLK1) */ m8xx.sicr |= 0x2C; - + /* * Initialize SDMA configuration register */ m8xx.sdcr = 1; - + /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers"); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -260,46 +260,46 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.scc1p.rbase = (char *)sc->rxBdBase - (char *)&m8xx; m8xx.scc1p.tbase = (char *)sc->txBdBase - (char *)&m8xx; - + /* * Send "Init parameters" command */ m8xx_cp_execute_cmd (M8xx_CR_OP_INIT_RX_TX | M8xx_CR_CHAN_SCC1); - + /* * Set receive and transmit function codes */ m8xx.scc1p.rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0); m8xx.scc1p.tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0); - + /* * Set maximum receive buffer length */ m8xx.scc1p.mrblr = RBUF_SIZE; - + /* * Set CRC parameters */ m8xx.scc1p.un.ethernet.c_pres = 0xFFFFFFFF; m8xx.scc1p.un.ethernet.c_mask = 0xDEBB20E3; - + /* * Clear diagnostic counters */ m8xx.scc1p.un.ethernet.crcec = 0; m8xx.scc1p.un.ethernet.alec = 0; m8xx.scc1p.un.ethernet.disfc = 0; - + /* * Set pad value */ m8xx.scc1p.un.ethernet.pads = 0x8888; - + /* * Set retry limit */ m8xx.scc1p.un.ethernet.ret_lim = 15; - + /* * Set maximum and minimum frame length */ @@ -307,7 +307,7 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) m8xx.scc1p.un.ethernet.minflr = 64; m8xx.scc1p.un.ethernet.maxd1 = MAX_MTU_SIZE; m8xx.scc1p.un.ethernet.maxd2 = MAX_MTU_SIZE; - + /* * Clear group address hash table */ @@ -315,21 +315,21 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) m8xx.scc1p.un.ethernet.gaddr2 = 0; m8xx.scc1p.un.ethernet.gaddr3 = 0; m8xx.scc1p.un.ethernet.gaddr4 = 0; - + /* * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.scc1p.un.ethernet.paddr_h = (hwaddr[5] << 8) | hwaddr[4]; m8xx.scc1p.un.ethernet.paddr_m = (hwaddr[3] << 8) | hwaddr[2]; m8xx.scc1p.un.ethernet.paddr_l = (hwaddr[1] << 8) | hwaddr[0]; - + /* * Aggressive retry */ m8xx.scc1p.un.ethernet.p_per = 0; - + /* * Clear individual address hash table */ @@ -337,14 +337,14 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) m8xx.scc1p.un.ethernet.iaddr2 = 0; m8xx.scc1p.un.ethernet.iaddr3 = 0; m8xx.scc1p.un.ethernet.iaddr4 = 0; - + /* * Clear temp address */ m8xx.scc1p.un.ethernet.taddr_l = 0; m8xx.scc1p.un.ethernet.taddr_m = 0; m8xx.scc1p.un.ethernet.taddr_h = 0; - + /* * Set up receive buffer descriptors */ @@ -361,12 +361,12 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - + /* * Clear any outstanding events */ m8xx.scc1.scce = 0xFFFF; - + /* * Set up interrupts */ @@ -374,20 +374,20 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) rtems_panic ("Can't attach M8xx SCC1 interrupt handler\n"); } m8xx.scc1.sccm = 0; /* No interrupts unmasked till necessary */ - + /* * Set up General SCC Mode Register * Ethernet configuration */ m8xx.scc1.gsmr_h = 0x0; m8xx.scc1.gsmr_l = 0x1088000c; - + /* * Set up data synchronization register * Ethernet synchronization pattern */ m8xx.scc1.dsr = 0xd555; - + /* * Set up protocol-specific mode register * No Heartbeat check @@ -405,13 +405,13 @@ m8xx_enet_initialize (struct m8xx_enet_struct *sc) * Disable full-duplex operation */ m8xx.scc1.psmr = 0x080A | (sc->acceptBroadcast ? 0 : 0x100); - + /* * Enable the TENA (RTS1*) pin */ m8xx.pcpar |= 0x1; m8xx.pcdir &= ~0x1; - + /* * Enable receiver and transmitter */ @@ -452,7 +452,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) */ m8xx.fec.ecntrl=0x1; - /* + /* * Put ethernet transciever in reset */ m8xx.pgcra |= 0x80; @@ -471,10 +471,10 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Set SIU interrupt level to LVL2 - * + * */ m8xx.fec.ivec = ((((unsigned) BSP_FAST_ETHERNET_CTRL)/2) << 29); - + /* * Set the TX and RX fifo sizes. For now, we'll split it evenly */ @@ -487,7 +487,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.fec.addr_low = (hwaddr[0] << 24) | (hwaddr[1] << 16) | (hwaddr[2] << 8) | (hwaddr[3] << 0); m8xx.fec.addr_high = (hwaddr[4] << 24) | (hwaddr[5] << 16); @@ -506,13 +506,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers"); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -520,7 +520,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.fec.r_des_start = (int)sc->rxBdBase; m8xx.fec.x_des_start = (int)sc->txBdBase; - + /* * Set up Receive Control Register: * Not promiscuous mode @@ -554,17 +554,17 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) m8xx.sdcr = 1; /* - * Set MII speed to 2.5 MHz for 25 Mhz system clock + * Set MII speed to 2.5 MHz for 25 Mhz system clock */ m8xx.fec.mii_speed = 0x0a; m8xx.fec.mii_data = 0x58021000; - + /* * Set up receive buffer descriptors */ for (i = 0 ; i < sc->rxBdCount ; i++) (sc->rxBdBase + i)->status = 0; - + /* * Set up transmit buffer descriptors */ @@ -574,13 +574,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - - + + /* * Mask all FEC interrupts and clear events */ - m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | + m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | M8xx_FEC_IEVENT_RFINT; m8xx.fec.ievent = ~0; @@ -610,7 +610,7 @@ m8xx_Enet_retire_tx_bd (struct m8xx_enet_struct *sc) int i; int nRetired; struct mbuf *m, *n; - + i = sc->txBdTail; nRetired = 0; while ((sc->txBdActiveCount != 0) @@ -636,7 +636,7 @@ m8xx_Enet_retire_tx_bd (struct m8xx_enet_struct *sc) enet_driver[0].txRetryLimit++; if (status & M8xx_BD_UNDERRUN) enet_driver[0].txUnderrun++; - + /* * Restart the transmitter */ @@ -682,7 +682,7 @@ scc_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -699,14 +699,14 @@ scc_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -715,7 +715,7 @@ scc_rxDaemon (void *arg) * Clear old events */ m8xx.scc1.scce = 0x8; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -725,19 +725,19 @@ scc_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.scc1.sccm |= 0x8; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -756,12 +756,12 @@ scc_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + /* * Invalidate the buffer for this descriptor */ rtems_cache_invalidate_multiple_data_lines((const void *)rxBd->buffer, rxBd->length); - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -769,7 +769,7 @@ scc_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -800,13 +800,13 @@ scc_rxDaemon (void *arg) if (status & M8xx_BD_COLLISION) sc->rxCollision++; } - + /* * Reenable the buffer descriptor */ rxBd->status = (status & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) | M8xx_BD_EMPTY; - + /* * Move to next buffer descriptor */ @@ -826,7 +826,7 @@ fec_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -844,14 +844,14 @@ fec_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -860,7 +860,7 @@ fec_rxDaemon (void *arg) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -870,19 +870,19 @@ fec_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.fec.ievent |= M8xx_FEC_IEVENT_RFINT; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -892,12 +892,12 @@ fec_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + /* * Invalidate the buffer for this descriptor */ rtems_cache_invalidate_multiple_data_lines((const void *)rxBd->buffer, rxBd->length); - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -905,7 +905,7 @@ fec_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -958,12 +958,12 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) struct mbuf *l = NULL; uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m8xx_Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -982,7 +982,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.scc1.scce = 0x12; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -998,7 +998,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m8xx_Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -1011,13 +1011,13 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m8xx_Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1037,7 +1037,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) * Flush the buffer for this descriptor */ rtems_cache_flush_multiple_data_lines((const void *)txBd->buffer, txBd->length); - + sc->txMbuf[sc->txBdHead] = m; nAdded++; if (++sc->txBdHead == sc->txBdCount) { @@ -1057,7 +1057,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) if (l != NULL) l->m_next = m; } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1086,12 +1086,12 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) /* struct mbuf *l = NULL; */ uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m8xx_Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -1110,7 +1110,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -1126,7 +1126,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m8xx_Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -1139,13 +1139,13 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m8xx_Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1160,12 +1160,12 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) */ txBd->buffer = mtod (m, void *); txBd->length = m->m_len; - + /* * Flush the buffer for this descriptor */ rtems_cache_flush_multiple_data_lines(txBd->buffer, txBd->length); - + sc->txMbuf[sc->txBdHead] = m; nAdded++; if (++sc->txBdHead == sc->txBdCount) { @@ -1187,7 +1187,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) l->m_next = m; */ } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1219,13 +1219,13 @@ scc_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1251,16 +1251,16 @@ fec_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ - rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, - RTEMS_NO_TIMEOUT, + rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, + RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1286,7 +1286,7 @@ static void m8xx_enet_start (struct ifnet *ifp) { struct m8xx_enet_struct *sc = ifp->if_softc; - + rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); ifp->if_flags |= IFF_OACTIVE; } @@ -1300,22 +1300,22 @@ scc_init (void *arg) { struct m8xx_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m8xx_enet_initialize (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1323,12 +1323,12 @@ scc_init (void *arg) m8xx.scc1.psmr |= 0x200; else m8xx.scc1.psmr &= ~0x200; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1342,22 +1342,22 @@ fec_init (void *arg) { struct m8xx_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m8xx_fec_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, fec_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, fec_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1366,12 +1366,12 @@ fec_init (void *arg) else m8xx.fec.r_cntrl &= ~0x8; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1387,9 +1387,9 @@ static void scc_stop (struct m8xx_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1402,9 +1402,9 @@ static void fec_stop (struct m8xx_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1429,7 +1429,7 @@ enet_stats (struct m8xx_enet_struct *sc) printf (" Overrun:%-8lu", sc->rxOverrun); printf (" Collision:%-8lu\n", sc->rxCollision); printf (" Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc); - + printf (" Tx Interrupts:%-8lu", sc->txInterrupts); printf (" Deferred:%-8lu", sc->txDeferred); printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat); @@ -1449,37 +1449,37 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m8xx_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: scc_stop (sc); break; - + case IFF_UP: scc_init (sc); break; - + case IFF_UP | IFF_RUNNING: scc_stop (sc); scc_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1497,37 +1497,37 @@ fec_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m8xx_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: fec_stop (sc); break; - + case IFF_UP: fec_init (sc); break; - + case IFF_UP | IFF_RUNNING: fec_stop (sc); fec_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1575,12 +1575,12 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) printf ("Driver already in use.\n"); return 0; } - + /* * Process options */ #if NVRAM_CONFIGURE == 1 - + /* Configure from NVRAM */ if ( (addr = nvram->ipaddr) ) { /* We have a non-zero entry, copy the value */ @@ -1589,7 +1589,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) else rtems_panic("Can't allocate ip_address buffer!\n"); } - + if ( (addr = nvram->netmask) ) { /* We have a non-zero entry, copy the value */ if ( (pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT )) ) @@ -1601,7 +1601,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) /* Ethernet address requires special handling -- it must be copied into * the arpcom struct. The following if construct serves only to give the * User Area NVRAM parameter the highest priority. - * + * * If the ethernet address is specified in NVRAM, go ahead and copy it. * (ETHER_ADDR_LEN = 6 bytes). */ @@ -1619,9 +1619,9 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) */ rtems_panic("No Ethernet address specified!\n"); } - + #else /* NVRAM_CONFIGURE != 1 */ - + if (config->hardware_address) { memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); } @@ -1631,7 +1631,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) */ rtems_panic("No Ethernet address specified!\n"); } - + #endif /* NVRAM_CONFIGURE != 1 */ if (config->mtu) @@ -1647,7 +1647,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1662,7 +1662,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ @@ -1701,7 +1701,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) printf ("Driver already in use.\n"); return 0; } - + /* * Process options */ @@ -1724,7 +1724,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1739,7 +1739,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ @@ -1753,7 +1753,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) int rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching) { - + #ifdef MPC860T if ((m8xx.fec.mii_data & 0xffff) == 0x2000) { /* rtems_scc1_driver_attach(config);*/ diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c index 0c853fabaf..2fc1a2f194 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @@ -57,13 +57,13 @@ void bsp_libc_init( void *, uint32_t, int ); void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } /* @@ -75,7 +75,7 @@ void _BSP_Fatal_error(unsigned int v) * Must not use libc (to do io) from here, since drivers are not yet * initialized. * - * Installed in the rtems_cpu_table defined in + * Installed in the rtems_cpu_table defined in * rtems/c/src/exec/score/cpu/m68k/cpu.h in main() below. Called from * rtems_initialize_executive() defined in rtems/c/src/exec/sapi/src/init.c * @@ -87,7 +87,7 @@ void _BSP_Fatal_error(unsigned int v) */ void bsp_pretasking_hook(void) { - /* + /* * These are assigned addresses in the linkcmds file for the BSP. This * approach is better than having these defined as manifest constants and * compiled into the kernel, but it is still not ideal when dealing with @@ -101,7 +101,7 @@ void bsp_pretasking_hook(void) extern unsigned char _HeapEnd; bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 ); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -135,11 +135,11 @@ void bsp_pretasking_hook(void) void bsp_start(void) { extern void *_WorkspaceBase; - + ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; register unsigned char* intrStack; - + /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function * store the result in global variables so that it can be used latter... @@ -148,7 +148,7 @@ void bsp_start(void) myCpuRevision = get_ppc_cpu_revision(); mmu_init(); - + /* * Enable instruction and data caches. Do not force writethrough mode. */ @@ -168,7 +168,7 @@ void bsp_start(void) /* * Initialize some SPRG registers related to irq handling */ - + intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); /* signal them that we have fixed PR288 - eventually, this should go away */ @@ -217,7 +217,7 @@ void bsp_start(void) Cpu_table.timer_least_valid = 3; #endif - /* + /* * Call this in case we use TERMIOS for console I/O */ m8xx_uart_reserve_resources( &BSP_Configuration ); @@ -232,6 +232,6 @@ void bsp_start(void) BSP_rtems_irq_mng_init(0); #ifdef SHOW_MORE_INIT_SETTINGS printk("Exit from bspstart\n"); -#endif +#endif } diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c index 676d473051..19d8c59b77 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c @@ -18,7 +18,7 @@ * in the SIU when it takes control, but does not restore it before * returning control to the program. We thus keep a copy of the * register, and restore it from gdb using the hook facilities. - * + * * We arrange for simask_copy to be initialized to zero so that * it resides in the .data section. This avoids having gdb set * the mask to crud before we get to initialize explicitly. Of @@ -35,11 +35,11 @@ uint32_t simask_copy = 0; * number MBXA/PG1. We are assuming that the values in MBXA/PG1 * are for the older MBX boards whose part number does not have * the "B" suffix, but we have discovered that the values from - * MBXA/PG2 work better, even for the older boards. - * + * MBXA/PG2 work better, even for the older boards. + * * THESE VALUES HAVE ONLY BEEN VERIFIED FOR THE MBX821-001 and * MBX860-002. USE WITH CARE! - * + * * NOTE: The MBXA/PG2 manual lists the clock speed of the MBX821_001B * as being 50 MHz, while the MBXA/IH2.1 manual lists it as 40 MHz. * We think the MBX821_001B is an entry level board and thus is 50 MHz, @@ -58,7 +58,7 @@ static uint32_t upmaTable[64] = { * initialized by EPPCBug 1.1. In particular, the original * burst-write values do not work! Also, the following values * facilitate higher performance. - */ + */ /* DRAM 60ns - single read. (offset 0x00 in UPM RAM) */ 0xCFAFC004, 0x0FAFC404, 0x0CAF8C04, 0x10AF0C04, 0xF0AF0C00, 0xF3BF4805, 0xFFFFC005, 0xFFFFC005, @@ -83,7 +83,7 @@ static uint32_t upmaTable[64] = { 0xFCFFC004, 0xC0FFC004, 0x01FFC004, 0x0FFFC004, 0x1FFFC004, 0xFFFFC004, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, - + /* Exception. (offset 0x3c in UPM RAM) */ 0xFFFFC007, 0xFFFFC007, 0xFFFFC007, 0xFFFFC007 @@ -109,14 +109,14 @@ static uint32_t upmaTable[64] = { /* 40 MHz MBX */ /* - * Note: For the older MBX models (i.e. without the "b" + * Note: For the older MBX models (i.e. without the "b" * suffix, e.g. mbx860_001), the following values (from the * MBXA/PG2 manual) work better than, but are different * from those published in the original MBXA/PG1 manual and * initialized by EPPCBug 1.1. In particular, the following * burst-read and burst-write values facilitate higher * performance. - */ + */ /* DRAM 60ns - single read. (offset 0x00 in UPM RAM) */ 0xCFAFC004, 0x0FAFC404, 0x0CAF0C04, 0x30AF0C00, 0xF1BF4805, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, @@ -141,7 +141,7 @@ static uint32_t upmaTable[64] = { 0xFCFFC004, 0xC0FFC004, 0x01FFC004, 0x0FFFC004, 0x3FFFC004, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, - + /* Exception. (offset 0x3c in UPM RAM) */ 0xFFFFC007, 0xFFFFC007, 0xFFFFC007, 0xFFFFC007 #else @@ -157,14 +157,14 @@ void _InitMBX8xx (void) register uint32_t r1, i; extern uint32_t simask_copy; - /* + /* * Initialize the Debug Enable Register (DER) to an appropriate - * value for EPPCBug debugging. + * value for EPPCBug debugging. * (This value should also work for BDM debugging.) */ r1 = 0x70C67C07; /* All except EXTIE, ALIE, DECIE */ _mtspr( M8xx_DER, r1 ); - + /* * Initialize the Instruction Support Control Register (ICTRL) to a * an appropriate value for normal operation. A different value, @@ -172,7 +172,7 @@ void _InitMBX8xx (void) */ r1 = 0x00000007; _mtspr( M8xx_ICTRL, r1 ); - + /* * Disable and invalidate the instruction and data caches. */ @@ -185,7 +185,7 @@ void _InitMBX8xx (void) r1 = M8xx_CACHE_CMD_INVALIDATE; /* invalidate all */ _mtspr( M8xx_IC_CST, r1 ); _isync; - + r1 = M8xx_CACHE_CMD_DISABLE; _mtspr( M8xx_DC_CST, r1 ); _isync; @@ -214,14 +214,14 @@ void _InitMBX8xx (void) * imd: accessing m8xx.* should not occure before setting up the immr ! */ simask_copy = m8xx.simask; - - /* - * Initialize the SIU Module Configuration Register (SIUMCR) + + /* + * Initialize the SIU Module Configuration Register (SIUMCR) * m8xx.siumcr = 0x00602900, the default MBX and firmware value. */ - m8xx.siumcr = M8xx_SIUMCR_EARP0 | M8xx_SIUMCR_DBGC3 | M8xx_SIUMCR_DBPC0 | + m8xx.siumcr = M8xx_SIUMCR_EARP0 | M8xx_SIUMCR_DBGC3 | M8xx_SIUMCR_DBPC0 | M8xx_SIUMCR_DPC | M8xx_SIUMCR_MLRC2 | M8xx_SIUMCR_SEME; - + /* * Initialize the System Protection Control Register (SYPCR). * The SYPCR can only be written once after Reset. @@ -229,39 +229,39 @@ void _InitMBX8xx (void) * - Disable software watchdog timer * m8xx.sypcr = 0xFFFFFF88, the default MBX and firmware value. */ - m8xx.sypcr = M8xx_SYPCR_SWTC(0xFFFF) | M8xx_SYPCR_BMT(0xFF) | + m8xx.sypcr = M8xx_SYPCR_SWTC(0xFFFF) | M8xx_SYPCR_BMT(0xFF) | M8xx_SYPCR_BME | M8xx_SYPCR_SWF; /* Initialize the SIU Interrupt Edge Level Mask Register (SIEL) */ m8xx.siel = 0xAAAA0000; /* Default MBX and firmware value. */ - + /* Initialize the Transfer Error Status Register (TESR) */ m8xx.tesr = 0xFFFFFFFF; /* Default firmware value. */ - + /* Initialize the SDMA Configuration Register (SDCR) */ m8xx.sdcr = 0x00000001; /* Default firmware value. */ - + /* * Initialize the Timebase Status and Control Register (TBSCR) * m8xx.tbscr = 0x00C3, default MBX and firmware value. */ m8xx.tbscrk = M8xx_UNLOCK_KEY; /* unlock TBSCR */ - m8xx.tbscr = M8xx_TBSCR_REFA | M8xx_TBSCR_REFB | + m8xx.tbscr = M8xx_TBSCR_REFA | M8xx_TBSCR_REFB | M8xx_TBSCR_TBF | M8xx_TBSCR_TBE; - + /* Initialize the Real-Time Clock Status and Control Register (RTCSC) */ m8xx.rtcsk = M8xx_UNLOCK_KEY; /* unlock RTCSC */ m8xx.rtcsc = 0x00C3; /* Default MBX and firmware value. */ - + /* Unlock other Real-Time Clock registers */ m8xx.rtck = M8xx_UNLOCK_KEY; /* unlock RTC */ m8xx.rtseck = M8xx_UNLOCK_KEY; /* unlock RTSEC */ m8xx.rtcalk = M8xx_UNLOCK_KEY; /* unlock RTCAL */ - + /* Initialize the Periodic Interrupt Status and Control Register (PISCR) */ m8xx.piscrk = M8xx_UNLOCK_KEY; /* unlock PISCR */ m8xx.piscr = 0x0083; /* Default MBX and firmware value. */ - + /* Initialize the System Clock and Reset Control Register (SCCR) * Set the clock sources and division factors: * Timebase Source is GCLK2 / 16 @@ -299,18 +299,18 @@ void _InitMBX8xx (void) defined(mbx821_005)) m8xx.plprcr = 0x4C400000; #else -#error "MBX board not defined" +#error "MBX board not defined" #endif /* Unlock the timebase and decrementer registers. */ m8xx.tbk = M8xx_UNLOCK_KEY; - /* + /* * Initialize decrementer register to a large value to * guarantee that a decrementer interrupt will not be * generated before the kernel is fully initialized. */ r1 = 0x7FFFFFFF; _mtspr( M8xx_DEC, r1 ); - + /* Initialize the timebase register (TB is 64 bits) */ r1 = 0x00000000; _mtspr( M8xx_TBU_WR, r1 ); @@ -322,24 +322,24 @@ void _InitMBX8xx (void) /* * User Programmable Machine A (UPMA) Initialization - * + * * If this initialization code is running from DRAM, it is very * dangerous to change the value of any UPMA Ram array word from * what the firmware (EPPCBug) initialized it to. Thus we don't * initialize UPMA if EPPCBUG_VECTORS is defined; we assume EPPCBug * has done the appropriate initialization. - * + * * An exception to our rule, is that, for the older MBX boards * (those without the "B" suffix, e.g. MBX821-001 and MBX860-002), * we do re-initialize the burst-read and burst-write values with * values that are more efficient. Also, in the MBX821 case, - * the burst-write original values set by EPPCBug do not work! + * the burst-write original values set by EPPCBug do not work! * This change can be done safely because the caches have not yet * been activated. * * The RAM array of UPMA is initialized by writing to each of * its 64 32-bit RAM locations. - * Note: UPM register initialization should occur before + * Note: UPM register initialization should occur before * initialization of the corresponding BRx and ORx registers. */ #if ( !defined(EPPCBUG_VECTORS) ) @@ -373,27 +373,27 @@ void _InitMBX8xx (void) #if ( !defined(EPPCBUG_VECTORS) ) /* * Initialize the memory periodic timer. - * Memory Periodic Timer Prescaler Register (MPTPR: 16-bit register) + * Memory Periodic Timer Prescaler Register (MPTPR: 16-bit register) * m8xx.mptpr = 0x0200; */ m8xx.mptpr = M8xx_MPTPR_PTP(0x2); - + /* * Initialize the Machine A Mode Register (MAMR) - * + * * ASSUMES THAT DIMMs ARE NOT INSTALLED! - * + * * Without DIMMs: * m8xx.mamr = 0x13821000 (40 MHz) or 0x18821000 (50 MHz). - * + * * With DIMMs: * m8xx.mamr = 0x06821000 (40 MHz) or 0x08821000 (50 MHz). */ #if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) ) - m8xx.mamr = M8xx_MEMC_MMR_PTP(0x18) | M8xx_MEMC_MMR_PTE | + m8xx.mamr = M8xx_MEMC_MMR_PTP(0x18) | M8xx_MEMC_MMR_PTE | M8xx_MEMC_MMR_DSP(0x1) | M8xx_MEMC_MMR_G0CL(0) | M8xx_MEMC_MMR_UPWAIT; #else - m8xx.mamr = M8xx_MEMC_MMR_PTP(0x13) | M8xx_MEMC_MMR_PTE | + m8xx.mamr = M8xx_MEMC_MMR_PTP(0x13) | M8xx_MEMC_MMR_PTE | M8xx_MEMC_MMR_DSP(0x1) | M8xx_MEMC_MMR_G0CL(0) | M8xx_MEMC_MMR_UPWAIT; #endif #endif /* ! defined(EPPCBUG_VECTORS) */ @@ -416,31 +416,31 @@ void _InitMBX8xx (void) * FC000000 FC7FFFFF 7 8 N N GPCM Y Y Socketed FLASH Memory * * z = 3 for 4MB installed on the motherboard, z = F for 16M - * + * * NOTE: The devices selected by CS0 and CS7 can be selected with jumper J4. * This table assumes that the 32-bit soldered flash device is the boot ROM. */ /* * CS0 : Soldered (32-bit) Flash Memory at 0xFE000000 - * + * * CHANGE THIS CODE IF YOU CHANGE JUMPER J4 FROM ITS FACTORY DEFAULT SETTING! * (or better yet, don't reprogram BR0 and OR0; just program BR7 and OR7 to * access whatever flash device is not selected during hard reset.) - * + * * MBXA/PG2 appears to lie in note 14 for table 2-4. The manual states that * "EPPCBUG configures the reset flash device at the lower address, and the * nonreset flash device at the higher address." If we take reset flash device * to mean the boot flash memory, then the statement must mean that BR0 must * point to the device at the lower address, i.e. 0xFC000000, while BR7 must * point to the device at the highest address, i.e. 0xFE000000. - * + * * THIS IS NOT THE CASE! - * + * * The boot flash is always configured to start at 0xFE000000, and the other * one to start at 0xFC000000. Changing jumper J4 only changes the width of * the memory ports into these two region. - * + * * BR0 = 0xFE000001 * Base addr [0-16] 0b11111110000000000 = 0xFE000000 * Address type [17-19] 0b000 @@ -464,7 +464,7 @@ void _InitMBX8xx (void) * * m8xx.memc[0]._or = 0xFF800930 (40 MHz) * m8xx.memc[0]._or = 0xFF800940 (50 MHz) - * m8xx.memc[0]._br = 0xFE000001 + * m8xx.memc[0]._br = 0xFE000001 */ #if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) ) m8xx.memc[0]._or = M8xx_MEMC_OR_8M | M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_CSNT | @@ -476,13 +476,13 @@ void _InitMBX8xx (void) m8xx.memc[0]._br = M8xx_BR_BA(0xFE000000) | M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_GPCM | M8xx_MEMC_BR_V; - /* + /* * CS1 : Local DRAM Memory at 0x00000000 * m8xx.memc[1]._or = 0xFFC00400; * m8xx.memc[1]._br = 0x00000081; */ #if ( defined(mbx860_001b) ) - m8xx.memc[1]._or = M8xx_MEMC_OR_2M | M8xx_MEMC_OR_ATM(0) | + m8xx.memc[1]._or = M8xx_MEMC_OR_2M | M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0); #elif ( defined(mbx860_002b) || \ defined(mbx860_003b) || \ @@ -495,7 +495,7 @@ void _InitMBX8xx (void) defined(mbx821_001) || \ defined(mbx821_002) || \ defined(mbx821_003) ) - m8xx.memc[1]._or = M8xx_MEMC_OR_4M | M8xx_MEMC_OR_ATM(0) | + m8xx.memc[1]._or = M8xx_MEMC_OR_4M | M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0); #elif ( defined(mbx860_004) || \ defined(mbx860_005) || \ @@ -507,7 +507,7 @@ void _InitMBX8xx (void) defined(mbx821_004b) || \ defined(mbx821_005b) || \ defined(mbx821_006b) ) - m8xx.memc[1]._or = M8xx_MEMC_OR_16M | M8xx_MEMC_OR_ATM(0) | + m8xx.memc[1]._or = M8xx_MEMC_OR_16M | M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0); #else #error "MBX board not defined" @@ -515,28 +515,28 @@ void _InitMBX8xx (void) m8xx.memc[1]._br = M8xx_BR_BA(0x00000000) | M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_UPMA | M8xx_MEMC_BR_V; - /* - * CS2 : DIMM Memory - Bank #0, not present + /* + * CS2 : DIMM Memory - Bank #0, not present * m8xx.memc[2]._or = 0x00000400; * m8xx.memc[2]._br = 0x00000080; */ - m8xx.memc[2]._or = M8xx_MEMC_OR_ATM(0) | + m8xx.memc[2]._or = M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0); m8xx.memc[2]._br = M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_UPMA; /* ! M8xx_MEMC_BR_V */ - /* - * CS3 : DIMM Memory - Bank #1, not present + /* + * CS3 : DIMM Memory - Bank #1, not present * m8xx.memc[3]._or = 0x00000400; * m8xx.memc[3]._br = 0x00000080; */ - m8xx.memc[3]._or = M8xx_MEMC_OR_ATM(0) | + m8xx.memc[3]._or = M8xx_MEMC_OR_ATM(0) | M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0); m8xx.memc[3]._br = M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_UPMA; /* ! M8xx_MEMC_BR_V */ /* - * CS4 : Battery-Backed SRAM at 0xFA000000 + * CS4 : Battery-Backed SRAM at 0xFA000000 * m8xx.memc[4]._or = 0xFFE00920@ 40 MHz, 0xFFE00930 @ 50 MHz * m8xx.memc[4]._br = 0xFA000401; */ @@ -551,7 +551,7 @@ void _InitMBX8xx (void) M8xx_BR_MS_GPCM | M8xx_MEMC_BR_V; /* - * CS5 : PCI I/O and Memory at 0x80000000 + * CS5 : PCI I/O and Memory at 0x80000000 * m8xx.memc[5]._or = 0xA0000108; * m8xx.memc[5]._br = 0x80000001; */ @@ -560,8 +560,8 @@ void _InitMBX8xx (void) m8xx.memc[5]._br = M8xx_BR_BA(0x80000000) | M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_GPCM | M8xx_MEMC_BR_V; - /* - * CS6 : QSPAN Registers at 0xFA210000 + /* + * CS6 : QSPAN Registers at 0xFA210000 * m8xx.memc[6]._or = 0xFFFF0108; * m8xx.memc[6]._br = 0xFA210001; */ @@ -570,8 +570,8 @@ void _InitMBX8xx (void) m8xx.memc[6]._br = M8xx_BR_BA(0xFA210000) | M8xx_BR_AT(0) | M8xx_BR_PS32 | M8xx_BR_MS_GPCM | M8xx_MEMC_BR_V; - /* - * CS7 : Socketed (8-bit) Flash at 0xFC000000 + /* + * CS7 : Socketed (8-bit) Flash at 0xFC000000 * m8xx.memc[7]._or = 0xFF800930 @ 40 MHz, 0xFF800940 @ 50 MHz * m8xx.memc[7]._br = 0xFC000401; */ @@ -591,36 +591,36 @@ void _InitMBX8xx (void) * PCMCIA region 0: common memory */ m8xx.pbr0 = PCMCIA_MEM_ADDR; - m8xx.por0 = (M8xx_PCMCIA_POR_BSIZE_64MB - | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) - | M8xx_PCMCIA_POR_PSL(32) - | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_MEM + m8xx.por0 = (M8xx_PCMCIA_POR_BSIZE_64MB + | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) + | M8xx_PCMCIA_POR_PSL(32) + | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_MEM |M8xx_PCMCIA_POR_PSLOT_A | M8xx_PCMCIA_POR_VALID); /* * PCMCIA region 1: dma memory */ m8xx.pbr1 = PCMCIA_DMA_ADDR; - m8xx.por1 = (M8xx_PCMCIA_POR_BSIZE_64MB - | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) - | M8xx_PCMCIA_POR_PSL(32) - | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_DMA + m8xx.por1 = (M8xx_PCMCIA_POR_BSIZE_64MB + | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) + | M8xx_PCMCIA_POR_PSL(32) + | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_DMA |M8xx_PCMCIA_POR_PSLOT_A | M8xx_PCMCIA_POR_VALID); /* * PCMCIA region 2: attribute memory */ m8xx.pbr2 = PCMCIA_ATTRB_ADDR; - m8xx.por2 = (M8xx_PCMCIA_POR_BSIZE_64MB - | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) - | M8xx_PCMCIA_POR_PSL(32) + m8xx.por2 = (M8xx_PCMCIA_POR_BSIZE_64MB + | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) + | M8xx_PCMCIA_POR_PSL(32) | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_ATT |M8xx_PCMCIA_POR_PSLOT_A | M8xx_PCMCIA_POR_VALID); /* * PCMCIA region 3: I/O access */ m8xx.pbr3 = PCMCIA_IO_ADDR; - m8xx.por3 = (M8xx_PCMCIA_POR_BSIZE_64MB - | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) - | M8xx_PCMCIA_POR_PSL(32) + m8xx.por3 = (M8xx_PCMCIA_POR_BSIZE_64MB + | M8xx_PCMCIA_POR_PSHT(15) | M8xx_PCMCIA_POR_PSST(15) + | M8xx_PCMCIA_POR_PSL(32) | M8xx_PCMCIA_POR_PPS_16 | M8xx_PCMCIA_POR_PRS_IO |M8xx_PCMCIA_POR_PSLOT_A | M8xx_PCMCIA_POR_VALID); diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c index a252f7d1ac..47b34f3e12 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c @@ -1,7 +1,7 @@ -/* +/* * mmutlbtab.c - * - * This file defines the MMU_TLB_table for the MBX8xx. + * + * This file defines the MMU_TLB_table for the MBX8xx. * * Copyright (c) 1999, National Research Council of Canada * @@ -27,14 +27,14 @@ * The instruction and data TLBs each can hold 32 entries, so _TLB_Table must * not have more than 32 lines in it! * - * We set up the virtual memory map so that virtual address of a + * We set up the virtual memory map so that virtual address of a * location is equal to its real address. */ MMU_TLB_table_t MMU_TLB_table[] = { #if ( defined(mbx860_001b) ) /* - * DRAM: CS1, Start address 0x00000000, 2M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 2M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for all, no ASID comparison, not cache-inhibited. * Last 512K block is cache-inhibited, but not guarded for use by EPPCBug. * EPN TWC RPN @@ -55,8 +55,8 @@ MMU_TLB_table_t MMU_TLB_table[] = { defined(mbx821_002) || \ defined(mbx821_003) ) /* - * DRAM: CS1, Start address 0x00000000, 4M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 4M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for all, no ASID comparison, not cache-inhibited. * Last 512K block is cache-inhibited, but not guarded for use by EPPCBug. * EPN TWC RPN @@ -78,10 +78,10 @@ MMU_TLB_table_t MMU_TLB_table[] = { defined(mbx821_005) || \ defined(mbx821_004b) || \ defined(mbx821_005b) || \ - defined(mbx821_006b) ) + defined(mbx821_006b) ) /* - * DRAM: CS1, Start address 0x00000000, 16M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 16M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for all, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ @@ -93,9 +93,9 @@ MMU_TLB_table_t MMU_TLB_table[] = { /* * * NVRAM: CS4, Start address 0xFA000000, 32K, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for all, no ASID comparison, cache-inhibited. - * + * * EPN TWC RPN */ { 0xFA000200, 0x01, 0xFA0009FF }, /* NVRAM - PS=16K */ @@ -103,7 +103,7 @@ MMU_TLB_table_t MMU_TLB_table[] = { /* * * Board Control/Status Register #1/#2: CS4, Start address 0xFA100000, (4 x 8 bits?) - * ASID=0x0, APG=0x0, guarded memory, write-through data cache policy, + * ASID=0x0, APG=0x0, guarded memory, write-through data cache policy, * R/W,X for all, no ASID comparison, cache-inhibited. * EPN TWC RPN */ @@ -111,10 +111,10 @@ MMU_TLB_table_t MMU_TLB_table[] = { /* * * (IMMR-SPRs) Dual Port RAM: Start address 0xFA200000, 16K, - * ASID=0x0, APG=0x0, guarded memory, write-through data cache policy, + * ASID=0x0, APG=0x0, guarded memory, write-through data cache policy, * R/W,X for all, no ASID comparison, cache-inhibited. - * - * Note: We use the value in MBXA/PG2, which is also the value that + * + * Note: We use the value in MBXA/PG2, which is also the value that * EPPC-Bug programmed into our boards. The alternative is the value * in MBXA/PG1: 0xFFA00000. This value might well depend on the revision * of the firmware. @@ -124,7 +124,7 @@ MMU_TLB_table_t MMU_TLB_table[] = { /* * * Flash: CS0, Start address 0xFE000000, 4M, (BootROM-EPPCBug) - * ASID=0x0, APG=0x0, not guarded memory, + * ASID=0x0, APG=0x0, not guarded memory, * R/O,X for all, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ @@ -138,7 +138,7 @@ MMU_TLB_table_t MMU_TLB_table[] = { { 0xFE380200, 0x05, 0xFE380CFD }, /* Flash - PS=512K */ /* * BootROM: CS7, Start address 0xFC000000, 4M?, (socketed FLASH) - * ASID=0x0, APG=0x0, not guarded memory, + * ASID=0x0, APG=0x0, not guarded memory, * R/O,X for all, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ @@ -173,23 +173,23 @@ MMU_TLB_table_t MMU_TLB_table[] = { * For each space (MEM/DMA/ATTRIB/IO) only the first 8MB are mapped * ASID=0x0, APG=0x0, guarded memory, * R/W,X for all, no ASID comparison, cache-inhibited. - * EPN TWC + * EPN TWC * RPN */ - { (PCMCIA_MEM_ADDR & 0xfffff000) | 0x200, 0x1D, + { (PCMCIA_MEM_ADDR & 0xfffff000) | 0x200, 0x1D, (PCMCIA_MEM_ADDR & 0xfffff000) | 0x9F7 },/* PCMCIA Memory - PS=8M */ - { (PCMCIA_DMA_ADDR & 0xfffff000) | 0x200, 0x1D, + { (PCMCIA_DMA_ADDR & 0xfffff000) | 0x200, 0x1D, (PCMCIA_DMA_ADDR & 0xfffff000) | 0x9F7 },/* PCMCIA DMA - PS=8M */ - { (PCMCIA_ATTRB_ADDR & 0xfffff000) | 0x200, 0x1D, + { (PCMCIA_ATTRB_ADDR & 0xfffff000) | 0x200, 0x1D, (PCMCIA_ATTRB_ADDR & 0xfffff000) | 0x9F7 },/* PCMCIA ATTRIB-PS=8M*/ - { (PCMCIA_IO_ADDR & 0xfffff000) | 0x200, 0x1D, + { (PCMCIA_IO_ADDR & 0xfffff000) | 0x200, 0x1D, (PCMCIA_IO_ADDR & 0xfffff000) | 0x9F7 } /* PCMCIA I/O - PS=8M */ }; -/* +/* * MMU_N_TLB_Table_Entries is defined here because the size of the * MMU_TLB_table is only known in this file. */ diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S b/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S index ebd60be5ab..ed44cfd41c 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S @@ -6,28 +6,28 @@ * all remaining initialization. * * This file is based on several others: - * - * (1) start360.s from the gen68360 BSP by + * + * (1) start360.s from the gen68360 BSP by * W. Eric Norum (eric@skatter.usask.ca) * with the following copyright and license: * * COPYRIGHT (c) 1989-1998. * On-Line Applications Research Corporation (OAR). - * + * * The license and distribution terms for this file may in * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * * (2) start.s for the eth_comm port by * Jay Monkman (jmonkman@fracsa.com), - * which itself is based on the - * + * which itself is based on the + * * (3) dlentry.s for the Papyrus BSP, written by: * Andrew Bray <andy@i-cubed.co.uk> * with the following copyright and license: * * COPYRIGHT (c) 1995 by i-cubed ltd. - * + * * (4) start860.S for the MBX821/MBX860, written by: * Darlene A. Stewart <darlene.stewart@iit.nrc.ca> * Copyright (c) 1999, National Research Council of Canada @@ -179,7 +179,7 @@ .L_D4_e: .L_D2: .previous - + /* * Tell C's eabi-ctor's that we have an atexit function, * and that it is to register __do_global_dtors. @@ -188,7 +188,7 @@ PUBLIC_VAR(__atexit) .section ".sdata","aw" .align 2 -SYM(__atexit): +SYM(__atexit): EXT_PROC_REF(atexit)@fixup .previous @@ -198,7 +198,7 @@ SYM(__atexit): .previous /* That should do it */ - + /* * Put the entry point in its own section. That way, we can guarantee * to put it first in the .text section in the linker script. @@ -208,16 +208,16 @@ SYM(__atexit): PUBLIC_VAR (start) SYM(start): bl .startup /* or bl .spin */ -base_addr: +base_addr: /* * Parameters from linker */ -toc_pointer: +toc_pointer: .long __GOT_START__ -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start PUBLIC_VAR (text_addr) @@ -230,7 +230,7 @@ text_length: /* * Spin, if necessary, to acquire control from debugger (CodeWarrior). - */ + */ spin: .long 0x0001 .spin: @@ -238,22 +238,22 @@ spin: lwz r3, spin@l(r3) cmpwi r3, 0x1 beq .spin -/* +/* * #define LOADED_BY_EPPCBUG */ #define LOADED_BY_EPPCBUG -#define EARLY_CONSOLE +#define EARLY_CONSOLE /* - * Initialization code + * Initialization code */ -.startup: +.startup: /* Get the start address. */ mflr r1 -#ifdef LOADED_BY_EPPCBUG +#ifdef LOADED_BY_EPPCBUG /* Save pointer to residual/board data */ lis r9,eppcbugInfo@ha stw r3,eppcbugInfo@l(r9) -#endif +#endif /* Initialize essential registers. */ bl initregs nop @@ -272,24 +272,24 @@ spin: EXTERN_PROC (_InitMBX8xx) bl PROC (_InitMBX8xx) nop - + /* Clear the bss section. */ bl bssclr nop #if defined(EARLY_CONSOLE) && defined(LOADED_BY_EPPCBUG) EXTERN_PROC (serial_init) bl PROC (serial_init) -#endif +#endif lis r5,environ@ha la r5,environ@l(r5) /* environp */ /* clear argc and argv */ xor r3, r3, r3 xor r4, r4, r4 - + EXTERN_PROC (boot_card) bl PROC (boot_card) /* call the first C routine */ nop - + /* we should never return from boot_card, but in case we do ... */ /* The next instructions are dependent on your runtime environment */ @@ -297,14 +297,14 @@ spin: lis r10, 0x0400 /* Data cache disable */ mtspr 568, r10 isync - + mtspr 560, r10 /* Instruction cache disable */ isync - + stop_here: li r10, 0x0F00 /* .RETURN */ sc - + b stop_here nop @@ -320,13 +320,13 @@ bssclr: rlwinm. r5,r5,30,0x3FFFFFFF /* form length/4 */ beqlr /* no bss - return */ mtctr r5 /* set ctr reg */ - + li r5,0x0000 /* r5 = 0 */ clear_bss: stw r5,0(r4) /* store r6 */ addi r4,r4,0x4 /* update r4 */ bdnz clear_bss /* dec counter and loop */ - + blr /* return */ /* @@ -337,24 +337,24 @@ clear_bss: * r0 - scratch */ initregs: - /* + /* * Disable address translation. We should already be running in real space, * so this should be a no-op, i.e. no need to switch instruction stream * addresses from virtual space to real space. Other bits set the processor * for big-endian mode, exceptions vectored to 0x000n_nnnn (vectors are * already in low memory!), no execution tracing, machine check exceptions - * enabled, floating-point not available (MPC8xx has none), supervisor + * enabled, floating-point not available (MPC8xx has none), supervisor * priviledge level, external interrupts disabled, power management * disabled (normal operation mode). */ li r0, 0x1000 /* MSR_ME */ mtmsr r0 /* Context-synchronizing */ isync - + /* * Clear the exception handling registers. * Note SPRG3 is reserved for use by EPPCBug on the MBX8xx. - */ + */ li r0, 0x0000 mtdar r0 mtspr sprg0, r0 @@ -362,13 +362,13 @@ initregs: mtspr sprg2, r0 mtspr srr0, r0 mtspr srr1, r0 - + mr r6, r0 mr r7, r0 mr r8, r0 mr r9, r0 mr r10, r0 - mr r11, r0 + mr r11, r0 mr r12, r0 mr r13, r0 mr r14, r0 @@ -389,9 +389,9 @@ initregs: mr r29, r0 mr r30, r0 mr r31, r0 - + blr /* return */ - + .L_text_e: .comm environ,4,4 diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S index d634cc8b88..14720aee38 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S @@ -2,26 +2,26 @@ * (c) 1999, Eric Valette valette@crf.canon.fr * * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * exception veneers for RTEMS. * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(default_exception_vector_code_prolog) SYM (default_exception_vector_code_prolog): /* @@ -34,7 +34,7 @@ SYM (default_exception_vector_code_prolog): stw r2, EXC_LR_OFFSET(r1) bl 0f 0: /* - * r3 = exception vector entry point + * r3 = exception vector entry point * (256 * vector number) + few instructions */ mflr r3 @@ -42,21 +42,21 @@ SYM (default_exception_vector_code_prolog): * r3 = r3 >> 8 = vector */ srwi r3,r3,8 -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE +#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE lis r2,push_normalized_frame@h ori r2,r2,push_normalized_frame@l mtlr r2 blr #else ba push_normalized_frame -#endif - +#endif + PUBLIC_VAR (default_exception_vector_code_prolog_size) - + default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - + .p2align 5 -PUBLIC_VAR (push_normalized_frame) +PUBLIC_VAR (push_normalized_frame) SYM (push_normalized_frame): stw r3, EXCEPTION_NUMBER_OFFSET(r1) stw r0, GPR0_OFFSET(r1) @@ -70,7 +70,7 @@ SYM (push_normalized_frame): * Saved a few line above : R0 * * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance + * series of individual "stw" but who cares about performance * for the DEFAULT exception handler? */ stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ @@ -96,7 +96,7 @@ SYM (push_normalized_frame): ori r3,r3, MSR_RI | MSR_IR | MSR_DR mtmsr r3 SYNC - + /* * Call C exception handler */ @@ -137,12 +137,12 @@ SYM (push_normalized_frame): /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h index fc841f0fa2..43fb7ecedf 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h @@ -1,4 +1,4 @@ -/* +/* * vectors.h Exception frame related contant and API. * * This include file describe the data structure and the functions implemented @@ -16,10 +16,10 @@ #define LIBBSP_POWERPC_MBX8XX_VECTORS_H /* - * The callee (high level exception code written in C) + * The callee (high level exception code written in C) * will store the Link Registers (return address) at entry r1 + 4 !!!. * So let room for it!!!. - */ + */ #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 #define SRR0_FRAME_OFFSET 8 #define SRR1_FRAME_OFFSET 12 @@ -81,7 +81,7 @@ extern int default_exception_vector_code_prolog_size; * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); extern void initialize_exceptions(); diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c index 1aaae35f5e..5c97bb892e 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c @@ -1,4 +1,4 @@ -/* +/* * vectors_init.c Exception hanlding initialisation (and generic handler). * * This include file describe the data structure and the functions implemented @@ -25,7 +25,7 @@ exception_handler_t globalExceptHdl; void C_exception_handler(BSP_Exception_frame* excPtr) { int recoverable = 0; - + printk("exception handler called for exception %d\n", excPtr->_EXC_number); printk("\t Next PC or Address of fault = %x\n", excPtr->EXC_SRR0); printk("\t Saved MSR = %x\n", excPtr->EXC_SRR1); @@ -69,7 +69,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) if (excPtr->_EXC_number == ASM_DEC_VECTOR) recoverable = 1; if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h index 85488eb076..fb79919160 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h @@ -48,7 +48,7 @@ #define BSP_CONSOLE_PORT BSP_UART_COM1 #define BSP_UART_BAUD_BASE 115200 - + #include <bsp/openpic.h> #define BSP_PIC_DO_EOI openpic_eoi(0) diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/clock/p_clock.c b/c/src/lib/libbsp/powerpc/mpc8260ads/clock/p_clock.c index 7416a21231..4e92c97e5b 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/clock/p_clock.c @@ -28,7 +28,7 @@ static rtems_irq_connect_data clockIrqData = {BSP_PERIODIC_TIMER, (rtems_irq_enable)clockOn, (rtems_irq_disable)clockOff, (rtems_irq_is_enabled)clockIsOn}; - + int BSP_get_clock_irq_level() { /* diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/console/console.c b/c/src/lib/libbsp/powerpc/mpc8260ads/console/console.c index 0f64818fbd..29243f4783 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/console/console.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/console/console.c @@ -45,7 +45,7 @@ * Interrupt-driven I/O requires termios. * * TESTS: - * + * * TO RUN THE TESTS, USE POLLED I/O WITHOUT TERMIOS SUPPORT. Some tests * play with the interrupt masks and turn off I/O. Those tests will hang * when interrupt-driven I/O is used. Other tests, such as cdtest, do I/O @@ -55,16 +55,16 @@ * should all be fixed to work with interrupt-driven I/O and to * produce output in the expected sequence. Obviously, the termios test * requires termios support in the driver. - * + * * Set CONSOLE_MINOR to the appropriate device minor number in the * config file. This allows the RTEMS application console to be different * from the EPPBug debug console or the GDB port. - * + * * This driver handles all five available serial ports: it distinguishes * the sub-devices using minor device numbers. It is not possible to have * other protocols running on the other ports when this driver is used as * currently written. - * + * * Based on code (alloc860.c in eth_comm port) by * Jay Monkman (jmonkman@frasca.com), * Copyright (C) 1998 by Frasca International, Inc. @@ -153,7 +153,7 @@ static rtems_status_code do_poll_read( * Output characters through polled I/O. Returns only once every character has * been sent. * - * CR is transmitted AFTER a LF on output. + * CR is transmitted AFTER a LF on output. * * Input parameters: * major - ignored. Should be the major number for this driver. @@ -198,8 +198,8 @@ static rtems_status_code do_poll_write( static void _BSP_output_char( char c ) { char cr = '\r'; - - /* + + /* * Can't rely on console_initialize having been called before this function * is used, so it may fail unless output is done through EPPC-Bug. */ @@ -208,7 +208,7 @@ static void _BSP_output_char( char c ) PRINTK_WRITE( PRINTK_MINOR, &c, 1 ); if( c == '\n' ) PRINTK_WRITE( PRINTK_MINOR, &cr, 1 ); - + } @@ -231,7 +231,7 @@ rtems_device_driver console_initialize( { rtems_status_code status; rtems_device_minor_number console_minor; - + /* * Set up TERMIOS if needed */ @@ -244,12 +244,12 @@ rtems_device_driver console_initialize( #else rtems_termios_initialize (); #endif /* UARTS_USE_TERMIOS */ - + /* * Do common initialization. */ m8xx_uart_initialize(); - + /* * Do device-specific initialization */ @@ -290,7 +290,7 @@ rtems_device_driver console_initialize( status = rtems_io_register_name ("/dev/tty2", major, SCC3_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + status = rtems_io_register_name ("/dev/tty3", major, SCC4_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); @@ -309,7 +309,7 @@ rtems_device_driver console_initialize( rtems_fatal_error_occurred (status); chmod("/dev/console",0666); chown("/dev/console",2,0); - + return RTEMS_SUCCESSFUL; } @@ -351,12 +351,12 @@ rtems_device_driver console_open( 0 /* outputUsesInterrupts */ }; #endif - + #endif - + rtems_status_code sc; - - if ( minor > NUM_PORTS-1 ) + + if ( minor > NUM_PORTS-1 ) return RTEMS_INVALID_NUMBER; @@ -375,7 +375,7 @@ rtems_device_driver console_open( #endif /* UARTS_USE_TERMIOS != 1 */ return sc; - + } @@ -453,7 +453,7 @@ rtems_device_driver console_control( rtems_device_minor_number minor, void *arg ) -{ +{ if ( minor > NUM_PORTS-1 ) return RTEMS_INVALID_NUMBER; diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h b/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h index 0ee4d6de38..0ddbb8eb33 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h @@ -123,7 +123,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c index 17fddf21a1..7de64a8884 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c @@ -16,7 +16,7 @@ * * $Id$ */ - + #include <bsp.h> #include <bsp/irq.h> #include <rtems.h> @@ -146,7 +146,7 @@ static m82xxIrqMasks_t SIU_MaskBit[BSP_CPM_IRQ_NUMBER] = void dump_irq_masks(void ) { int i; - for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ ) + for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ ) { printk( "%04d: %08X %08X\n", i, @@ -172,9 +172,9 @@ static void compute_SIU_IvectMask_from_prio () * correspond to the priorities defined * for the SIU in irq_init.c. */ - + int i,j; - + for( i=0; i<BSP_CPM_IRQ_NUMBER; i++ ) { for( j=0;j<BSP_CPM_IRQ_NUMBER; j++ ) @@ -182,9 +182,9 @@ static void compute_SIU_IvectMask_from_prio () { SIU_MaskBit[i].priority_h |= SIU_MaskBit[j].mask_h; SIU_MaskBit[i].priority_l |= SIU_MaskBit[j].mask_l; - } + } } - + } /* @@ -217,10 +217,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 1; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); m8260.simr_h &= ~(SIU_MaskBit[cpm_irq_index].mask_h); @@ -233,10 +233,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 0; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); return ((m8260.simr_h & SIU_MaskBit[cpm_irq_index].mask_h) || @@ -274,7 +274,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * store the data provided by user */ rtems_hdl_tbl[irq->name] = *irq; - + if (is_cpm_irq(irq->name)) { /* * Enable interrupt at PIC level @@ -317,7 +317,7 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq) int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -332,32 +332,32 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) return 0; } _CPU_ISR_Disable(level); - + if (is_cpm_irq(irq->name)) { /* * disable interrupt at PIC level */ BSP_irq_disable_at_cpm (irq->name); } - + if (is_processor_irq(irq->name)) { /* * disable exception at processor level */ - } - + } + /* * Disable interrupt on device */ irq->off(irq); - + /* * restore the default irq value */ rtems_hdl_tbl[irq->name] = default_rtems_entry; - + _CPU_ISR_Enable(level); - + return 1; } @@ -378,7 +378,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) /* Fill in priority masks */ compute_SIU_IvectMask_from_prio(); - + _CPU_ISR_Disable(level); /* * start with CPM IRQ @@ -458,14 +458,14 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) */ #ifdef DISPATCH_HANDLER_STAT loopCounter = 0; -#endif +#endif while (1) { if( ((m8260.sipnr_h & m8260.simr_h) | (m8260.sipnr_l & m8260.simr_l)) == 0 ) { #ifdef DISPATCH_HANDLER_STAT if (loopCounter > maxLoop) maxLoop = loopCounter; -#endif +#endif break; } @@ -495,11 +495,11 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) /* disable exceptions again */ _CPU_MSR_SET(msr); - + /* restore interrupt masks */ m8260.simr_h = old_simr_h; m8260.simr_l = old_simr_l; - + } #ifdef DISPATCH_HANDLER_STAT ++ loopCounter; @@ -507,8 +507,8 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) } } - - + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h index 451d4e0894..d01dcc1e47 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h @@ -83,7 +83,7 @@ typedef enum { * * The MPC8260 User Manual seems shot through with inconsistencies * about this whole area. - */ + */ /* * Some CPM IRQ symbolic name definition @@ -153,7 +153,7 @@ typedef enum { }rtems_irq_symbolic_name; -#define CPM_INTERRUPT +#define CPM_INTERRUPT /* @@ -183,9 +183,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at SIU and CPM level. RATIONALE : anyway @@ -221,7 +221,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -300,7 +300,7 @@ int BSP_irq_enabled_at_cpm (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* @@ -344,7 +344,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); #ifdef __cplusplus diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S index a0d7d02510..64f0176109 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -14,7 +14,7 @@ * * $Id$ */ - + #include <bsp/vectors.h> #include <rtems/score/cpuopts.h> /* for PPC_HAS_FPU */ #include <rtems/score/cpu.h> @@ -24,13 +24,13 @@ #define SYNC \ sync; \ isync - + .text - .p2align 5 - - + .p2align 5 + + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* @@ -42,11 +42,11 @@ SYM (decrementer_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -57,12 +57,12 @@ SYM (external_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -73,7 +73,7 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) @@ -100,7 +100,7 @@ SYM (shared_raw_irq_code_entry): #endif mtmsr r3 SYNC - + /* * Push C scratch registers on the current stack. It may * actually be the thread stack or the interrupt stack. @@ -122,7 +122,7 @@ SYM (shared_raw_irq_code_entry): mfctr r6 mfxer r7 mflr r8 - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) @@ -148,23 +148,23 @@ SYM (shared_raw_irq_code_entry): /* mfspr r2, SPRG0 */ addis r6, 0, _ISR_Nest_level@ha lwz r2, _ISR_Nest_level@l( r6 ) - + /* * Check if stack switch is necessary */ cmpwi r2,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R2 */ addi r2,r2,1 - + addis r6, 0, _ISR_Nest_level@ha stw r2, _ISR_Nest_level@l( r6 ) - + /* * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level */ @@ -173,7 +173,7 @@ nested: * store new nesting level in SPRG0 */ /* mtspr SPRG0, r2 */ - + addi r6, r6, 1 mfmsr r5 /* @@ -183,40 +183,40 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just * in case... */ - + addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ /* mfspr r2, SPRG0 */ - + addis r6, 0, _ISR_Nest_level@ha lwz r2, _ISR_Nest_level@l( r6 ) - + /* * start decrementing _Thread_Dispatch_disable_level */ lwz r3,_Thread_Dispatch_disable_level@l(r15) addi r2, r2, -1 /* Continue decrementing nesting level */ addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */ - - stw r2, _ISR_Nest_level@l( r6 ) + + stw r2, _ISR_Nest_level@l( r6 ) /* mtspr SPRG0, r2 */ /* End decrementing nesting level */ - + stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -224,14 +224,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -244,7 +244,7 @@ nested: */ stmw r16, GPR16_OFFSET(r1) addi r3, r1, 0x8 - + /* * compute SP at exception entry */ @@ -257,7 +257,7 @@ nested: * Call High Level signal handling code */ bl _ThreadProcessSignalsFromIrq - + /* * start restoring exception like frame @@ -266,16 +266,16 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - - + + lmw r4, GPR4_OFFSET(r1) - + lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -289,21 +289,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -311,7 +311,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -337,11 +337,11 @@ easy_exit: xori r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/ mtmsr r3 SYNC - + /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r2, SRR0_FRAME_OFFSET(r1) lwz r3, GPR3_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c index d2ca9b2005..b0f8324ae7 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_init.c @@ -74,7 +74,7 @@ static rtems_irq_prio irqPrioTable[BSP_CPM_IRQ_NUMBER]={ }; -/* +/* * Initialize CPM interrupt management */ void @@ -99,7 +99,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) { rtems_raw_except_connect_data vectorDesc; int i; - + BSP_CPM_irq_init(); /* * Initialize Rtems management interrupt table @@ -126,7 +126,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -148,7 +148,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc8xx_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/network/if_hdlcsubr.c b/c/src/lib/libbsp/powerpc/mpc8260ads/network/if_hdlcsubr.c index 424bb5b5bc..64a4ee3d7d 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/network/if_hdlcsubr.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/network/if_hdlcsubr.c @@ -104,7 +104,7 @@ hdlc_output(ifp, m0, dst, rt0) struct mbuf *mcopy = (struct mbuf *)0; /* register struct ether_header *eh; */ int off, len = m->m_pkthdr.len; - + /* printk( "hdlc output" ); */ /* struct arpcom *ac = (struct arpcom *)ifp; */ @@ -175,8 +175,8 @@ hdlc_output(ifp, m0, dst, rt0) if (m == 0) senderr(ENOBUFS); - -#if 0 + +#if 0 eh = mtod(m, struct ether_header *); (void)memcpy(&eh->ether_type, &type, sizeof(eh->ether_type)); @@ -199,7 +199,7 @@ hdlc_output(ifp, m0, dst, rt0) if ((ifp->if_flags & IFF_OACTIVE) == 0) (*ifp->if_start)(ifp); splx(s); - + ifp->if_obytes += len /*+ sizeof (struct ether_header)*/; if (m->m_flags & M_MCAST) ifp->if_omcasts++; @@ -223,21 +223,21 @@ hdlc_input(ifp, m) { register struct ifqueue *inq; int s; - + struct ether_header eh; - + if ((ifp->if_flags & IFF_UP) == 0) { m_freem(m); return; } ifp->if_ibytes += m->m_pkthdr.len; -/* +/* if (memcmp((caddr_t)etherbroadcastaddr, (caddr_t)eh->ether_dhost, sizeof(etherbroadcastaddr)) == 0) m->m_flags |= M_BCAST; else if (eh->ether_dhost[0] & 1) m->m_flags |= M_MCAST; -*/ +*/ if (m->m_flags & (M_BCAST|M_MCAST)) ifp->if_imcasts++; @@ -285,11 +285,11 @@ hdlc_ifattach(ifp) sdl->sdl_family == AF_LINK) { sdl->sdl_type = IFT_ETHER; sdl->sdl_alen = ifp->if_addrlen; -/* +/* memcpy(LLADDR(sdl), (caddr_t)((struct arpcom *)ifp)->ac_enaddr, ifp->if_addrlen); -*/ +*/ break; } } @@ -309,7 +309,7 @@ hdlc_ioctl(struct ifnet *ifp, int command, caddr_t data) ifp->if_flags |= IFF_UP; switch (ifa->ifa_addr->sa_family) { -#if 0 +#if 0 #ifdef INET case AF_INET: ifp->if_init(ifp->if_softc); /* before arpwhohas */ @@ -329,11 +329,11 @@ hdlc_ioctl(struct ifnet *ifp, int command, caddr_t data) struct sockaddr *sa; sa = (struct sockaddr *) & ifr->ifr_data; -/* +/* memcpy((caddr_t) sa->sa_data, ((struct arpcom *)ifp->if_softc)->ac_enaddr, ETHER_ADDR_LEN); -*/ +*/ } break; diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c b/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c index ce8e51564e..9de8b0ff26 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @@ -250,13 +250,13 @@ m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc) /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers"); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -265,7 +265,7 @@ m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc) m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260; m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260; - + /* * Send "Init parameters" command */ @@ -277,7 +277,7 @@ m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc) */ m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS; m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS; - + /* * Set maximum receive buffer length */ @@ -394,7 +394,7 @@ m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc) int i; int nRetired; struct mbuf *m, *n; - + i = sc->txBdTail; nRetired = 0; while ((sc->txBdActiveCount != 0) @@ -409,7 +409,7 @@ m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc) */ if( status & M8260_BD_UNDERRUN ) { hdlc_driver[0].txUnderrun++; - + /* * Restart the transmitter */ @@ -451,7 +451,7 @@ scc_rxDaemon (void *arg) uint16_t status; m8260BufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -479,7 +479,7 @@ scc_rxDaemon (void *arg) rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -506,7 +506,7 @@ scc_rxDaemon (void *arg) m8260.scc3.sccm |= M8260_SCCE_RXF; /* printk( "Rxdwait "); */ - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, @@ -515,7 +515,7 @@ scc_rxDaemon (void *arg) /* printk( "Rxd " ); */ } } - + /* * Check that packet is valid */ @@ -577,13 +577,13 @@ scc_rxDaemon (void *arg) if (status & M8260_BD_CARRIER_LOST) sc->rxLostCarrier++; } - + /* * Reenable the buffer descriptor */ rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) | M8260_BD_EMPTY; - + /* * Move to next buffer descriptor */ @@ -601,12 +601,12 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) struct mbuf *l = NULL; uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m8260Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -630,7 +630,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -646,7 +646,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m8260Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TX (buffer transmitted) event */ @@ -659,13 +659,13 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m8260Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8260_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -715,7 +715,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) if (l != NULL) l->m_next = m; } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -745,13 +745,13 @@ scc_txDaemon (void *arg) struct ifnet *ifp = &sc->ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -780,7 +780,7 @@ static void m8260_hdlc_start (struct ifnet *ifp) { struct m8260_hdlc_struct *sc = ifp->if_softc; - + rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); ifp->if_flags |= IFF_OACTIVE; } @@ -793,22 +793,22 @@ scc_init (void *arg) { struct m8260_hdlc_struct *sc = arg; struct ifnet *ifp = &sc->ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m8260_scc_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); - + } - + #if 0 /* * Set flags appropriately @@ -823,7 +823,7 @@ scc_init (void *arg) * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -839,9 +839,9 @@ static void scc_stop (struct m8260_hdlc_struct *sc) { struct ifnet *ifp = &sc->ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -862,7 +862,7 @@ hdlc_stats (struct m8260_hdlc_struct *sc) printf (" Overrun:%-8lu", sc->rxOverrun); printf (" No Carrier:%-8lu\n", sc->rxLostCarrier); printf (" Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc); - + printf (" Tx Interrupts:%-8lu", sc->txInterrupts); printf (" No Carrier:%-8lu", sc->txLostCarrier); printf (" Underrun:%-8lu\n", sc->txUnderrun); @@ -877,37 +877,37 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m8260_hdlc_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: hdlc_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: scc_stop (sc); break; - + case IFF_UP: scc_init (sc); break; - + case IFF_UP | IFF_RUNNING: scc_stop (sc); scc_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: hdlc_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -930,7 +930,7 @@ rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config) struct ifnet *ifp; int mtu; int i; - + /* * Find a free driver */ @@ -976,7 +976,7 @@ rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -991,7 +991,7 @@ rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/start/start.S b/c/src/lib/libbsp/powerpc/mpc8260ads/start/start.S index 021454fa0b..241e60212a 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/start/start.S +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/start/start.S @@ -42,23 +42,23 @@ */ - .section ".entry" /* This might have to be the first thing in the + .section ".entry" /* This might have to be the first thing in the * text section. At one time, it had to be * first, but I don't believe it is true * any more. */ PUBLIC_VAR (start) SYM(start): bl .startup -base_addr: +base_addr: /* * Parameters from linker */ -toc_pointer: +toc_pointer: .long s.got -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start PUBLIC_VAR (data_length ) @@ -80,7 +80,7 @@ text_length: /* - * Initialization code + * Initialization code */ .startup: /* Get start address */ @@ -104,15 +104,15 @@ text_length: -#ifdef ENABLE_CACHE +#ifdef ENABLE_CACHE /* Enable caches */ mfspr r5, 1008 ori r5, r5, 0x8000 isync mtspr 1008, r5 - + /* Leave D-cache disabled for now */ -#if 0 +#if 0 ori r5, r5, 0x4000 sync mtspr 1008, r5 @@ -128,7 +128,7 @@ text_length: *-------------------------------------------------- */ lis r13, 0x0050 /* set nap mode and DPM */ - or r5, r5, r13 + or r5, r5, r13 mtspr 1008, r5 /*-------------------------------------------------- @@ -155,11 +155,11 @@ text_length: /* clear argc and argv */ xor r3, r3, r3 xor r4, r4, r4 - + .extern SYM (boot_card) bl SYM (boot_card) /* call the first C routine */ - + /* we don't expect to return from boot_card but if we do */ /* wait here for watchdog to kick us into hard reset */ diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c index 9f35b9eaca..1aba24a0fd 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @@ -180,11 +180,11 @@ extern void m8260_console_reserve_resources(rtems_configuration_table *); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { - /* + /* * These are assigned addresses in the linkcmds file for the BSP. This * approach is better than having these defined as manifest constants and * compiled into the kernel, but it is still not ideal when dealing with @@ -200,16 +200,16 @@ bsp_pretasking_hook(void) bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 ); - + #ifdef STACK_CHECKER_ON /* * Initialize the stack bounds checker * We can either turn it on here or from the app. */ - + Stack_check_Initialize(); #endif - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -266,7 +266,7 @@ void bsp_start(void) /* mmu_init(); */ - + /* * Enable instruction and data caches. Do not force writethrough mode. */ diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c index 8c5ff89d4b..28d7790fc6 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/cpuinit.c @@ -1,8 +1,8 @@ -/* - * cpuinit.c - this file contains functions for initializing the CPU +/* + * cpuinit.c - this file contains functions for initializing the CPU * * Written by Jay Monkman (jmonkman@frasca.com) - * + * * $Id$ */ @@ -24,14 +24,14 @@ void cpu_init(void) #if 0 register unsigned long t1, t2; - /* Let's clear MSR[IR] and MSR[DR] */ + /* Let's clear MSR[IR] and MSR[DR] */ t2 = PPC_MSR_IR | PPC_MSR_DR; __asm__ volatile ( "mfmsr %0\n" "andc %0, %0, %1\n" "mtmsr %0\n" :"=r"(t1), "=r"(t2): "1"(t2)); - + t1 = M8xx_CACHE_CMD_UNLOCK; /* PUT_DC_CST(t1); */ PUT_IC_CST(t1); diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.S b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.S index b60307ad3c..e22b8c247c 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.S @@ -2,26 +2,26 @@ * (c) 1999, Eric Valette valette@crf.canon.fr * * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * exception veneers for RTEMS. * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(default_exception_vector_code_prolog) SYM (default_exception_vector_code_prolog): /* @@ -34,7 +34,7 @@ SYM (default_exception_vector_code_prolog): stw r2, EXC_LR_OFFSET(r1) bl 0f 0: /* - * r3 = exception vector entry point + * r3 = exception vector entry point * (256 * vector number) + few instructions */ mflr r3 @@ -43,13 +43,13 @@ SYM (default_exception_vector_code_prolog): */ srwi r3,r3,8 ba push_normalized_frame - + PUBLIC_VAR (default_exception_vector_code_prolog_size) - + default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - + .p2align 5 -PUBLIC_VAR (push_normalized_frame) +PUBLIC_VAR (push_normalized_frame) SYM (push_normalized_frame): stw r3, EXCEPTION_NUMBER_OFFSET(r1) stw r0, GPR0_OFFSET(r1) @@ -63,7 +63,7 @@ SYM (push_normalized_frame): * Saved a few line above : R0 * * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance + * series of individual "stw" but who cares about performance * for the DEFAULT exception handler? */ stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ @@ -90,7 +90,7 @@ SYM (push_normalized_frame): ori r3,r3, MSR_RI /*| MSR_IR | MSR_DR*/ mtmsr r3 SYNC - + /* * Call C exception handler */ @@ -128,16 +128,16 @@ SYM (push_normalized_frame): xori r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/ mtmsr r3 SYNC - + /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.h b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.h index fc841f0fa2..43fb7ecedf 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors.h @@ -1,4 +1,4 @@ -/* +/* * vectors.h Exception frame related contant and API. * * This include file describe the data structure and the functions implemented @@ -16,10 +16,10 @@ #define LIBBSP_POWERPC_MBX8XX_VECTORS_H /* - * The callee (high level exception code written in C) + * The callee (high level exception code written in C) * will store the Link Registers (return address) at entry r1 + 4 !!!. * So let room for it!!!. - */ + */ #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 #define SRR0_FRAME_OFFSET 8 #define SRR1_FRAME_OFFSET 12 @@ -81,7 +81,7 @@ extern int default_exception_vector_code_prolog_size; * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); extern void initialize_exceptions(); diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors_init.c index 21863706a5..f77648c63a 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/vectors/vectors_init.c @@ -1,4 +1,4 @@ -/* +/* * vectors_init.c Exception hanlding initialisation (and generic handler). * * This include file describe the data structure and the functions implemented @@ -69,7 +69,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) if (excPtr->_EXC_number == ASM_DEC_VECTOR) recoverable = 1; if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c index e08be577a8..5015453a00 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c @@ -43,11 +43,11 @@ uint32_t Clock_Decrementer_value; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -139,11 +139,11 @@ void Install_clock( void Clock_exit( void ) { - /* nothing to do */; + /* nothing to do */; /* do not restore old vector */ } - + /* * Clock_initialize * @@ -170,17 +170,17 @@ rtems_device_driver Clock_initialize( (BSP_Configuration.microseconds_per_tick/1000); Install_clock((rtems_isr_entry)Clock_isr); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /* * Clock_control * @@ -205,15 +205,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr( CLOCK_VECTOR, pargp ); @@ -224,7 +224,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c index 0e755266e5..1aace346a9 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c @@ -429,7 +429,7 @@ static boolean config_PMX1553_probe(int minor) * Disable special register set and lock Enhanced Feature Register */ outport_byte(&pNS16550Write->LineControl, 0); - + /* * The PMX1553 currently uses a 16 MHz clock rather than the * 7.3728 MHz clock described in the ST16C654 data sheet. When diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c index bfa9b7b4ea..54b167efc5 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c @@ -44,7 +44,7 @@ console_data Console_Port_Data[NUM_CONSOLE_PORTS]; unsigned long Console_Port_Count; rtems_device_minor_number Console_Port_Minor; - + /* PAGE * * console_open @@ -82,9 +82,9 @@ rtems_device_driver console_open( Callbacks.pollRead = c->deviceRead; Callbacks.write = c->deviceWrite; Callbacks.setAttributes = c->deviceSetAttributes; - Callbacks.stopRemoteTx = + Callbacks.stopRemoteTx = Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx; - Callbacks.startRemoteTx = + Callbacks.startRemoteTx = Console_Port_Tbl[minor].pDeviceFlow->deviceStartRemoteTx; Callbacks.outputUsesInterrupts = c->deviceOutputUsesInterrupts; status = rtems_termios_open ( major, minor, arg, &Callbacks); @@ -94,7 +94,7 @@ rtems_device_driver console_open( * Patch in flow control routines */ /* XXX */ -#if 0 +#if 0 if((status==RTEMS_SUCCESSFUL) && (Console_Port_Tbl[minor].pDeviceFlow)) { @@ -132,7 +132,7 @@ rtems_device_driver console_open( return status; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -150,7 +150,7 @@ rtems_device_driver console_close( return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -159,7 +159,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -168,7 +168,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -224,7 +224,7 @@ rtems_device_driver console_initialize( */ rtems_fatal_error_occurred(RTEMS_IO_ERROR); } - + Console_Port_Minor=minor; /* @@ -296,7 +296,7 @@ void DEBUG_puts( rtems_interrupt_disable(Irql); - for ( s = string ; *s ; s++ ) + for ( s = string ; *s ; s++ ) { Console_Port_Tbl[Console_Port_Minor].pDeviceFns-> deviceWritePolled(Console_Port_Minor, *s); @@ -329,7 +329,7 @@ DEBUG_puth( uint32_t Irql; rtems_interrupt_disable(Irql); - + Console_Port_Tbl[Console_Port_Minor].pDeviceFns-> deviceWritePolled(Console_Port_Minor, '0'); Console_Port_Tbl[Console_Port_Minor].pDeviceFns-> diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c index bc4f97a69d..6b3234ef06 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c @@ -38,7 +38,7 @@ extern console_data Console_Port_Data[]; extern rtems_device_minor_number Console_Port_Minor; - + /* PAGE * * DEBUG_puts @@ -95,7 +95,7 @@ void DEBUG_puth( unsigned long i,d; uint32_t Irql; void (*poll)(int minor, char cChar); - + poll = Console_Port_Tbl[Console_Port_Minor].pDeviceFns->deviceWritePolled; rtems_interrupt_disable(Irql); diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c index 93ca26aced..b148c0f389 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c @@ -94,7 +94,7 @@ static volatile Ring_buffer_t KbdInputBuffer; * to polled mode as required for command processing */ void i8042_polled_on( - int minor + int minor ) { #if CONSOLE_USE_INTERRUPTS @@ -103,7 +103,7 @@ void i8042_polled_on( } void i8042_polled_off( - int minor + int minor ) { #if CONSOLE_USE_INTERRUPTS @@ -856,7 +856,7 @@ static void i8042_scan_code( } } - /* + /* * If we got a character then queue it */ if(cChar) @@ -944,13 +944,13 @@ void i8042_init(int minor) /* PAGE * - * i8042_inbyte_nonblocking_polled + * i8042_inbyte_nonblocking_polled * * Console Termios polling input entry point. */ -int i8042_inbyte_nonblocking_polled( - int minor +int i8042_inbyte_nonblocking_polled( + int minor ) { uint8_t ucScan; diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042_p.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042_p.h index 57273fbe7f..544b4ef944 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042_p.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042_p.h @@ -73,7 +73,7 @@ extern "C" { #define KBD_CMD_ENABLE 0xf4 /* Clears Buffer and Starts Scanning. */ #define KBD_CMD_DISABLE 0xf5 /* reset to power up */ -#define KBD_CMD_SET_DEFAULT 0xf6 +#define KBD_CMD_SET_DEFAULT 0xf6 #define KBD_CMD_SET_ALL_TLMTIC 0xf7 /* Set all keys telematic */ #define KBD_CMD_SET_ALL_MKBR 0xf8 /* Set all keys Make /Break */ #define KBD_CMD_SET_ALL_MAKE 0xf9 /* Set all keys Make only */ diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c index 9e67cc6541..ca93acb48d 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c @@ -75,10 +75,10 @@ static uint8_t cursCol = 0; /* Current cursor column. */ /*-------------------------------------------------------------------------+ | Function: setHardwareCursorPos -| Description: Set hardware video cursor at given offset into video RAM. +| Description: Set hardware video cursor at given offset into video RAM. | Global Variables: None. | Arguments: videoCursor - Offset into video memory. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void setHardwareCursorPos(uint16_t videoCursor) @@ -91,10 +91,10 @@ setHardwareCursorPos(uint16_t videoCursor) /*-------------------------------------------------------------------------+ | Function: updateVideoRamPtr | Description: Updates value of global variable "videoRamPtr" based on -| current window's cursor position. +| current window's cursor position. | Global Variables: videoRamPtr, cursRow, cursCol. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void updateVideoRamPtr(void) @@ -108,7 +108,7 @@ updateVideoRamPtr(void) | Description: Scrolls display up n lines. | Global Variables: None. | Arguments: lines - number of lines to scroll. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static void scrollUp(uint8_t lines) @@ -130,7 +130,7 @@ scrollUp(uint8_t lines) blankCount = lines * videoCols; nonBlankCount = DISPLAY_CELL_COUNT - blankCount; ptrSrc = videoRam + blankCount; - ptrDst = videoRam; + ptrDst = videoRam; while(nonBlankCount--) { @@ -139,7 +139,7 @@ scrollUp(uint8_t lines) } else { - /* + /* * Clear the whole display. */ blankCount = DISPLAY_CELL_COUNT; @@ -159,7 +159,7 @@ scrollUp(uint8_t lines) | Description: Print printable character to display. | Global Variables: videoRamPtr, cursRow, cursCol. | Arguments: c - character to write to display. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static void printCHAR(char c) @@ -184,7 +184,7 @@ printCHAR(char c) | Description: Print BS (BackSpace - '\b') character to display. | Global Variables: videoRamPtr, cursRow, cursCol. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void printBS(void) @@ -214,7 +214,7 @@ printBS(void) | Description: Print HT (Horizontal Tab - '\t') character to display. | Global Variables: cursCol. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void printHT(void) @@ -232,7 +232,7 @@ printHT(void) | Description: Print LF (Line Feed - '\n') character to display. | Global Variables: cursRow. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void printLF(void) @@ -252,7 +252,7 @@ printLF(void) | Description: Print CR (Carriage Return - '\r') to display. | Global Variables: cursCol. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ static inline void printCR(void) @@ -266,7 +266,7 @@ printCR(void) */ void vga_write( - int minor, + int minor, char cChar) { switch (cChar) @@ -291,15 +291,15 @@ vga_write( setHardwareCursorPos(videoRamPtr - videoRam); } /* vga_write */ -/* +/* * vga_write_support * * Console Termios output entry point. * */ int vga_write_support( - int minor, - const char *buf, + int minor, + const char *buf, int len ) { diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h index 3ab6cbc2ba..8541951bd0 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h @@ -53,13 +53,13 @@ extern boolean vga_probe(int minor); extern void vga_init(int minor); extern void vga_write( - int minor, + int minor, char cChar ); extern int vga_write_support( - int minor, - const char *buf, + int minor, + const char *buf, int len ); diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c index 4aeafe3939..5072a91b29 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c @@ -28,7 +28,7 @@ #include <rtems.h> #include <bsp.h> -/* +/* * Read_85c30_register * * Read a Z85c30 register @@ -64,7 +64,7 @@ void Write_85c30_register( outport_byte(ulCtrlPort, ucData); } -/* +/* * Read_85c30_data * * Read a Z85c30 data register diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h b/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h index f423e8dea7..412d76ace0 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h @@ -42,7 +42,7 @@ extern "C" { #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 #define CONFIGURE_INTERRUPT_STACK_MEMORY (32 * 1024) - + /* Define processor identification. */ #define MPC601 1 @@ -157,8 +157,8 @@ extern "C" { /* * 8259 IRQ definations. */ -#define PPCN_60X_IRQ_SYS_TIMER (PPCN_60X_8259_IRQ_BASE + 0) -#define PPCN_60X_IRQ_KBD (PPCN_60X_8259_IRQ_BASE + 1) +#define PPCN_60X_IRQ_SYS_TIMER (PPCN_60X_8259_IRQ_BASE + 0) +#define PPCN_60X_IRQ_KBD (PPCN_60X_8259_IRQ_BASE + 1) #define PPCN_60X_IRQ_COM2 (PPCN_60X_8259_IRQ_BASE + 3) #define PPCN_60X_IRQ_COM1 (PPCN_60X_8259_IRQ_BASE + 4) #define PPCN_60X_IRQ_CIO (PPCN_60X_8259_IRQ_BASE + 5) @@ -343,7 +343,7 @@ void InitializeNvRAM(void); #define BSP_TIMER_LEAST_VALID 1 /* Don't trust a value lower than this */ /* - * Convert decrement value to tenths of microsecnds (used by + * Convert decrement value to tenths of microsecnds (used by * shared timer driver). * * + There are 4 bus cycles per click @@ -404,19 +404,19 @@ void InitializeNvRAM(void); /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* * How many libio files we want */ - + #define BSP_LIBIO_MAX_FDS 20 /* functions */ @@ -436,13 +436,13 @@ rtems_isr_entry set_vector( /* returns old vector */ */ rtems_isr bsp_stub_handler( rtems_vector_number trap -); +); rtems_isr bsp_spurious_handler( rtems_vector_number trap ); void bsp_spurious_initialize(); -/* +/* * genvec.c */ void set_EE_vector( diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/include/extisrdrv.h b/c/src/lib/libbsp/powerpc/ppcn_60x/include/extisrdrv.h index 32d0e7562c..3ed86b3564 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/include/extisrdrv.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/include/extisrdrv.h @@ -20,7 +20,7 @@ extern rtems_device_minor_number rtems_externalISR_minor; #define EXTISR_DRIVER_TABLE_ENTRY \ { ExternalISR_initialize, NULL, NULL, NULL, NULL, ExternalISR_control } - + rtems_device_driver ExternalISR_initialize( rtems_device_major_number, rtems_device_minor_number, diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c index 2ad0b8e02a..c09bf2a1d5 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c @@ -39,7 +39,7 @@ * The number of transmit buffer descriptors has to be quite large * since a single frame often uses four or more buffer descriptors. * - * Set the number of Tx and Rx buffers, using Log_2(# buffers). + * Set the number of Tx and Rx buffers, using Log_2(# buffers). */ #define LANCE_LOG2_TX_BUFFERS 4 #define LANCE_LOG2_RX_BUFFERS 4 @@ -76,11 +76,11 @@ #define RD_CSR32(dp, index, value) \ PCNET_IO_WR32(dp, rap, index); \ PCNET_IO_RD32(dp, rdp, value) - + #define WR_CSR32(dp, index, value) \ PCNET_IO_WR32(dp, rap, index); \ PCNET_IO_WR32(dp, rdp, value) - + #define RD_BCR32(dp, index, value) \ PCNET_IO_WR32(dp, rap, index); \ PCNET_IO_RD32(dp, bdp, value) @@ -363,21 +363,21 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag) } /* - * Set the receive descriptor ring length + * Set the receive descriptor ring length */ dp->initBlk.ib_rlen=RX_RING_LEN_BITS; /* - * Set the receive descriptor ring address + * Set the receive descriptor ring address */ dp->initBlk.ib_rdra=Swap32((uint32_t)&dp->rxBdBase[0]+ PCI_SYS_MEM_BASE); /* - * Set the transmit descriptor ring length + * Set the transmit descriptor ring length */ dp->initBlk.ib_tlen=TX_RING_LEN_BITS; /* - * Set the tranmit descriptor ring address + * Set the tranmit descriptor ring address */ dp->initBlk.ib_tdra=Swap32((uint32_t)&dp->txBdBase[0]+ PCI_SYS_MEM_BASE); @@ -386,7 +386,7 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag) { dp->initBlk.ib_padr[i]=dp->iface->hwaddr[i]; } - + /* * Ensure that we are in DWIO mode */ @@ -405,13 +405,13 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag) ulInitClkPCIAddr=(uint32_t)&dp->initBlk+PCI_SYS_MEM_BASE; /* - * CSR2 must contain the high order 16 bits of the first word in - * the initialization block + * CSR2 must contain the high order 16 bits of the first word in + * the initialization block */ WR_CSR32(dp, CSR2, (ulInitClkPCIAddr >> 16) & 0xffff); /* - * CSR1 must contain the low order 16 bits of the first word in - * the initialization block + * CSR1 must contain the low order 16 bits of the first word in + * the initialization block */ WR_CSR32(dp, CSR1, (ulInitClkPCIAddr & 0xffff)); @@ -752,7 +752,7 @@ amd79c970_rx (int dev, void *p1, void *p2) /* * Give the network code a chance to digest the - * packet. This guards against a flurry of + * packet. This guards against a flurry of * incoming packets (usually an ARP storm) from * using up all the available memory. */ @@ -876,7 +876,7 @@ amd79c970_show (struct iface *iface) * Following arguments are optional, but if present, must appear in * the following order: * Following arguments are optional, but if Ethernet address is - * specified, Internet address must also be specified. + * specified, Internet address must also be specified. * ###.###.###.### -- IP address * ##:##:##:##:##:## -- Ethernet address */ @@ -946,7 +946,7 @@ rtems_ka9q_driver_attach (int argc, char *argv[], void *p) * Set receive buffer descriptor count */ dp->rxBdCount=RX_RING_SIZE; - + /* * Set transmit buffer descriptor count */ diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h index f600611418..8f81ebf568 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h @@ -17,7 +17,7 @@ #define _PCNET_H /* - * IO space structure for the AMD79C970 device + * IO space structure for the AMD79C970 device */ typedef volatile struct pc_net @@ -69,10 +69,10 @@ typedef struct pc_net_eeprom { } pc_net_eeprom_t; /* - * PCnet-PCI Single Chip Ethernet Controller for PCI Local Bus + * PCnet-PCI Single Chip Ethernet Controller for PCI Local Bus */ /* - * Register and bit definitions + * Register and bit definitions */ #define CSR0 0 @@ -104,7 +104,7 @@ typedef struct pc_net_eeprom { #define APROM2 0x08 /* - * CSR0: Bit definitions + * CSR0: Bit definitions */ #define CSR0_ERR 0x8000 /* error summary */ #define CSR0_BABL 0x4000 /* babble error */ @@ -181,10 +181,10 @@ typedef struct pc_net_eeprom { #define CSR80_XMTFW16 (0<<8) /* fifo level to stop dma */ #define CSR80_XMTFW32 (1<<8) #define CSR80_XMTFW64 (2<<8) -/* must also clear csr4 CSR4_DMAPLUS: */ +/* must also clear csr4 CSR4_DMAPLUS: */ #define CSR80_DMATC(x) ((x)&0xff) /* max transfers per burst. deflt 16 */ /* - * must also set csr4 CSR4_TIMER: + * must also set csr4 CSR4_TIMER: */ #define CSR82_DMABAT(x) ((x)&0xffff) /* max burst time nanosecs*100 */ @@ -198,12 +198,12 @@ typedef struct pc_net_eeprom { #define BCR19_PVALID 0x8000 /* aprom (eeprom) read checksum ok */ /* - * initial setting of csr0 + * initial setting of csr0 */ #define CSR0_IVALUE (CSR0_IDON | CSR0_IENA | CSR0_STRT | CSR0_INIT) /* - * our setting of csr3 + * our setting of csr3 */ #define CSR3_VALUE (CSR3_ACON | CSR3_BSWP) @@ -226,7 +226,7 @@ typedef volatile struct initblk { * The bytes must be swapped within the word, so that, for example, * the address 8:0:20:1:25:5a is written in the order * 0 8 1 20 5a 25 - * For PCI970 that is long word swapped: so no swapping needed, since + * For PCI970 that is long word swapped: so no swapping needed, since * the bus will swap. */ uint8_t ib_padr[8]; /* physical address */ @@ -237,11 +237,11 @@ typedef volatile struct initblk { /* - * bits in mode register: allows alteration of the chips operating parameters + * bits in mode register: allows alteration of the chips operating parameters */ #define IBM_PROM 0x8000 /* promiscuous mode */ /* - * mode is also in cr15 + * mode is also in cr15 */ #define MODE_DRCVBC 0x4000 /* disable receive broadcast */ #define MODE_DRCVPA 0x2000 /* disable receive physical address */ @@ -259,15 +259,15 @@ typedef volatile struct initblk { #define IBM_DTX 0x0002 /* disable transmitter */ #define IBM_DRX 0x0001 /* disable receiver */ -/* +/* * Buffer Management is accomplished through message descriptors organized * in ring structures in main memory. There are two rings allocated for the - * device: a receive ring and a transmit ring. The following defines the + * device: a receive ring and a transmit ring. The following defines the * structure of the descriptor rings. */ /* - * Receive List type definition + * Receive List type definition * * This essentially consists of 4, 32 bit LE words. In the following the * fields are ordered so that they map correctly in BE mode, however each @@ -277,7 +277,7 @@ typedef volatile struct initblk { typedef volatile struct rmde { uint32_t rmde_addr; /* buf addr */ - uint16_t rmde_bcnt; + uint16_t rmde_bcnt; uint16_t rmde_flags; uint16_t rmde_mcnt; @@ -288,7 +288,7 @@ typedef volatile struct rmde { /* - * bits in the flags field + * bits in the flags field */ #define RFLG_OWN 0x8000 /* ownership bit, 1==LANCE */ #define RFLG_ERR 0x4000 /* error summary */ @@ -300,19 +300,19 @@ typedef volatile struct rmde { #define RFLG_ENP 0x0100 /* end of packet */ /* - * bits in the buffer byte count field + * bits in the buffer byte count field */ #define RBCNT_ONES 0xf000 /* must be ones */ #define RBCNT_BCNT 0x0fff /* buf byte count, in 2's compl */ /* - * bits in the message byte count field + * bits in the message byte count field */ #define RMCNT_RES 0xf000 /* reserved, read as zeros */ #define RMCNT_BCNT 0x0fff /* message byte count */ /* - * Transmit List type definition + * Transmit List type definition * * This essentially consists of 4, 32 bit LE words. In the following the * fields are ordered so that they map correctly in BE mode, however each @@ -321,7 +321,7 @@ typedef volatile struct rmde { typedef volatile struct tmde { uint32_t tmde_addr; /* buf addr */ - uint16_t tmde_bcnt; + uint16_t tmde_bcnt; uint16_t tmde_status; /* misc error and status bits */ uint32_t tmde_error; @@ -330,7 +330,7 @@ typedef volatile struct tmde { } tmde_t; /* - * bits in the status field + * bits in the status field */ #define TST_OWN 0x8000 /* ownership bit, 1==LANCE */ #define TST_ERR 0x4000 /* error summary */ @@ -342,18 +342,18 @@ typedef volatile struct tmde { #define TST_ENP 0x0100 /* end of packet */ /* - * setting of status field when packet is to be transmitted + * setting of status field when packet is to be transmitted */ #define TST_XMIT (TST_STP | TST_ENP | TST_OWN) /* - * bits in the buffer byte count field + * bits in the buffer byte count field */ #define TBCNT_ONES 0xf000 /* must be ones */ #define TBCNT_BCNT 0x0fff /* buf byte count, in 2's compl */ /* - * bits in the error field + * bits in the error field */ #define TERR_BUFF 0x8000 /* buffer error */ #define TERR_UFLO 0x4000 /* underflow error */ @@ -368,7 +368,7 @@ typedef volatile struct tmde { */ /* - * receive errors + * receive errors */ #define ERR_FRAM 0 /* framing error */ #define ERR_OFLO 1 /* overflow error */ @@ -376,7 +376,7 @@ typedef volatile struct tmde { #define ERR_RBUFF 3 /* receive buffer error */ /* - * transmit errors + * transmit errors */ #define ERR_MORE 4 /* more than one retry */ #define ERR_ONE 5 /* one retry */ @@ -388,7 +388,7 @@ typedef volatile struct tmde { #define ERR_RTRY 11 /* retry error, >16 retries */ /* - * errors reported in csr0 + * errors reported in csr0 */ #define ERR_BABL 12 /* transmitter timeout error */ #define ERR_MISS 13 /* missed packet */ @@ -400,7 +400,7 @@ typedef volatile struct tmde { #define NHARD_ERRORS 18 /* error types used in diagnostic */ /* - * other statistics + * other statistics */ #define ERR_TTOUT 18 /* transmit timeouts */ #define ERR_ITOUT 19 /* init timeouts */ @@ -412,7 +412,7 @@ typedef volatile struct tmde { #define NUM_ERRORS 24 /* number of errors types */ /* - * Bit definitions for BCR19 + * Bit definitions for BCR19 */ #define prom_EDI (uint16_t)0x0001 #define prom_EDO (uint16_t)0x0001 diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h index 958fd5a557..10bfb872a5 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h @@ -31,7 +31,7 @@ * The CRC's are computed with x**16+x**12+x**5 + 1 polynomial * The clock is kept in 24 hour BCD mode and should be set to UT(GMT) */ - + typedef struct _MK48T18_CMOS_MAP { uint8_t SystemDependentArea2[8]; uint8_t FeatureByte0[1]; diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c index 790542f155..146ae4567c 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c @@ -33,7 +33,7 @@ void ); typedef -uint8_t +uint8_t (*PNVRAMREAD) ( uint32_t ulOffset diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/prepnvr.h b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/prepnvr.h index cf55a4525d..058cf7b45a 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/prepnvr.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/prepnvr.h @@ -1,29 +1,29 @@ /* Structure map for NVRAM on PowerPC Reference Platform */ - + /* Revision 1 changes (8/25/94): - Power Management (RESTART_BLOCK struct) - Normal added to PM_MODE - OSIRQMask (HEADER struct) */ - + /* All fields are either character/byte strings which are valid either endian or they are big-endian numbers. - + There are a number of Date and Time fields which are in RTC format, big-endian. These are stored in UT (GMT). - + For enum's: if given in hex then they are bit significant, i.e. only one bit is on for each enum. */ - + #ifndef _NVRAM_ #define _NVRAM_ #define VERSION 1 #define REVISION 0 - + #define OSAREASIZE 1024 /* size of OSArea space */ #define CONFSIZE 512 /* guess at size of Configuration space */ - + typedef struct _SECURITY { unsigned long BootErrCnt; /* Count of boot password errors */ unsigned long ConfigErrCnt; /* Count of config password errors */ @@ -35,7 +35,7 @@ typedef struct _SECURITY { unsigned long ConfigSetDT[2]; /* Date&Time from RTC of last set of pw */ unsigned char Serial[16]; /* Box serial number */ } SECURITY; - + typedef enum _OS_ID { Unknown = 0, Firmware = 1, @@ -50,41 +50,41 @@ typedef enum _OS_ID { Low_End_Client = 10, SCO = 11 } OS_ID; - + typedef struct _ERROR_LOG { unsigned char ErrorLogEntry[40]; /* To be architected */ } ERROR_LOG; - + /*---Revision 1: Change the following struct:---*/ typedef struct _RESUME_BLOCK { /* Hibernation Resume Device will be an environment variable */ unsigned long CheckSum; /* Checksum of RESUME_BLOCK */ volatile unsigned long BootStatus; - + void * ResumeAddr; /* For Suspend Resume */ void * SaveAreaAddr; /* For Suspend Resume */ unsigned long SaveAreaLength; /* For Suspend Resume */ - + unsigned long HibResumeImageRBA; /* RBA (512B blocks) of compressed OS memory image to be loaded by FW on Resume from hibernation */ unsigned long HibResumeImageRBACount; /* Size of image in 512B blocks*/ unsigned long Reserved; } RESUME_BLOCK; - + typedef enum _OSAREA_USAGE { Empty = 0, Used = 1 } OSAREA_USAGE; - + typedef enum _PM_MODE { Suspend = 0x80, /* Part of state is in memory */ Hibernate = 0x40, /* Nothing in memory - state saved elsewhere */ /* Revision 1: Normal added (actually was already here) */ Normal = 0x00 /* No power management in effect */ } PMMode; - + typedef struct _HEADER { unsigned short Size; /* NVRAM size in K(1024) */ unsigned char Version; /* Structure map different */ @@ -100,28 +100,28 @@ typedef struct _HEADER { RESUME_BLOCK ResumeBlock; SECURITY Security; ERROR_LOG ErrorLog[2]; - + /* Global Environment information */ void * GEAddress; unsigned long GELength; /* Date&Time from RTC of last change to Global Environment */ unsigned long GELastWriteDT[2]; - + /* Configuration information */ void * ConfigAddress; unsigned long ConfigLength; /* Date&Time from RTC of last change to Configuration */ unsigned long ConfigLastWriteDT[2]; unsigned long ConfigCount; /* Count of entries in Configuration */ - + /* OS dependent temp area */ void * OSAreaAddress; unsigned long OSAreaLength; /* Date&Time from RTC of last change to OSAreaArea */ unsigned long OSAreaLastWriteDT[2]; - + /* Revision 1: add this mask - function tbd */ /*unsigned short OSIRQMask; OS to FW IRQ Mask - "I've used this one" */ } HEADER, *PHEADER; - + #endif /* ndef _NVRAM_ */ diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S b/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S index 8761450bd6..05d463c2ee 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/start/start.S @@ -75,7 +75,7 @@ _start: ori r3,r3 ,H0_60X_ICE #endif mtspr HID0,r3 - + /* clear bss */ lis r6,__bss_start@h ori r6,r6,__bss_start@l diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c index 5e34429c09..ca313e001b 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c @@ -27,7 +27,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <string.h> @@ -61,7 +61,7 @@ static unsigned long ulBusSpeed[] = { * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; @@ -142,13 +142,13 @@ void bsp_std_close( void ) close(stdout_fd); close(stderr_fd); } - + /* * bsp_predriver_hook * * Before drivers are setup. - */ + */ void bsp_predriver_hook(void) { /* bsp_spurious_initialize; ??*/ @@ -266,7 +266,7 @@ void bsp_start( void ) * of work space from the last physical address on the CPU board. */ - work_space_start = + work_space_start = (unsigned char *)ulMemorySize - BSP_Configuration.work_space_size; if ( work_space_start <= (unsigned char *)&end ) { @@ -282,7 +282,7 @@ void bsp_start( void ) Cpu_table.exceptions_in_RAM = TRUE; Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ - Cpu_table.predriver_hook = bsp_predriver_hook; + Cpu_table.predriver_hook = bsp_predriver_hook; Cpu_table.postdriver_hook = bsp_postdriver_hook; Cpu_table.do_zero_of_workspace = TRUE; Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c index a7a6f3dacc..98348b1020 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c @@ -32,8 +32,8 @@ #include <rtems/chain.h> #include <assert.h> -/* - * Proto types for this file +/* + * Proto types for this file */ rtems_isr external_exception_ISR ( @@ -49,8 +49,8 @@ rtems_isr external_exception_ISR ( uint8_t ucMaster8259Mask; uint8_t ucSlave8259Mask; -/* - * Structure to for one of possible multiple interrupt handlers for +/* + * Structure to for one of possible multiple interrupt handlers for * a given interrupt. */ typedef struct @@ -65,7 +65,7 @@ typedef struct * handlers at a later time. */ EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; - uint16_t Nodes_Used; + uint16_t Nodes_Used; Chain_Control ISR_Array [NUM_LIRQ]; void initialize_external_exception_vector() @@ -139,7 +139,7 @@ void initialize_external_exception_vector() ELCRM_INT5_LVL); break; } - + case SYS_TYPE_PPC2: case SYS_TYPE_PPC2a: case SYS_TYPE_PPC4: @@ -158,18 +158,18 @@ void initialize_external_exception_vector() } } - /* - * Install external_exception_ISR () as the handler for + /* + * Install external_exception_ISR () as the handler for * the General Purpose Interrupt. */ - status = rtems_interrupt_catch( external_exception_ISR, + status = rtems_interrupt_catch( external_exception_ISR, PPC_IRQ_EXTERNAL, (rtems_isr_entry *) &previous_isr ); } /* - * This routine installs one of multiple ISRs for the general purpose + * This routine installs one of multiple ISRs for the general purpose * inerrupt. */ void set_EE_vector( @@ -200,7 +200,7 @@ void set_EE_vector( * Doing things in this order makes them more atomic */ - Nodes_Used++; + Nodes_Used++; index = Nodes_Used - 1; @@ -215,13 +215,13 @@ void set_EE_vector( En_Ext_Interrupt(vector); } -/* +/* * This interrupt service routine is called for an External Exception. */ rtems_isr external_exception_ISR ( rtems_vector_number vector /* IN */ ) -{ +{ uint16_t index; uint8_t ucISr; EE_ISR_Type *node; diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c index 240d4577c0..435da9dc02 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/setvec.c @@ -19,7 +19,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <rtems.h> @@ -27,8 +27,8 @@ /* - * This routine installs vector number vector. - * + * This routine installs vector number vector. + * */ rtems_isr_entry set_vector( /* returns old vector */ rtems_isr_entry handler, /* isr routine */ @@ -39,7 +39,7 @@ rtems_isr_entry set_vector( /* returns old vector */ rtems_isr_entry previous_isr; rtems_status_code status; - /* + /* * vectors greater than PPC_IRQ_LAST are handled by the General purpose * interupt handler. (8259) */ diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c index 3ead7a7892..6a1a427a0f 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c @@ -1,12 +1,12 @@ /* * PPCn_60x Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * * Based upon the SPARC ERC32 version which was developed as - * part of the port of RTEMS to the ERC32 implementation - * of the SPARC by On-Line Applications Research Corporation (OAR) + * part of the port of RTEMS to the ERC32 implementation + * of the SPARC by On-Line Applications Research Corporation (OAR) * under contract to the European Space Agency (ESA). * * COPYRIGHT (c) 1995. European Space Agency. @@ -41,7 +41,7 @@ rtems_isr bsp_spurious_handler( DEBUG_puts( "Spurious Trap" ); - + switch ( trap ) { case PPC_IRQ_SYSTEM_RESET: DEBUG_puts( "System reset" ); @@ -88,7 +88,7 @@ rtems_isr bsp_spurious_handler( #if defined(ppc403) || defined(ppc405) case PPC_IRQ_CRIT : - DEBUG_puts( "Critical Error "); + DEBUG_puts( "Critical Error "); break; case PPC_IRQ_PIT: DEBUG_puts( "Prog. Interval Timer " ); @@ -104,13 +104,13 @@ rtems_isr bsp_spurious_handler( break; #elif defined(ppc601) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_TRACE : DEBUG_puts( "0x02000" ); break; #elif defined(ppc603) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_TRANS_MISS : DEBUG_puts( "0x1000" ); break; @@ -145,7 +145,7 @@ rtems_isr bsp_spurious_handler( break; #elif defined(mpc604) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_ADDR_BRK: DEBUG_puts( "0x1300" ); break; @@ -184,7 +184,7 @@ void bsp_spurious_initialize() * trap 0 which we will use as a shutdown. */ - set_vector( bsp_spurious_handler, trap, 1 ); + set_vector( bsp_spurious_handler, trap, 1 ); } set_vector( bsp_stub_handler, PPC_IRQ_DECREMENTER, 1 ); diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c index 5ea1c39b0c..68072fe502 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c @@ -37,7 +37,7 @@ inline unsigned int Swap32( "rlwimi %0,%1,24,16,23;" "rlwimi %0,%1,8,8,15;" "rlwimi %0,%1,24,0,7;" : - + "=&r" ((ulSwapped)) : "r" ((ulValue)) ); diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c b/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c index 9d82edb0da..8b38bf11b6 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c @@ -26,7 +26,7 @@ uint64_t Timer_driver_Start_time; rtems_boolean Timer_driver_Find_average_overhead; /* - * Timer_initialize + * Timer_initialize */ void Timer_initialize() { diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h index 6df03f6cbd..1d544133bc 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h @@ -17,7 +17,7 @@ /* CMOS is the 64 bytes of RAM in the DS1385 chip */ /* The CRC's are computed with x**16+x**12+x**5 + 1 polynomial */ /* The clock is kept in 24 hour BCD mode and should be set to UT(GMT) */ - + #ifndef _CMOS_ #define _CMOS_ @@ -65,7 +65,7 @@ /* Define Control Register D structure. */ #define DS1385_REGD_VALID 0x80 - + typedef struct _CMOS_MAP { volatile uint8_t DateAndTime[14]; @@ -91,5 +91,5 @@ typedef struct _CMOS_MAP { attribute = lock */ uint8_t ConfigCrc[2]; /* CRC on ConfigPW */ } CMOS_MAP, *PCMOS_MAP; - + #endif /* _CMOS_ */ diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c index 7872747a6a..2b2c03392f 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c @@ -88,7 +88,7 @@ static rtems_id semRTC; /* * This only works for the Gregorian calendar - i.e. after 1752 (in the UK) */ -uint8_t +uint8_t GregorianDay(rtems_time_of_day *pTOD) { boolean isLeap; @@ -164,7 +164,7 @@ Return Value: return; } -uint8_t +uint8_t DsReadRawClockRegister ( uint8_t Register ) @@ -233,7 +233,7 @@ Return Value: return; } -uint8_t +uint8_t DsReadClockRegister ( uint8_t Register ) diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c b/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c index 19a53ce56a..ca0d048450 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c @@ -100,9 +100,9 @@ typedef struct { uint32_t V6_STATID; /* Offset 0x0338 */ uint32_t V7_STATID; /* Offset 0x033C */ uint32_t Buf_Offset_0x0340[ 0x30 ]; /* Offset 0x0340 */ - uint32_t MAST_CTL; /* Offset 0x0400 */ - uint32_t MISC_CTL; /* Offset 0x0404 */ - uint32_t MISC_STAT; /* Offset 0x0408 */ + uint32_t MAST_CTL; /* Offset 0x0400 */ + uint32_t MISC_CTL; /* Offset 0x0404 */ + uint32_t MISC_STAT; /* Offset 0x0408 */ uint32_t USER_AM; /* Offset 0x040C */ uint32_t Buf_Offset_0x0410[ 0x2bc ];/* Offset 0x0410 */ uint32_t VSI0_CTL; /* Offset 0x0F00 */ @@ -146,7 +146,7 @@ volatile Universe_Memory *UNIVERSE; void PCI_bus_write( volatile uint32_t * _addr, /* IN */ uint32_t _data /* IN */ -) +) { outport_32(_addr, _data); } @@ -156,7 +156,7 @@ uint32_t PCI_bus_read( ) { uint32_t data; - + inport_32(_addr, data); return data; } @@ -179,14 +179,14 @@ void InitializeUniverse() { uint32_t pci_id; uint32_t universe_temp_value; - + /* - * Verify the UNIVERSE CHIP ID + * Verify the UNIVERSE CHIP ID */ (void)PCIConfigRead32(0,4,0,PCI_CONFIG_VENDOR_LOW, &pci_id); - /* - * compare to known ID + /* + * compare to known ID */ if (pci_id != 0x000010e3 ){ DEBUG_puts ("Invalid PPCN_60X_UNIVERSE_CHIP_ID: "); @@ -205,16 +205,16 @@ void InitializeUniverse() PCI_ENABLE_MEMORY_SPACE | PCI_ENABLE_BUS_MASTER); - /* + /* * Turn off the sysfail by setting SYSFAIL bit to 1 on the VCSR_CLR register */ - PCI_bus_write( &UNIVERSE->VCSR_CLR, 0x40000000 ); + PCI_bus_write( &UNIVERSE->VCSR_CLR, 0x40000000 ); #if 0 /* * Set VMEbus Slave Image 0 Base Address to 0x04000000 on VSI0_BS register. */ - PCI_bus_write( &UNIVERSE->VSI0_BS, 0x04000000 ); + PCI_bus_write( &UNIVERSE->VSI0_BS, 0x04000000 ); /* * Set VMEbus Slave Image 0 Bound Address to 0x05000000 on VSI0_BD register. @@ -222,7 +222,7 @@ void InitializeUniverse() PCI_bus_write( &UNIVERSE->VSI0_BD, 0x05000000 ); /* - * VMEbus Slave Image 0 Translation Offset to 0x7C000000 on VSI0_TO + * VMEbus Slave Image 0 Translation Offset to 0x7C000000 on VSI0_TO * register. Map the VME base address 0x4000000 to local memory address 0x0 */ PCI_bus_write( &UNIVERSE->VSI0_TO, 0x7C000000 ); @@ -231,12 +231,12 @@ void InitializeUniverse() * Set the VMEbus Slave Image 0 Control register with write posted, * read prefetch and AM code set for program, data, supervisor and user mode */ - PCI_bus_write( &UNIVERSE->VSI0_CTL, 0xE0F20000 ); + PCI_bus_write( &UNIVERSE->VSI0_CTL, 0xE0F20000 ); #endif /* * Set the VMEbus Master Control register with retry forever, 256 bytes - * posted write transfer count, VMEbus request level 3, RWD, PCI 32 bytes + * posted write transfer count, VMEbus request level 3, RWD, PCI 32 bytes * aligned burst size and PCI bus number to be zero */ PCI_bus_write( &UNIVERSE->MAST_CTL, 0x01C00000 ); @@ -245,9 +245,9 @@ void InitializeUniverse() * VMEbus DMA Transfer Control register with 32 bit VMEbus Maximum Data * width, A32 VMEbus Address Space, AM code to be data, none-privilleged, * single and BLT cycles on VME bus and 64-bit PCI Bus Transactions enable - PCI_bus_write( &UNIVERSE->DCTL, 0x00820180 ); + PCI_bus_write( &UNIVERSE->DCTL, 0x00820180 ); */ - + PCI_bus_write( &UNIVERSE->LSI0_CTL, 0x80700040 ); PCI_bus_write( &UNIVERSE->LSI0_BS, 0x04000000 ); PCI_bus_write( &UNIVERSE->LSI0_BD, 0x05000000 ); @@ -257,44 +257,44 @@ void InitializeUniverse() #if 0 /* * Set the PCI Slave Image 0 Control register with posted write enable, - * 32 bit data width, A32 VMEbus address base, AM code to be data, - * none-privilleged, single and BLT cycles on VME bus with PCI + * 32 bit data width, A32 VMEbus address base, AM code to be data, + * none-privilleged, single and BLT cycles on VME bus with PCI * bus memory space. - PCI_bus_write( &UNIVERSE->LSI0_CTL, 0xC0820100 ); + PCI_bus_write( &UNIVERSE->LSI0_CTL, 0xC0820100 ); */ - PCI_bus_write( &UNIVERSE->LSI0_CTL, 0x80700040 ); + PCI_bus_write( &UNIVERSE->LSI0_CTL, 0x80700040 ); /* - * Set the PCI Slave Image 0 Base Address to be + * Set the PCI Slave Image 0 Base Address to be * 0x0 on LSI0_BS register. */ PCI_bus_write( &UNIVERSE->LSI0_BS, 0x00FF0000 ); /* - * Set the PCI Slave Image 0 Bound Address to be + * Set the PCI Slave Image 0 Bound Address to be * 0xFFFFF000 on VSI0_BD register. */ - PCI_bus_write( &UNIVERSE->LSI0_BD, 0x00FFF000 ); + PCI_bus_write( &UNIVERSE->LSI0_BD, 0x00FFF000 ); /* - * Set the PCI Slave Image 0 Translation Offset to be + * Set the PCI Slave Image 0 Translation Offset to be * 0x0 on VSI0_TO register. - * Note: If the actual VME address is bigger than 0x40000000, we need + * Note: If the actual VME address is bigger than 0x40000000, we need * to set the PCI Slave Image 0 Translation Offset = 0x40000000 - * register. - * i.e. if actual VME ADRR = 0x50000000, then we - * need to subtract it by 0x40000000 and set + * register. + * i.e. if actual VME ADRR = 0x50000000, then we + * need to subtract it by 0x40000000 and set * the LSI0_T0 register to be 0x40000000 and then * perform a PCI data access by adding 0xC0000000 to * 0x10000000 -- which is came form the result of - * (0x50000000 - 0x40000000). + * (0x50000000 - 0x40000000). */ - PCI_bus_write( &UNIVERSE->LSI0_TO, 0x0 ); + PCI_bus_write( &UNIVERSE->LSI0_TO, 0x0 ); #endif - /* + /* * Remove the Universe from VMEbus BI-Mode (bus-isolation). Once out of - * BI-Mode VMEbus accesses can be made. + * BI-Mode VMEbus accesses can be made. */ universe_temp_value = PCI_bus_read( &UNIVERSE->MISC_CTL ); @@ -309,22 +309,22 @@ void InitializeUniverse() * Slave Image 0 registers. */ void set_vme_base_address ( - uint32_t base_address + uint32_t base_address ) -{ +{ volatile uint32_t temp; /* * Calculate the current size of the Slave VME image 0 */ - temp = ( PCI_bus_read( &UNIVERSE->VSI0_BD) & 0xFFFFF000) - + temp = ( PCI_bus_read( &UNIVERSE->VSI0_BD) & 0xFFFFF000) - ( PCI_bus_read( &UNIVERSE->VSI0_BS) & 0xFFFFF000); /* - * Set the VMEbus Slave Image 0 Base Address to be + * Set the VMEbus Slave Image 0 Base Address to be * the specifed base address on VSI0_BS register. */ - PCI_bus_write( &UNIVERSE->VSI0_BS, (base_address & 0xFFFFF000) ); + PCI_bus_write( &UNIVERSE->VSI0_BS, (base_address & 0xFFFFF000) ); /* * Update the VMEbus Slave Image 0 Bound Address. @@ -342,7 +342,7 @@ void set_vme_base_address ( * Gets the VME base address */ uint32_t get_vme_base_address () -{ +{ volatile uint32_t temp; temp = PCI_bus_read( &UNIVERSE->VSI0_BS ); @@ -364,15 +364,15 @@ uint32_t get_vme_slave_size() * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF) */ void set_vme_slave_size (uint32_t size) -{ +{ volatile uint32_t temp; - if (size<0) + if (size<0) size = 0; - - if (size > 0x17FFFFF) + + if (size > 0x17FFFFF) size = 0x17FFFFF; - + /* * Read the VME slave image base address */ @@ -424,20 +424,20 @@ void put_vme( uint16_t *vme_ptr, uint16_t value ) -{ +{ if (vme_ptr > (uint16_t*)0x3EFFFFFF) { - /* + /* * LSI0_TO register to 0x3EFFF000 if it had not been updated already */ if (( PCI_bus_read( &UNIVERSE->LSI0_TO) & 0xFFFFF000) != 0x3EFFF000) PCI_bus_write( &UNIVERSE->LSI0_TO, 0x3EFFF000 ); - - *(uint16_t*) (((uint32_t)vme_ptr - 0x3EFFF000) + + + *(uint16_t*) (((uint32_t)vme_ptr - 0x3EFFF000) + PPCN_60X_PCI_MEM_BASE) = value; } else - *(uint16_t*)((uint32_t)vme_ptr + + *(uint16_t*)((uint32_t)vme_ptr + PPCN_60X_PCI_MEM_BASE) = value; } #endif diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/vectors/vectors.S b/c/src/lib/libbsp/powerpc/ppcn_60x/vectors/vectors.S index cd7b737314..2f30978143 100644 --- a/c/src/lib/libbsp/powerpc/ppcn_60x/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/ppcn_60x/vectors/vectors.S @@ -17,7 +17,7 @@ */ /* vectors.s 1.1 - 95/12/04 * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * interrupt veneers for RTEMS. * */ @@ -116,58 +116,58 @@ PUBLIC_VAR (__vectors) SYM (__vectors): - + #if PPCN_60X_USE_DINK - .org reset_vector - file_base + .org reset_vector - file_base /* This is where the DINK soft reset handler is located */ - ba 0xfff00180 - - .org mach_vector - file_base + ba 0xfff00180 + + .org mach_vector - file_base ba 0xfff00200 - - .org prot_vector - file_base + + .org prot_vector - file_base ba 0xfff00300 - - .org isi_vector - file_base + + .org isi_vector - file_base ba 0xfff00400 - - .org ext_vector - file_base + + .org ext_vector - file_base rfi - - .org align_vector - file_base - ba 0xfff00600 - - .org prog_vector - file_base - ba 0xfff00700 - - .org float_vector - file_base + + .org align_vector - file_base + ba 0xfff00600 + + .org prog_vector - file_base + ba 0xfff00700 + + .org float_vector - file_base ba 0xfff00800 - .org dec_vector - file_base + .org dec_vector - file_base rfi - - .org sys_vector - file_base - ba 0xfff00C00 - - .org trace_vector - file_base - ba 0xfff00d00 - - .org itm_vector - file_base - ba 0xfff01000 - - .org dltm_vector - file_base - ba 0xfff01100 - - .org dstm_vector - file_base - ba 0xfff01200 - - .org addr_vector - file_base - ba 0xfff01300 - - .org sysmgmt_vector - file_base - ba 0xfff01400 + + .org sys_vector - file_base + ba 0xfff00C00 + + .org trace_vector - file_base + ba 0xfff00d00 + + .org itm_vector - file_base + ba 0xfff01000 + + .org dltm_vector - file_base + ba 0xfff01100 + + .org dstm_vector - file_base + ba 0xfff01200 + + .org addr_vector - file_base + ba 0xfff01300 + + .org sysmgmt_vector - file_base + ba 0xfff01400 #else - .org reset_vector - file_base + .org reset_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,1 @@ -198,8 +198,8 @@ waitfortx: lwz r3,IP_3(r1) addi r1,r1,IP_END rfi - - .org mach_vector - file_base + + .org mach_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) stw r3,IP_3(r1) @@ -215,80 +215,80 @@ waitfortx: dcbst 0,r4 li r4,0x02 b display_exc - - .org prot_vector - file_base + + .org prot_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x03 b display_exc - - .org isi_vector - file_base + + .org isi_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x04 b display_exc - - .org ext_vector - file_base + + .org ext_vector - file_base rfi - - .org align_vector - file_base + + .org align_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x06 b display_exc - - .org prog_vector - file_base + + .org prog_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x07 b display_exc - .org float_vector - file_base + .org float_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x08 b display_exc - .org dec_vector - file_base + .org dec_vector - file_base rfi - - .org sys_vector - file_base + + .org sys_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0a b display_exc - - .org trace_vector - file_base + + .org trace_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0b b display_exc - - .org itm_vector - file_base + + .org itm_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0c b display_exc - - .org dltm_vector - file_base + + .org dltm_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0d b display_exc - - .org dstm_vector - file_base + + .org dstm_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0e b display_exc - - .org addr_vector - file_base + + .org addr_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x0f b display_exc - - .org sysmgmt_vector - file_base + + .org sysmgmt_vector - file_base stwu r1, -(IP_END)(r1) stw r4,IP_4(r1) li r4,0x00 diff --git a/c/src/lib/libbsp/powerpc/psim/console/console-io.c b/c/src/lib/libbsp/powerpc/psim/console/console-io.c index 99339461f6..0aaffd07ea 100644 --- a/c/src/lib/libbsp/powerpc/psim/console/console-io.c +++ b/c/src/lib/libbsp/powerpc/psim/console/console-io.c @@ -48,7 +48,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ diff --git a/c/src/lib/libbsp/powerpc/psim/include/bsp.h b/c/src/lib/libbsp/powerpc/psim/include/bsp.h index d0652bfa9a..887317328e 100644 --- a/c/src/lib/libbsp/powerpc/psim/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/psim/include/bsp.h @@ -46,7 +46,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (12 * 1024) - + #ifdef ASM /* Definition of where to store registers in alignment handler */ #define ALIGN_REGS 0x0140 @@ -106,15 +106,15 @@ extern "C" { /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* * Information placed in the linkcmds file. diff --git a/c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c b/c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c index 37448098d7..7bdd192648 100644 --- a/c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c +++ b/c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c @@ -1,4 +1,4 @@ -/* +/* * NOTE: This routine is not used when in polling mode. Either * this routine OR Shm_clockisr is used in a particular system. * diff --git a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c index 6709f43403..87403907e4 100644 --- a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c @@ -26,7 +26,7 @@ * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; @@ -44,7 +44,7 @@ extern uint32_t rdb_start; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -87,7 +87,7 @@ void bsp_start( void ) unsigned char *work_space_start; #if 0 - /* + /* * Set MSR to show vectors at 0 XXX */ _CPU_MSR_Value( msr_value ); @@ -126,7 +126,7 @@ void bsp_start( void ) BSP_Configuration.work_space_size += 1024; - work_space_start = + work_space_start = (unsigned char *)&RAM_END - BSP_Configuration.work_space_size; if ( work_space_start <= (unsigned char *)&end ) { diff --git a/c/src/lib/libbsp/powerpc/psim/timer/timer.c b/c/src/lib/libbsp/powerpc/psim/timer/timer.c index 3052f0402c..a1412b2d0b 100644 --- a/c/src/lib/libbsp/powerpc/psim/timer/timer.c +++ b/c/src/lib/libbsp/powerpc/psim/timer/timer.c @@ -1,4 +1,4 @@ -/* +/* * This file implements a benchmark timer using the PPC decrement register. * * COPYRIGHT (c) 1989-2000. diff --git a/c/src/lib/libbsp/powerpc/psim/vectors/vectors.S b/c/src/lib/libbsp/powerpc/psim/vectors/vectors.S index 6ed7ddf15c..0d58bd38e4 100644 --- a/c/src/lib/libbsp/powerpc/psim/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/psim/vectors/vectors.S @@ -1,6 +1,6 @@ /* vectors.s 1.1 - 95/12/04 * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * interrupt vectors for RTEMS. * * COPYRIGHT (c) 1989-1999. @@ -55,29 +55,29 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) .set IP_28, (IP_13 + 4) - + .set IP_29, (IP_28 + 4) .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) - + .set IP_END, (IP_MSR + 16) /* Vector offsets */ @@ -104,7 +104,7 @@ PUBLIC_VAR (__vectors) SYM (__vectors): - + /* Decrementer interrupt */ .org dec_vector - file_base #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c index 9a3f6b79d4..feb01efb96 100644 --- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c +++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c @@ -37,7 +37,7 @@ void PCI_bus_delay () void PCI_bus_write( volatile uint32_t * _addr, /* IN */ uint32_t _data /* IN */ -) +) { _data = Convert_Endian_32( _data ); *_addr = _data; @@ -48,7 +48,7 @@ uint32_t PCI_bus_read( ) { uint32_t data; - + data = *_addr; data = Convert_Endian_32( data ); return data; @@ -68,7 +68,7 @@ uint32_t Read_pci_device_register( * Write the PCI configuration address */ PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address ); - + /* * Delay needed when running out of DRAM */ @@ -78,20 +78,20 @@ uint32_t Read_pci_device_register( * read data */ data = PCI_bus_read( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_DATA ); - + return data; } void Write_pci_device_register( uint32_t address, - uint32_t data + uint32_t data ) { /* * Write the PCI configuration address */ PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address ); - + /* * Delay needed when running out of DRAM */ diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h index 16d2bbfc6f..78f0e71973 100644 --- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h +++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h @@ -10,7 +10,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __PCI_h #define __PCI_h @@ -20,12 +20,12 @@ */ void PCI_bus_write( - volatile uint32_t * _addr, - uint32_t _data -); + volatile uint32_t * _addr, + uint32_t _data +); uint32_t PCI_bus_read( - volatile uint32_t * _addr + volatile uint32_t * _addr ); uint32_t Read_pci_device_register( @@ -34,7 +34,7 @@ uint32_t Read_pci_device_register( void Write_pci_device_register( uint32_t address, - uint32_t data + uint32_t data ); #endif diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c index 8b1cfa0958..c04c288c69 100644 --- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c +++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c @@ -22,7 +22,7 @@ unsigned int SCORE603e_FLASH_Disable( ) { uint8_t value; - + value = *SCORE603E_BOARD_CTRL_REG; value = value | (~SCORE603E_BRD_FLASH_DISABLE_MASK); *SCORE603E_BOARD_CTRL_REG = value; @@ -32,7 +32,7 @@ unsigned int SCORE603e_FLASH_Disable( unsigned int SCORE603e_FLASH_verify_enable() { - volatile uint8_t *Ctrl_Status_Register = + volatile uint8_t *Ctrl_Status_Register = (void *)SCORE603E_BOARD_CTRL_REG; uint8_t ctrl_value; uint32_t pci_value; diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c index eccf81476b..fda1760b0e 100644 --- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c +++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c @@ -97,9 +97,9 @@ typedef struct { uint32_t V6_STATID; /* 0x80030338 */ uint32_t V7_STATID; /* 0x8003033C */ uint32_t Buf_0x80030340[ 0x30 ]; /* 0x80030340 */ - uint32_t MAST_CTL; /* 0x80030400 */ - uint32_t MISC_CTL; /* 0x80030404 */ - uint32_t MISC_STAT; /* 0x80030408 */ + uint32_t MAST_CTL; /* 0x80030400 */ + uint32_t MISC_CTL; /* 0x80030404 */ + uint32_t MISC_STAT; /* 0x80030408 */ uint32_t USER_AM; /* 0x8003040C */ uint32_t Buf_0x80030410[ 0x2bc ];/* 0x80030410 */ uint32_t VSI0_CTL; /* 0x80030F00 */ @@ -135,7 +135,7 @@ typedef struct { uint32_t VCSR_BS; /* 0x80030FFC */ } Universe_Memory; -volatile Universe_Memory *UNIVERSE = +volatile Universe_Memory *UNIVERSE = (volatile Universe_Memory *)SCORE603E_UNIVERSE_BASE; @@ -160,21 +160,21 @@ void initialize_universe() #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) volatile uint32_t universe_temp_value; #endif - + /* * Read the VME jumper location to determine the VME base address */ - jumper_selection = PCI_bus_read( + jumper_selection = PCI_bus_read( (volatile uint32_t*)SCORE603E_VME_JUMPER_ADDR ); jumper_selection = (jumper_selection >> 3) & 0x1f; /* - * Verify the UNIVERSE CHIP ID + * Verify the UNIVERSE CHIP ID */ pci_id = Read_pci_device_register( SCORE603E_IO_VME_UNIVERSE_BASE ); - /* - * compare to known ID + /* + * compare to known ID */ if (pci_id != SCORE603E_UNIVERSE_CHIP_ID ){ DEBUG_puts ("Invalid SCORE603E_UNIVERSE_CHIP_ID: "); @@ -197,14 +197,14 @@ void initialize_universe() */ Write_pci_device_register( SCORE603E_IO_VME_UNIVERSE_BASE+0x4, 0x2800007 ); - /* + /* * Turn off the sysfail by setting SYSFAIL bit to 1 on the VCSR_CLR register */ - PCI_bus_write( &UNIVERSE->VCSR_CLR, 0x40000000 ); + PCI_bus_write( &UNIVERSE->VCSR_CLR, 0x40000000 ); /* * Set the VMEbus Master Control register with retry forever, 256 bytes - * posted write transfer count, VMEbus request level 3, RWD, PCI 32 bytes + * posted write transfer count, VMEbus request level 3, RWD, PCI 32 bytes * aligned burst size and PCI bus number to be zero */ PCI_bus_write( &UNIVERSE->MAST_CTL, 0x01C00000 ); @@ -213,17 +213,17 @@ void initialize_universe() * VMEbus DMA Transfer Control register with 32 bit VMEbus Maximum Data * width, A32 VMEbus Address Space, AM code to be data, none-privilleged, * single and BLT cycles on VME bus and 64-bit PCI Bus Transactions enable - PCI_bus_write( &UNIVERSE->DCTL, 0x00820180 ); + PCI_bus_write( &UNIVERSE->DCTL, 0x00820180 ); */ - + PCI_bus_write( &UNIVERSE->LSI0_CTL, 0x80700040 ); PCI_bus_write( &UNIVERSE->LSI0_BS, 0x04000000 ); PCI_bus_write( &UNIVERSE->LSI0_BD, 0x05000000 ); PCI_bus_write( &UNIVERSE->LSI0_TO, 0x7C000000 ); - /* + /* * Remove the Universe from VMEbus BI-Mode (bus-isolation). Once out of - * BI-Mode VMEbus accesses can be made. + * BI-Mode VMEbus accesses can be made. */ universe_temp_value = PCI_bus_read( &UNIVERSE->MISC_CTL ); @@ -232,7 +232,7 @@ void initialize_universe() PCI_bus_write( &UNIVERSE->MISC_CTL,(universe_temp_value | ~0xFF0FFFFF)); #elif (SCORE603E_USE_DINK) - /* + /* * Do not modify the DINK setup of the universe chip. */ @@ -249,22 +249,22 @@ void initialize_universe() * Slave Image 0 registers. */ void set_vme_base_address ( - uint32_t base_address + uint32_t base_address ) -{ +{ volatile uint32_t temp; /* * Calculate the current size of the Slave VME image 0 */ - temp = ( PCI_bus_read( &UNIVERSE->VSI0_BD) & 0xFFFFF000) - + temp = ( PCI_bus_read( &UNIVERSE->VSI0_BD) & 0xFFFFF000) - ( PCI_bus_read( &UNIVERSE->VSI0_BS) & 0xFFFFF000); /* - * Set the VMEbus Slave Image 0 Base Address to be + * Set the VMEbus Slave Image 0 Base Address to be * the specifed base address on VSI0_BS register. */ - PCI_bus_write( &UNIVERSE->VSI0_BS, (base_address & 0xFFFFF000) ); + PCI_bus_write( &UNIVERSE->VSI0_BS, (base_address & 0xFFFFF000) ); /* * Update the VMEbus Slave Image 0 Bound Address. @@ -282,7 +282,7 @@ void set_vme_base_address ( * Gets the VME base address */ uint32_t get_vme_base_address () -{ +{ volatile uint32_t temp; temp = PCI_bus_read( &UNIVERSE->VSI0_BS ); @@ -304,15 +304,15 @@ uint32_t get_vme_slave_size() * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF) */ void set_vme_slave_size (uint32_t size) -{ +{ volatile uint32_t temp; - if (size<0) + if (size<0) size = 0; - - if (size > 0x17FFFFF) + + if (size > 0x17FFFFF) size = 0x17FFFFF; - + /* * Read the VME slave image base address */ diff --git a/c/src/lib/libbsp/powerpc/score603e/clock/clock.c b/c/src/lib/libbsp/powerpc/score603e/clock/clock.c index ce299f3ba1..7d768acea7 100644 --- a/c/src/lib/libbsp/powerpc/score603e/clock/clock.c +++ b/c/src/lib/libbsp/powerpc/score603e/clock/clock.c @@ -43,11 +43,11 @@ uint32_t Clock_Decrementer_value; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -139,11 +139,11 @@ void Install_clock( void Clock_exit( void ) { - /* nothing to do */; + /* nothing to do */; /* do not restore old vector */ } - + /* * Clock_initialize * @@ -170,17 +170,17 @@ rtems_device_driver Clock_initialize( (BSP_Configuration.microseconds_per_tick / 1000); Install_clock( (rtems_isr_entry) Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /* * Clock_control * @@ -205,15 +205,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr( CLOCK_VECTOR, pargp ); @@ -224,7 +224,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c index ed5592e6b1..0bad370f35 100644 --- a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c +++ b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c @@ -1,5 +1,5 @@ /* - * This file contains the console driver chip level routines for the + * This file contains the console driver chip level routines for the * z85c30 chip. * * Currently only polled mode is supported. @@ -11,7 +11,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <rtems.h> @@ -42,19 +42,19 @@ typedef struct { } char_size_info; static const char_size_info Char_size_85c30[] = { - { Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF }, - { Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F }, - { Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F }, + { Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF }, + { Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F }, + { Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F }, { Z8530_READ_CHARACTER_BITS_5, Z8530_WRITE_CHARACTER_BITS_5, 0x1F } }; -static const unsigned char Clock_speed_85c30[] = { +static const unsigned char Clock_speed_85c30[] = { Z8530_x1_CLOCK, Z8530_x16_CLOCK, Z8530_x32_CLOCK, Z8530_x64_CLOCK }; -static const unsigned char Stop_bit_85c30[] = { +static const unsigned char Stop_bit_85c30[] = { Z8530_STOP_BITS_1, Z8530_STOP_BITS_1_AND_A_HALF, Z8530_STOP_BITS_2 }; -static const unsigned char Parity_85c30[] = { +static const unsigned char Parity_85c30[] = { Z8530_PARITY_NONE, Z8530_PARITY_ODD, Z8530_PARITY_EVEN }; @@ -64,19 +64,19 @@ static const unsigned char Parity_85c30[] = { * * Read a Z85c30 register */ -static unsigned char Read_85c30_register( +static unsigned char Read_85c30_register( volatile unsigned char *csr, /* IN */ unsigned char register_number /* IN */ ) { unsigned char Data; - - *csr = register_number; + + *csr = register_number; rtems_bsp_delay_in_bus_cycles( 40 ); Data = *csr; - + rtems_bsp_delay_in_bus_cycles( 40 ); return Data; @@ -118,7 +118,7 @@ void Reset_85c30_chip( Write_85c30_register( ctrl_0, 0x09, 0x80 ); Write_85c30_register( ctrl_1, 0x09, 0x40 ); } - + /* PAGE * @@ -138,7 +138,7 @@ void initialize_85c30_port( Setup = Port->Protocol; ctrl = Port->ctrl; - baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency, + baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency, Port->Chip->clock_x, Setup->baud_rate ); /* @@ -244,13 +244,13 @@ void initialize_85c30_port( value = 0x8a; value = value | Char_size_85c30[ Setup->write_char_bits ].write_setup; Write_85c30_register( ctrl, 0x05, value ); - + /* * Reset Tx UNDERRUN/EOM LATCH and ERROR - * via register 0 + * via register 0 */ Write_85c30_register( ctrl, 0x00, 0xf0 ); - + #if CONSOLE_USE_INTERRUPTS /* * Set Write Register 1 to interrupt on Rx characters or special condition. @@ -311,7 +311,7 @@ void outbyte_polled_85c30( { unsigned char z8530_status; uint32_t isrlevel; - + rtems_interrupt_disable( isrlevel ); /* @@ -324,7 +324,7 @@ void outbyte_polled_85c30( /* * Write the character. */ - Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch ); + Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch ); rtems_interrupt_enable( isrlevel ); } @@ -336,7 +336,7 @@ void outbyte_polled_85c30( * This routine polls for a character. */ -int inbyte_nonblocking_85c30( +int inbyte_nonblocking_85c30( const Port_85C30_info *Port ) { @@ -352,7 +352,7 @@ int inbyte_nonblocking_85c30( z8530_status = Read_85c30_register( csr, STATUS_REGISTER ); if ( !Z8530_Status_Is_RX_character_available( z8530_status ) ) return -1; - + /* * Return the character read. */ @@ -396,7 +396,7 @@ rtems_isr ISR_85c30_Async( if ( Z8530_Status_Is_RX_character_available( status ) ) { data = Read_85c30_register( Port->ctrl, DATA_REGISTER ); data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value; - + rtems_termios_enqueue_raw_characters( Port->Protocol->console_termios_data, &data, 1 ); did_something = TRUE; diff --git a/c/src/lib/libbsp/powerpc/score603e/console/85c30.h b/c/src/lib/libbsp/powerpc/score603e/console/85c30.h index 4a1e482a06..121d641994 100644 --- a/c/src/lib/libbsp/powerpc/score603e/console/85c30.h +++ b/c/src/lib/libbsp/powerpc/score603e/console/85c30.h @@ -1,6 +1,6 @@ /* 85c30.h * - * This include file contains z85c30 chip information. + * This include file contains z85c30 chip information. * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). @@ -9,7 +9,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __85c30_H @@ -18,7 +18,7 @@ /* * Clock Speed Definations */ - + #define Z8530_x1_CLOCK 0x00 #define Z8530_x16_CLOCK 0x40 #define Z8530_x32_CLOCK 0x80 diff --git a/c/src/lib/libbsp/powerpc/score603e/console/console.c b/c/src/lib/libbsp/powerpc/score603e/console/console.c index 5391eeca47..78cf33c9e0 100644 --- a/c/src/lib/libbsp/powerpc/score603e/console/console.c +++ b/c/src/lib/libbsp/powerpc/score603e/console/console.c @@ -24,8 +24,8 @@ #if (1) /* - * The Port Used for the Console interface is based upon which - * debugger is being used. The SDS debugger uses a binary + * The Port Used for the Console interface is based upon which + * debugger is being used. The SDS debugger uses a binary * interface on port 0 as part of the debugger. Thus port 0 can * not be used as the console port for the SDS debugger. */ @@ -58,7 +58,7 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF; * * Console Device Driver Entry Points */ - + /* PAGE * * DEBUG_puts @@ -89,7 +89,7 @@ void DEBUG_puts( /* should disable interrupts here */ - for ( s = string ; *s ; s++ ) + for ( s = string ; *s ; s++ ) outbyte_polled_85c30( csr, *s ); outbyte_polled_85c30( csr, '\r' ); @@ -100,28 +100,28 @@ void DEBUG_puts( /* PAGE * - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * Console Termios polling input entry point. */ -int console_inbyte_nonblocking( - int minor +int console_inbyte_nonblocking( + int minor ) { int port = minor; - /* - * verify port Number + /* + * verify port Number */ assert ( port < NUM_Z85C30_PORTS ); - + /* * return a character from the 85c30 port. */ return inbyte_nonblocking_85c30( &Ports_85C30[ port ] ); } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -130,7 +130,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -139,7 +139,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -148,7 +148,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, @@ -171,7 +171,7 @@ rtems_isr console_isr( ) { int i; - + for (i=0; i < NUM_Z85C30_PORTS; i++){ ISR_85c30_Async( &Ports_85C30[i] ); @@ -180,7 +180,7 @@ rtems_isr console_isr( ISR_85c30_Async( &Ports_85C30[i] ); } #endif - } + } } void console_exit() @@ -190,12 +190,12 @@ void console_exit() uint32_t ch; for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) { - + buffer = &( Ports_85C30[i].Protocol->TX_Buffer); while ( !Ring_buffer_Is_empty( buffer ) ) { Ring_buffer_Remove_character( buffer, ch ); - outbyte_polled_85c30( Ports_85C30[i].ctrl, ch ); + outbyte_polled_85c30( Ports_85C30[i].ctrl, ch ); } } } @@ -205,7 +205,7 @@ void console_initialize_interrupts( void ) volatile Ring_buffer_t *buffer; Console_Protocol *protocol; int i; - + for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) { protocol = Ports_85C30[i].Protocol; @@ -217,15 +217,15 @@ void console_initialize_interrupts( void ) protocol->Is_TX_active = FALSE; } - /* + /* * Connect each vector to the interupt service routine. */ for (i=0; i < NUM_Z85C30_CHIPS; i++) set_vector( console_isr, Chips_85C30[i].vector, 1 ); - + atexit( console_exit ); - + } void console_outbyte_interrupts( const Port_85C30_info *Port, @@ -282,7 +282,7 @@ rtems_device_driver console_initialize( * Force to perform a hardware reset w/o * Master interrupt enable via register 9 */ - + for (port=0; port<NUM_Z85C30_PORTS; port++){ p0 = port; port++; @@ -290,7 +290,7 @@ rtems_device_driver console_initialize( Reset_85c30_chip( Ports_85C30[p0].ctrl, Ports_85C30[p1].ctrl ); } #else - /* TEMP - To see if this makes a diff with the new ports. + /* TEMP - To see if this makes a diff with the new ports. * Never reset chip 1 when using the chip as a monitor */ for (port=2; port<NUM_Z85C30_PORTS; port++){ @@ -301,7 +301,7 @@ rtems_device_driver console_initialize( } #endif - /* + /* * Initialize each port. * Note: the ports are numbered such that 0,1 are on the first chip * 2,3 are on the second .... @@ -327,16 +327,16 @@ rtems_device_driver console_initialize( * */ int console_write_support( - int minor, - const char *buf, + int minor, + const char *buf, int len) { int nwrite = 0; volatile uint8_t *csr; int port = minor; - /* - * verify port Number + /* + * verify port Number */ assert ( port < NUM_Z85C30_PORTS ); @@ -453,7 +453,7 @@ void console_outbyte_interrupts( uint32_t isrlevel; protocol = Port->Protocol; - + /* * If this is the first character then we need to prime the pump */ @@ -469,7 +469,7 @@ void console_outbyte_interrupts( } while ( Ring_buffer_Is_full( &protocol->TX_Buffer ) ); - + Ring_buffer_Add_character( &protocol->TX_Buffer, ch ); } diff --git a/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h b/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h index 65a7100676..7e20003b41 100644 --- a/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h +++ b/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h @@ -9,7 +9,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __CONSOLEBSP_H @@ -25,12 +25,12 @@ extern "C" { /* * - * Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1 - * being on the first chip, and ports 2 and 3 being on the + * Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1 + * being on the first chip, and ports 2 and 3 being on the * second chip... */ - + /* * Z85c30 configuration informaiton. */ @@ -60,7 +60,7 @@ typedef enum { typedef enum { CONSOLE_PARITY_NONE, CONSOLE_PARITY_ODD, - CONSOLE_PARITY_EVEN, + CONSOLE_PARITY_EVEN, } CONSOLE_Parity; typedef enum { @@ -72,7 +72,7 @@ typedef enum { typedef struct { uint32_t baud_rate; /* baud rate value */ - CONSOLE_Stop_bits stop_bits; + CONSOLE_Stop_bits stop_bits; CONSOLE_Parity parity; CONSOLE_Character_bits read_char_bits; CONSOLE_Character_bits write_char_bits; @@ -83,7 +83,7 @@ typedef struct { void *console_termios_data; #endif -} Console_Protocol; +} Console_Protocol; /* @@ -112,7 +112,7 @@ typedef struct { } Port_85C30_info; /* - * Console port chip configuration tables. + * Console port chip configuration tables. */ extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ]; extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ]; @@ -130,7 +130,7 @@ void outbyte_polled_85c30( char ch ); -int inbyte_nonblocking_85c30( +int inbyte_nonblocking_85c30( const Port_85C30_info *Port ); diff --git a/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c b/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c index a7b5e8dfea..2212260e0c 100644 --- a/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c +++ b/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c @@ -1,5 +1,5 @@ /* - * This file contains the table for the z85c30 port + * This file contains the table for the z85c30 port * used by the console driver. * * COPYRIGHT (c) 1989-1997. @@ -9,7 +9,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include "consolebsp.h" @@ -17,9 +17,9 @@ #define CONSOLE_DEFAULT_BAUD_RATE 9600 #define CONSOLE_DEFAULT_BAUD_CONSTANT Score603e_Z8530_Chip0_Baud(9600) - -#define CONSOLE_DEFAULT_STOP_BITS CONSOLE_STOP_BITS_1 -#define CONSOLE_DEFAULT_PARITY CONSOLE_PARITY_NONE + +#define CONSOLE_DEFAULT_STOP_BITS CONSOLE_STOP_BITS_1 +#define CONSOLE_DEFAULT_PARITY CONSOLE_PARITY_NONE #define CONSOLE_DEFAULT_READ_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8 #define CONSOLE_DEFAULT_WRITE_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8 #define CONSOLE_DEFAULT_CONSOLE_CLOCK CONSOLE_x16_CLOCK @@ -34,7 +34,7 @@ /* * Tables of information necessary to use the console 85c30 routines. */ -Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] = +Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] = { DEFAULT_PROTOCOL, DEFAULT_PROTOCOL, @@ -64,8 +64,8 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] = SCORE603E_85C30_0_CLOCK, SCORE603E_85C30_0_CLOCK_X, CONSOLE_DEFAULT_CONSOLE_CLOCK - }, - { + }, + { SCORE603E_85C30_1_IRQ, SCORE603E_85C30_1_CLOCK, SCORE603E_85C30_1_CLOCK_X, @@ -73,25 +73,25 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] = }, #if (HAS_PMC_PSC8) - { + { SCORE603E_85C30_2_IRQ, SCORE603E_85C30_2_CLOCK, SCORE603E_85C30_2_CLOCK_X, CONSOLE_DEFAULT_CONSOLE_CLOCK }, - { + { SCORE603E_85C30_3_IRQ, SCORE603E_85C30_3_CLOCK, SCORE603E_85C30_3_CLOCK_X, CONSOLE_DEFAULT_CONSOLE_CLOCK }, - { + { SCORE603E_85C30_4_IRQ, SCORE603E_85C30_4_CLOCK, SCORE603E_85C30_4_CLOCK_X, CONSOLE_DEFAULT_CONSOLE_CLOCK }, - { + { SCORE603E_85C30_5_IRQ, SCORE603E_85C30_5_CLOCK, SCORE603E_85C30_5_CLOCK_X, @@ -106,91 +106,91 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] = * See consolebsp.h for the Port_85C30_info structure defination. */ const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ] = { - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_0, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_0, (volatile unsigned char *) SCORE603E_85C30_DATA_0, 0x00, &Protocols_85c30[0], - &Chips_85C30[0], + &Chips_85C30[0], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_1, - (volatile unsigned char *) SCORE603E_85C30_DATA_1, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_1, + (volatile unsigned char *) SCORE603E_85C30_DATA_1, 0x01, &Protocols_85c30[1], - &Chips_85C30[0], + &Chips_85C30[0], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_2, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_2, (volatile unsigned char *) SCORE603E_85C30_DATA_2, 0x02, &Protocols_85c30[2], - &Chips_85C30[1], + &Chips_85C30[1], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_3, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_3, (volatile unsigned char *) SCORE603E_85C30_DATA_3, 0x03, &Protocols_85c30[3], - &Chips_85C30[1], + &Chips_85C30[1], }, #if (HAS_PMC_PSC8) - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_4, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_4, (volatile unsigned char *) SCORE603E_85C30_DATA_4, 0x04, &Protocols_85c30[4], - &Chips_85C30[2], + &Chips_85C30[2], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_5, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_5, (volatile unsigned char *) SCORE603E_85C30_DATA_5, 0x05, &Protocols_85c30[5], - &Chips_85C30[2], + &Chips_85C30[2], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_6, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_6, (volatile unsigned char *) SCORE603E_85C30_DATA_6, 0x06, &Protocols_85c30[6], - &Chips_85C30[3], + &Chips_85C30[3], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_7, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_7, (volatile unsigned char *) SCORE603E_85C30_DATA_7, 0x07, &Protocols_85c30[7], - &Chips_85C30[3], + &Chips_85C30[3], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_8, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_8, (volatile unsigned char *) SCORE603E_85C30_DATA_8, 0x08, &Protocols_85c30[8], - &Chips_85C30[4], + &Chips_85C30[4], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_9, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_9, (volatile unsigned char *) SCORE603E_85C30_DATA_9, 0x09, &Protocols_85c30[9], - &Chips_85C30[4], + &Chips_85C30[4], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_10, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_10, (volatile unsigned char *) SCORE603E_85C30_DATA_10, 0x0a, &Protocols_85c30[10], - &Chips_85C30[5], + &Chips_85C30[5], }, - { - (volatile unsigned char *) SCORE603E_85C30_CTRL_11, + { + (volatile unsigned char *) SCORE603E_85C30_CTRL_11, (volatile unsigned char *) SCORE603E_85C30_DATA_11, 0x0b, &Protocols_85c30[11], - &Chips_85C30[5], + &Chips_85C30[5], }, #endif }; diff --git a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h index 51930235db..12ba21e3c7 100644 --- a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @@ -33,7 +33,7 @@ extern "C" { #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4) #endif #define CONFIGURE_INTERRUPT_STACK_MEMORY (12 * 1024) - + #ifdef ASM /* Definition of where to store registers in alignment handler */ #define ALIGN_REGS 0x0140 @@ -61,11 +61,11 @@ extern "C" { #define Score603e_Z8530_Chip1_Baud( _value ) \ _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \ - SCORE603E_85C30_1_CLOCK_X, _value ) + SCORE603E_85C30_1_CLOCK_X, _value ) #define Score603e_Z8530_Chip0_Baud( _value ) \ _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \ - SCORE603E_85C30_0_CLOCK_X, _value ) + SCORE603E_85C30_0_CLOCK_X, _value ) #define Initialize_Board_ctrl_register() \ *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG | \ @@ -119,15 +119,15 @@ extern "C" { /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* * Information placed in the linkcmds file. @@ -149,7 +149,7 @@ extern int end; /* last address in the program */ /* * How many libio files we want */ - + #define BSP_LIBIO_MAX_FDS 20 /* functions */ @@ -169,13 +169,13 @@ rtems_isr_entry set_vector( /* returns old vector */ */ rtems_isr bsp_stub_handler( rtems_vector_number trap -); +); rtems_isr bsp_spurious_handler( rtems_vector_number trap ); void bsp_spurious_initialize(); -/* +/* * genvec.c */ rtems_isr_entry set_EE_vector( @@ -217,7 +217,7 @@ void set_irq_mask( uint16_t get_irq_mask(); -void unmask_irq( +void unmask_irq( uint16_t irq_idx ); diff --git a/c/src/lib/libbsp/powerpc/score603e/include/coverhd.h b/c/src/lib/libbsp/powerpc/score603e/include/coverhd.h index 17d70815dc..90a1847ce4 100644 --- a/c/src/lib/libbsp/powerpc/score603e/include/coverhd.h +++ b/c/src/lib/libbsp/powerpc/score603e/include/coverhd.h @@ -82,8 +82,8 @@ extern "C" { #define CALLING_OVERHEAD_SEMAPHORE_CREATE 0 #define CALLING_OVERHEAD_SEMAPHORE_IDENT 0 #define CALLING_OVERHEAD_SEMAPHORE_DELETE 0 -#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 -#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 #define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0 #define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0 #define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0 @@ -109,8 +109,8 @@ extern "C" { #define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0 #define CALLING_OVERHEAD_PORT_CREATE 0 #define CALLING_OVERHEAD_PORT_IDENT 0 -#define CALLING_OVERHEAD_PORT_DELETE 0 -#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 +#define CALLING_OVERHEAD_PORT_DELETE 0 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 #define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0 #define CALLING_OVERHEAD_IO_INITIALIZE 0 diff --git a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h index 2be08e07e4..64d9c10ba5 100644 --- a/c/src/lib/libbsp/powerpc/score603e/include/gen2.h +++ b/c/src/lib/libbsp/powerpc/score603e/include/gen2.h @@ -9,7 +9,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __SCORE_GENERATION_2_h @@ -24,11 +24,11 @@ extern "C" { /* * ISA/PCI I/O space. */ -#define SCORE603E_VME_JUMPER_ADDR 0x00e20000 +#define SCORE603E_VME_JUMPER_ADDR 0x00e20000 #define SCORE603E_FLASH_BASE_ADDR 0x04000000 #define SCORE603E_ISA_PCI_IO_BASE 0x80000000 -#define SCORE603E_TIMER_PORT_C 0xfd000000 -#define SCORE603E_TIMER_INT_ACK 0xfd000000 +#define SCORE603E_TIMER_PORT_C 0xfd000000 +#define SCORE603E_TIMER_INT_ACK 0xfd000000 #define SCORE603E_TIMER_PORT_B 0xfd000008 #define SCORE603E_TIMER_PORT_A 0xfd000004 @@ -45,7 +45,7 @@ extern "C" { #define SCORE603E_85C30_DATA_3 ((volatile uint8_t*)0xfe20000c) /* - * PSC8 - PMC Card + * PSC8 - PMC Card */ #define SCORE603E_PCI_CONFIGURATION_BASE 0x80800000 #define SCORE603E_PMC_BASE SCORE603E_PCI_CONFIGURATION_BASE @@ -55,7 +55,7 @@ extern "C" { #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \ ((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset )) - + #define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \ ((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset)) @@ -63,29 +63,29 @@ extern "C" { /* * PMC serial channels - (4-7: 232 and 8-11: 422) */ -#define SCORE603E_85C30_CTRL_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200020) -#define SCORE603E_85C30_DATA_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200024) -#define SCORE603E_85C30_CTRL_5 SCORE603E_PMC_SERIAL_ADDRESS(0x200028) -#define SCORE603E_85C30_DATA_5 SCORE603E_PMC_SERIAL_ADDRESS(0x20002c) -#define SCORE603E_85C30_CTRL_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200030) -#define SCORE603E_85C30_DATA_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200034) -#define SCORE603E_85C30_CTRL_7 SCORE603E_PMC_SERIAL_ADDRESS(0x200038) -#define SCORE603E_85C30_DATA_7 SCORE603E_PMC_SERIAL_ADDRESS(0x20003c) -#define SCORE603E_85C30_CTRL_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200000) -#define SCORE603E_85C30_DATA_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200004) -#define SCORE603E_85C30_CTRL_9 SCORE603E_PMC_SERIAL_ADDRESS(0x200008) -#define SCORE603E_85C30_DATA_9 SCORE603E_PMC_SERIAL_ADDRESS(0x20000c) -#define SCORE603E_85C30_CTRL_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200010) -#define SCORE603E_85C30_DATA_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200014) -#define SCORE603E_85C30_CTRL_11 SCORE603E_PMC_SERIAL_ADDRESS(0x200018) -#define SCORE603E_85C30_DATA_11 SCORE603E_PMC_SERIAL_ADDRESS(0x20001c) +#define SCORE603E_85C30_CTRL_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200020) +#define SCORE603E_85C30_DATA_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200024) +#define SCORE603E_85C30_CTRL_5 SCORE603E_PMC_SERIAL_ADDRESS(0x200028) +#define SCORE603E_85C30_DATA_5 SCORE603E_PMC_SERIAL_ADDRESS(0x20002c) +#define SCORE603E_85C30_CTRL_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200030) +#define SCORE603E_85C30_DATA_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200034) +#define SCORE603E_85C30_CTRL_7 SCORE603E_PMC_SERIAL_ADDRESS(0x200038) +#define SCORE603E_85C30_DATA_7 SCORE603E_PMC_SERIAL_ADDRESS(0x20003c) +#define SCORE603E_85C30_CTRL_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200000) +#define SCORE603E_85C30_DATA_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200004) +#define SCORE603E_85C30_CTRL_9 SCORE603E_PMC_SERIAL_ADDRESS(0x200008) +#define SCORE603E_85C30_DATA_9 SCORE603E_PMC_SERIAL_ADDRESS(0x20000c) +#define SCORE603E_85C30_CTRL_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200010) +#define SCORE603E_85C30_DATA_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200014) +#define SCORE603E_85C30_CTRL_11 SCORE603E_PMC_SERIAL_ADDRESS(0x200018) +#define SCORE603E_85C30_DATA_11 SCORE603E_PMC_SERIAL_ADDRESS(0x20001c) #define SCORE603E_PCI_IO_CFG_ADDR 0x80000cf8 #define SCORE603E_PCI_IO_CFG_DATA 0x80000cfc #define SCORE603E_UNIVERSE_BASE 0x80030000 #define SCORE603E_IO_VME_UNIVERSE_BASE 0x80007000 -#define SCORE603E_PCI_MEM_BASE 0xc0000000 +#define SCORE603E_PCI_MEM_BASE 0xc0000000 #define SCORE603E_NVRAM_BASE 0xfd100000 #define SCORE603E_RTC_ADDRESS ((volatile unsigned char *)0xfd180000) #define SCORE603E_JP1_JP2_PROM_BASE 0xfff00000 @@ -106,7 +106,7 @@ extern "C" { /* * Definations for the ICM 1770 RTC chip - */ + */ /* * These values are programed into a register and must not be changed. */ @@ -115,25 +115,25 @@ extern "C" { #define ICM1770_CRYSTAL_FREQ_2M 0x02 #define ICM1770_CRYSTAL_FREQ_4M 0x03 -#define SCORE_RTC_FREQUENCY ICM1770_CRYSTAL_FREQ_32K +#define SCORE_RTC_FREQUENCY ICM1770_CRYSTAL_FREQ_32K /* * Z85C30 Definations for the 423 interface. */ #define SCORE603E_85C30_0_CLOCK 14745600 /* 10,000,000 ?10->14.5 */ -#define SCORE603E_85C30_0_CLOCK_X 16 +#define SCORE603E_85C30_0_CLOCK_X 16 /* * Z85C30 Definations for the 422 interface. */ #define SCORE603E_85C30_1_CLOCK 16000000 /* 10,000,000 ?10->14.5 */ -#define SCORE603E_85C30_1_CLOCK_X 16 +#define SCORE603E_85C30_1_CLOCK_X 16 /* * Z85C30 Definations for the PMC serial chips */ #define SCORE603E_85C30_PMC_CLOCK 16000000 /* 10,000,000 ?10->14.5 */ -#define SCORE603E_85C30_PMC_CLOCK_X 16 +#define SCORE603E_85C30_PMC_CLOCK_X 16 #define SCORE603E_85C30_2_CLOCK SCORE603E_85C30_PMC_CLOCK #define SCORE603E_85C30_3_CLOCK SCORE603E_85C30_PMC_CLOCK @@ -156,7 +156,7 @@ extern "C" { #define SCORE603E_FPGA_IRQ_INPUT ((volatile uint16_t*)0xfd00004c) /* - * The PMC status word is at the PMC base address + * The PMC status word is at the PMC base address */ #define SCORE603E_PMC_STATUS_ADDRESS (SCORE603E_PMC_SERIAL_ADDRESS (0)) #define Is_PMC_85C30_4_IRQ( _status ) (_status & 0x80) /* SCC 422-1 */ @@ -167,17 +167,17 @@ extern "C" { #define SCORE603E_PMC_CONTROL_ADDRESS SCORE603E_PMC_SERIAL_ADDRESS(0x100000) #define SCORE603E_PMC_SCC_232_LOOPBACK (_word) (_word|0x20) -#define PMC_SET_232_LOOPBACK(_word) (_word | 0x02) -#define PMC_CLEAR_232_LOOPBACK(_word) (_word & 0xfd) -#define PMC_SET_422_LOOPBACK(_word) (_word | 0x01) -#define PMC_CLEAR_422_LOOPBACK(_word) (_word & 0xfe) - +#define PMC_SET_232_LOOPBACK(_word) (_word | 0x02) +#define PMC_CLEAR_232_LOOPBACK(_word) (_word & 0xfd) +#define PMC_SET_422_LOOPBACK(_word) (_word | 0x01) +#define PMC_CLEAR_422_LOOPBACK(_word) (_word & 0xfe) + /* * Score603e Interupt Definations. */ -/* +/* * First Score Unique IRQ */ #define Score_IRQ_First ( PPC_IRQ_LAST + 1 ) @@ -202,25 +202,25 @@ extern "C" { #define SCORE603E_IRQ14 ( Score_IRQ_First + 14 ) #define SCORE603E_IRQ15 ( Score_IRQ_First + 15 ) -#define SCORE603E_TIMER1_IRQ SCORE603E_IRQ00 -#define SCORE603E_TIMER2_IRQ SCORE603E_IRQ01 -#define SCORE603E_TIMER3_IRQ SCORE603E_IRQ02 -#define SCORE603E_85C30_1_IRQ SCORE603E_IRQ03 -#define SCORE603E_85C30_0_IRQ SCORE603E_IRQ04 -#define SCORE603E_RTC_IRQ SCORE603E_IRQ05 -#define SCORE603E_PCI_IRQ_0 SCORE603E_IRQ06 -#define SCORE603E_PCI_IRQ_1 SCORE603E_IRQ07 -#define SCORE603E_PCI_IRQ_2 SCORE603E_IRQ08 -#define SCORE603E_PCI_IRQ_3 SCORE603E_IRQ09 -#define SCORE603E_UNIVERSE_IRQ SCORE603E_IRQ10 -#define SCORE603E_1553_IRQ SCORE603E_IRQ11 -#define SCORE603E_MAIL_BOX_IRQ_0 SCORE603E_IRQ12 -#define SCORE603E_MAIL_BOX_IRQ_1 SCORE603E_IRQ13 -#define SCORE603E_MAIL_BOX_IRQ_2 SCORE603E_IRQ14 -#define SCORE603E_MAIL_BOX_IRQ_3 SCORE603E_IRQ15 - -/* - * The Score FPGA maps all interrupts comming from the PMC card to +#define SCORE603E_TIMER1_IRQ SCORE603E_IRQ00 +#define SCORE603E_TIMER2_IRQ SCORE603E_IRQ01 +#define SCORE603E_TIMER3_IRQ SCORE603E_IRQ02 +#define SCORE603E_85C30_1_IRQ SCORE603E_IRQ03 +#define SCORE603E_85C30_0_IRQ SCORE603E_IRQ04 +#define SCORE603E_RTC_IRQ SCORE603E_IRQ05 +#define SCORE603E_PCI_IRQ_0 SCORE603E_IRQ06 +#define SCORE603E_PCI_IRQ_1 SCORE603E_IRQ07 +#define SCORE603E_PCI_IRQ_2 SCORE603E_IRQ08 +#define SCORE603E_PCI_IRQ_3 SCORE603E_IRQ09 +#define SCORE603E_UNIVERSE_IRQ SCORE603E_IRQ10 +#define SCORE603E_1553_IRQ SCORE603E_IRQ11 +#define SCORE603E_MAIL_BOX_IRQ_0 SCORE603E_IRQ12 +#define SCORE603E_MAIL_BOX_IRQ_1 SCORE603E_IRQ13 +#define SCORE603E_MAIL_BOX_IRQ_2 SCORE603E_IRQ14 +#define SCORE603E_MAIL_BOX_IRQ_3 SCORE603E_IRQ15 + +/* + * The Score FPGA maps all interrupts comming from the PMC card to * the FPGA interrupt SCORE603E_PCI_IRQ_0 the PMC status word must be * read to indicate which interrupt was chained to the FPGA. */ @@ -239,7 +239,7 @@ extern "C" { #define MAX_BOARD_IRQS SCORE603E_IRQ19 - + /* * BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID for the shared timer * driver. @@ -250,7 +250,7 @@ extern "C" { #define BSP_TIMER_LEAST_VALID 1 /* Don't trust a value lower than this */ /* - * Convert decrement value to tenths of microsecnds (used by + * Convert decrement value to tenths of microsecnds (used by * shared timer driver). * * + CPU has a 66.67 Mhz bus, diff --git a/c/src/lib/libbsp/powerpc/score603e/start/start.S b/c/src/lib/libbsp/powerpc/score603e/start/start.S index 24b511282f..ae5fac1808 100644 --- a/c/src/lib/libbsp/powerpc/score603e/start/start.S +++ b/c/src/lib/libbsp/powerpc/score603e/start/start.S @@ -66,7 +66,7 @@ past_constants: mr r4,r5 ori r4,r4,0x0000 /* 0x2030 */ mtmsr r4 - + /* The first generation board needed initialization here but the */ /* second does not. */ diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c b/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c index 59d7168b42..e1b0091355 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c @@ -7,7 +7,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <bsp.h> @@ -63,7 +63,7 @@ uint16_t get_irq_mask() return value; } -void unmask_irq( +void unmask_irq( uint16_t irq_idx ) { @@ -85,7 +85,7 @@ void unmask_irq( } #endif - value &= (~(0x1 << mask_idx)); + value &= (~(0x1 << mask_idx)); set_irq_mask( value ); } @@ -111,7 +111,7 @@ void init_irq_data_register() uint16_t read_and_clear_PMC_irq( uint16_t irq -) +) { uint16_t status_word = irq; @@ -155,7 +155,7 @@ uint16_t read_and_clear_irq() irq = (*SCORE603E_FPGA_VECT_DATA); if ((irq & 0xffff0) != 0x10) { - DEBUG_puts( "ERROR:: no irq data\n"); + DEBUG_puts( "ERROR:: no irq data\n"); return (irq | 0x80); } diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c index e5d1fcce1b..3f016c3612 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c @@ -1,6 +1,6 @@ /* Hwr_init.c * - * $Id: + * $Id: */ #include <bsp.h> @@ -75,22 +75,22 @@ typedef struct { void init_RTC() { volatile Harris_RTC *the_RTC; - + the_RTC = (volatile Harris_RTC *)SCORE603E_RTC_ADDRESS; the_RTC->command_register = 0x0; } void init_PCI() -{ +{ #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) uint32_t value; /* - * NOTE: Accessing any memory location not mapped by the BAT - * registers will cause a TLB miss exception. - * Set the DBAT1 to be configured for 256M of PCI MEM - * at 0xC0000000 with Write-through and Guarded Attributed and + * NOTE: Accessing any memory location not mapped by the BAT + * registers will cause a TLB miss exception. + * Set the DBAT1 to be configured for 256M of PCI MEM + * at 0xC0000000 with Write-through and Guarded Attributed and * read/write access allowed */ @@ -118,10 +118,10 @@ void init_PCI() #if (0) /* - * NOTE: Accessing any memory location not mapped by the BAT - * registers will cause a TLB miss exception. - * Set the DBAT3 to be configured for 256M of PCI MEM - * at 0xC0000000 with Write-through and Guarded Attributed and + * NOTE: Accessing any memory location not mapped by the BAT + * registers will cause a TLB miss exception. + * Set the DBAT3 to be configured for 256M of PCI MEM + * at 0xC0000000 with Write-through and Guarded Attributed and * read/write access allowed */ @@ -192,7 +192,7 @@ void data_cache_enable () uint32_t value; /* - * enable data cache + * enable data cache */ PPC_Get_HID0( value ); diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c index 11603b0c95..b3b2c22607 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @@ -12,7 +12,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <string.h> @@ -25,7 +25,7 @@ * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; rtems_cpu_table Cpu_table; @@ -71,7 +71,7 @@ void bsp_pretasking_hook(void) * bsp_predriver_hook * * Before drivers are setup initialize interupt vectors. - */ + */ void init_RTC(); void initialize_PMC(); @@ -88,13 +88,13 @@ void bsp_predriver_hook(void) initialize_PMC(); #endif - /* + /* * Initialize Bsp General purpose vector table. */ initialize_external_exception_vector(); #if (0) - /* + /* * XXX - Modify this to write a 48000000 (loop to self) command * to each interrupt location. This is better for debug. */ @@ -167,7 +167,7 @@ void initialize_PMC() { * * Standard post driver hook plus some BSP specific stuff. */ - + void SCORE603e_bsp_postdriver_hook(void) { extern void Init_EE_mask_init(void); @@ -205,27 +205,27 @@ void bsp_start( void ) ); /* - * There are multiple ROM monitors available for this board. + * There are multiple ROM monitors available for this board. */ #if (SCORE603E_USE_SDS) - /* + /* * Write instruction for Unconditional Branch to ROM vector. */ - - Code = 0x4bf00002; - for (Address = 0x100; Address <= 0xe00; Address += 0x100) { + + Code = 0x4bf00002; + for (Address = 0x100; Address <= 0xe00; Address += 0x100) { A_Vector = (uint32_t*)Address; Code = 0x4bf00002 + Address; *A_Vector = Code; } - - for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { + + for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { A_Vector = (uint32_t*)Address; Code = 0x4bf00002 + Address; *A_Vector = Code; } - + Cpu_table.exceptions_in_RAM = TRUE; msr_value = 0x2030; @@ -263,7 +263,7 @@ void bsp_start( void ) * not malloc'ed. It is just "pulled from the air". */ - work_space_start = + work_space_start = (unsigned char *)&RAM_END - BSP_Configuration.work_space_size; if ( work_space_start <= (unsigned char *)&end ) { @@ -287,7 +287,7 @@ void bsp_start( void ) Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE); #if ( PPC_USE_DATA_CACHE ) - instruction_cache_enable (); + instruction_cache_enable (); data_cache_enable (); #endif } diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c b/c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c index a97444c865..b1e59ed579 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c @@ -20,8 +20,8 @@ #include <stdio.h> /* for sprintf */ -/* - * Proto types for this file +/* + * Proto types for this file */ rtems_isr external_exception_ISR ( @@ -31,8 +31,8 @@ rtems_isr external_exception_ISR ( #define NUM_LIRQ_HANDLERS 20 #define NUM_LIRQ ( MAX_BOARD_IRQS - PPC_IRQ_LAST ) -/* - * Structure to for one of possible multiple interrupt handlers for +/* + * Structure to for one of possible multiple interrupt handlers for * a given interrupt. */ typedef struct @@ -47,7 +47,7 @@ typedef struct * handlers at a later time. */ EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; - uint16_t Nodes_Used; + uint16_t Nodes_Used; Chain_Control ISR_Array [NUM_LIRQ]; /* XXX */ @@ -67,14 +67,14 @@ void initialize_external_exception_vector () for (i=0; i <NUM_LIRQ; i++) Chain_Initialize_empty( &ISR_Array[i] ); - + init_irq_data_register(); - - /* - * Install external_exception_ISR () as the handler for + + /* + * Install external_exception_ISR () as the handler for * the General Purpose Interrupt. */ - status = rtems_interrupt_catch( external_exception_ISR, + status = rtems_interrupt_catch( external_exception_ISR, PPC_IRQ_EXTERNAL, (rtems_isr_entry *) &previous_isr ); } @@ -83,7 +83,7 @@ void Init_EE_mask_init() { } /* - * This routine installs one of multiple ISRs for the general purpose + * This routine installs one of multiple ISRs for the general purpose * inerrupt. */ rtems_isr_entry set_EE_vector( @@ -93,9 +93,9 @@ rtems_isr_entry set_EE_vector( { uint16_t vec_idx = vector - Score_IRQ_First; uint32_t index; - + assert (Nodes_Used < NUM_LIRQ_HANDLERS); - + /* * If we have already installed this handler for this vector, then * just reset it. @@ -110,15 +110,15 @@ rtems_isr_entry set_EE_vector( /* * Doing things in this order makes them more atomic */ - - Nodes_Used++; + + Nodes_Used++; index = Nodes_Used - 1; ISR_Nodes[index].handler = handler; ISR_Nodes[index].vector = vector; - /* printf( "Vector Index: %04x, Vector: %d (%x)\n", + /* printf( "Vector Index: %04x, Vector: %d (%x)\n", vec_idx, vector, vector); */ Chain_Append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node ); @@ -131,13 +131,13 @@ rtems_isr_entry set_EE_vector( return NULL; } -/* +/* * This interrupt service routine is called for an External Exception. */ rtems_isr external_exception_ISR ( rtems_vector_number vector /* IN */ ) -{ +{ uint16_t index; EE_ISR_Type *node; uint16_t value; @@ -167,7 +167,7 @@ rtems_isr external_exception_ISR ( node = (EE_ISR_Type *)(ISR_Array[ index ].first); if ( _Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { - sprintf(err_msg,"ERROR:: check %d interrupt %02d has no isr\n", + sprintf(err_msg,"ERROR:: check %d interrupt %02d has no isr\n", check_irq, index); DEBUG_puts( err_msg); value = get_irq_mask(); @@ -183,7 +183,7 @@ rtems_isr external_exception_ISR ( } else #endif - { + { node = (EE_ISR_Type *)(ISR_Array[ index ].first); if ( _Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { sprintf(err_msg,"ERROR:: interrupt %02x has no isr\n", index); diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/setvec.c b/c/src/lib/libbsp/powerpc/score603e/startup/setvec.c index 24bb18922e..b10521f05e 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/setvec.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/setvec.c @@ -36,7 +36,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <rtems.h> @@ -44,8 +44,8 @@ /* - * This routine installs vector number vector. - * + * This routine installs vector number vector. + * */ rtems_isr_entry set_vector( /* returns old vector */ rtems_isr_entry handler, /* isr routine */ @@ -57,7 +57,7 @@ rtems_isr_entry set_vector( /* returns old vector */ rtems_status_code status; - /* + /* * vectors greater than PPC603e_IRQ_LAST are handled by the General purpose * interupt handler. */ diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/spurious.c b/c/src/lib/libbsp/powerpc/score603e/startup/spurious.c index a3b87f600b..59d5ba2949 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/spurious.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/spurious.c @@ -1,11 +1,11 @@ /* * Score603e Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * - * Developed as part of the port of RTEMS to the ERC32 implementation - * of the SPARC by On-Line Applications Research Corporation (OAR) + * Developed as part of the port of RTEMS to the ERC32 implementation + * of the SPARC by On-Line Applications Research Corporation (OAR) * under contract to the European Space Agency (ESA). * * COPYRIGHT (c) 1995. European Space Agency. @@ -82,9 +82,9 @@ rtems_isr bsp_spurious_handler( break; #if defined(ppc403) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_CRIT : - DEBUG_puts( "\nTrap: Critical Error "); + DEBUG_puts( "\nTrap: Critical Error "); break; case PPC_IRQ_PIT: DEBUG_puts( "\nTrap: 0x01000" ); @@ -100,13 +100,13 @@ rtems_isr bsp_spurious_handler( break; #elif defined(ppc601) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_TRACE : DEBUG_puts( "\nTrap: 0x02000" ); break; #elif defined(ppc603) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_TRANS_MISS : DEBUG_puts( "\nTrap: 0x1000" ); break; @@ -141,7 +141,7 @@ rtems_isr bsp_spurious_handler( break; #elif defined(mpc604) -#error "Please fill in names. " +#error "Please fill in names. " case PPC_IRQ_ADDR_BRK: DEBUG_puts( "0x1300" ); break; @@ -179,7 +179,7 @@ void bsp_spurious_initialize() ; /* set_vector( bsp_stub_handler, trap, 1 ); */ else - set_vector( bsp_spurious_handler, trap, 1 ); + set_vector( bsp_spurious_handler, trap, 1 ); } } diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c b/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c index 441c98a224..8e2f334881 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c @@ -9,7 +9,7 @@ * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #include <rtems.h> diff --git a/c/src/lib/libbsp/powerpc/score603e/timer/timer.c b/c/src/lib/libbsp/powerpc/score603e/timer/timer.c index 6e7548d909..81a6b18de7 100644 --- a/c/src/lib/libbsp/powerpc/score603e/timer/timer.c +++ b/c/src/lib/libbsp/powerpc/score603e/timer/timer.c @@ -26,7 +26,7 @@ uint64_t Timer_driver_Start_time; rtems_boolean Timer_driver_Find_average_overhead; /* - * Timer_initialize + * Timer_initialize */ void Timer_initialize() diff --git a/c/src/lib/libbsp/powerpc/score603e/tod/tod.c b/c/src/lib/libbsp/powerpc/score603e/tod/tod.c index 234d46243b..a21140105d 100644 --- a/c/src/lib/libbsp/powerpc/score603e/tod/tod.c +++ b/c/src/lib/libbsp/powerpc/score603e/tod/tod.c @@ -1,14 +1,14 @@ /* - * Real Time Clock (Harris ICM7170) for RTEMS + * Real Time Clock (Harris ICM7170) for RTEMS * - * This part is found on the second generation of this board. + * This part is found on the second generation of this board. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * * $Id$ - */ + */ #include <rtems.h> #include <tod.h> @@ -74,7 +74,7 @@ int checkRealTime() } /* - * These routines are ICM7170 should be in + * These routines are ICM7170 should be in * a separate support library. * XXX Make static */ @@ -113,13 +113,13 @@ void ICM7170_GetTOD( if (init ) { ICM7170_SetField( imc1770_regs, 0x11, (0x0c | icm1770_freq) ); init = FALSE; - } + } /* Latch times */ /* rtc_tod->ticks = */ - + usec = ICM7170_GetField( imc1770_regs, 0x00 ); - + year = ICM7170_GetField( imc1770_regs, 0x06 ); if ( year >= 88 ) year += 1900; @@ -151,7 +151,7 @@ void ICM7170_SetTOD( year -= 2000; else year -= 1900; - + ICM7170_SetField( imc1770_regs, 0x11, (0x04 |icm1770_freq ) ); ICM7170_SetField( imc1770_regs, 0x06, year ); @@ -162,8 +162,8 @@ void ICM7170_SetTOD( ICM7170_SetField( imc1770_regs, 0x03, rtc_tod->second ); /* - * I don't know which day of week is - * + * I don't know which day of week is + * */ ICM7170_SetField( imc1770_regs, 0x07, 1 ); diff --git a/c/src/lib/libbsp/powerpc/score603e/vectors/vectors.S b/c/src/lib/libbsp/powerpc/score603e/vectors/vectors.S index 14ed3c50fe..fc6a0f1e37 100644 --- a/c/src/lib/libbsp/powerpc/score603e/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/score603e/vectors/vectors.S @@ -1,6 +1,6 @@ /* vectors.s 1.1 - 95/12/04 * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * interrupt veneers for RTEMS. * */ @@ -64,101 +64,101 @@ PUBLIC_VAR (__vectors) SYM (__vectors): - + /* Decrementer interrupt */ - .org reset_vector - file_base - ba 0x00100 - ba 0xfff00100 - ba 0xfff00100 + .org reset_vector - file_base + ba 0x00100 + ba 0xfff00100 + ba 0xfff00100 ba 0xfff00100 - - .org mach_vector - file_base + + .org mach_vector - file_base ba 0x00200 ba 0xfff00200 ba 0xfff00200 ba 0xfff00200 - - .org prot_vector - file_base + + .org prot_vector - file_base ba 0x00300 ba 0xfff00300 ba 0xfff00300 ba 0xfff00300 - - .org isi_vector - file_base + + .org isi_vector - file_base ba 0x00400 ba 0xfff00400 ba 0xfff00400 ba 0xfff00400 - - .org ext_vector - file_base - ba 0x0500 - ba 0xfff00500 - ba 0xfff00500 - ba 0xfff00500 - - .org align_vector - file_base - ba 0x00600 - ba 0xfff00600 - ba 0xfff00600 - ba 0xfff00600 - - .org prog_vector - file_base - ba 0x00700 - ba 0xfff00700 - ba 0xfff00700 - ba 0xfff00700 - - .org float_vector - file_base + + .org ext_vector - file_base + ba 0x0500 + ba 0xfff00500 + ba 0xfff00500 + ba 0xfff00500 + + .org align_vector - file_base + ba 0x00600 + ba 0xfff00600 + ba 0xfff00600 + ba 0xfff00600 + + .org prog_vector - file_base + ba 0x00700 + ba 0xfff00700 + ba 0xfff00700 + ba 0xfff00700 + + .org float_vector - file_base ba 0x00800 ba 0xfff00800 ba 0xfff00800 ba 0xfff00800 - .org dec_vector - file_base + .org dec_vector - file_base rfi ba 0xfff00900 ba 0xfff00900 ba 0xfff00900 - - .org sys_vector - file_base - ba 0x0c00 - ba 0xfff00C00 - ba 0xfff00C00 - ba 0xfff00C00 - - .org trace_vector - file_base - ba 0x0d00 - ba 0xfff00d00 - ba 0xfff00d00 - ba 0xfff00d00 - - .org itm_vector - file_base - ba 0x01000 - ba 0xfff01000 - ba 0xfff01000 - ba 0xfff01000 - - .org dltm_vector - file_base - ba 0x01100 - ba 0xfff01100 - ba 0xfff01100 - ba 0xfff01100 - - .org dstm_vector - file_base - ba 0x1200 - ba 0xfff01200 - ba 0xfff01200 - ba 0xfff01200 - - .org addr_vector - file_base - ba 0x1300 - ba 0xfff01300 - ba 0xfff01300 - ba 0xfff01300 - - .org sysmgmt_vector - file_base - ba 0x1400 - ba 0xfff01400 - ba 0xfff01400 - ba 0xfff01400 + + .org sys_vector - file_base + ba 0x0c00 + ba 0xfff00C00 + ba 0xfff00C00 + ba 0xfff00C00 + + .org trace_vector - file_base + ba 0x0d00 + ba 0xfff00d00 + ba 0xfff00d00 + ba 0xfff00d00 + + .org itm_vector - file_base + ba 0x01000 + ba 0xfff01000 + ba 0xfff01000 + ba 0xfff01000 + + .org dltm_vector - file_base + ba 0x01100 + ba 0xfff01100 + ba 0xfff01100 + ba 0xfff01100 + + .org dstm_vector - file_base + ba 0x1200 + ba 0xfff01200 + ba 0xfff01200 + ba 0xfff01200 + + .org addr_vector - file_base + ba 0x1300 + ba 0xfff01300 + ba 0xfff01300 + ba 0xfff01300 + + .org sysmgmt_vector - file_base + ba 0x1400 + ba 0xfff01400 + ba 0xfff01400 + ba 0xfff01400 #endif diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h b/c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h index 4cb72fc3c1..594737efea 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h @@ -51,16 +51,16 @@ typedef struct _ctxt { /* The main structure which is pointed to permanently by r13. Things * are not separated very well between parts because it would cause * too much code bloat for such a simple program like the bootloader. - * The code is designed to be compiled with the -m relocatable option and - * tries to minimize the number of relocations/fixups and the number of - * functions who have to access the .got2 sections (this increases the + * The code is designed to be compiled with the -m relocatable option and + * tries to minimize the number of relocations/fixups and the number of + * functions who have to access the .got2 sections (this increases the * size of the prologue in every function). */ typedef struct _boot_data { RESIDUAL *residual; void *load_address; void *of_entry; - void *r6, *r7, *r8, *r9, *r10; + void *r6, *r7, *r8, *r9, *r10; u_long cache_lsize; void *image; /* Where to copy ourselves */ void *stack; @@ -77,80 +77,80 @@ typedef struct _boot_data { register boot_data *bd __asm__("r13"); extern inline int -pcibios_read_config_byte(u_char bus, u_char dev_fn, +pcibios_read_config_byte(u_char bus, u_char dev_fn, u_char where, u_char * val) { return bd->pci_functions->read_config_byte(bus, dev_fn, where, val); } extern inline int -pcibios_read_config_word(u_char bus, u_char dev_fn, +pcibios_read_config_word(u_char bus, u_char dev_fn, u_char where, u_short * val) { return bd->pci_functions->read_config_word(bus, dev_fn, where, val); } extern inline int -pcibios_read_config_dword(u_char bus, u_char dev_fn, +pcibios_read_config_dword(u_char bus, u_char dev_fn, u_char where, u_int * val) { return bd->pci_functions->read_config_dword(bus, dev_fn, where, val); } extern inline int -pcibios_write_config_byte(u_char bus, u_char dev_fn, +pcibios_write_config_byte(u_char bus, u_char dev_fn, u_char where, u_char val) { return bd->pci_functions->write_config_byte(bus, dev_fn, where, val); } extern inline int -pcibios_write_config_word(u_char bus, u_char dev_fn, +pcibios_write_config_word(u_char bus, u_char dev_fn, u_char where, u_short val) { return bd->pci_functions->write_config_word(bus, dev_fn, where, val); } extern inline int -pcibios_write_config_dword(u_char bus, u_char dev_fn, +pcibios_write_config_dword(u_char bus, u_char dev_fn, u_char where, u_int val) { return bd->pci_functions->write_config_dword(bus, dev_fn, where, val); } extern inline int pci_read_config_byte(struct pci_dev *dev, u_char where, u_char * val) { - return bd->pci_functions->read_config_byte(dev->bus->number, - dev->devfn, + return bd->pci_functions->read_config_byte(dev->bus->number, + dev->devfn, where, val); } extern inline int pci_read_config_word(struct pci_dev *dev, u_char where, u_short * val) { - return bd->pci_functions->read_config_word(dev->bus->number, - dev->devfn, + return bd->pci_functions->read_config_word(dev->bus->number, + dev->devfn, where, val); } extern inline int pci_read_config_dword(struct pci_dev *dev, u_char where, u_int * val) { - return bd->pci_functions->read_config_dword(dev->bus->number, - dev->devfn, + return bd->pci_functions->read_config_dword(dev->bus->number, + dev->devfn, where, val); } extern inline int pci_write_config_byte(struct pci_dev *dev, u_char where, u_char val) { - return bd->pci_functions->write_config_byte(dev->bus->number, - dev->devfn, + return bd->pci_functions->write_config_byte(dev->bus->number, + dev->devfn, where, val); } extern inline int pci_write_config_word(struct pci_dev *dev, u_char where, u_short val) { - return bd->pci_functions->write_config_word(dev->bus->number, - dev->devfn, + return bd->pci_functions->write_config_word(dev->bus->number, + dev->devfn, where, val); } extern inline int pci_write_config_dword(struct pci_dev *dev, u_char where, u_int val) { - return bd->pci_functions->write_config_dword(dev->bus->number, - dev->devfn, + return bd->pci_functions->write_config_dword(dev->bus->number, + dev->devfn, where, val); } @@ -159,12 +159,12 @@ pci_write_config_dword(struct pci_dev *dev, u_char where, u_int val) { * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, size_t, unsigned long); /* The physical memory allocator allows to align memory by - * powers of 2 given by the lower order bits of flags. + * powers of 2 given by the lower order bits of flags. * By default it allocates from higher addresses towrds lower ones, * setting PA_LOW reverses this behaviour. */ @@ -212,11 +212,11 @@ int find_max_mem(struct pci_dev *); #ifdef ASM /* These definitions simplify the ugly declarations necessary for - * GOT definitions. + * GOT definitions. */ #define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME -#define GOT(NAME) .L_ ## NAME (r30) +#define GOT(NAME) .L_ ## NAME (r30) #define START_GOT \ .section ".got2","aw"; \ diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/em86.c b/c/src/lib/libbsp/powerpc/shared/bootloader/em86.c index be444b2279..1ca667a82f 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/em86.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/em86.c @@ -16,7 +16,7 @@ */ /***************************************************************************** -* +* * Code to interpret Video BIOS ROM routines. * * @@ -33,7 +33,7 @@ #endif -/* Code options, put them on the compiler command line */ +/* Code options, put them on the compiler command line */ /* #define EIP_STATS */ /* EIP based profiling */ /* #undef EIP_STATS */ @@ -61,10 +61,10 @@ typedef struct _x86 { *esbase, *csbase, *ssbase, *dsbase, *fsbase, *gsbase; volatile unsigned char *iobase; unsigned char *ioperm; - unsigned + unsigned reason, nexteip, parm1, parm2, opcode, base; unsigned *optable, opreg; /* no more used! */ - unsigned char* vbase; + unsigned char* vbase; unsigned instructions; #ifdef __BOOT__ u_char * ram; @@ -80,7 +80,7 @@ x86 v86_private __attribute__((aligned(32))); /* Emulator is in another source file */ -extern +extern void em86_enter(x86 * p); #define EAX (p->_eax.e) @@ -116,19 +116,19 @@ void em86_enter(x86 * p); static void dump86(x86 * p){ unsigned char *s = p->csbase + p->eip; printf("cs:eip=%04x:%08x, eax=%08x, ecx=%08x, edx=%08x, ebx=%08x\n", - p->cs, p->eip, ld_le32(&EAX), + p->cs, p->eip, ld_le32(&EAX), ld_le32(&ECX), ld_le32(&EDX), ld_le32(&EBX)); printf("ss:esp=%04x:%08x, ebp=%08x, esi=%08x, edi=%08x, efl=%08x\n", - p->ss, ld_le32(&ESP), ld_le32(&EBP), + p->ss, ld_le32(&ESP), ld_le32(&EBP), ld_le32(&ESI), ld_le32(&EDI), p->eflags); printf("nip=%08x, ds=%04x, es=%04x, fs=%04x, gs=%04x, total=%d\n", p->nexteip, p->ds, p->es, p->fs, p->gs, p->instructions); - printf("code: %02x %02x %02x %02x %02x %02x " + printf("code: %02x %02x %02x %02x %02x %02x " "%02x %02x %02x %02x %02x %02x\n", - s[0], s[1], s[2], s[3], s[4], s[5], + s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9], s[10], s[11]); #ifndef __BOOT__ - printf("op1=%08x, op2=%08x, result=%08x, flags=%08x\n", + printf("op1=%08x, op2=%08x, result=%08x, flags=%08x\n", p->filler[11], p->filler[12], p->filler[13], p->filler[14]); #endif } @@ -139,10 +139,10 @@ static void dump86(x86 * p){ int bios86pci(x86 * p) { unsigned reg=ld_le16(&DI); reg_type2 tmp; - + if (AL>=8 && AL<=13 && reg>0xff) { AH = PCIBIOS_BAD_REGISTER_NUMBER; - } else { + } else { switch(AL) { case 2: /* find_device */ /* Should be improved for BIOS able to handle @@ -222,13 +222,13 @@ int int10h(x86 * p) { /* Process BIOS video interrupt */ #else p->eflags = (p->eflags&0xfcff)|0x100; /* Set TF for debugging */ #endif - /* p->eflags|=0x100; uncomment to force a trap */ + /* p->eflags|=0x100; uncomment to force a trap */ return(0); } else { switch(AH) { case 0x12: switch(BL){ - case 0x32: + case 0x32: p->eip=p->nexteip; return(0); break; @@ -238,7 +238,7 @@ int int10h(x86 * p) { /* Process BIOS video interrupt */ default: break; } - printf("unhandled soft interrupt 0x10: vector=%x\n", vector); + printf("unhandled soft interrupt 0x10: vector=%x\n", vector); return(1); } } @@ -261,11 +261,11 @@ int process_softint(x86 * p) { } dump86(p); printf("Unhandled soft interrupt number 0x%04x, AX=0x%04x\n", - p->parm1, ld_le16(&AX)); + p->parm1, ld_le16(&AX)); return(1); } -/* The only function called back by the emulator is em86_trap, all +/* The only function called back by the emulator is em86_trap, all instructions may that change the code segment are trapped here. p->reason is one of the following codes. */ #define code_zerdiv 0 @@ -275,7 +275,7 @@ int process_softint(x86 * p) { #define code_bound 5 #define code_ud 6 #define code_dna 7 - + #define code_iretw 256 #define code_iretl 257 #define code_lcallw 258 @@ -290,8 +290,8 @@ int process_softint(x86 * p) { - The three LSB define the port size (1, 2 or 4) - bit of weight 512 means out if set, in if clear - bit of weight 256 means ins/outs if set, in/out if clear - - bit of weight 128 means use esi/edi if set, si/di if clear - (only used for ins/outs instructions, always clear for in/out) + - bit of weight 128 means use esi/edi if set, si/di if clear + (only used for ins/outs instructions, always clear for in/out) */ #define code_inb 1024+1 #define code_inw 1024+2 @@ -327,7 +327,7 @@ int em86_trap(x86 *p) { switch(p->reason) { case code_int3: #ifndef __BOOT__ - if(p->csbase+p->eip == bptaddr) { + if(p->csbase+p->eip == bptaddr) { *bptaddr=bptopc; bptaddr=NULL; } @@ -352,8 +352,8 @@ int em86_trap(x86 *p) { if(bptaddr) *bptaddr=bptopc; t=strtok(0," \n"); i=sscanf(t,"%x",&tmp); - if(i==1) { - bptaddr=p->vbase + tmp; + if(i==1) { + bptaddr=p->vbase + tmp; bptopc=*bptaddr; *bptaddr=0xcc; } else bptaddr=NULL; @@ -362,13 +362,13 @@ int em86_trap(x86 *p) { case 'Q': return 1; break; - + case 'g': case 'G': p->eflags &= ~0x100; return 0; break; - + case 's': case 'S': /* Print the 8 stack top words */ fp = (unsigned short *)(p->ssbase+ld_le16(&SP)); @@ -390,7 +390,7 @@ int em86_trap(x86 *p) { break; case code_ud: printf("Attempt to execute an unimplemented" - "or undefined opcode!\n"); + "or undefined opcode!\n"); dump86(p); return(1); /* exit interpreter */ break; @@ -433,7 +433,7 @@ int em86_trap(x86 *p) { for(i=p->parm1; i<p->parm1+(p->reason&7); i++) { p->ioperm[i/8] &= ~(1<<i%8); } - printf("Access to ports %04x-%04x enabled.\n", + printf("Access to ports %04x-%04x enabled.\n", p->parm1, p->parm1+(p->reason&7)-1); return(0); #endif @@ -451,7 +451,7 @@ int em86_trap(x86 *p) { void cleanup_v86_mess(void) { x86 *p = (x86 *) bd->v86_private; - + /* This automatically removes the mappings ! */ vfree(p->vbase); p->vbase = 0; @@ -460,11 +460,11 @@ void cleanup_v86_mess(void) { sfree(p->ioperm); p->ioperm=0; } - + int init_v86(void) { x86 *p = (x86 *) bd->v86_private; - + /* p->vbase is non null when the v86 is properly set-up */ if (p->vbase) return 0; @@ -485,7 +485,7 @@ int init_v86(void) { /* These calls should never fail. */ vmap(p->vbase, (u_long)p->ram|PTE_RAM, 0xa0000); vmap(p->vbase+0x100000, (u_long)p->ram|PTE_RAM, 0x10000); - vmap(p->vbase+0xa0000, + vmap(p->vbase+0xa0000, ((u_long)ptr_mem_map->isa_mem_base+0xa0000)|PTE_IO, 0x20000); return 0; } @@ -502,7 +502,7 @@ void em86_main(struct pci_dev *dev){ #define IOMASK 0 #endif - + #ifndef __BOOT__ int i; /* Allow or disable access to all ports */ @@ -523,21 +523,21 @@ void em86_main(struct pci_dev *dev){ AH=dev->bus->number; AL=dev->devfn; - /* All other registers are irrelevant except ES:DI which + /* All other registers are irrelevant except ES:DI which * should point to a PnP installation check block. This * is not yet implemented due to lack of references. */ /* Store a return address of 0xffff:0xffff as eyecatcher */ *(u_int *)(p->ssbase+ld_le16(&SP)) = UINT_MAX; - + /* Interrupt for BIOS EGA services is 0xf000:0xf065 (int 0x10) */ st_le32((u_int *)p->vbase + 0x10, 0xf000f065); - + /* Enable the ROM, read it and disable it immediately */ pci_read_config_dword(dev, PCI_ROM_ADDRESS, &saved_rom); pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0x000c0001); - /* Check that there is an Intel ROM. Should we also check that + /* Check that there is an Intel ROM. Should we also check that * the first instruction is a jump (0xe9 or 0xeb) ? */ signature = *(u_short *)(ptr_mem_map->isa_mem_base+0xc0000); @@ -551,26 +551,26 @@ void em86_main(struct pci_dev *dev){ if (!p->rom) return; - for(dst=(u_int *) p->rom, + for(dst=(u_int *) p->rom, src=(volatile u_int *)(ptr_mem_map->isa_mem_base+0xc0000), - left = length*512/sizeof(u_int); - left--; + left = length*512/sizeof(u_int); + left--; *dst++=*src++); - - /* Disable the ROM and map the copy in virtual address space, note + + /* Disable the ROM and map the copy in virtual address space, note * that the ROM has to be mapped as RAM since some BIOSes (at least * Cirrus) perform write accesses to their own ROM. The reason seems * to be that they check that they must execute from shadow RAM - * because accessing the ROM prevents accessing the video RAM + * because accessing the ROM prevents accessing the video RAM * according to comments in linux/arch/alpha/kernel/bios32.c. */ - + pci_write_config_dword(dev, PCI_ROM_ADDRESS, saved_rom); vmap(p->vbase+0xc0000, (u_long)p->rom|PTE_RAM, length*512); /* Now actually emulate the ROM init routine */ em86_enter(p); - + /* Free the acquired resources */ vunmap(p->vbase+0xc0000); pfree(p->rom); diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/em86real.S b/c/src/lib/libbsp/powerpc/shared/bootloader/em86real.S index 120b5c09ee..ad38fb24fb 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/em86real.S +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/em86real.S @@ -16,7 +16,7 @@ */ /* If the symbol __BOOT__ is defined, a slightly different version is - * generated to be compiled with the -m relocatable option + * generated to be compiled with the -m relocatable option */ #ifdef __BOOT__ @@ -24,23 +24,23 @@ /* It is impossible to gather statistics in the boot version */ #undef EIP_STATS #endif - + /* * * Given the size of this code, it deserves a few comments on how it works, - * and why it was implemented the way it is. - * + * and why it was implemented the way it is. + * * The goal is to have a real mode i486SX emulator to initialize hardware, * mostly graphics boards, by interpreting ROM BIOSes. The choice of a 486SX * is logical since this is the lowest processor that PCI ROM BIOSes must run * on. - * + * * The goal of this emulator is not performance, but a small enough memory * footprint to include it in a bootloader. * * It is actually likely to be comparable to a 25MHz 386DX on a 200MHz 603e ! - * This is not as serious as it seems since most of the BIOS code performs - * a lot of accesses to I/O and non-cacheable memory spaces. For such + * This is not as serious as it seems since most of the BIOS code performs + * a lot of accesses to I/O and non-cacheable memory spaces. For such * instructions, the execution time is often dominated by bus accesses. * Statistics of the code also shows that it spends a large function of * the time in loops waiting for vertical retrace or programs one of the @@ -61,41 +61,41 @@ * (debug registers are impossible to implement at a reasonable cost) */ -/* Code options, put them on the compiler command line */ +/* Code options, put them on the compiler command line */ /* #define EIP_STATS */ /* EIP based profiling */ /* #undef EIP_STATS */ /* * Implementation notes: * - * A) flags emulation. - * + * A) flags emulation. + * * The most important decisions when it comes to obtain a reasonable speed * are related to how the EFLAGS register is emulated. * * Note: the code to set up flags is complex, but it is only seldom - * executed since cmp and test instructions use much faster flag evaluation - * paths. For example the overflow flag is almost only needed for pushf and + * executed since cmp and test instructions use much faster flag evaluation + * paths. For example the overflow flag is almost only needed for pushf and * int. Comparison results only involve (SF^OF) or (SF^OF)+ZF and the - * implementation is fast in this case. + * implementation is fast in this case. * * Rarely used flags: AC, NT and IOPL are kept in a memory EFLAGS image. * All other flags are either kept explicitly in PPC cr (DF, IF, and TF) or * lazily evaluated from the state of 4 registers called flags, result, op1, - * op2, and sometimes the cr itself. The emulation has been designed for - * minimal overhead for the common case where the flags are never used. With - * few exceptions, all instructions that set flags leave the result of the - * computation in a register called result, and operands are taken from op1 - * and op2 registers. However a few instructions like cmp, test and bit tests + * op2, and sometimes the cr itself. The emulation has been designed for + * minimal overhead for the common case where the flags are never used. With + * few exceptions, all instructions that set flags leave the result of the + * computation in a register called result, and operands are taken from op1 + * and op2 registers. However a few instructions like cmp, test and bit tests * (bt/btc/btr/bts/bsf/bsr) explicitly set cr bits to short circuit * condition code evaluation of conditional instructions. * * As a very brief summary: - * - * - the result of the last flag setting operation is often either in the - * result register or in op2 after increment or decrement instructions + * + * - the result of the last flag setting operation is often either in the + * result register or in op2 after increment or decrement instructions * because result and op1 may be needed to compute the carry. - * + * * - compare instruction leave the result of the unsigned comparison * in cr4 and of signed comparison in cr6. This means that: * - cr4[0]=CF (short circuit for jc/jnc) @@ -103,7 +103,7 @@ * - cr6[0]=(OF^SF) (short circuit for jl/jnl) * - cr6[1]=~((SF^OF)+ZF) (short circuit for jg/jng) * - cr6[2]=ZF (short circuit for jz/jnz) - * + * * - test instruction set flags in cr6 and clear overflow. This means that: * - cr6[0]=SF=(SF^OF) (short circuit for jl/jnl/js/jns) * - cr6[1]=~((SF^OF)+ZF) (short circuit for jg/jng) @@ -111,16 +111,16 @@ * * All flags may be lazily evaluated from several values kept in registers: * - * Flag: Depends upon: + * Flag: Depends upon: * OF result, op1, op2, flags[INCDEC_FIELD,SUBTRACTING,OF_STATE_MASK] * SF result, op2, flags[INCDEC_FIELD,RES_SIZE] * ZF result, op2, cr6[2], flags[INCDEC_FIELD,RES_SIZE,ZF_PROTECT] * AF op1, op2, flags[INCDEC_FIELD,SUBTRACTING,CF_IN] * PF result, op2, flags[INCDEC_FIELD] * CF result, op1, flags[CF_STATE_MASK, CF_IN] - * - * The order of the fields in the flags register has been chosen so that a - * single rlwimi is necessary for common instruction that do not affect all + * + * The order of the fields in the flags register has been chosen so that a + * single rlwimi is necessary for common instruction that do not affect all * flags. (See the code for inc/dec emulation). * * @@ -129,8 +129,8 @@ * The register called opcode holds in its low order 8 bits the opcode * (second byte if the first byte is 0x0f). More precisely it holds the * last byte fetched before the modrm byte or the immediate operand(s) - * of the instruction, if any. High order 24 bits are zero unless the - * instruction has prefixes. These higher order bits have the following + * of the instruction, if any. High order 24 bits are zero unless the + * instruction has prefixes. These higher order bits have the following * meaning: * 0x80000000 segment override prefix * 0x00001000 repnz prefix (0xf2) @@ -139,8 +139,8 @@ * 0x00000200 operand size prefix (0x66) * (bit 0x1000 and 0x800 cannot be set simultaneously) * - * Therefore if there is a segment override the value will be between very - * negative (between 0x80000000 and 0x800016ff), if there is no segment + * Therefore if there is a segment override the value will be between very + * negative (between 0x80000000 and 0x800016ff), if there is no segment * override, the value will be between 0 and 0x16ff. The reason for * this choice will be understood in the next part. * @@ -149,7 +149,7 @@ * the encoding of the modrm bytes (especially in 16 bit mode) is quite * complex. Hence a table, indexed by the five useful bits of the modrm * byte is used to simplify decoding. Here is a description: - * + * * bit mask meaning * 0x80000000 use ss as default segment register * 0x00004000 means that this addressing mode needs a base register @@ -164,8 +164,8 @@ * 10: 32 bit addressing mode * 60: 16 bit addressing mode with %si as index * 70: 16 bit addressing mode with %di as index - * - * This convention leads to the following special values used to check for + * + * This convention leads to the following special values used to check for * sib present and displacement-only, which happen to the three lowest * values in the table (unsigned): * 0x00003090 sib follows (implies it is a 32 bit mode) @@ -186,11 +186,11 @@ * instruction has no override prefix. * * D) BUGS - * + * * This software is obviously bug-free :-). Nevertheless, if you encounter * an interesting feature. Mail me a note, if possible with a detailed * instruction example showing where and how it fails. - * + * */ @@ -205,7 +205,7 @@ is actually never checked (real mode is CPL 0 anyway). */ /* Actually NT and IOPL are kept in memory */ #define NT86 17 #define IOPL86 18 /* Actually 18 and 19 */ -#define OF86 20 +#define OF86 20 #define DF86 21 #define IF86 22 #define TF86 23 @@ -222,11 +222,11 @@ is actually never checked (real mode is CPL 0 anyway). */ #define TF 23 /* Single step flag: cr5[3] */ /* Now the flags which are frequently used */ -/* +/* * CF_IN is a copy of the input carry with PPC polarity, * it is cleared for add, set for sub and cmp, - * equal to the x86 carry for adc and to its complement for sbb. - * it is used to evaluate AF and CF. + * equal to the x86 carry for adc and to its complement for sbb. + * it is used to evaluate AF and CF. */ #define CF_IN 0x80000000 @@ -237,10 +237,10 @@ is actually never checked (real mode is CPL 0 anyway). */ #define EVAL_CF andis. r3,flags,(CF_IN_CR)>>16; beql- _eval_cf -/* - * CF_STATE tells how to compute the carry bit. - * NOTRESULT16 and NOTRESULT8 are never set explicitly, - * but they may happen after a cmc instruction. +/* + * CF_STATE tells how to compute the carry bit. + * NOTRESULT16 and NOTRESULT8 are never set explicitly, + * but they may happen after a cmc instruction. */ #define CF 16 /* cr4[0] */ #define CF_LOCATION 0x30000000 @@ -256,7 +256,7 @@ is actually never checked (real mode is CPL 0 anyway). */ #define CF_NOTRES16 0x28000000 #define CF_RES8 0x30000000 #define CF_NOTRES8 0x38000000 - + #define CF_ADDL CF_RES32 #define CF_SUBL CF_NOTRES32 #define CF_ADDW CF_RES16 @@ -269,11 +269,11 @@ is actually never checked (real mode is CPL 0 anyway). */ #define CF_POL_INSERT(dst,pos) \ rlwimi dst,flags,(36-pos)%32,pos,pos #define RES2CF(dst) rlwinm dst,result,8,7,15 - -/* + +/* * OF_STATE tells how to compute the overflow bit. When the low order bit * is set (OF_EXPLICIT), it means that OF is the exclusive or of the - * two other bits. For the reason of this choice, see rotate instructions. + * two other bits. For the reason of this choice, see rotate instructions. */ #define OF 1 /* Only after EVAL_OF */ #define OF_STATE_MASK 0x07000000 @@ -289,11 +289,11 @@ is actually never checked (real mode is CPL 0 anyway). */ #define OF_ARITHB 0x04000000 #define EVAL_OF rlwinm. r3,flags,6,0,1; bngl+ _eval_of; andis. r3,flags,OF_VALUE>>16 - + /* See _eval_of to see how this can be used */ #define OF_ROTCNT(dst) rlwinm dst,flags,10,0x1c - -/* + +/* * SIGNED_IN_CR means that cr6 is set as after a signed compare: * - cr6[0] is SF^OF for jl/jnl/setl/setnl... * - cr6[1] is ~((SF^OF)+ZF) for jg/jng/setg/setng... @@ -305,7 +305,7 @@ is actually never checked (real mode is CPL 0 anyway). */ #define EVAL_SIGNED andis. r3,flags,SIGNED_IN_CR>>16; beql- _eval_signed -/* +/* * Above in CR means that cr4 is set as after an unsigned compare: * - cr4[0] is CF (CF_IN_CR is also set) * - cr4[1] is ~(CF+ZF) (ZF_IN_CR is also set) @@ -320,28 +320,28 @@ is actually never checked (real mode is CPL 0 anyway). */ #define SF_IN_CR 0x00200000 #define EVAL_SF andis. r3,flags,SF_IN_CR>>16; beql- _eval_sf_zf - + /* ZF_IN_CR means cr6[2] is a copy of ZF. */ -#define ZF 26 +#define ZF 26 #define ZF_IN_CR 0x00100000 - + #define EVAL_ZF andis. r3,flags,ZF_IN_CR>>16; beql- _eval_sf_zf #define ZF2ZF86(s,d) rlwimi d,s,ZF-ZF86,ZF86,ZF86 #define ZF862ZF(reg) rlwimi reg,reg,32+ZF86-ZF,ZF,ZF - -/* + +/* * ZF_PROTECT means cr6[2] is the only valid value for ZF. This is necessary - * because some infrequent instructions may leave SF and ZF in an apparently + * because some infrequent instructions may leave SF and ZF in an apparently * inconsistent state (both set): sahf, popf and the few (not implemented) * instructions that only affect ZF. */ #define ZF_PROTECT 0x00080000 - + /* The parity is always evaluated when it is needed */ #define PF 0 /* Only after EVAL_PF */ #define EVAL_PF bl _eval_pf -/* This field gives the shift amount to use to evaluate SF +/* This field gives the shift amount to use to evaluate SF and ZF when ZF_PROTECT is not set */ #define RES_SIZE_MASK 0x00060000 #define RESL 0x00000000 @@ -355,12 +355,12 @@ is actually never checked (real mode is CPL 0 anyway). */ #define SUBTRACTING 0x00010000 #define GET_ADDSUB(dst) rlwinm dst,flags,16,0x01 - + /* rotate (rcl/rcr/rol/ror) affect CF and OF but not other flags */ #define ROTATE_MASK (CF_IN_CR|CF_STATE_MASK|ABOVE_IN_CR|OF_STATE_MASK|SIGNED_IN_CR) #define ROTATE_FLAGS rlwimi flags,one,24,ROTATE_MASK -/* +/* * INCDEC_FIELD has at most one bit set when the last flag setting instruction * was either inc or dec (which do not affect the carry). When one of these * bits is set, it affects the way OF, SF, ZF, AF, and PF are evaluated. @@ -380,7 +380,7 @@ is actually never checked (real mode is CPL 0 anyway). */ /* Operations to perform to tell where the flags are after inc or dec */ #define INC_FLAGS(BWL) rlwimi flags,one,INC##BWL##_SHIFT,INCDEC_MASK #define DEC_FLAGS(BWL) rlwimi flags,one,DEC##BWL##_SHIFT,INCDEC_MASK - + /* How the flags are set after arithmetic operations */ #define FLAGS_ADD(BWL) (CF_ADD##BWL|OF_ARITH##BWL|RES##BWL) #define FLAGS_SBB(BWL) (CF_SUB##BWL|OF_ARITH##BWL|RES##BWL|SUBTRACTING) @@ -405,7 +405,7 @@ is actually never checked (real mode is CPL 0 anyway). */ /* How the flags are set after multiplies */ #define FLAGS_MUL (CF_EXPLICIT|OF_EXPLICIT) - + #define SET_FLAGS(fl) lis flags,(fl)>>16 #define ADD_FLAGS(fl) addis flags,flags,(fl)>>16 @@ -413,14 +413,14 @@ is actually never checked (real mode is CPL 0 anyway). */ * We are always off by one when compared with Intel's eip, this shortens * code by allowing to load next byte with lbzu x,1(eip). The register * called eip actually contains csbase+eip, and thus should be called lip - * for linear ip. + * for linear ip. */ - -/* - * Reason codes passed to the C part of the emulator, this includes all - * instructions which may change the current code segment. These definitions + +/* + * Reason codes passed to the C part of the emulator, this includes all + * instructions which may change the current code segment. These definitions * will soon go into a separate include file. Codes 0 to 255 correspond - * directly to the interrupt/trap that has to be generated. + * directly to the interrupt/trap that has to be generated. */ #define code_divide_err 0 @@ -430,7 +430,7 @@ is actually never checked (real mode is CPL 0 anyway). */ #define code_bound 5 #define code_ud 6 #define code_dna 7 /* FPU not available */ - + #define code_iretw 256 /* Interrupt returns */ #define code_iretl 257 #define code_lcallw 258 /* Far calls and jumps */ @@ -446,7 +446,7 @@ is actually never checked (real mode is CPL 0 anyway). */ - bit of weight 512 means out if set, in if clear - bit of weight 256 means ins/outs if set, in/out if clear - bit of weight 128 means use 32 bit addresses if set, 16 bit if clear - (only used for ins/outs instructions, always clear for in/out) + (only used for ins/outs instructions, always clear for in/out) */ #define code_inb 1024+1 #define code_inw 1024+2 @@ -468,13 +468,13 @@ is actually never checked (real mode is CPL 0 anyway). */ #define code_outsl_a32 1024+512+256+128+4 #define state 31 -/* r31 (state) is a pointer to a structure describing the emulated x86 +/* r31 (state) is a pointer to a structure describing the emulated x86 processor, its layout is the following: first the general purpose registers, they are in little endian byte order offset name - + 0 eax/ax/al 1 ah 4 ecx/cx/cl @@ -509,10 +509,10 @@ offset name #define DI 28 #define EDI 28 -/* +/* than the rest of the machine state, big endian ! -offset name +offset name 32 essel segment register selectors (values) 36 cssel @@ -541,7 +541,7 @@ offset name 128 vbase where the 1Mb memory is mapped 132 cntimg instruction counter - 136 scratch + 136 scratch 192 eipstat array of 32k unsigned long pairs for eip stats */ @@ -575,18 +575,18 @@ offset name #endif /* Global registers */ -/* Some segment register bases are permanently kept in registers since they +/* Some segment register bases are permanently kept in registers since they are often used: these are csb, esb and ssb because they are required for jumps, string instructions, and pushes/pops/calls/rets. dsbase is not kept in a register but loaded from memory to allow somewhat -more parallelism in the main emulation loop. +more parallelism in the main emulation loop. */ #define one 30 /* Constant one, so pervasive */ #define ssb 29 #define csb 28 #define esb 27 -#define eip 26 /* That one is indeed csbase+(e)ip-1 */ +#define eip 26 /* That one is indeed csbase+(e)ip-1 */ #define result 25 /* For the use of result, op1, op2 */ #define op1 24 /* see the section on flag emulation */ #define op2 23 @@ -605,11 +605,11 @@ specified by the modrm byte */ #define adbase 16 /* addressing mode table */ /* Following registers are used only as dedicated temporaries during decoding, they are free for use during emulation */ -/* - * ceip (current eip) is only in use when we call the external emulator for - * instructions that fault. Note that it is forbidden to change flags before - * the check for the fault happens (divide by zero...) ! ceip is also used - * when measuring timing. +/* + * ceip (current eip) is only in use when we call the external emulator for + * instructions that fault. Note that it is forbidden to change flags before + * the check for the fault happens (divide by zero...) ! ceip is also used + * when measuring timing. */ #define ceip 15 @@ -641,7 +641,7 @@ they are free for use during emulation */ GOT_ENTRY(jtab_www) GOT_ENTRY(adtable) END_GOT -#else +#else .text #endif .align 2 @@ -717,7 +717,7 @@ exit: lwz r0,100(r1) mtcr r4 addi r1,r1,96 blr - + trap: crmove 0,RF crclr RF bt- 0,resume @@ -745,23 +745,23 @@ complex: addi eip,eip,1 cmpwi r3,0 bne exit b restart - + /* Main loop */ -/* +/* * The two LSB of each entry in the main table mean the following: - * 00: indirect opcode: modrm follows and the three middle bits are an + * 00: indirect opcode: modrm follows and the three middle bits are an * opcode extension. The entry points to another jump table. * 01: direct instruction, branch directly to the routine. * 10: modrm specifies byte size memory and register operands. * 11: modrm specifies word/long memory and register operands. - * + * * The modrm byte, if present, is always loaded in r7. * * Note: most "mr x,y" instructions have been replaced by "addi x,y,0" since - * the latter can be executed in the second integer unit on 603e. + * the latter can be executed in the second integer unit on 603e. */ -/* +/* * This code is very good example of absolutely unmaintainable code. * It was actually much easier to write than it is to understand ! * If my computations are right, the maximum path length from fetching @@ -769,7 +769,7 @@ complex: addi eip,eip,1 * 46 instructions (for non-prefixed, single byte opcode instructions). * */ - .align 5 + .align 5 #ifdef EIP_STATS nop: NEXTBYTE(opcode) gotopcode: slwi r3,opcode,2 @@ -838,9 +838,9 @@ _ds: NEXTBYTE(r7) /* Lock (unimplemented) and repeat prefixes */ _lock: li r3,code_lock; b complex -_repnz: NEXTBYTE(r7); rlwimi opcode,one,12,0x1800; b 2f +_repnz: NEXTBYTE(r7); rlwimi opcode,one,12,0x1800; b 2f _repz: NEXTBYTE(r7); rlwimi opcode,one,11,0x1800; b 2f - + /* Operand and address size prefixes */ .align 4 _opsize: NEXTBYTE(r7); ori opcode,opcode,0x200 @@ -859,7 +859,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 NEXTBYTE(r7) # modrm byte cmpwi cr1,r7,192 rlwinm opreg,r7,31,0x1c - beq- 6f + beq- 6f /* modrm with middle 3 bits specifying a register (prefixed) */ rlwinm r0,r4,3,0x8 li r4,0x1c0d @@ -874,7 +874,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 rlwimi r3,r7,31,0x60 lwzx r4,r3,adbase cmpwi cr1,r4,0x3090 - bnl+ cr1,10f + bnl+ cr1,10f /* displacement only addressing modes */ 4: cmpwi r4,0x2000 bne 5f @@ -882,7 +882,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 bctr 5: NEXTDWORD(offset) bctr -/* modrm with opcode extension (prefixed) */ +/* modrm with opcode extension (prefixed) */ 6: lwzx r4,r4,opreg mtctr r4 blt cr1,3b @@ -914,7 +914,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 rlwinm r3,r4,30,0x1c # 16bit/32bit/%si index/%di index cmpwi cr1,r3,8 # set cr1 as early as possible rlwinm r6,r4,26,0x1c # base register - lwbrx offset,state,r6 # load the base register + lwbrx offset,state,r6 # load the base register beq cr0,14f # no displacement cmpw cr2,r4,opcode # check for ss as default base bgt cr0,12f # byte offset @@ -933,7 +933,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 bgtctr cr2 addi base,ssb,0 bctr -/* 8 bit displacement */ +/* 8 bit displacement */ 12: NEXTBYTE(r5) extsb r5,r5 bgt cr1,13f @@ -953,7 +953,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 bgtctr cr2 addi base,ssb,0 bctr -/* no displacement: only indexed modes may use ss as default base */ +/* no displacement: only indexed modes may use ss as default base */ 14: beqctr cr1 # 32 bit register indirect clrlwi offset,offset,16 bltctr cr1 # 16 bit register indirect @@ -970,7 +970,7 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 rlwinm r3,r7,31,0x1c # index rlwinm offset,r7,2,0x1c # base cmpwi cr1,r3,ESP # has index ? - bne cr0,18f # base+d8/d32 + bne cr0,18f # base+d8/d32 cmpwi offset,EBP beq 17f # d32(,index,scale) xori r4,one,0xcc01 # build 0x0000cc00 @@ -1026,25 +1026,25 @@ _twobytes: NEXTBYTE(r7); addi r3,r3,0x400 /* * Flag evaluation subroutines: they have not been written for performance - * since they are not often used in practice. The rule of the game was to + * since they are not often used in practice. The rule of the game was to * write them with as few branches as possible. * The first routines eveluate either one or 2 (ZF and SF simultaneously) * flags and do not use r0 and r7. * The more complex routines (_eval_above, _eval_signed and _eval_flags) * call the former ones, using r0 as a return address save register and - * r7 as a safe temporary. + * r7 as a safe temporary. */ -/* +/* * _eval_sf_zf evaluates simultaneously SF and ZF unless ZF is already valid * and protected because it is possible, although it is exceptional, to have - * SF and ZF set at the same time after a few instructions which may leave the - * flags in this apparently inconsistent state: sahf, popf, iret and the few - * (for now unimplemented) instructions which only affect ZF (lar, lsl, arpl, - * cmpxchg8b). This also solves the obscure case of ZF set and PF clear. + * SF and ZF set at the same time after a few instructions which may leave the + * flags in this apparently inconsistent state: sahf, popf, iret and the few + * (for now unimplemented) instructions which only affect ZF (lar, lsl, arpl, + * cmpxchg8b). This also solves the obscure case of ZF set and PF clear. * On return: SF=cr6[0], ZF=cr6[2]. */ - + _eval_sf_zf: andis. r5,flags,ZF_PROTECT>>16 rlwinm r3,flags,0,INCDEC_FIELD RES_SHIFT(r4) @@ -1066,7 +1066,7 @@ _eval_sf_zf: andis. r5,flags,ZF_PROTECT>>16 crmove SF,0 blr -/* +/* * _eval_cf may be called at any time, no other flag is affected. * On return: CF=cr4[0], r3= CF ? 0x100:0 = CF<<8. */ @@ -1083,11 +1083,11 @@ _eval_cf: addc r3,flags,flags # CF_IN to xer[ca] cmplw cr4,one,r3 # sets cr4[0] blr -/* +/* * eval_of returns the overflow flag in OF_STATE field, which will be * either 001 (OF clear) or 101 (OF set), is is only called when the two - * low order bits of OF_STATE are not 01 (otherwise it will work but - * it is an elaborate variant of a nop with a few registers destroyed) + * low order bits of OF_STATE are not 01 (otherwise it will work but + * it is an elaborate variant of a nop with a few registers destroyed) * The code multiplexes several sources in a branchless way, was fun to write. */ _eval_of: GET_ADDSUB(r4) # 0(add)/1(sub) @@ -1113,7 +1113,7 @@ _eval_of: GET_ADDSUB(r4) # 0(add)/1(sub) rlwimi flags,r3,3,OF_VALUE # insert OF blr -/* +/* * _eval_pf will always be called when needed (complex but infrequent), * there are a few quirks for a branchless solution. * On return: PF=cr0[0], PF=MSB(r3) @@ -1135,12 +1135,12 @@ _eval_pf: rlwinm r3,flags,0,INCDEC_FIELD add. r3,r4,r5 # and test to simplify blr # returns in r3 and cr0 set. -/* +/* * _eval_af will always be called when needed (complex but infrequent): * - if after inc, af is set when 4 low order bits of op1 are 0 * - if after dec, af is set when 4 low order bits of op1 are 1 * (or 0 after adding 1 as implemented here) - * - if after add/sub/adc/sbb/cmp af is set from sum of 4 LSB of op1 + * - if after add/sub/adc/sbb/cmp af is set from sum of 4 LSB of op1 * and 4 LSB of op2 (eventually complemented) plus carry in. * - other instructions leave AF undefined so the returned value is irrelevant. * Returned value must be masked with 0x10, since all other bits are undefined. @@ -1164,7 +1164,7 @@ _eval_af: rlwinm r3,flags,0,INCDEC_FIELD or r3,r4,r5 blr -/* +/* * _eval_above will only be called if ABOVE_IN_CR is not set. * On return: ZF=cr6[2], CF=cr4[0], ABOVE=cr4[1] */ @@ -1218,7 +1218,7 @@ _eval_flags: mflr r0 /* Quite simple for real mode, input in r4, returns in r3. */ _segment_load: lwz r5,vbase(state) - rlwinm r3,r4,4,0xffff0 # segment selector * 16 + rlwinm r3,r4,4,0xffff0 # segment selector * 16 add r3,r3,r5 blr @@ -1234,10 +1234,10 @@ _check_port: lwz r5,ioperm(state) and. r0,r0,r5 bne- complex blr -/* +/* * Instructions are in approximate functional order: - * 1) move, exchange, lea, push/pop, pusha/popa - * 2) cbw/cwde/cwd/cdq, zero/sign extending moves, in/out + * 1) move, exchange, lea, push/pop, pusha/popa + * 2) cbw/cwde/cwd/cdq, zero/sign extending moves, in/out * 3) arithmetic: add/sub/adc/sbb/cmp/inc/dec/neg * 4) logical: and/or/xor/test/not/bt/btc/btr/bts/bsf/bsr * 5) jump, call, ret @@ -1256,20 +1256,20 @@ _check_port: lwz r5,ioperm(state) movb_imm_reg: rlwinm opreg,opcode,2,28,29; lbz r3,1(eip) rlwimi opreg,opcode,30,31,31; lbzu opcode,2(eip) stbx r3,REG; GOTNEXT - -movw_imm_reg: lhz r3,1(eip); clrlslwi opreg,opcode,29,2; lbzu opcode,3(eip) - sthx r3,REG; GOTNEXT - -movl_imm_reg: lwz r3,1(eip); clrlslwi opreg,opcode,29,2; lbzu opcode,5(eip) - stwx r3,REG; GOTNEXT - + +movw_imm_reg: lhz r3,1(eip); clrlslwi opreg,opcode,29,2; lbzu opcode,3(eip) + sthx r3,REG; GOTNEXT + +movl_imm_reg: lwz r3,1(eip); clrlslwi opreg,opcode,29,2; lbzu opcode,5(eip) + stwx r3,REG; GOTNEXT + movb_imm_mem: lbz r0,1(eip); cmpwi opreg,0 lbzu opcode,2(eip); bne- ud stbx r0,MEM; GOTNEXT movw_imm_mem: lhz r0,1(eip); cmpwi opreg,0 lbzu opcode,3(eip); bne- ud - sthx r0,MEM; GOTNEXT + sthx r0,MEM; GOTNEXT movl_imm_mem: lwz r0,1(eip); cmpwi opreg,0 lbzu opcode,5(eip); bne- ud @@ -1277,7 +1277,7 @@ movl_imm_mem: lwz r0,1(eip); cmpwi opreg,0 /* The special short form moves between memory and al/ax/eax */ movb_al_a32: lwbrx offset,eip,one; lbz r0,AL(state); lbzu opcode,5(eip) - stbx r0,MEM; GOTNEXT + stbx r0,MEM; GOTNEXT movb_al_a16: lhbrx offset,eip,one; lbz r0,AL(state); lbzu opcode,3(eip) stbx r0,MEM; GOTNEXT @@ -1298,13 +1298,13 @@ movb_a32_al: lwbrx offset,eip,one; lbzu opcode,5(eip); lbzx r0,MEM stb r0,AL(state); GOTNEXT movb_a16_al: lhbrx offset,eip,one; lbzu opcode,3(eip); lbzx r0,MEM - stb r0,AL(state); GOTNEXT + stb r0,AL(state); GOTNEXT movw_a32_ax: lwbrx offset,eip,one; lbzu opcode,5(eip); lhzx r0,MEM sth r0,AX(state); GOTNEXT movw_a16_ax: lhbrx offset,eip,one; lbzu opcode,3(eip); lhzx r0,MEM - sth r0,AX(state); GOTNEXT + sth r0,AX(state); GOTNEXT movl_a32_eax: lwbrx offset,eip,one; lbzu opcode,5(eip); lwzx r0,MEM stw r0,EAX(state); GOTNEXT @@ -1384,12 +1384,12 @@ leaw: cmpw base,state beq- ud sthbrx offset,REG NEXT - + leal: cmpw base,state beq- ud stwbrx offset,REG NEXT - + /* Short form pushes and pops */ pushw_sp_reg: li r3,SP lhbrx r4,state,r3 @@ -1400,7 +1400,7 @@ pushw_sp_reg: li r3,SP clrlwi r4,r4,16 sthx r0,ssb,r4 NEXT - + pushl_sp_reg: li r3,SP lhbrx r4,state,r3 clrlslwi opreg,opcode,29,2 @@ -1410,7 +1410,7 @@ pushl_sp_reg: li r3,SP clrlwi r4,r4,16 stwx r0,ssb,r4 NEXT - + popw_sp_reg: li r3,SP lhbrx r4,state,r3 clrlslwi opreg,opcode,29,2 @@ -1419,7 +1419,7 @@ popw_sp_reg: li r3,SP sthbrx r4,state,r3 sthx r0,REG NEXT - + popl_sp_reg: li r3,SP lhbrx r4,state,r3 clrlslwi opreg,opcode,29,2 @@ -1437,9 +1437,9 @@ pushw_sp_imm: li r3,SP sthbrx r4,state,r3 clrlwi r4,r4,16 lbzu opcode,3(eip) - sthx r0,ssb,r4 + sthx r0,ssb,r4 GOTNEXT - + pushl_sp_imm: li r3,SP lhbrx r4,state,r3 lwz r0,1(eip) @@ -1447,7 +1447,7 @@ pushl_sp_imm: li r3,SP sthbrx r4,state,r3 clrlwi r4,r4,16 lbzu opcode,5(eip) - stwx r0,ssb,r4 + stwx r0,ssb,r4 GOTNEXT pushw_sp_imm8: li r3,SP @@ -1458,9 +1458,9 @@ pushw_sp_imm8: li r3,SP clrlwi r4,r4,16 lbzu opcode,2(eip) extsb r0,r0 - sthx r0,ssb,r4 + sthx r0,ssb,r4 GOTNEXT - + pushl_sp_imm8: li r3,SP lhbrx r4,state,r3 lhz r0,1(eip) @@ -1469,9 +1469,9 @@ pushl_sp_imm8: li r3,SP clrlwi r4,r4,16 lbzu opcode,2(eip) extsb r0,r0 - stwx r0,ssb,r4 + stwx r0,ssb,r4 GOTNEXT - + /* General push/pop */ pushw_sp: lhbrx r0,MEM li r3,SP @@ -1481,7 +1481,7 @@ pushw_sp: lhbrx r0,MEM clrlwi r4,r4,16 sthbrx r0,r4,ssb NEXT - + pushl_sp: lwbrx r0,MEM li r3,SP lhbrx r4,state,r3 @@ -1490,11 +1490,11 @@ pushl_sp: lwbrx r0,MEM clrlwi r4,r4,16 stwbrx r0,r4,ssb NEXT - + /* pop is an exception with 32 bit addressing modes, it is possible to calculate wrongly the address when esp is used as base. But 16 bit addressing modes are safe */ - + popw_sp_a16: cmpw cr1,opreg,0 # first check the opcode li r3,SP lhbrx r4,state,r3 @@ -1504,7 +1504,7 @@ popw_sp_a16: cmpw cr1,opreg,0 # first check the opcode sthx r0,MEM sthbrx r4,state,r3 NEXT - + popl_sp_a16: cmpw cr1,opreg,0 li r3,SP lhbrx r4,state,r3 @@ -1558,7 +1558,7 @@ popaw_sp: li r3,SP bdnz 1b sthbrx r4,r3,state # updated sp NEXT - + popal_sp: li r3,SP lis r0,0xef00 # mask to skip esp lhbrx r4,state,r3 @@ -1577,12 +1577,12 @@ popal_sp: li r3,SP 2: sthbrx r4,state,r3 # updated sp NEXT -/* Moves with zero or sign extension: first the special cases */ +/* Moves with zero or sign extension: first the special cases */ cbw: lbz r3,AL(state) extsb r3,r3 sthbrx r3,AX,state NEXT - + cwde: lhbrx r3,AX,state extsh r3,r3 stwbrx r3,EAX,state @@ -1618,12 +1618,12 @@ movsbl: lbzx r3,MEM NEXT .equ movsww, movw_mem_reg - + movswl: lhbrx r3,MEM extsh r3,r3 stwbrx r3,REG NEXT - + movzbw: lbzx r3,MEM rlwimi opreg,opreg,4,0x10 rlwinm opreg,opreg,0,0x1c @@ -1635,19 +1635,19 @@ movzbl: lbzx r3,MEM rlwinm opreg,opreg,0,0x1c stwbrx r3,REG NEXT - + .equ movzww, movw_mem_reg movzwl: lhbrx r3,MEM stwbrx r3,REG NEXT -/* Byte swapping */ +/* Byte swapping */ bswap: clrlslwi opreg,opcode,29,2 # extract reg from opcode lwbrx r0,REG stwx r0,REG NEXT - + /* Input/output */ inb_port_al: NEXTBYTE(r4) b 1f @@ -1659,8 +1659,8 @@ inb_dx_al: li r4,DX lbzx r5,r4,r3 eieio stb r5,AL(state) - NEXT - + NEXT + inw_port_ax: NEXTBYTE(r4) b 1f inw_dx_ax: li r4,DX @@ -1671,8 +1671,8 @@ inw_dx_ax: li r4,DX lhzx r5,r4,r3 eieio sth r5,AX(state) - NEXT - + NEXT + inl_port_eax: NEXTBYTE(r4) b 1f inl_dx_eax: li r4,DX @@ -1684,7 +1684,7 @@ inl_dx_eax: li r4,DX eieio stw r5,EAX(state) NEXT - + outb_al_port: NEXTBYTE(r4) b 1f outb_al_dx: li r4,DX @@ -1695,8 +1695,8 @@ outb_al_dx: li r4,DX lbz r5,AL(state) stbx r5,r4,r3 eieio - NEXT - + NEXT + outw_ax_port: NEXTBYTE(r4) b 1f outw_ax_dx: li r4,DX @@ -1707,8 +1707,8 @@ outw_ax_dx: li r4,DX lhz r5,AX(state) sthx r5,r4,r3 eieio - NEXT - + NEXT + outl_eax_port: NEXTBYTE(r4) b 1f outl_eax_dx: li r4,DX @@ -1825,13 +1825,13 @@ carryforadc: addc r3,flags,flags # CF_IN to xer[ca] blr ARITH_WITH_CARRY(adc, FLAGS_ADD) - + /* for sbb the input carry must be the complement of the x86 carry */ carryforsbb: addc r3,flags,flags # CF_IN to xer[ca] RES2CF(r4) # 8/16 bit carry from result subfe r3,result,op1 CF_ROTCNT(r5) - addze r3,r4 + addze r3,r4 CF_POL(r4,23) rlwnm r3,r3,r5,0x100 eqv flags,r4,r3 # CF86 ? 0xfffffeff:0xffffffff @@ -1934,7 +1934,7 @@ cmpw_imm8: lbz op2,1(eip) sub result,op1,op2 cmplw cr4,op1,op2 GOTNEXT - + cmpl_imm_eax: addi base,state,0 li offset,EAX cmpl_imm: lwbrx op1,MEM @@ -2082,7 +2082,7 @@ op##l_imm8: lbz op2,1(eip); SET_FLAGS(FLAGS_LOG(L)); lwbrx op1,MEM; \ extsb op2,op2; lbzu opcode,2(eip); \ op result,op1,op2; \ stwbrx result,MEM; GOTNEXT - + LOGICAL(or) LOGICAL(and) @@ -2149,17 +2149,17 @@ notb: lbzx r3,MEM xori r3,r3,255 stbx r3,MEM NEXT - + notw: lhzx r3,MEM xori r3,r3,65535 sthx r3,MEM NEXT - + notl: lwzx r3,MEM not r3,r3 stwx r3,MEM NEXT - + boundw: lhbrx r4,REG li r3,code_bound lhbrx r5,MEM @@ -2173,7 +2173,7 @@ boundw: lhbrx r4,REG cmpw r4,r6 ble+ nop b complex - + boundl: lwbrx r4,REG li r3,code_bound lwbrx r5,MEM @@ -2186,10 +2186,10 @@ boundl: lwbrx r4,REG b complex /* Bit test and modify instructions */ - -/* Common routine: bit index in op2, returns memory value in r3, mask in op2, -and of mask and value in op1. CF flag is set as with 32 bit add when bit is -non zero since result (which is cleared) will be less than op1, and in cr4, + +/* Common routine: bit index in op2, returns memory value in r3, mask in op2, +and of mask and value in op1. CF flag is set as with 32 bit add when bit is +non zero since result (which is cleared) will be less than op1, and in cr4, all other flags are undefined from Intel doc. Here OF and SF are cleared and ZF is set as a side effect of result being cleared. */ _setup_bitw: cmpw base,state @@ -2205,7 +2205,7 @@ _setup_bitw: cmpw base,state and op1,r3,op2 # if result<op1 cmplw cr4,result,op1 # sets CF in cr4 blr - + _setup_bitl: cmpw base,state SET_FLAGS(FLAGS_BTEST) beq- 1f @@ -2217,14 +2217,14 @@ _setup_bitl: cmpw base,state and op1,r3,op2 cmplw cr4,result,op1 blr - + /* Immediate forms bit tests are not frequent since logical are often faster */ btw_imm: NEXTBYTE(op2) b 1f btw_reg_mem: lhbrx op2,REG 1: bl _setup_bitw NEXT - + btl_imm: NEXTBYTE(op2) b 1f btl_reg_mem: lhbrx op2,REG @@ -2238,7 +2238,7 @@ btcw_reg_mem: lhbrx op2,REG xor r3,r3,op2 sthbrx r3,MEM NEXT - + btcl_imm: NEXTBYTE(op2) b 1f btcl_reg_mem: lhbrx op2,REG @@ -2246,7 +2246,7 @@ btcl_reg_mem: lhbrx op2,REG xor r3,r3,op2 stwbrx result,MEM NEXT - + btrw_imm: NEXTBYTE(op2) b 1f btrw_reg_mem: lhbrx op2,REG @@ -2254,7 +2254,7 @@ btrw_reg_mem: lhbrx op2,REG andc r3,r3,op2 sthbrx r3,MEM NEXT - + btrl_imm: NEXTBYTE(op2) b 1f btrl_reg_mem: lhbrx op2,REG @@ -2262,7 +2262,7 @@ btrl_reg_mem: lhbrx op2,REG andc r3,r3,op2 stwbrx r3,MEM NEXT - + btsw_imm: NEXTBYTE(op2) b 1f btsw_reg_mem: lhbrx op2,REG @@ -2270,7 +2270,7 @@ btsw_reg_mem: lhbrx op2,REG or r3,r3,op2 sthbrx r3,MEM NEXT - + btsl_imm: NEXTBYTE(op2) b 1f btsl_reg_mem: lhbrx op2,REG @@ -2352,11 +2352,11 @@ sjmp_l: lbz r3,1(eip) jmp_l: lwbrx r3,eip,one # Simple addi eip,eip,5 lbzux opcode,eip,r3 - GOTNEXT + GOTNEXT -/* The conditional jumps: although it should not happen, +/* The conditional jumps: although it should not happen, byte relative jumps (sjmp) may wrap around in 16 bit mode */ - + #define NOTTAKEN_S lbzu opcode,2(eip); GOTNEXT #define NOTTAKEN_W lbzu opcode,3(eip); GOTNEXT #define NOTTAKEN_L lbzu opcode,5(eip); GOTNEXT @@ -2388,35 +2388,35 @@ jecxz_l: lwz r3,ECX(state); cmpwi r3,0; beq- sjmp_l; NOTTAKEN_S /* Note that loop is somewhat strange, the data size attribute gives the size of eip, and the address size whether the counter is cx or ecx. This is the same for jcxz/jecxz. */ - + loopw_w: li opreg,CX lhbrx r0,REG sub. r0,r0,one sthbrx r0,REG bne+ sjmp_w NOTTAKEN_S - + loopl_w: li opreg,ECX lwbrx r0,REG sub. r0,r0,one stwbrx r0,REG bne+ sjmp_w NOTTAKEN_S - + loopw_l: li opreg,CX lhbrx r0,REG sub. r0,r0,one sthbrx r0,REG bne+ sjmp_l NOTTAKEN_S - + loopl_l: li opreg,ECX lwbrx r0,REG sub. r0,r0,one stwbrx r0,REG bne+ sjmp_l NOTTAKEN_S - + loopzw_w: li opreg,CX lhbrx r0,REG EVAL_ZF @@ -2425,7 +2425,7 @@ loopzw_w: li opreg,CX bf ZF,1f bne+ sjmp_w 1: NOTTAKEN_S - + loopzl_w: li opreg,ECX lwbrx r0,REG EVAL_ZF @@ -2434,7 +2434,7 @@ loopzl_w: li opreg,ECX bf ZF,1f bne+ sjmp_w 1: NOTTAKEN_S - + loopzw_l: li opreg,CX lhbrx r0,REG EVAL_ZF @@ -2443,7 +2443,7 @@ loopzw_l: li opreg,CX bf ZF,1f bne+ sjmp_l 1: NOTTAKEN_S - + loopzl_l: li opreg,ECX lwbrx r0,REG EVAL_ZF @@ -2452,7 +2452,7 @@ loopzl_l: li opreg,ECX bf ZF,1f bne+ sjmp_l 1: NOTTAKEN_S - + loopnzw_w: li opreg,CX lhbrx r0,REG EVAL_ZF @@ -2461,7 +2461,7 @@ loopnzw_w: li opreg,CX bt ZF,1f bne+ sjmp_w 1: NOTTAKEN_S - + loopnzl_w: li opreg,ECX lwbrx r0,REG EVAL_ZF @@ -2470,7 +2470,7 @@ loopnzl_w: li opreg,ECX bt ZF,1f bne+ sjmp_w 1: NOTTAKEN_S - + loopnzw_l: li opreg,CX lhbrx r0,REG EVAL_ZF @@ -2479,7 +2479,7 @@ loopnzw_l: li opreg,CX bt ZF,1f bne+ sjmp_l 1: NOTTAKEN_S - + loopnzl_l: li opreg,ECX lwbrx r0,REG EVAL_ZF @@ -2489,7 +2489,7 @@ loopnzl_l: li opreg,ECX bne+ sjmp_l 1: NOTTAKEN_S -/* Memory indirect calls are rare enough to limit code duplication */ +/* Memory indirect calls are rare enough to limit code duplication */ callw_sp_mem: lhbrx r3,MEM sub r4,eip,csb addi r4,r4,1 # r4 is now return address @@ -2522,7 +2522,7 @@ retw_sp_imm: li opreg,SP GOTNEXT .equ retl_sp_imm, unimpl - + retw_sp: li opreg,SP lhbrx r4,REG addi r5,r4,2 @@ -2535,8 +2535,8 @@ retw_sp: li opreg,SP /* Enter is a mess, and the description in Intel documents is actually wrong * in most revisions (all PPro/PII I have but the old Pentium is Ok) ! - */ - + */ + enterw_sp: lhbrx r0,eip,one # Stack space to allocate li opreg,SP lhbrx r3,REG # SP @@ -2557,12 +2557,12 @@ enterw_sp: lhbrx r0,eip,one # Stack space to allocate addi r3,r3,-2 clrlwi r3,r3,16 sthx r4,ssb,r3 -2: bdnz 1b +2: bdnz 1b addi r3,r3,-2 # save current frame pointer clrlwi r3,r3,16 sthbrx r6,ssb,r3 3: sthbrx r6,state,r7 # New BP - sub r3,r3,r0 + sub r3,r3,r0 sthbrx r3,REG # Save new stack pointer NEXT @@ -2570,13 +2570,13 @@ enterw_sp: lhbrx r0,eip,one # Stack space to allocate leavew_sp: li opreg,BP lhbrx r3,REG # Stack = BP - addi r4,r3,2 # + addi r4,r3,2 # lhzx r3,ssb,r3 li opreg,SP sthbrx r4,REG # New Stack sth r3,BP(state) # Popped BP NEXT - + .equ leavel_sp, unimpl /* String instructions: first a generic setup routine, which exits early @@ -2596,11 +2596,11 @@ _setup_stringw: li offset,SI # cmpwi r3,0 beq nop # early exit here ! 1: mtctr r3 # ctr=CX or 1 - li r7,1 # stride + li r7,1 # stride bflr+ DF li r7,-1 # change stride sign blr - + /* Ending routine to update all changed registers (goes directly to NEXT) */ _finish_strw: li r4,SI sthbrx offset,state,r4 # update si @@ -2620,7 +2620,7 @@ lodsb_a16: bl _setup_stringw bdnz 1b stb r0,AL(state) b _finish_strw - + lodsw_a16: bl _setup_stringw slwi r7,r7,1 1: lhzx r0,STRINGSRC # [rep] lodsw @@ -2629,7 +2629,7 @@ lodsw_a16: bl _setup_stringw bdnz 1b sth r0,AX(state) b _finish_strw - + lodsl_a16: bl _setup_stringw slwi r7,r7,2 1: lwzx r0,STRINGSRC # [rep] lodsl @@ -2638,7 +2638,7 @@ lodsl_a16: bl _setup_stringw bdnz 1b stw r0,EAX(state) b _finish_strw - + stosb_a16: bl _setup_stringw lbz r0,AL(state) 1: stbx r0,STRINGDST # [rep] stosb @@ -2646,7 +2646,7 @@ stosb_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + stosw_a16: bl _setup_stringw lhz r0,AX(state) slwi r7,r7,1 @@ -2655,7 +2655,7 @@ stosw_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + stosl_a16: bl _setup_stringw lwz r0,EAX(state) slwi r7,r7,2 @@ -2664,7 +2664,7 @@ stosl_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + movsb_a16: bl _setup_stringw 1: lbzx r0,STRINGSRC # [rep] movsb add offset,offset,r7 @@ -2674,7 +2674,7 @@ movsb_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + movsw_a16: bl _setup_stringw slwi r7,r7,1 1: lhzx r0,STRINGSRC # [rep] movsw @@ -2685,7 +2685,7 @@ movsw_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + movsl_a16: bl _setup_stringw slwi r7,r7,2 1: lwzx r0,STRINGSRC # [rep] movsl @@ -2696,14 +2696,14 @@ movsl_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + /* At least on a Pentium, repeated string I/O instructions check for access port permission even if count is 0 ! So the order of the check is not important. */ insb_a16: li r4,DX li r3,code_insb_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw lwz base,iobase(state) 1: lbzx r0,base,r4 # [rep] insb @@ -2713,11 +2713,11 @@ insb_a16: li r4,DX clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + insw_a16: li r4,DX li r3,code_insw_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw lwz base,iobase(state) slwi r7,r7,1 @@ -2728,11 +2728,11 @@ insw_a16: li r4,DX clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + insl_a16: li r4,DX li r3,code_insl_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw lwz base,iobase(state) slwi r7,r7,2 @@ -2743,17 +2743,17 @@ insl_a16: li r4,DX clrlwi opreg,opreg,16 bdnz 1b b _finish_strw - + outsb_a16: li r4,DX li r3,code_outsb_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw lwz r6,iobase(state) 1: lbzx r0,STRINGSRC # [rep] outsb add offset,offset,r7 stbx r0,r6,r4 - clrlwi offset,offset,16 + clrlwi offset,offset,16 eieio bdnz 1b b _finish_strw @@ -2761,7 +2761,7 @@ outsb_a16: li r4,DX outsw_a16: li r4,DX li r3,code_outsw_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw li r5,DX lwz r6,iobase(state) @@ -2769,7 +2769,7 @@ outsw_a16: li r4,DX 1: lhzx r0,STRINGSRC # [rep] outsw add offset,offset,r7 sthx r0,r6,r4 - clrlwi offset,offset,16 + clrlwi offset,offset,16 eieio bdnz 1b b _finish_strw @@ -2777,14 +2777,14 @@ outsw_a16: li r4,DX outsl_a16: li r4,DX li r3,code_outsl_a16 lhbrx r4,state,r4 - bl _check_port + bl _check_port bl _setup_stringw lwz r6,iobase(state) slwi r7,r7,2 1: lwzx r0,STRINGSRC # [rep] outsl add offset,offset,r7 stwx r0,r6,r4 - clrlwi offset,offset,16 + clrlwi offset,offset,16 eieio bdnz 1b b _finish_strw @@ -2869,7 +2869,7 @@ cmpsl_a16: bl _setup_stringw clrlwi opreg,opreg,16 bdnzf CF+2,3b b 2b - + scasb_a16: bl _setup_stringw lbzx op1,AL,state # AL SET_FLAGS(FLAGS_CMP(B)) @@ -2939,7 +2939,7 @@ scasl_a16: bl _setup_stringw .equ lodsb_a32, unimpl .equ lodsw_a32, unimpl .equ lodsl_a32, unimpl - .equ stosb_a32, unimpl + .equ stosb_a32, unimpl .equ stosw_a32, unimpl .equ stosl_a32, unimpl .equ movsb_a32, unimpl @@ -2964,22 +2964,22 @@ xlatb_a16: li offset,BX add r3,r3,base lbzx r3,r3,offset stb r3,AL(state) - NEXT + NEXT .equ xlatb_a32, unimpl -/* +/* * Shift and rotates: note the oddity that rotates do not affect SF/ZF/AF/PF * but shifts do. Also testing has indicated that rotates with a count of zero - * do not affect any flag. The documentation specifies this for shifts but - * is more obscure for rotates. The overflow flag setting is only specified + * do not affect any flag. The documentation specifies this for shifts but + * is more obscure for rotates. The overflow flag setting is only specified * when count is 1, otherwise OF is undefined which simplifies emulation. */ -/* +/* * The rotates through carry are among the most difficult instructions, * they are implemented as a shift of 2*n+some bits depending on case. - * First the left rotates through carry. + * First the left rotates through carry. */ /* Byte rcl is performed on 18 bits (17 actually used) in a single register */ @@ -3008,7 +3008,7 @@ rclb_1: li r3,1 rlwnm r0,r0,r3,0x000001ff # (23)0:NewCF:Result8 rlwimi flags,r0,19,CF_VALUE stbx r0,MEM - rlwimi flags,r0,18,OF_XOR + rlwimi flags,r0,18,OF_XOR NEXT /* Word rcl is performed on 33 bits (CF:data16:CF:(15 MSB of data16) */ @@ -3040,7 +3040,7 @@ rclw_1: li r3,1 add r0,r0,r4 # result rlwimi flags,r0,11,CF_VALUE sthbrx r0,MEM - rlwimi flags,r0,10,OF_XOR + rlwimi flags,r0,10,OF_XOR NEXT /* Longword rcl only needs 64 bits because the maximum rotate count is 31 ! */ @@ -3106,7 +3106,7 @@ rcrb_1: li r3,1 /* Word rcr is a 33 bit right shift with a quirk, because the 33rd bit is only needed when the rotate count is 16 and rotating left or right -by 16 a 32 bit quantity is the same ! */ +by 16 a 32 bit quantity is the same ! */ rcrw_imm: NEXTBYTE(r3) b 1f rcrw_cl: lbz r3,CL(state) @@ -3179,7 +3179,7 @@ rolb_1: li r3,1 rlwimi r0,r0,24,0xff000000 # replicate for shift in beq- nop # no flags changed if count 0 ROTATE_FLAGS - rotlw r0,r0,r3 + rotlw r0,r0,r3 rlwimi flags,r0,27,CF_VALUE # New CF stbx r0,MEM rlwimi flags,r0,26,OF_XOR # New OF (CF xor MSB) @@ -3660,7 +3660,7 @@ divl: li opreg,EDX # Not yet fully implemented stwbrx r5,EAX,state stwbrx r4,REG NEXT -/* +/* * Divide r4:r5 by r3, quotient in r5, remainder in r4. * The algorithm is stupid because it won't be used very often. */ @@ -3805,7 +3805,7 @@ movw_sr_mem: cmpwi opreg,20 # SREG 0 to 5 only 1: sthbrx r0,MEM NEXT -/* Now the instructions that modify the segment registers, note that +/* Now the instructions that modify the segment registers, note that move/pop to ss disable interrupts and traps for one instruction ! */ popl_sp_sr: li r6,4 b 1f @@ -3826,7 +3826,7 @@ popw_sp_sr: li r6,2 lwz ssb,ssbase(state) # pop ss crmove RF,TF # prevent traps NEXT - + movw_mem_sr: cmpwi opreg,20 addi r7,state,SELBASES bgt- ud @@ -3841,11 +3841,11 @@ movw_mem_sr: cmpwi opreg,20 bne+ nop lwz ssb,ssbase(state) crmove RF,TF # prevent traps - NEXT - + NEXT + .equ movl_mem_sr, movw_mem_sr -/* The encoding of les/lss/lds/lfs/lgs is strange, opcode is c4/b2/c5/b4/b5 +/* The encoding of les/lss/lds/lfs/lgs is strange, opcode is c4/b2/c5/b4/b5 for es/ss/ds/fs/gs which are sreg 0/2/3/4/5. And obviously there is no lcs instruction, it's called a far jump. */ @@ -3859,7 +3859,7 @@ ldlptrw: lhzux r7,MEM bl 1f sthx r7,REG NEXT - + 1: cmpw base,state lis r3,0xc011 # es/ss/ds/fs/gs rlwinm r5,opcode,2,0x0c # 00/08/04/00/04 @@ -3879,7 +3879,7 @@ ldlptrw: lhzux r7,MEM blr -/* Intructions that may modify the current code segment: the next optimization +/* Intructions that may modify the current code segment: the next optimization * might be to avoid calling C code when the code segment does not change. But * it's probably not worth the effort. */ @@ -3972,13 +3972,13 @@ stc: oris flags,flags,\ (CF_IN_CR|CF_LOCATION|CF_COMPLEMENT|ABOVE_IN_CR)>>16 xoris flags,flags,(CF_IN_CR|CF_LOCATION|ABOVE_IN_CR)>>16 NEXT - + cld: crclr DF NEXT std: crset DF NEXT - + cli: crclr IF NEXT @@ -4029,7 +4029,7 @@ popfl_sp: li r4,SP stw r3,eflags(state) sthbrx r5,r4,state b 1f - + popfw_sp: li r4,SP lhbrx r5,r4,state lhbrx r3,ssb,r5 @@ -4066,7 +4066,7 @@ setnz: EVAL_ZF #define SETCC(cond, eval, flag) \ set##cond: EVAL_##eval; bt flag,1b; b 0b; \ setn##cond: EVAL_##eval; bt flag,0b; b 1b - + SETCC(c, CF, CF) SETCC(a, ABOVE, ABOVE) SETCC(s, SF, SF) @@ -4134,7 +4134,7 @@ daa: lbz r0,AL(state) stb result,AL(state) rlwimi result,r3,2,0x100 # set CF if added NEXT - + das: lbz r0,AL(state) bl _eval_af rlwinm r7,r3,0,0x10 @@ -4153,7 +4153,7 @@ das: lbz r0,AL(state) stb result,AL(state) rlwimi result,r3,2,0x100 # set CF NEXT - + /* 486 specific instructions */ /* For cmpxchg, only the zero flag is important */ @@ -4226,7 +4226,7 @@ esc: li r3,code_dna # DNA interrupt .equ invd, unimpl -/* Undefined in real address mode */ +/* Undefined in real address mode */ .equ lar, ud .equ lgdt, unimpl @@ -4250,7 +4250,7 @@ esc: li r3,code_dna # DNA interrupt .equ smsw, unimpl .equ str, ud - + ud: li r3,code_ud li r4,0 b complex @@ -4272,7 +4272,7 @@ em86_end: .section .rodata #define ENTRY(x,t) .long x+t #endif - + #define BOP(x) ENTRY(x,2) /* Byte operation with mod/rm byte */ #define WLOP(x) ENTRY(x,3) /* 16 or 32 bit operation with mod/rm byte */ #define EXTOP(x) ENTRY(x,0) /* Opcode with extension in mod/rm byte */ @@ -4488,7 +4488,7 @@ _jtables: jtable(w, a16, sp, ax, www) /* data16, addr16 */ jtable(l, a32, sp, eax, llw) /* data32, addr32 */ /* The other possible combinations are only required by protected mode code using a big stack segment */ -/* Here are the auxiliary tables for opcode extensions, note that +/* Here are the auxiliary tables for opcode extensions, note that all entries get 2 or 3 added. */ #define grp1table(bwl,t,s8) \ grp1##bwl##_imm##s8:; \ @@ -4543,7 +4543,7 @@ grp5##wl##_##spesp: \ WLOP(inc##wl); WLOP(dec##wl); \ WLOP(call##wl##_##spesp##_mem); WLOP(lcall##wl##); \ WLOP(jmp##wl); WLOP(ljmp##wl); \ - WLOP(push##wl##_##spesp); OP(ud) + WLOP(push##wl##_##spesp); OP(ud) grp5table(w,sp) grp5table(l,sp) @@ -4551,7 +4551,7 @@ grp5##wl##_##spesp: \ #define grp8table(wl) \ grp8##wl: OP(ud); OP(ud); OP(ud); OP(ud); \ WLOP(bt##wl##_imm); WLOP(bts##wl##_imm); \ - WLOP(btr##wl##_imm); WLOP(btc##wl##_imm) + WLOP(btr##wl##_imm); WLOP(btc##wl##_imm) grp8table(w) grp8table(l) diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S b/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S index 059c62cd32..46f719c443 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S @@ -16,80 +16,80 @@ */ /* This is an improved version of the TLB interrupt handling code from - * the 603e users manual (603eUM.pdf) downloaded from the WWW. All the - * visible bugs have been removed. Note that many have survived in the errata - * to the 603 user manual (603UMer.pdf). - * + * the 603e users manual (603eUM.pdf) downloaded from the WWW. All the + * visible bugs have been removed. Note that many have survived in the errata + * to the 603 user manual (603UMer.pdf). + * * This code also pays particular attention to optimization, takes into * account the differences between 603 and 603e, single/multiple processor * systems and tries to order instructions for dual dispatch in many places. - * + * * The optimization has been performed along two lines: * 1) to minimize the number of instruction cache lines needed for the most * common execution paths (the ones that do not result in an exception). - * 2) then to order the code to maximize the number of dual issue and - * completion opportunities without increasing the number of cache lines + * 2) then to order the code to maximize the number of dual issue and + * completion opportunities without increasing the number of cache lines * used in the same cases. - * + * * The last goal of this code is to fit inside the address range * assigned to the interrupt vectors: 192 instructions with fixed * entry points every 64 instructions. - * + * * Some typos have also been corrected and the Power l (lowercase L) * instructions replaced by lwz without comment. - * + * * I have attempted to describe the reasons of the order and of the choice * of the instructions but the comments may be hard to understand without * the processor manual. - * + * * Note that the fact that the TLB are reloaded by software in theory - * allows tremendous flexibility, for example we could avoid setting the + * allows tremendous flexibility, for example we could avoid setting the * reference bit of the PTE which will could actually not be accessed because - * of protection violation by changing a few lines of code. However, + * of protection violation by changing a few lines of code. However, * this would significantly slow down most TLB reload operations, and * this is the reason for which we try never to make checks which would be * redundant with hardware and usually indicate a bug in a program. - * + * * There are some inconsistencies in the documentation concerning the - * settings of SRR1 bit 15. All recent documentations say now that it is set + * settings of SRR1 bit 15. All recent documentations say now that it is set * for stores and cleared for loads. Anyway this handler never uses this bit. - * + * * A final remark, the rfi instruction seems to implicitly clear the * MSR<14> (tgpr)bit. The documentation claims that this bit is restored * from SRR1 by rfi, but the corresponding bit in SRR1 is the LRU way bit. * Anyway, the only exception which can occur while TGPR is set is a machine * check which would indicate an unrecoverable problem. Recent documentation - * now says in some place that rfi clears MSR<14>. - * - * TLB software load for 602/603/603e/603ev: - * Specific Instructions: - * tlbld - write the dtlb with the pte in rpa reg - * tlbli - write the itlb with the pte in rpa reg - * Specific SPRs: - * dmiss - address of dstream miss + * now says in some place that rfi clears MSR<14>. + * + * TLB software load for 602/603/603e/603ev: + * Specific Instructions: + * tlbld - write the dtlb with the pte in rpa reg + * tlbli - write the itlb with the pte in rpa reg + * Specific SPRs: + * dmiss - address of dstream miss * imiss - address of istream miss - * hash1 - address primary hash PTEG address - * hash2 - returns secondary hash PTEG address - * iCmp - returns the primary istream compare value - * dCmp - returns the primary dstream compare value + * hash1 - address primary hash PTEG address + * hash2 - returns secondary hash PTEG address + * iCmp - returns the primary istream compare value + * dCmp - returns the primary dstream compare value * rpa - the second word of pte used by tlblx - * Other specific resources: + * Other specific resources: * cr0 saved in 4 high order bits of SRR1, - * SRR1 bit 14 [WAY] selects TLB set to load from LRU algorithm - * gprs r0..r3 shadowed by the setting of MSR bit 14 [TGPR] + * SRR1 bit 14 [WAY] selects TLB set to load from LRU algorithm + * gprs r0..r3 shadowed by the setting of MSR bit 14 [TGPR] * other bits in SRR1 (unused by this handler but see earlier comments) - * + * * There are three basic flows corresponding to three vectors: - * 0x1000: Instruction TLB miss, + * 0x1000: Instruction TLB miss, * 0x1100: Data TLB miss on load, - * 0x1200: Data TLB miss on store or not dirty page + * 0x1200: Data TLB miss on store or not dirty page */ - + /* define the following if code does not have to run on basic 603 */ /* #define USE_KEY_BIT */ - + /* define the following for safe multiprocessing */ -/* #define MULTIPROCESSING */ +/* #define MULTIPROCESSING */ /* define the following for mixed endian */ /* #define CHECK_MIXED_ENDIAN */ @@ -100,53 +100,53 @@ /* Some OS kernels may want to keep a single copy of the dirty bit in a per * page table. In this case writable pages are always write-protected as long * as they are clean, and the dirty bit set actually means that the page - * is writable. + * is writable. */ -#define DIRTY_MEANS_WRITABLE - +#define DIRTY_MEANS_WRITABLE + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include "bootldr.h" -/* - * Instruction TLB miss flow - * Entry at 0x1000 with the following: - * srr0 -> address of instruction that missed - * srr1 -> 0:3=cr0, 13=1 (instruction), 14=lru way, 16:31=saved MSR - * msr<tgpr> -> 1 - * iMiss -> ea that missed - * iCmp -> the compare value for the va that missed +/* + * Instruction TLB miss flow + * Entry at 0x1000 with the following: + * srr0 -> address of instruction that missed + * srr1 -> 0:3=cr0, 13=1 (instruction), 14=lru way, 16:31=saved MSR + * msr<tgpr> -> 1 + * iMiss -> ea that missed + * iCmp -> the compare value for the va that missed * hash1 -> pointer to first hash pteg - * hash2 -> pointer to second hash pteg + * hash2 -> pointer to second hash pteg * - * Register usage: - * r0 is limit address during search / scratch after + * Register usage: + * r0 is limit address during search / scratch after * r1 is pte data / error code for ISI exception when search fails - * r2 is pointer to pte + * r2 is pointer to pte * r3 is compare value during search / scratch after */ /* Binutils or assembler bug ? Declaring the section executable and writable * generates an error message on the @fixup entries. */ - .section .exception,"aw" + .section .exception,"aw" # .org 0x1000 # instruction TLB miss entry point .globl tlb_handlers tlb_handlers: .type tlb_handlers,@function #define ISIVec tlb_handlers-0x1000+0x400 #define DSIVec tlb_handlers-0x1000+0x300 - mfspr r2,HASH1 + mfspr r2,HASH1 lwz r1,0(r2) # Start memory access as soon as possible - mfspr r3,ICMP # to load the cache. + mfspr r3,ICMP # to load the cache. 0: la r0,48(r2) # Use explicit loop to avoid using ctr 1: cmpw r1,r3 # In theory the loop is somewhat slower beq- 2f # than documentation example - cmpw r0,r2 # but we gain from starting cache load - lwzu r1,8(r2) # earlier and using slots between load - bne+ 1b # and comparison for other purposes. + cmpw r0,r2 # but we gain from starting cache load + lwzu r1,8(r2) # earlier and using slots between load + bne+ 1b # and comparison for other purposes. cmpw r1,r3 bne- 4f # Secondary hash check -2: lwz r1,4(r2) # Found: load second word of PTE +2: lwz r1,4(r2) # Found: load second word of PTE mfspr r0,IMISS # get miss address during load delay #ifdef ASSUME_REF_SET andi. r3,r1,8 # check for guarded memory @@ -159,12 +159,12 @@ tlb_handlers: # andi. r3,r1,8 # check for guarded memory # bne- 5f # andi. r3,r1,0x100 # check R bit ahead to help folding -/* However there is a better solution: these last three instructions can be -replaced by the following which should cause less pipeline stalls because +/* However there is a better solution: these last three instructions can be +replaced by the following which should cause less pipeline stalls because both tests are combined and there is a single CR rename buffer */ extlwi r3,r1,6,23 # Keep only RCWIMG in 6 most significant bits. - rlwinm. r3,r3,5,0,27 # Keep only G (in sign) and R and test. - blt- 5f # Negative means guarded, zero R not set. + rlwinm. r3,r3,5,0,27 # Keep only G (in sign) and R and test. + blt- 5f # Negative means guarded, zero R not set. mfsrr1 r3 # get saved cr0 bits now to dual issue ori r1,r1,0x100 mtspr RPA,r1 @@ -174,7 +174,7 @@ writeback at a later time, and avoid even more bus traffic in multiprocessing systems, when several processors access the same PTEGs. We also hope that the reference bit will be already set. */ bne+ 3f -#ifdef MULTIPROCESSING +#ifdef MULTIPROCESSING srwi r1,r1,8 # get byte 7 of pte stb r1,+6(r2) # update page table #else @@ -183,7 +183,7 @@ We also hope that the reference bit will be already set. */ #endif 3: mtcrf 0x80,r3 # restore CR0 rfi # return to executing program - + /* The preceding code is 20 to 25 instructions long, which occupies 3 or 4 cache lines. */ 4: andi. r0,r3,0x0040 # see if we have done second hash @@ -194,9 +194,9 @@ We also hope that the reference bit will be already set. */ lwz r1,0(r2) # load first entry b 0b # and go back to main loop /* We are now at 27 to 32 instructions, using 3 or 4 cache lines for all -cases in which the TLB is successfully loaded. */ +cases in which the TLB is successfully loaded. */ -/* Guarded memory protection violation: synthesize an ISI exception. */ +/* Guarded memory protection violation: synthesize an ISI exception. */ 5: lis r1,0x1000 # set srr1<3>=1 to flag guard violation /* Entry Not Found branches here with r1 correctly set. */ 6: mfsrr1 r3 @@ -209,41 +209,41 @@ a field of contiguous bits in a register by setting mask_begin>mask_end. */ mtcrf 0x80, r3 # restore CR0 mtmsr r0 # flip back to the native gprs isync # Required from 602 doc! - b ISIVec # go to instruction access exception -/* Up to now there are 37 to 42 instructions so at least 20 could be -inserted for complex cases or for statistics recording. */ + b ISIVec # go to instruction access exception +/* Up to now there are 37 to 42 instructions so at least 20 could be +inserted for complex cases or for statistics recording. */ -/* - Data TLB miss on load flow - Entry at 0x1100 with the following: - srr0 -> address of instruction that caused the miss - srr1 -> 0:3=cr0, 13=0 (data), 14=lru way, 15=0, 16:31=saved MSR - msr<tgpr> -> 1 - dMiss -> ea that missed - dCmp -> the compare value for the va that missed +/* + Data TLB miss on load flow + Entry at 0x1100 with the following: + srr0 -> address of instruction that caused the miss + srr1 -> 0:3=cr0, 13=0 (data), 14=lru way, 15=0, 16:31=saved MSR + msr<tgpr> -> 1 + dMiss -> ea that missed + dCmp -> the compare value for the va that missed hash1 -> pointer to first hash pteg - hash2 -> pointer to second hash pteg - - Register usage: - r0 is limit address during search / scratch after + hash2 -> pointer to second hash pteg + + Register usage: + r0 is limit address during search / scratch after r1 is pte data / error code for DSI exception when search fails - r2 is pointer to pte + r2 is pointer to pte r3 is compare value during search / scratch after */ - .org tlb_handlers+0x100 - mfspr r2,HASH1 + .org tlb_handlers+0x100 + mfspr r2,HASH1 lwz r1,0(r2) # Start memory access as soon as possible mfspr r3,DCMP # to load the cache. 0: la r0,48(r2) # Use explicit loop to avoid using ctr 1: cmpw r1,r3 # In theory the loop is somewhat slower beq- 2f # than documentation example - cmpw r0,r2 # but we gain from starting cache load - lwzu r1,8(r2) # earlier and using slots between load - bne+ 1b # and comparison for other purposes. + cmpw r0,r2 # but we gain from starting cache load + lwzu r1,8(r2) # earlier and using slots between load + bne+ 1b # and comparison for other purposes. cmpw r1,r3 bne- 4f # Secondary hash check -2: lwz r1,4(r2) # Found: load second word of PTE +2: lwz r1,4(r2) # Found: load second word of PTE mfspr r0,DMISS # get miss address during load delay #ifdef ASSUME_REF_SET mtspr RPA,r1 @@ -260,7 +260,7 @@ writeback at a later time, and avoid even more bus traffic in multiprocessing systems, when several processors access the same PTEGs. We also hope that the reference bit will be already set. */ bne+ 3f -#ifdef MULTIPROCESSING +#ifdef MULTIPROCESSING srwi r1,r1,8 # get byte 7 of pte stb r1,+6(r2) # update page table #else @@ -269,7 +269,7 @@ We also hope that the reference bit will be already set. */ #endif 3: mtcrf 0x80,r3 # restore CR0 rfi # return to executing program - + /* The preceding code is 18 to 23 instructions long, which occupies 3 cache lines. */ 4: andi. r0,r3,0x0040 # see if we have done second hash @@ -280,55 +280,55 @@ We also hope that the reference bit will be already set. */ lwz r1,0(r2) # load first entry asap b 0b # and go back to main loop /* We are now at 25 to 30 instructions, using 3 or 4 cache lines for all -cases in which the TLB is successfully loaded. */ +cases in which the TLB is successfully loaded. */ -/* - Data TLB miss on store or not dirty page flow - Entry at 0x1200 with the following: - srr0 -> address of instruction that caused the miss - srr1 -> 0:3=cr0, 13=0 (data), 14=lru way, 15=1, 16:31=saved MSR - msr<tgpr> -> 1 - dMiss -> ea that missed - dCmp -> the compare value for the va that missed +/* + Data TLB miss on store or not dirty page flow + Entry at 0x1200 with the following: + srr0 -> address of instruction that caused the miss + srr1 -> 0:3=cr0, 13=0 (data), 14=lru way, 15=1, 16:31=saved MSR + msr<tgpr> -> 1 + dMiss -> ea that missed + dCmp -> the compare value for the va that missed hash1 -> pointer to first hash pteg - hash2 -> pointer to second hash pteg - - Register usage: - r0 is limit address during search / scratch after + hash2 -> pointer to second hash pteg + + Register usage: + r0 is limit address during search / scratch after r1 is pte data / error code for DSI exception when search fails - r2 is pointer to pte + r2 is pointer to pte r3 is compare value during search / scratch after -*/ +*/ .org tlb_handlers+0x200 - mfspr r2,HASH1 + mfspr r2,HASH1 lwz r1,0(r2) # Start memory access as soon as possible - mfspr r3,DCMP # to load the cache. + mfspr r3,DCMP # to load the cache. 0: la r0,48(r2) # Use explicit loop to avoid using ctr 1: cmpw r1,r3 # In theory the loop is somewhat slower beq- 2f # than documentation example - cmpw r0,r2 # but we gain from starting cache load - lwzu r1,8(r2) # earlier and using slots between load - bne+ 1b # and comparison for other purposes. + cmpw r0,r2 # but we gain from starting cache load + lwzu r1,8(r2) # earlier and using slots between load + bne+ 1b # and comparison for other purposes. cmpw r1,r3 bne- 4f # Secondary hash check -2: lwz r1,4(r2) # Found: load second word of PTE +2: lwz r1,4(r2) # Found: load second word of PTE mfspr r0,DMISS # get miss address during load delay -/* We could simply set the C bit and then rely on hardware to flag protection -violations. This raises the problem that a page which actually has not been -modified may be marked as dirty and violates the OEA model for guaranteed -bit settings (table 5-8 of 603eUM.pdf). This can have harmful consequences -on operating system memory management routines, and play havoc with copy on +/* We could simply set the C bit and then rely on hardware to flag protection +violations. This raises the problem that a page which actually has not been +modified may be marked as dirty and violates the OEA model for guaranteed +bit settings (table 5-8 of 603eUM.pdf). This can have harmful consequences +on operating system memory management routines, and play havoc with copy on write schemes. So the protection check is ABSOLUTELY necessary. */ andi. r3,r1,0x80 # check C bit - beq- 5f # if (C==0) go to check protection -3: mfsrr1 r3 # get the saved cr0 bits + beq- 5f # if (C==0) go to check protection +3: mfsrr1 r3 # get the saved cr0 bits mtspr RPA,r1 # set the pte - tlbld r0 # load the dtlb - mtcrf 0x80,r3 # restore CR0 - rfi # return to executing program + tlbld r0 # load the dtlb + mtcrf 0x80,r3 # restore CR0 + rfi # return to executing program /* The preceding code is 20 instructions long, which occupy -3 cache lines. */ +3 cache lines. */ 4: andi. r0,r3,0x0040 # see if we have done second hash lis r1,0x4200 # set up error code in case next branch taken bne- 9f # speculatively issue the following @@ -342,21 +342,21 @@ cases in which the TLB C bit is already set. */ #ifdef DIRTY_MEANS_WRITABLE 5: lis r1,0x0A00 # protection violation on store #else -/* - Entry found and C==0: check protection before setting C: - Register usage: +/* + Entry found and C==0: check protection before setting C: + Register usage: r0 is dMiss register - r1 is PTE entry (to be copied to RPA if success) - r2 is pointer to pte - r3 is trashed + r1 is PTE entry (to be copied to RPA if success) + r2 is pointer to pte + r3 is trashed For the 603e, the key bit in SRR1 helps to decide whether there is a protection violation. However the way the check is done in the manual is not very efficient. The code shown here works as well for 603 and 603e and is much more efficient for the 603 and comparable to the manual example - for 603e. This code however has quite a bad structure due to the fact it - has been reordered to speed up the most common cases. -*/ + for 603e. This code however has quite a bad structure due to the fact it + has been reordered to speed up the most common cases. +*/ /* The first of the following two instructions could be replaced by andi. r3,r1,3 but it would compete with cmplwi for cr0 resource. */ 5: clrlwi r3,r1,30 # Extract two low order bits @@ -368,59 +368,59 @@ andi. r3,r1,3 but it would compete with cmplwi for cr0 resource. */ /* We are now at 33 instructions, using 5 cache lines. */ 7: bgt- 8f # if PP=11 then DSI protection exception /* This code only works if key bit is present (602/603e/603ev) */ -#ifdef USE_KEY_BIT +#ifdef USE_KEY_BIT mfsrr1 r3 # get the KEY bit and test it andis. r3,r3,0x0008 beq 6b # default prediction taken, truly better ? -#else +#else /* This code is for all 602 and 603 family models: */ mfsrr1 r3 # Here the trick is to use the MSR PR bit as a mfsrin r0,r0 # shift count for an rlwnm. instruction which extrwi r3,r3,1,17 # extracts and tests the correct key bit from rlwnm. r3,r0,r3,1,1 # the segment register. RISC they said... - mfspr r0,DMISS # Restore fault address to r0 + mfspr r0,DMISS # Restore fault address to r0 beq 6b # if 0 load tlb else protection fault #endif /* We are now at 40 instructions, (37 if using key bit), using 5 cache lines in all cases in which the C bit is successfully set */ 8: lis r1,0x0A00 # protection violation on store #endif /* DIRTY_IS_WRITABLE */ -/* PTE entry not found branch here with DSISR code in r1 */ +/* PTE entry not found branch here with DSISR code in r1 */ 9: mfsrr1 r3 mtdsisr r1 - clrlwi r2,r3,16 # set up srr1 for DSI exception + clrlwi r2,r3,16 # set up srr1 for DSI exception mfmsr r0 /* I have some doubts about the usefulness of the xori instruction in mixed or pure little-endian environment. The address is in the same doubleword, hence in the same protection domain and performing an exclusive or with 7 is only valid for byte accesses. */ -#ifdef CHECK_MIXED_ENDIAN +#ifdef CHECK_MIXED_ENDIAN andi. r1,r2,1 # test LE bit ahead to help folding #endif mtsrr1 r2 - rlwinm r0,r0,0,15,13 # clear the msr<tgpr> bit + rlwinm r0,r0,0,15,13 # clear the msr<tgpr> bit mfspr r1,DMISS # get miss address #ifdef CHECK_MIXED_ENDIAN - beq 1f # if little endian then: - xori r1,r1,0x07 # de-mung the data address + beq 1f # if little endian then: + xori r1,r1,0x07 # de-mung the data address 1: -#endif - mtdar r1 # put in dar - mtcrf 0x80,r3 # restore CR0 +#endif + mtdar r1 # put in dar + mtcrf 0x80,r3 # restore CR0 mtmsr r0 # flip back to the native gprs - isync # required from 602 manual + isync # required from 602 manual b DSIVec # branch to DSI exception /* We are now between 50 and 56 instructions. Close to the limit but should be sufficient in case bugs are found. */ -/* Altogether the three handlers occupy 128 instructions in the worst +/* Altogether the three handlers occupy 128 instructions in the worst case, 64 instructions could still be added (non contiguously). */ .org tlb_handlers+0x300 .globl _handler_glue _handler_glue: /* Entry code for exceptions: DSI (0x300), ISI(0x400), alignment(0x600) and * traps(0x700). In theory it is not necessary to save and restore r13 and all - * higher numbered registers, but it is done because it allowed to call the - * firmware (PPCBug) for debugging in the very first stages when writing the + * higher numbered registers, but it is done because it allowed to call the + * firmware (PPCBug) for debugging in the very first stages when writing the * bootloader. */ stwu r1,-160(r1) diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/head.S b/c/src/lib/libbsp/powerpc/shared/bootloader/head.S index b0eeb0e550..cb6d9134fc 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/head.S +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/head.S @@ -19,16 +19,16 @@ #include <rtems/score/cpu.h> #include "bootldr.h" -#define TEST_PPCBUG_CALLS +#define TEST_PPCBUG_CALLS #undef TEST_PPCBUG_CALLS - + #define FRAME_SIZE 32 #define LOCK_CACHES (HID0_DLOCK | HID0_ILOCK) #define INVL_CACHES (HID0_DCI | HID0_ICFI) #define ENBL_CACHES (HID0_DCE | HID0_ICE) #define USE_PPCBUG - + #define PRINT_CHAR(c) \ addi r20,r3,0 ; \ li r3,c ; \ @@ -37,10 +37,10 @@ addi r3,r20,0 ; \ li r10,0x26 ; \ sc - - - - + + + + #define MONITOR_ENTER \ mfmsr r10 ; \ ori r10,r10,MSR_IP ; \ @@ -48,8 +48,8 @@ li r10,0x63 ; \ sc - - + + START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) @@ -61,21 +61,21 @@ GOT_ENTRY(_binary_rtems_gz_start) GOT_ENTRY(_binary_initrd_gz_start) GOT_ENTRY(_binary_initrd_gz_end) -#ifdef TEST_PPCBUG_CALLS +#ifdef TEST_PPCBUG_CALLS GOT_ENTRY(banner_start) GOT_ENTRY(banner_end) -#endif +#endif #ifdef USE_PPCBUG GOT_ENTRY(nioc_reset_packet) #endif END_GOT .globl start .type start,@function - + /* Point the stack into the PreP partition header in the x86 reserved - * code area, so that simple C routines can be called. + * code area, so that simple C routines can be called. */ -start: +start: #if defined(USE_PPCBUG) && defined(DEBUG) && defined(REENTER_MONITOR) MONITOR_ENTER #endif @@ -89,9 +89,9 @@ start: ori r0,r28,MSR_EE xori r0,r0,MSR_EE mtmsr r0 - + /* Enable the caches, from now on cr2.eq set means processor is 601 */ - + mfpvr r0 mfspr r29,HID0 srwi r0,r0,16 @@ -103,7 +103,7 @@ start: * commented out, 11/7/2002, gregm. This instruction sequence seems to * be pathological on the 603e. * - + #ifndef USE_PPCBUG ori r0,r29,ENBL_CACHES|INVL_CACHES|LOCK_CACHES xori r0,r0,INVL_CACHES|LOCK_CACHES @@ -112,10 +112,10 @@ start: mtspr HID0,r0 #endif */ - - + + 2: bl reloc - + /* save all the parameters and the orginal msr/hid0/r31 */ lwz bd,GOT(__bd) stw r3,0(bd) @@ -135,21 +135,21 @@ start: * corrupted by the IF DMAing data into its old buffers or * by writing descriptors... */ - lwz r3,GOT(nioc_reset_packet) + lwz r3,GOT(nioc_reset_packet) li r10, 0x1d /* .NETCTRL */ sc #endif -/* Call the routine to fill boot_data structure from residual data. - * And to find where the code has to be moved. +/* Call the routine to fill boot_data structure from residual data. + * And to find where the code has to be moved. */ lis r3,__size@sectoff@ha addi r3,r3,__size@sectoff@l bl early_setup -/* Now we need to relocate ourselves, where we are told to. First put a +/* Now we need to relocate ourselves, where we are told to. First put a * copy of the codemove routine to some place in memory. - * (which may be where the 0x41 partition was loaded, so size is critical). + * (which may be where the 0x41 partition was loaded, so size is critical). */ lwz r4,GOT(codemove) li r5,_size_codemove @@ -175,14 +175,14 @@ start: mtlr r8 # for the return address bctr # returns to the moved instruction - + /* Establish the new top stack frame. */ moved: lwz r1,stack(bd) li r0,0 stwu r0,-16(r1) /* relocate again */ - bl reloc + bl reloc /* Clear all of BSS */ lwz r10,GOT(.bss) li r0,__bss_words@sectoff@l @@ -213,7 +213,7 @@ moved: lwz r1,stack(bd) /* Some firmware versions leave stale values in the BATs, it's time * to invalidate them to avoid interferences with our own mappings. * But the 601 valid bit is in the BATL (IBAT only) and others are in - * the [ID]BATU. Bloat, bloat.. fortunately thrown away later. + * the [ID]BATU. Bloat, bloat.. fortunately thrown away later. */ #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('T') @@ -239,22 +239,22 @@ moved: lwz r1,stack(bd) PRINT_CHAR('i') #endif bl mm_init - + #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('M') #endif bl MMUon - + /* Now we are mapped and can perform I/O if we want */ -#ifdef TEST_PPCBUG_CALLS +#ifdef TEST_PPCBUG_CALLS /* Experience seems to show that PPCBug can only be called with the * data cache disabled and with MMU disabled. Bummer. - */ + */ li r10,0x22 # .OUTLN lwz r3,GOT(banner_start) lwz r4,GOT(banner_end) sc -#endif +#endif #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('H') #endif @@ -294,9 +294,9 @@ moved: lwz r1,stack(bd) li r30,0 */ dcbst 0,r30 /* Make sure it's in memory ! */ - -/* We just flash invalidate and disable the dcache, unless it's a 601, - * critical areas have been flushed and we don't care about the stack + +/* We just flash invalidate and disable the dcache, unless it's a 601, + * critical areas have been flushed and we don't care about the stack * and other scratch areas. */ beq cr2,1f @@ -306,20 +306,20 @@ moved: lwz r1,stack(bd) mtspr HID0,r0 xori r0,r0,HID0_DCI|HID0_DCE mtspr HID0,r0 - + /* Provisional return to FW, works for PPCBug */ #if 0 && defined(REENTER_MONITOR) MONITOR_ENTER #else 1: bctr #endif - - + + /* relocation function, r30 must point to got2+0x8000 */ -reloc: +reloc: /* Adjust got2 pointers, no need to check for 0, this code already puts - * a few entries in the table. + * a few entries in the table. */ li r0,__got2_entries@sectoff@l la r12,GOT(_GOT2_TABLE_) @@ -331,10 +331,10 @@ reloc: add r0,r0,r11 stw r0,0(r12) bdnz 1b - + /* Now adjust the fixups and the pointers to the fixups in case we need - * to move ourselves again. - */ + * to move ourselves again. + */ 2: li r0,__fixup_entries@sectoff@l lwz r12,GOT(_FIXUP_TABLE_) cmpwi r0,0 @@ -347,18 +347,18 @@ reloc: stw r10,0(r12) stw r0,0(r10) bdnz 3b - blr + blr /* Set the MMU on and off: code is always mapped 1:1 and does not need MMU, * but it does not cost so much to map it also and it catches calls through - * NULL function pointers. + * NULL function pointers. */ .globl MMUon .type MMUon,@function MMUon: blr nop -/* +/* mfmsr r0 ori r0,r0,MSR_IR|MSR_DR|MSR_IP mflr r11 @@ -371,7 +371,7 @@ MMUon: blr .type MMUoff,@function MMUoff: blr nop - + /* mfmsr r0 ori r0,r0,MSR_IR|MSR_DR|MSR_IP @@ -383,9 +383,9 @@ MMUoff: blr */ /* Due to the PPC architecture (and according to the specifications), a - * series of tlbie which goes through a whole 256 MB segment always flushes - * the whole TLB. This is obviously overkill and slow, but who cares ? - * It takes about 1 ms on a 200 MHz 603e and works even if residual data + * series of tlbie which goes through a whole 256 MB segment always flushes + * the whole TLB. This is obviously overkill and slow, but who cares ? + * It takes about 1 ms on a 200 MHz 603e and works even if residual data * get the number of TLB entries wrong. */ flush_tlb: @@ -396,8 +396,8 @@ flush_tlb: /* tlbsync is not implemented on 601, so use sync which seems to be a superset * of tlbsync in all cases and do not bother with CPU dependant code */ - sync - blr + sync + blr .globl codemove codemove: @@ -410,11 +410,11 @@ codemove: beq 7f /* Protect against 0 count */ mtctr r0 bge cr1,2f - + la r8,-4(r4) la r7,-4(r3) 1: lwzu r0,4(r8) - stwu r0,4(r7) + stwu r0,4(r7) bdnz 1b b 4f @@ -424,23 +424,23 @@ codemove: 3: lwzu r0,-4(r8) stwu r0,-4(r7) bdnz 3b - + /* Now flush the cache: note that we must start from a cache aligned - * address. Otherwise we might miss one cache line. + * address. Otherwise we might miss one cache line. */ 4: cmpwi r6,0 add r5,r3,r5 - beq 7f /* Always flush prefetch queue in any case */ + beq 7f /* Always flush prefetch queue in any case */ subi r0,r6,1 andc r3,r3,r0 mr r4,r3 -5: cmplw r4,r5 +5: cmplw r4,r5 dcbst 0,r4 add r4,r4,r6 blt 5b sync /* Wait for all dcbst to complete on bus */ mr r4,r3 -6: cmplw r4,r5 +6: cmplw r4,r5 icbi 0,r4 add r4,r4,r6 blt 6b @@ -467,8 +467,8 @@ nioc_reset_packet: .long 0 /* Number of bytes */ .long 0 /* Status/Control Flags (unused for reset) */ #endif -#ifdef TEST_PPCBUG_CALLS -banner_start: +#ifdef TEST_PPCBUG_CALLS +banner_start: .ascii "This message was printed by PPCBug with MMU enabled" -banner_end: +banner_end: #endif diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/lib.c b/c/src/lib/libbsp/powerpc/shared/bootloader/lib.c index b988d968b4..ae6cf1fafc 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/lib.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/lib.c @@ -27,11 +27,11 @@ void* memcpy(void *dst, const void * src, unsigned int n) { unsigned char *d=dst; const unsigned char *s=src; - + while(n-- > 0) *d++=*s++; return dst; } - + char* strcat(char * dest, const char * src) { char *tmp = dest; diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c b/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c index 1ae0cf7a10..6b4718e7ea 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c @@ -57,13 +57,13 @@ extern struct console_io vacuum_console_functions; extern opaque log_console_setup, serial_console_setup, vga_console_setup; boot_data __bd = {0, 0, 0, 0, 0, 0, 0, 0, - 32, 0, 0, 0, 0, 0, 0, + 32, 0, 0, 0, 0, 0, 0, &mm_private, NULL, &pci_private, NULL, &v86_private, - "root=/dev/hdc1" + "root=/dev/hdc1" }; static void exit(void) __attribute__((noreturn)); @@ -80,7 +80,7 @@ void hang(const char *s, u_long x, ctxt *p) { #ifdef DEBUG print_all_maps("\nMemory mappings at exception time:\n"); #endif - printk("%s %lx NIP: %p LR: %p\n" + printk("%s %lx NIP: %p LR: %p\n" "Callback trace (stack:return address)\n", s, x, (void *) p->nip, (void *) p->lr); asm volatile("lwz %0,0(1); lwz %0,0(%0); lwz %0,0(%0)": "=b" (r1)); @@ -142,7 +142,7 @@ void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp) printk("gunzip: ran out of data in header\n"); exit(); } - + s.zalloc = zalloc; s.zfree = zfree; r = inflateInit2(&s, -MAX_WBITS); @@ -163,9 +163,9 @@ void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp) inflateEnd(&s); } -void decompress_kernel(int kernel_size, void * zimage_start, int len, +void decompress_kernel(int kernel_size, void * zimage_start, int len, void * initrd_start, int initrd_len ) { - u_char *parea; + u_char *parea; RESIDUAL* rescopy; int zimage_size= len; @@ -181,12 +181,12 @@ void decompress_kernel(int kernel_size, void * zimage_start, int len, exit(); } /* Note that this clears the bss as a side effect, so some code - * with ugly special case for SMP could be removed from the kernel! + * with ugly special case for SMP could be removed from the kernel! */ memset(parea, 0, kernel_size); printk("\nUncompressing the kernel...\n"); rescopy=salloc(sizeof(RESIDUAL)); - /* Let us hope that residual data is aligned on word boundary */ + /* Let us hope that residual data is aligned on word boundary */ *rescopy = *bd->residual; bd->residual = (void *)PAGE_ALIGN(kernel_size); @@ -203,7 +203,7 @@ void decompress_kernel(int kernel_size, void * zimage_start, int len, * DMA from the last pages of memory is slower because * prefetching from PCI has to be disabled to avoid accessing * non existing memory. So it is the ideal place to put the - * hash table. + * hash table. */ unsigned tmp = rescopy->TotalMemory; /* It's equivalent to tmp & (-tmp), but using the negation @@ -227,7 +227,7 @@ void decompress_kernel(int kernel_size, void * zimage_start, int len, printk("done\nNow booting...\n"); MMUoff(); /* We need to access address 0 ! */ codemove(0, parea, kernel_size, bd->cache_lsize); - codemove(bd->residual, rescopy, sizeof(RESIDUAL), bd->cache_lsize); + codemove(bd->residual, rescopy, sizeof(RESIDUAL), bd->cache_lsize); codemove(bd->r6, bd->cmd_line, sizeof(bd->cmd_line), bd->cache_lsize); /* codemove checks for 0 length */ codemove(bd->load_address, initrd_start, initrd_len, bd->cache_lsize); @@ -248,7 +248,7 @@ boot_udelay(uint32_t _microseconds) } while (now - start < ticks); } -void +void setup_hw(void) { char *cp, ch; @@ -258,9 +258,9 @@ setup_hw(void) int timer, err; u_short default_vga_cmd; static unsigned int indic; - + indic = 0; - + res=bd->residual; default_vga=NULL; default_vga_cmd = 0; @@ -274,10 +274,10 @@ setup_hw(void) ticks_per_ms = 16500; /* assume 66 MHz on bus */ } } - + select_console(CONSOLE_LOG); - /* We check that the keyboard is present and immediately + /* We check that the keyboard is present and immediately * select the serial console if not. */ err = kbdreset(); @@ -294,11 +294,11 @@ setup_hw(void) (vpd.TimeBaseDivisor ? vpd.TimeBaseDivisor : 4000), res->TotalMemory); printk("Original MSR: %lx\nOriginal HID0: %lx\nOriginal R31: %lx\n", - bd->o_msr, bd->o_hid0, bd->o_r31); + bd->o_msr, bd->o_hid0, bd->o_r31); /* This reconfigures all the PCI subsystem */ pci_init(); - + /* The Motorola NT firmware does not set the correct mem size */ if ( vpd.FirmwareSupplier == 0x10000 ) { int memsize; @@ -311,7 +311,7 @@ setup_hw(void) } } #define ENABLE_VGA_USAGE -#undef ENABLE_VGA_USAGE +#undef ENABLE_VGA_USAGE #ifdef ENABLE_VGA_USAGE /* Find the primary VGA device, chosing the first one found * if none is enabled. The basic loop structure has been copied @@ -338,7 +338,7 @@ setup_hw(void) /* Disable the enabled VGA device, if any. */ if (default_vga) - pci_write_config_word(default_vga, PCI_COMMAND, + pci_write_config_word(default_vga, PCI_COMMAND, default_vga_cmd& ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)); init_v86(); @@ -349,23 +349,23 @@ setup_hw(void) ((p->class) >> 16 != PCI_BASE_CLASS_DISPLAY)) continue; if (p->bus->number != 0) continue; - pci_read_config_word(p, PCI_COMMAND, &cmd); - pci_write_config_word(p, PCI_COMMAND, + pci_read_config_word(p, PCI_COMMAND, &cmd); + pci_write_config_word(p, PCI_COMMAND, cmd|PCI_COMMAND_IO|PCI_COMMAND_MEMORY); printk("Calling the emulator.\n"); em86_main(p); pci_write_config_word(p, PCI_COMMAND, cmd); - } + } cleanup_v86_mess(); -#endif +#endif /* Reenable the primary VGA device */ if (default_vga) { - pci_write_config_word(default_vga, PCI_COMMAND, + pci_write_config_word(default_vga, PCI_COMMAND, default_vga_cmd| (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)); - if (err) { - printk("Keyboard error %d, using serial console!\n", + if (err) { + printk("Keyboard error %d, using serial console!\n", err); } else { select_console(CONSOLE_VGA); @@ -386,14 +386,14 @@ setup_hw(void) /* In the future we may use the NVRAM to store default * kernel parameters. */ - nvram=residual_find_device(~0UL, NULL, SystemPeripheral, NVRAM, + nvram=residual_find_device(~0UL, NULL, SystemPeripheral, NVRAM, ~0UL, 0); if (nvram) { PnP_TAG_PACKET * pkt; - switch (nvram->DevId.Interface) { + switch (nvram->DevId.Interface) { case IndirectNVRAM: pkt=PnP_find_packet(res->DevicePnpHeap - +nvram->AllocatedOffset, + +nvram->AllocatedOffset, ) } } @@ -426,7 +426,7 @@ setup_hw(void) /* Functions to deal with the residual data */ static int same_DevID(unsigned short vendor, unsigned short Number, - char * str) + char * str) { static unsigned const char hexdigit[]="0123456789ABCDEF"; if (strlen(str)!=7) return 0; @@ -473,11 +473,11 @@ PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, if (tag_type(packet_tag)) mask=0xff; else mask=0xF8; masked_tag = packet_tag&mask; for(; *p != END_TAG; p+=size) { - if ((*p & mask) == masked_tag && !(n--)) + if ((*p & mask) == masked_tag && !(n--)) return (PnP_TAG_PACKET *) p; if (tag_type(*p)) size=ld_le16((unsigned short *)(p+1))+3; - else + else size=tag_small_count(*p)+1; } return 0; /* not found */ @@ -490,7 +490,7 @@ PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p, int next=0; while (p) { p = (unsigned char *) PnP_find_packet(p, 0x70, next); - if (p && p[1]==packet_type && !(n--)) + if (p && p[1]==packet_type && !(n--)) return (PnP_TAG_PACKET *) p; next = 1; }; @@ -504,7 +504,7 @@ PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p, int next=0; while (p) { p = (unsigned char *) PnP_find_packet(p, 0x84, next); - if (p && p[3]==packet_type && !(n--)) + if (p && p[3]==packet_type && !(n--)) return (PnP_TAG_PACKET *) p; next = 1; }; @@ -526,12 +526,12 @@ find_max_mem( struct pci_dev *dev ) (dev->device == PCI_DEVICE_ID_MOTOROLA_MPC105)) || ((dev->vendor == PCI_VENDOR_ID_IBM) && (dev->device == 0x0037/*IBM 660 Bridge*/)) ) { - pci_read_config_byte(dev, 0xa0, &banks); + pci_read_config_byte(dev, 0xa0, &banks); for (i = 0; i < 8; i++) { if ( banks & (1<<i) ) { - pci_read_config_byte(dev, 0x90+i, &tmp); + pci_read_config_byte(dev, 0x90+i, &tmp); top = tmp; - pci_read_config_byte(dev, 0x98+i, &tmp); + pci_read_config_byte(dev, 0x98+i, &tmp); top |= (tmp&3)<<8; if ( top > max ) max = top; } diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c b/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c index 38739fbb92..4371ae6a0d 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c @@ -25,16 +25,16 @@ * residual data. The holes between these areas can be virtually * remapped to any of these, since for some functions it is very handy * to have virtually contiguous but physically discontiguous memory. - * + * * Physical memory allocation is also very crude, since it's only * designed to manage a small number of large chunks. For valloc/vfree * and palloc/pfree, the unit of allocation is the 4kB page. - * + * * The salloc/sfree has been added after tracing gunzip and seeing * how it performed a very large number of small allocations. * For these the unit of allocation is 8 bytes (the s stands for - * small or subpage). This memory is cleared when allocated. - * + * small or subpage). This memory is cleared when allocated. + * */ #include <rtems/bspIo.h> @@ -50,7 +50,7 @@ * we want to avoid potential clashes with kernel includes. * Here a map maps contiguous areas from base to end, * the firstpte entry corresponds to physical address and has the low - * order bits set for caching and permission. + * order bits set for caching and permission. */ typedef struct _map { @@ -82,7 +82,7 @@ typedef struct _map { #define MAP_FREE_SUBS 6 #define MAP_USED_SUBS 7 -#define MAP_FREE 4 +#define MAP_FREE 4 #define MAP_FREE_PHYS 12 #define MAP_USED_PHYS 13 #define MAP_FREE_VIRT 20 @@ -114,7 +114,7 @@ struct _mm_private { map *sallocused; /* Used maps for salloc */ map *sallocphys; /* Physical areas used by salloc */ u_int hashcnt; /* Used to cycle in PTEG when they overflow */ -} mm_private = {hashmask: 0xffc0, +} mm_private = {hashmask: 0xffc0, freemaps: free_maps+0}; /* A simplified hash table entry declaration */ @@ -125,7 +125,7 @@ typedef struct _hash_entry { void print_maps(map *, const char *); -/* The handler used for all exceptions although for now it is only +/* The handler used for all exceptions although for now it is only * designed to properly handle MMU interrupts to fill the hash table. */ @@ -149,7 +149,7 @@ void _handler(int vec, ctxt *p) { printk("\nPanic: vector=%x, cause=%lx\n", vec, cause); hang("Memory protection violation at ", vaddr, p); } - + for(area=mm->mappings; area; area=area->next) { if(area->base<=vaddr && vaddr<=area->end) break; } @@ -158,13 +158,13 @@ void _handler(int vec, ctxt *p) { u_long hash, vsid, rpn; hash_entry volatile *hte, *_hte1; u_int i, alt=0, flushva; - + vsid = _read_SR((void *)vaddr); rpn = (vaddr&PAGE_MASK)-area->base+area->firstpte; hash = vsid<<6; hash ^= (vaddr>>(PAGE_SHIFT-6))&0x3fffc0; hash &= mm->hashmask; - /* Find an empty entry in the PTEG, else + /* Find an empty entry in the PTEG, else * replace a random one. */ hte = (hash_entry *) ((u_long)(mm->sdr1)+hash); @@ -174,14 +174,14 @@ void _handler(int vec, ctxt *p) { hash ^= mm->hashmask; alt = 0x40; _hte1 = hte; hte = (hash_entry *) ((u_long)(mm->sdr1)+hash); - + for (i=0; i<8; i++) { if (hte[i].key>=0) goto found; } alt = 0; hte = _hte1; /* Chose a victim entry and replace it. There might be - * better policies to choose the victim, but in a boot + * better policies to choose the victim, but in a boot * loader we want simplicity as long as it works. * * We would not need to invalidate the TLB entry since @@ -211,7 +211,7 @@ void _handler(int vec, ctxt *p) { } } else { MMUon(); - printk("\nPanic: vector=%x, dsisr=%lx, faultaddr =%lx, msr=%lx opcode=%lx\n", vec, + printk("\nPanic: vector=%x, dsisr=%lx, faultaddr =%lx, msr=%lx opcode=%lx\n", vec, cause, p->nip, p->msr, * ((unsigned int*) p->nip) ); if (vec == 7) { unsigned int* ptr = ((unsigned int*) p->nip) - 4 * 10; @@ -308,13 +308,13 @@ map * alloc_map_page(void) { if (!from) return NULL; from->end -= PAGE_SIZE; - + mm->freemaps = (map *) (from->end+1); - + for(p=mm->freemaps; p<mm->freemaps+PAGE_SIZE/sizeof(map)-1; p++) { p->next = p+1; p->firstpte = MAP_FREE; - } + } (p-1)->next=0; /* Take the last one as pointer to self and insert @@ -324,12 +324,12 @@ map * alloc_map_page(void) { p->firstpte = MAP_PERM_PHYS; p->base=(u_long) mm->freemaps; p->end = p->base+PAGE_SIZE-1; - + insert_map(&mm->physperm, p); - - if (from->end+1 == from->base) + + if (from->end+1 == from->base) free_map(remove_map(&mm->physavail, from)); - + return mm->freemaps; } @@ -364,13 +364,13 @@ void coalesce_maps(map *p) { /* These routines are used to find the free memory zones to avoid * overlapping destructive copies when initializing. - * They work from the top because of the way we want to boot. + * They work from the top because of the way we want to boot. * In the following the term zone refers to the memory described * by one or several contiguous so called segments in the * residual data. */ #define STACK_PAGES 2 -static inline u_long +static inline u_long find_next_zone(RESIDUAL *res, u_long lowpage, u_long flags) { u_long i, newmin=0, size=0; for(i=0; i<res->ActualNumMemSegs; i++) { @@ -384,14 +384,14 @@ find_next_zone(RESIDUAL *res, u_long lowpage, u_long flags) { return newmin+size; } -static inline u_long +static inline u_long find_zone_start(RESIDUAL *res, u_long highpage, u_long flags) { u_long i; int progress; do { progress=0; for (i=0; i<res->ActualNumMemSegs; i++) { - if ( (res->Segs[i].BasePage+res->Segs[i].PageCount + if ( (res->Segs[i].BasePage+res->Segs[i].PageCount == highpage) && res->Segs[i].Usage & flags) { highpage=res->Segs[i].BasePage; @@ -441,8 +441,8 @@ fix_residual( RESIDUAL *res ) res->Segs[i].BasePage = seg_fix[i].BasePage; res->Segs[i].PageCount = seg_fix[i].PageCount; } - /* The following should be fixed in the current version of the - * kernel and of the bootloader. + /* The following should be fixed in the current version of the + * kernel and of the bootloader. */ #if 0 /* PPCBug has this zero */ @@ -468,10 +468,10 @@ fix_residual( RESIDUAL *res ) /* This routine is the first C code called with very little stack space! * Its goal is to find where the boot image can be moved. This will - * be the highest address with enough room. + * be the highest address with enough room. */ int early_setup(u_long image_size) { - register RESIDUAL *res = bd->residual; + register RESIDUAL *res = bd->residual; u_long minpages = PAGE_ALIGN(image_size)>>PAGE_SHIFT; /* Fix residual if we are loaded by Motorola NT firmware */ @@ -481,19 +481,19 @@ int early_setup(u_long image_size) { /* FIXME: if OF we should do something different */ if( !bd->of_entry && res && res->ResidualLength <= sizeof(RESIDUAL) && res->Version == 0 ) { - u_long lowpage=ULONG_MAX, highpage; + u_long lowpage=ULONG_MAX, highpage; u_long imghigh=0, stkhigh=0; - /* Find the highest and large enough contiguous zone + /* Find the highest and large enough contiguous zone consisting of free and BootImage sections. */ - /* Find 3 free areas of memory, one for the main image, one - * for the stack (STACK_PAGES), and page one to put the map - * structures. They are allocated from the top of memory. + /* Find 3 free areas of memory, one for the main image, one + * for the stack (STACK_PAGES), and page one to put the map + * structures. They are allocated from the top of memory. * In most cases the stack will be put just below the image. */ - while((highpage = + while((highpage = find_next_zone(res, lowpage, BootImage|Free))) { lowpage=find_zone_start(res, highpage, BootImage|Free); - if ((highpage-lowpage)>minpages && + if ((highpage-lowpage)>minpages && highpage>imghigh) { imghigh=highpage; highpage -=minpages; @@ -510,14 +510,14 @@ int early_setup(u_long image_size) { /* The code mover is put at the lowest possible place * of free memory. If this corresponds to the loaded boot - * partition image it does not matter because it overrides - * the unused part of it (x86 code). + * partition image it does not matter because it overrides + * the unused part of it (x86 code). */ bd->mover=(void *) (lowpage<<PAGE_SHIFT); - /* Let us flush the caches in all cases. After all it should - * not harm even on 601 and we don't care about performance. - * Right now it's easy since all processors have a line size + /* Let us flush the caches in all cases. After all it should + * not harm even on 601 and we don't care about performance. + * Right now it's easy since all processors have a line size * of 32 bytes. Once again residual data has proved unreliable. */ bd->cache_lsize = 32; @@ -548,14 +548,14 @@ void * valloc(u_long size) { return (void *)q->base; } -static +static void vflush(map *virtmap) { struct _mm_private * mm = (struct _mm_private *) bd->mm_private; u_long i, limit=(mm->hashmask>>3)+8; hash_entry volatile *p=(hash_entry *) mm->sdr1; /* PTE handling is simple since the processor never update - * the entries. Writable pages always have the C bit set and + * the entries. Writable pages always have the C bit set and * all valid entries have the R bit set. From the processor * point of view the hash table is read only. */ @@ -578,7 +578,7 @@ void vflush(map *virtmap) { void vfree(void *vaddr) { map *physmap, *virtmap; /* Actual mappings pertaining to this vm */ struct _mm_private * mm = (struct _mm_private *) bd->mm_private; - + /* Flush memory queues */ asm volatile("sync": : : "memory"); @@ -588,7 +588,7 @@ void vfree(void *vaddr) { /* Remove mappings corresponding to virtmap */ for (physmap=mm->mappings; physmap; ) { map *nextmap=physmap->next; - if (physmap->base>=virtmap->base + if (physmap->base>=virtmap->base && physmap->base<virtmap->end) { free_map(remove_map(&mm->mappings, physmap)); } @@ -598,22 +598,22 @@ void vfree(void *vaddr) { vflush(virtmap); virtmap->firstpte= MAP_FREE_VIRT; - insert_map(&mm->virtavail, virtmap); + insert_map(&mm->virtavail, virtmap); coalesce_maps(mm->virtavail); } void vunmap(void *vaddr) { map *physmap, *virtmap; /* Actual mappings pertaining to this vm */ struct _mm_private *mm = (struct _mm_private *) bd->mm_private; - + /* Flush memory queues */ asm volatile("sync": : : "memory"); /* vaddr must be within one of the vm areas in use and - * then must correspond to one of the physical areas + * then must correspond to one of the physical areas */ for (virtmap=mm->virtused; virtmap; virtmap=virtmap->next) { - if (virtmap->base<=(u_long)vaddr && + if (virtmap->base<=(u_long)vaddr && virtmap->end>=(u_long)vaddr) break; } if (!virtmap) return; @@ -632,7 +632,7 @@ int vmap(void *vaddr, u_long p, u_long size) { if(!size) return 1; /* Check that the requested area fits in one vm image */ for (q=mm->virtused; q; q=q->next) { - if ((q->base <= (u_long)vaddr) && + if ((q->base <= (u_long)vaddr) && (q->end>=(u_long)vaddr+size -1)) break; } if (!q) return 1; @@ -673,7 +673,7 @@ void add_free_map(u_long base, u_long end) { q->base=base; q->end=end-1; q->firstpte=MAP_FREE_VIRT; - insert_map(&mm->virtavail, q); + insert_map(&mm->virtavail, q); } static inline @@ -691,10 +691,10 @@ void create_free_vm(void) { } /* Memory management initialization. - * Set up the mapping lists. + * Set up the mapping lists. */ -static inline +static inline void add_perm_map(u_long start, u_long size) { struct _mm_private *mm = (struct _mm_private *) bd->mm_private; map *p=alloc_map(); @@ -704,7 +704,7 @@ void add_perm_map(u_long start, u_long size) { insert_map(& mm->physperm , p); } -void mm_init(u_long image_size) +void mm_init(u_long image_size) { u_long lowpage=ULONG_MAX, highpage; struct _mm_private *mm = (struct _mm_private *) bd->mm_private; @@ -716,7 +716,7 @@ void mm_init(u_long image_size) /* The checks are simplified by the fact that the image * and stack area are always allocated at the upper end - * of a free block. + * of a free block. */ while((highpage = find_next_zone(res, lowpage, BootImage|Free))) { lowpage=find_zone_start(res, highpage, BootImage|Free); @@ -727,7 +727,7 @@ void mm_init(u_long image_size) } if ( (( u_long)bd->stack>>PAGE_SHIFT) == highpage) { highpage -= STACK_PAGES; - add_perm_map(highpage<<PAGE_SHIFT, + add_perm_map(highpage<<PAGE_SHIFT, STACK_PAGES*PAGE_SIZE); } /* Protect the interrupt handlers that we need ! */ @@ -751,8 +751,8 @@ void mm_init(u_long image_size) /* Setup the segment registers as we want them */ for (i=0; i<16; i++) _write_SR(i, (void *)(i<<28)); /* Create the maps for the physical memory, firwmarecode does not - * seem to be necessary. ROM is mapped read-only to reduce the risk - * of reprogramming it because it's often Flash and some are + * seem to be necessary. ROM is mapped read-only to reduce the risk + * of reprogramming it because it's often Flash and some are * amazingly easy to overwrite. */ create_identity_mappings(BootImage|Free|FirmwareCode|FirmwareHeap| @@ -762,14 +762,14 @@ void mm_init(u_long image_size) PCIAddr|PCIConfig|ISAAddr, PTE_IO); create_free_vm(); - + /* Install our own MMU and trap handlers. */ - codemove((void *) 0x300, _handler_glue, 0x100, bd->cache_lsize); - codemove((void *) 0x400, _handler_glue, 0x100, bd->cache_lsize); - codemove((void *) 0x600, _handler_glue, 0x100, bd->cache_lsize); - codemove((void *) 0x700, _handler_glue, 0x100, bd->cache_lsize); + codemove((void *) 0x300, _handler_glue, 0x100, bd->cache_lsize); + codemove((void *) 0x400, _handler_glue, 0x100, bd->cache_lsize); + codemove((void *) 0x600, _handler_glue, 0x100, bd->cache_lsize); + codemove((void *) 0x700, _handler_glue, 0x100, bd->cache_lsize); } - + void * salloc(u_long size) { map *p, *q; struct _mm_private *mm = (struct _mm_private *) bd->mm_private; @@ -816,17 +816,17 @@ void sfree(void *p) { } /* first/last area fit, flags is a power of 2 indicating the required - * alignment. The algorithms are stupid because we expect very little + * alignment. The algorithms are stupid because we expect very little * fragmentation of the areas, if any. The unit of allocation is the page. * The allocation is by default performed from higher addresses down, - * unless flags&PA_LOW is true. + * unless flags&PA_LOW is true. */ -void * __palloc(u_long size, int flags) +void * __palloc(u_long size, int flags) { u_long mask = ((1<<(flags&PA_ALIGN_MASK))-1); map *newmap, *frommap, *p, *splitmap=0; - map **queue; + map **queue; u_long qflags; struct _mm_private *mm = (struct _mm_private *) bd->mm_private; @@ -849,7 +849,7 @@ void * __palloc(u_long size, int flags) } /* We need to allocate that one now so no two allocations may attempt * to take the same memory simultaneously. Alloc_map_page does - * not call back here to avoid infinite recursion in alloc_map. + * not call back here to avoid infinite recursion in alloc_map. */ if (mask&PAGE_MASK) { @@ -868,11 +868,11 @@ void * __palloc(u_long size, int flags) if (!frommap) { if (splitmap) free_map(splitmap); - return NULL; + return NULL; } - + newmap=alloc_map(); - + if (flags&PA_LOW) { newmap->base = (frommap->base+mask)&~mask; } else { @@ -883,7 +883,7 @@ void * __palloc(u_long size, int flags) newmap->firstpte = qflags; /* Add a fragment if we don't allocate until the end. */ - + if (splitmap) { splitmap->base=newmap->base+size; splitmap->end=frommap->end; @@ -904,13 +904,13 @@ void * __palloc(u_long size, int flags) if (splitmap->base == splitmap->end+1) { free_map(remove_map(&mm->physavail, splitmap)); } else { - insert_map(&mm->physavail, splitmap); + insert_map(&mm->physavail, splitmap); } } insert_map(queue, newmap); return (void *) newmap->base; - + } void pfree(void * p) { @@ -923,13 +923,13 @@ void pfree(void * p) { coalesce_maps(mm->physavail); } -#ifdef DEBUG +#ifdef DEBUG /* Debugging functions */ void print_maps(map *chain, const char *s) { map *p; printk("%s",s); for(p=chain; p; p=p->next) { - printk(" %08lx-%08lx: %08lx\n", + printk(" %08lx-%08lx: %08lx\n", p->base, p->end, p->firstpte); } } diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c index 6bd25a86c9..8f17d06b46 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c @@ -45,7 +45,7 @@ typedef unsigned int u32; typedef struct _pci_resource { struct _pci_resource *next; - struct pci_dev *dev; + struct pci_dev *dev; u_long base; /* will be 64 bits on 64 bits machines */ u_long size; u_char type; /* 1 is I/O else low order 4 bits of the memory type */ @@ -80,9 +80,9 @@ struct _pci_private { pci_area_head io, mem; } pci_private = { - config_addr: NULL, - config_data: (volatile u_char *) 0x80800000, - last_dev_p: NULL, + config_addr: NULL, + config_data: (volatile u_char *) 0x80800000, + last_dev_p: NULL, resources: NULL, io: {NULL, 0xfff, 0}, mem: {NULL, 0xfffff, 0} @@ -100,33 +100,33 @@ struct _pci_private { #endif #if defined(PCI_DEBUG) -static void +static void print_pci_resources(const char *s) { pci_resource *p; printk("%s", s); for (p=pci->resources; p; p=p->next) { /* - printk(" %p:%p %06x %08lx %08lx %d\n", + printk(" %p:%p %06x %08lx %08lx %d\n", p, p->next, (p->dev->devfn<<8)+(p->dev->bus->number<<16) +0x10+p->reg*4, p->base, p->size, - p->type); + p->type); */ - printk(" %p:%p %d:%02x (%04x:%04x) %08lx %08lx %d\n", + printk(" %p:%p %d:%02x (%04x:%04x) %08lx %08lx %d\n", p, p->next, - p->dev->bus->number, PCI_SLOT(p->dev->devfn), + p->dev->bus->number, PCI_SLOT(p->dev->devfn), p->dev->vendor, p->dev->device, p->base, p->size, - p->type); + p->type); } } -static void +static void print_pci_area(pci_area *p) { for (; p; p=p->next) { printk(" %p:%p %p %08lx %08lx\n", @@ -134,7 +134,7 @@ print_pci_area(pci_area *p) { } } -static void +static void print_pci_areas(const char *s) { printk("%s PCI I/O areas:\n",s); print_pci_area(pci->io.head); @@ -142,7 +142,7 @@ print_pci_areas(const char *s) { print_pci_area(pci->mem.head); } #else -#define print_pci_areas(x) +#define print_pci_areas(x) #define print_pci_resources(x) #endif @@ -159,7 +159,7 @@ struct blacklist_entry { }; #define BLACKLIST(vid, did, breg, actual_size) \ - {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##vid##_##did, breg, actual_size} + {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##vid##_##did, breg, actual_size} static struct blacklist_entry blacklist[] = { BLACKLIST(S3, TRIO, 0, 0x04000000), @@ -168,7 +168,7 @@ static struct blacklist_entry blacklist[] = { /* This function filters resources and then inserts them into a list of - * configurable pci resources. + * configurable pci resources. */ @@ -180,7 +180,7 @@ static struct blacklist_entry blacklist[] = { static int insert_before(pci_resource *e, pci_resource *t) { - if (e->dev->bus->number != t->dev->bus->number) + if (e->dev->bus->number != t->dev->bus->number) return e->dev->bus->number > t->dev->bus->number; if (AREA(e) != AREA(t)) return AREA(e)<AREA(t); return (e->size > t->size); @@ -195,8 +195,8 @@ static void insert_resource(pci_resource *r) { pci_resource *p; if (!r) return; - /* First fixup in case we have a blacklist entry. Note that this - * may temporarily leave a resource in an inconsistent state: with + /* First fixup in case we have a blacklist entry. Note that this + * may temporarily leave a resource in an inconsistent state: with * (base & (size-1)) !=0. This is harmless. */ for (b=blacklist; b->vendor!=0xffff; b++) { @@ -207,13 +207,13 @@ static void insert_resource(pci_resource *r) { break; } } - + /* Motorola NT firmware does not configure pci devices which are not * required for booting, others do. For now: * - allocated devices in the ISA range (64kB I/O, 16Mb memory) * but non zero base registers are left as is. - * - all other registers, whether already allocated or not, are - * reallocated unless they require an inordinate amount of + * - all other registers, whether already allocated or not, are + * reallocated unless they require an inordinate amount of * resources (>256 Mb for memory >64kB for I/O). These * devices with too large mapping requirements are simply ignored * and their bases are set to 0. This should disable the @@ -233,37 +233,37 @@ static void insert_resource(pci_resource *r) { ** the hardware, we are stuck with the kludge below. Note that ** everything is remapped on the CPCI backplane and any downstream ** hardware, its just the builtin stuff we're tiptoeing around. - ** + ** ** Gregm, 7/16/2003 */ if( r->dev->bus->number <= 1 ) { - if ((r->type==PCI_BASE_ADDRESS_SPACE_IO) + if ((r->type==PCI_BASE_ADDRESS_SPACE_IO) ? (r->base && r->base <0x10000) : (r->base && r->base <0x1000000)) { #ifdef PCI_DEBUG - printk("freeing region; %p:%p %d:%02x (%04x:%04x) %08lx %08lx %d\n", + printk("freeing region; %p:%p %d:%02x (%04x:%04x) %08lx %08lx %d\n", r, r->next, - r->dev->bus->number, PCI_SLOT(r->dev->devfn), + r->dev->bus->number, PCI_SLOT(r->dev->devfn), r->dev->vendor, r->dev->device, r->base, r->size, - r->type); + r->type); #endif sfree(r); return; } } - if ((r->type==PCI_BASE_ADDRESS_SPACE_IO) + if ((r->type==PCI_BASE_ADDRESS_SPACE_IO) ? (r->size >= 0x10000) : (r->size >= 0x10000000)) { r->size = 0; r->base = 0; } - /* Now insert into the list sorting by + /* Now insert into the list sorting by * 1) decreasing bus number * 2) space: prefetchable memory, non-prefetchable and finally I/O * 3) decreasing size @@ -284,21 +284,21 @@ static void insert_resource(pci_resource *r) { -/* This version only works for bus 0. I don't have any P2P bridges to test +/* This version only works for bus 0. I don't have any P2P bridges to test * a more sophisticated version which has therefore not been implemented. * Prefetchable memory is not yet handled correctly either. * And several levels of PCI bridges much less even since there must be - * allocated together to be able to setup correctly the top bridge. + * allocated together to be able to setup correctly the top bridge. */ -static u_long find_range(u_char bus, u_char type, +static u_long find_range(u_char bus, u_char type, pci_resource **first, pci_resource **past, u_int *flags) { pci_resource *p; u_long total=0; u_int fl=0; - for (p=pci->resources; p; p=p->next) + for (p=pci->resources; p; p=p->next) { if ((p->dev->bus->number == bus) && AREA(p)==type) break; @@ -306,12 +306,12 @@ static u_long find_range(u_char bus, u_char type, *first = p; - for (; p; p=p->next) + for (; p; p=p->next) { if ((p->dev->bus->number != bus) || AREA(p)!=type || p->size == 0) break; total = total+p->size; - fl |= 1<<p->type; + fl |= 1<<p->type; } *past = p; @@ -328,7 +328,7 @@ static u_long find_range(u_char bus, u_char type, -static inline void init_free_area(pci_area_head *h, u_long start, +static inline void init_free_area(pci_area_head *h, u_long start, u_long end, u_int mask, int high) { pci_area *p; p = salloc(sizeof(pci_area)); @@ -376,12 +376,12 @@ static void insert_area(pci_area_head *h, pci_area *p) { static -void remove_area(pci_area_head *h, pci_area *p) +void remove_area(pci_area_head *h, pci_area *p) { pci_area *q = h->head; if (!p || !q) return; - if (q==p) + if (q==p) { h->head = q->next; return; @@ -401,7 +401,7 @@ static pci_area * alloc_area(pci_area_head *h, struct pci_bus *bus, pci_area *from, *split, *new; required = (required+h->mask) & ~h->mask; - for (p=h->head, from=NULL; p; p=p->next) + for (p=h->head, from=NULL; p; p=p->next) { u_long l1 = ((p->start+required+mask)&~mask)-1; u_long l2 = ((p->start+mask)&~mask)+required-1; @@ -417,41 +417,41 @@ static pci_area * alloc_area(pci_area_head *h, struct pci_bus *bus, /* If allocation of new succeeds then allocation of split has * also been successful (given the current mm algorithms) ! */ - if (!new) { - sfree(split); - return NULL; + if (!new) { + sfree(split); + return NULL; } new->bus = bus; new->flags = flags; /* Now allocate pci_space taking alignment into account ! */ - if (h->high) + if (h->high) { u_long l1 = ((from->end+1)&~mask)-required; - u_long l2 = (from->end+1-required)&~mask; + u_long l2 = (from->end+1-required)&~mask; new->start = (l1>l2) ? l1 : l2; split->end = from->end; from->end = new->start-1; split->start = new->start+required; new->end = new->start+required-1; - } - else + } + else { u_long l1 = ((from->start+mask)&~mask)+required-1; - u_long l2 = ((from->start+required+mask)&~mask)-1; + u_long l2 = ((from->start+required+mask)&~mask)-1; new->end = (l1<l2) ? l1 : l2; split->start = from->start; from->start = new->end+1; new->start = new->end+1-required; split->end = new->start-1; } - + if (from->end+1 == from->start) remove_area(h, from); - if (split->end+1 != split->start) + if (split->end+1 != split->start) { split->bus = NULL; insert_area(h, split); - } - else + } + else { sfree(split); } @@ -465,7 +465,7 @@ static pci_area * alloc_area(pci_area_head *h, struct pci_bus *bus, static inline -void alloc_space(pci_area *p, pci_resource *r) +void alloc_space(pci_area *p, pci_resource *r) { if (p->start & (r->size-1)) { r->base = p->end+1-r->size; @@ -480,7 +480,7 @@ void alloc_space(pci_area *p, pci_resource *r) -static void reconfigure_bus_space(u_char bus, u_char type, pci_area_head *h) +static void reconfigure_bus_space(u_char bus, u_char type, pci_area_head *h) { pci_resource *first, *past, *r; pci_area *area, tmp; @@ -494,7 +494,7 @@ static void reconfigure_bus_space(u_char bus, u_char type, pci_area_head *h) if (!area) return; tmp = *area; - for (r=first; r!=past; r=r->next) + for (r=first; r!=past; r=r->next) { alloc_space(&tmp, r); } @@ -537,8 +537,8 @@ static void reconfigure_pci(void) { /* First reconfigure the I/O space, this will be more - * complex when there is more than 1 bus. And 64 bits - * devices are another kind of problems. + * complex when there is more than 1 bus. And 64 bits + * devices are another kind of problems. */ reconfigure_bus_space(0, PCI_AREA_IO, &pci->io); reconfigure_bus_space(0, PCI_AREA_MEMORY, &pci->mem); @@ -546,7 +546,7 @@ static void reconfigure_pci(void) { /* Now we have to touch the configuration space of all * the devices to remap them better than they are right now. - * This is done in 3 steps: + * This is done in 3 steps: * 1) first disable I/O and memory response of all devices * 2) modify the base registers * 3) restore the original PCI_COMMAND register. @@ -562,12 +562,12 @@ static void reconfigure_pci(void) { } for (r=pci->resources; r; r= r->next) { - pci_write_config_dword(r->dev, + pci_write_config_dword(r->dev, PCI_BASE_ADDRESS_0+(r->reg<<2), r->base); if ((r->type& (PCI_BASE_ADDRESS_SPACE| - PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == + PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == (PCI_BASE_ADDRESS_SPACE_MEMORY| PCI_BASE_ADDRESS_MEM_TYPE_64)) { pci_write_config_dword(r->dev, @@ -592,60 +592,60 @@ static void reconfigure_pci(void) { static int -indirect_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, +indirect_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char *val) { - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); *val=in_8(pci->config_data + (offset&3)); return PCIBIOS_SUCCESSFUL; } static int -indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn, +indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short *val) { - *val = 0xffff; + *val = 0xffff; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); *val=in_le16((volatile u_short *)(pci->config_data + (offset&3))); return PCIBIOS_SUCCESSFUL; } static int -indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, +indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int *val) { - *val = 0xffffffff; + *val = 0xffffffff; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|(offset<<24)); *val=in_le32((volatile u_int *)pci->config_data); return PCIBIOS_SUCCESSFUL; } static int -indirect_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, +indirect_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char val) { - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); out_8(pci->config_data + (offset&3), val); return PCIBIOS_SUCCESSFUL; } static int -indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn, +indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short val) { if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); out_le16((volatile u_short *)(pci->config_data + (offset&3)), val); return PCIBIOS_SUCCESSFUL; } static int -indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, +indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int val) { if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32(pci->config_addr, + out_be32(pci->config_addr, 0x80|(bus<<8)|(dev_fn<<16)|(offset<<24)); out_le32((volatile u_int *)pci->config_data, val); return PCIBIOS_SUCCESSFUL; @@ -662,21 +662,21 @@ static const struct pci_config_access_functions indirect_functions = { static int -direct_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, +direct_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char *val) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { *val=0xff; return PCIBIOS_DEVICE_NOT_FOUND; } - *val=in_8(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1) + *val=in_8(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1) + (PCI_FUNC(dev_fn)<<8) + offset); return PCIBIOS_SUCCESSFUL; } static int -direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn, +direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short *val) { - *val = 0xffff; + *val = 0xffff; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; @@ -688,9 +688,9 @@ direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn, } static int -direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, +direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int *val) { - *val = 0xffffffff; + *val = 0xffffffff; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; @@ -702,19 +702,19 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, } static int -direct_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, +direct_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned char val) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; } - out_8(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1) - + (PCI_FUNC(dev_fn)<<8) + offset, + out_8(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1) + + (PCI_FUNC(dev_fn)<<8) + offset, val); return PCIBIOS_SUCCESSFUL; } static int -direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn, +direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned short val) { if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { @@ -728,7 +728,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn, } static int -direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, +direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, unsigned char offset, unsigned int val) { if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { @@ -765,35 +765,35 @@ void pci_read_bases(struct pci_dev *dev, unsigned int howmany) u32 l, ml; pci_read_config_word(dev, PCI_COMMAND, &cmd); - for(reg=0; reg<howmany; reg=nextreg) + for(reg=0; reg<howmany; reg=nextreg) { pci_resource *r; nextreg=reg+1; pci_read_config_dword(dev, REG, &l); #if 0 - if (l == 0xffffffff /*AJF || !l*/) continue; + if (l == 0xffffffff /*AJF || !l*/) continue; #endif - /* Note that disabling the memory response of a host bridge - * would lose data if a DMA transfer were in progress. In a - * bootloader we don't care however. Also we can't print any + /* Note that disabling the memory response of a host bridge + * would lose data if a DMA transfer were in progress. In a + * bootloader we don't care however. Also we can't print any * message for a while since we might just disable the console. */ - pci_write_config_word(dev, PCI_COMMAND, cmd & + pci_write_config_word(dev, PCI_COMMAND, cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)); pci_write_config_dword(dev, REG, ~0); pci_read_config_dword(dev, REG, &ml); pci_write_config_dword(dev, REG, l); - /* Reenable the device now that we've played with - * base registers. + /* Reenable the device now that we've played with + * base registers. */ pci_write_config_word(dev, PCI_COMMAND, cmd); /* seems to be an unused entry skip it */ if ( ml == 0 || ml == 0xffffffff ) continue; - if ((l & + if ((l & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == (PCI_BASE_ADDRESS_MEM_TYPE_64 |PCI_BASE_ADDRESS_SPACE_MEMORY)) { @@ -864,7 +864,7 @@ u_int pci_scan_bus(struct pci_bus *bus) dev->vendor = l & 0xffff; dev->device = (l >> 16) & 0xffff; - pcibios_read_config_dword(bus->number, devfn, + pcibios_read_config_dword(bus->number, devfn, PCI_CLASS_REVISION, &class); class >>= 8; /* upper 3 bytes */ dev->class = class; @@ -1030,14 +1030,14 @@ u_int pci_scan_bus(struct pci_bus *bus) #if 0 void -pci_fixup(void) +pci_fixup(void) { struct pci_dev *p; struct pci_bus *bus; - for (bus = &pci_root; bus; bus=bus->next) + for (bus = &pci_root; bus; bus=bus->next) { - for (p=bus->devices; p; p=p->sibling) + for (p=bus->devices; p; p=p->sibling) { } } @@ -1059,7 +1059,7 @@ static void print_pci_info() for(pb= &pci_root; pb; pb=pb->children ) { printk(" number %d, primary %d, secondary %d, subordinate %d\n", - pb->number, + pb->number, pb->primary, pb->secondary, pb->subordinate ); @@ -1076,7 +1076,7 @@ static void print_pci_info() pd->vendor, pd->device, pd->irq ); - + } printk("\n"); } @@ -1088,7 +1088,7 @@ static void print_pci_info() for (r=pci->resources; r; r= r->next) { printk(" bus %d, vendor %04x, device %04x, base %08x, size %08x, type %d\n", - r->dev->bus->number, + r->dev->bus->number, r->dev->vendor, r->dev->device, r->base, @@ -1198,9 +1198,9 @@ static void recursive_bus_reconfigure( struct pci_bus *pbus ) childbus->subordinate ); #endif - - /* + + /* **use the current values & the saved ones to figure out ** the address spaces for the bridge */ @@ -1269,7 +1269,7 @@ static void recursive_bus_reconfigure( struct pci_bus *pbus ) printk("pci: pf memory %04x, limit %04x\n", base16, limit16); #endif #ifdef WRITE_BRIDGE_PF - pcibios_write_config_dword(pdev->bus->number, pdev->devfn, PCI_PREF_BASE_UPPER32, 0); + pcibios_write_config_dword(pdev->bus->number, pdev->devfn, PCI_PREF_BASE_UPPER32, 0); pcibios_write_config_word(pdev->bus->number, pdev->devfn, PCI_PREF_MEMORY_BASE, base16 ); pcibios_write_config_dword(pdev->bus->number, pdev->devfn, PCI_PREF_LIMIT_UPPER32, 0); pcibios_write_config_word(pdev->bus->number, pdev->devfn, PCI_PREF_MEMORY_LIMIT, limit16 ); @@ -1280,7 +1280,7 @@ static void recursive_bus_reconfigure( struct pci_bus *pbus ) pcibios_write_config_word(pdev->bus->number, pdev->devfn, PCI_BRIDGE_CONTROL, (uint16_t)( PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR )); - pcibios_write_config_word(pdev->bus->number, pdev->devfn, PCI_COMMAND, (uint16_t)( PCI_COMMAND_IO | + pcibios_write_config_word(pdev->bus->number, pdev->devfn, PCI_COMMAND, (uint16_t)( PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_PARITY | @@ -1351,7 +1351,7 @@ static void recursive_bus_reconfigure( struct pci_bus *pbus ) else { /* memory space */ - + /* shift base pointer up to an integer multiple of the size of the desired region */ if( astart.start_pcimem % r->size ) astart.start_pcimem = (((astart.start_pcimem / r->size) + 1) * r->size); @@ -1379,7 +1379,7 @@ static void recursive_bus_reconfigure( struct pci_bus *pbus ) -void pci_init(void) +void pci_init(void) { PPC_DEVICE *hostbridge; @@ -1388,18 +1388,18 @@ void pci_init(void) return; } pci->last_dev_p = &(bd->pci_devices); - hostbridge=residual_find_device(PROCESSORDEVICE, NULL, + hostbridge=residual_find_device(PROCESSORDEVICE, NULL, BridgeController, PCIBridge, -1, 0); if (hostbridge) { if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) { bd->pci_functions=&indirect_functions; - /* Should be extracted from residual data, + /* Should be extracted from residual data, * indeed MPC106 in CHRP mode is different, * but we should not use residual data in - * this case anyway. + * this case anyway. */ - pci->config_addr = ((volatile u_int *) + pci->config_addr = ((volatile u_int *) (ptr_mem_map->io_base+0xcf8)); pci->config_data = ptr_mem_map->io_base+0xcfc; } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) { @@ -1412,7 +1412,7 @@ void pci_init(void) u_int id0; bd->pci_functions = &direct_functions; /* On all direct bridges I know the host bridge itself - * appears as device 0 function 0. + * appears as device 0 function 0. */ pcibios_read_config_dword(0, 0, PCI_VENDOR_ID, &id0); if (id0==~0U) { diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.h b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.h index caf0c3e12f..3884760c8b 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.h +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.h @@ -42,7 +42,7 @@ #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ #define PCI_STATUS_PARITY 0x100 /* Detected parity error */ #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ -#define PCI_STATUS_DEVSEL_FAST 0x000 +#define PCI_STATUS_DEVSEL_FAST 0x000 #define PCI_STATUS_DEVSEL_MEDIUM 0x200 #define PCI_STATUS_DEVSEL_SLOW 0x400 #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ @@ -71,8 +71,8 @@ /* * Base addresses specify locations in memory or I/O space. - * Decoded size can be determined by writing a value of - * 0xffffffff to the register, and reading it back. Only + * Decoded size can be determined by writing a value of + * 0xffffffff to the register, and reading it back. Only * 1 bits are decoded. */ #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ @@ -96,7 +96,7 @@ /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c -#define PCI_SUBSYSTEM_ID 0x2e +#define PCI_SUBSYSTEM_ID 0x2e #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL) @@ -455,8 +455,8 @@ #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 -#define PCI_VENDOR_ID_DPT 0x1044 -#define PCI_DEVICE_ID_DPT 0xa400 +#define PCI_VENDOR_ID_DPT 0x1044 +#define PCI_DEVICE_ID_DPT 0xa400 #define PCI_VENDOR_ID_OPTI 0x1045 #define PCI_DEVICE_ID_OPTI_92C178 0xc178 @@ -1072,17 +1072,17 @@ /* Functions used to access pci configuration space */ struct pci_config_access_functions { - int (*read_config_byte)(unsigned char, unsigned char, + int (*read_config_byte)(unsigned char, unsigned char, unsigned char, unsigned char *); - int (*read_config_word)(unsigned char, unsigned char, + int (*read_config_word)(unsigned char, unsigned char, unsigned char, unsigned short *); - int (*read_config_dword)(unsigned char, unsigned char, + int (*read_config_dword)(unsigned char, unsigned char, unsigned char, unsigned int *); - int (*write_config_byte)(unsigned char, unsigned char, + int (*write_config_byte)(unsigned char, unsigned char, unsigned char, unsigned char); - int (*write_config_word)(unsigned char, unsigned char, + int (*write_config_word)(unsigned char, unsigned char, unsigned char, unsigned short); - int (*write_config_dword)(unsigned char, unsigned char, + int (*write_config_dword)(unsigned char, unsigned char, unsigned char, unsigned int); }; diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.c b/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.c index 78ba7867fc..70e97abb6e 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.c +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.c @@ -119,7 +119,7 @@ typedef uLong (*check_func) OF((uLong check, Bytef *buf, uInt len)); /* deflate.h -- internal compression state * Copyright (C) 1995 Jean-loup Gailly - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -130,7 +130,7 @@ typedef uLong (*check_func) OF((uLong check, Bytef *buf, uInt len)); /*+++++*/ /* infblock.h -- header to use infblock.c * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -171,7 +171,7 @@ local int inflate_packet_flush OF(( /*+++++*/ /* inftrees.h -- header to use inftrees.c * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -233,7 +233,7 @@ local int inflate_trees_free OF(( /*+++++*/ /* infcodes.h -- header to use infcodes.c * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -262,7 +262,7 @@ local void inflate_codes_free OF(( /*+++++*/ /* inflate.c -- zlib interface to inflate modules * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* inflate private state */ @@ -294,7 +294,7 @@ struct internal_state { /* mode independent information */ int nowrap; /* flag for no wrapper */ uInt wbits; /* log2(window size) (8..15, defaults to 15) */ - inflate_blocks_statef + inflate_blocks_statef *blocks; /* current inflate_blocks state */ }; @@ -569,7 +569,7 @@ z_stream *z; /*+++++*/ /* infutil.h -- types and macros common to blocks and codes * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -607,7 +607,7 @@ struct inflate_blocks_state { } trees; /* if DTREE, decoding info for trees */ struct { inflate_huft *tl, *td; /* trees to free */ - inflate_codes_statef + inflate_codes_statef *codes; } decode; /* if CODES, current state */ } sub; /* submode */ @@ -665,7 +665,7 @@ local int inflate_flush OF(( /*+++++*/ /* inffast.h -- header to use inffast.c * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is @@ -685,7 +685,7 @@ local int inflate_fast OF(( /*+++++*/ /* infblock.c -- interpret and process block types to last block * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* Table for deflate from PKZIP's appnote.txt. */ @@ -1133,7 +1133,7 @@ local int inflate_packet_flush(s) /*+++++*/ /* inftrees.c -- generate Huffman trees for efficient decoding * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* simplify the use of the inflate_huft type with some defines */ @@ -1226,7 +1226,7 @@ uIntf *b; /* code lengths in bits (all assumed <= BMAX) */ uInt n; /* number of codes (assumed <= N_MAX) */ uInt s; /* number of simple-valued codes (0..s-1) */ uIntf *d; /* list of base values for non-simple codes */ -uIntf *e; /* list of extra bits for non-simple codes */ +uIntf *e; /* list of extra bits for non-simple codes */ inflate_huft * FAR *t; /* result: starting table */ uIntf *m; /* maximum lookup bits, returns actual */ z_stream *zs; /* for zalloc function */ @@ -1596,14 +1596,14 @@ z_stream *z; /* for zfree function */ q = (--p)->next; ZFREE(z, p, p->word.Nalloc * sizeof(inflate_huft)); p = q; - } + } return Z_OK; } /*+++++*/ /* infcodes.c -- process literals and length/distance pairs * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* simplify the use of the inflate_huft type with some defines */ @@ -1844,7 +1844,7 @@ z_stream *z; /*+++++*/ /* inflate_util.c -- data and routines common to blocks and codes * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* copy as much as possible from the sliding window to the output area */ @@ -1917,7 +1917,7 @@ int r; /*+++++*/ /* inffast.c -- process literals and length/distance pairs fast * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* simplify the use of the inflate_huft type with some defines */ @@ -2078,7 +2078,7 @@ z_stream *z; /*+++++*/ /* zutil.c -- target dependent utility functions for the compression library * Copyright (C) 1995 Jean-loup Gailly. - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* From: zutil.c,v 1.8 1995/05/03 17:27:12 jloup Exp */ @@ -2099,7 +2099,7 @@ char *z_errmsg[] = { /*+++++*/ /* adler32.c -- compute the Adler-32 checksum of a data stream * Copyright (C) 1995 Mark Adler - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* From: adler32.c,v 1.6 1995/05/03 17:27:08 jloup Exp */ diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.h b/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.h index 31485f4632..11b040595c 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.h +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/zlib.h @@ -52,7 +52,7 @@ /* zconf.h -- configuration of the zlib compression library * Copyright (C) 1995 Jean-loup Gailly. - * For conditions of distribution and use, see copyright notice in zlib.h + * For conditions of distribution and use, see copyright notice in zlib.h */ /* From: zconf.h,v 1.12 1995/05/03 17:27:12 jloup Exp */ @@ -145,7 +145,7 @@ typedef uLong FAR uLongf; #define ZLIB_VERSION "0.95P" -/* +/* The 'zlib' compression library provides in-memory compression and decompression functions, including integrity checks of the uncompressed data. This version of the library supports only one compression method @@ -262,7 +262,7 @@ extern char *zlib_version; /* basic functions */ extern int inflateInit OF((z_stream *strm)); -/* +/* Initializes the internal stream state for decompression. The fields zalloc and zfree must be initialized before by the caller. If zalloc and zfree are set to Z_NULL, inflateInit updates them to use default allocation @@ -341,7 +341,7 @@ extern int inflateEnd OF((z_stream *strm)); extern int inflateInit2 OF((z_stream *strm, int windowBits)); -/* +/* This is another version of inflateInit with more compression options. The fields next_out, zalloc and zfree must be initialized before by the caller. @@ -373,7 +373,7 @@ extern int inflateInit2 OF((z_stream *strm, */ extern int inflateSync OF((z_stream *strm)); -/* +/* Skips invalid compressed data until the special marker (see deflate() above) can be found, or until all available input is skipped. No output is provided. diff --git a/c/src/lib/libbsp/powerpc/shared/clock/p_clock.c b/c/src/lib/libbsp/powerpc/shared/clock/p_clock.c index 2cb8ab20b9..fe90a3d01e 100644 --- a/c/src/lib/libbsp/powerpc/shared/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/shared/clock/p_clock.c @@ -23,7 +23,7 @@ static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, (rtems_irq_enable)clockOn, (rtems_irq_disable)clockOff, (rtems_irq_is_enabled) clockIsOn}; - + int BSP_disconnect_clock_handler (void) { diff --git a/c/src/lib/libbsp/powerpc/shared/console/console.c b/c/src/lib/libbsp/powerpc/shared/console/console.c index c16084562c..2a3a1d6c60 100644 --- a/c/src/lib/libbsp/powerpc/shared/console/console.c +++ b/c/src/lib/libbsp/powerpc/shared/console/console.c @@ -21,7 +21,7 @@ * * $Id$ */ - + #include <stdlib.h> #include <assert.h> #include <stdlib.h> @@ -97,7 +97,7 @@ console_initialize(rtems_device_major_number major, * Set up TERMIOS */ rtems_termios_initialize (); - + /* * Do device-specific initialization */ @@ -105,7 +105,7 @@ console_initialize(rtems_device_major_number major, /* RTEMS calls this routine once with 'minor'==0; loop through * all known instances... */ - + for (minor=0; minor < sizeof(ttyS)/sizeof(ttyS[0]); minor++) { char *nm; /* @@ -173,7 +173,7 @@ console_open(rtems_device_major_number major, void *arg) { rtems_status_code status; - static rtems_termios_callbacks cb = + static rtems_termios_callbacks cb = { console_first_open, /* firstOpen */ console_last_close, /* lastClose */ @@ -196,7 +196,7 @@ console_open(rtems_device_major_number major, /* * Pass data area info down to driver */ - BSP_uart_termios_set(minor, + BSP_uart_termios_set(minor, ((rtems_libio_open_close_args_t *)arg)->iop->data1); /* Enable interrupts on channel */ BSP_uart_intr_ctrl(minor, BSP_UART_INTR_CTRL_TERMIOS); @@ -215,11 +215,11 @@ console_close(rtems_device_major_number major, rtems_device_driver res = RTEMS_SUCCESSFUL; res = rtems_termios_close (arg); - + return res; } /* console_close */ - + /*-------------------------------------------------------------------------+ | Console device driver READ entry point. +--------------------------------------------------------------------------+ @@ -233,7 +233,7 @@ console_read(rtems_device_major_number major, return rtems_termios_read (arg); } /* console_read */ - + /*-------------------------------------------------------------------------+ | Console device driver WRITE entry point. @@ -247,20 +247,20 @@ console_write(rtems_device_major_number major, { return rtems_termios_write (arg); - + } /* console_write */ - + /* * Handle ioctl request. */ -rtems_device_driver +rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg ) -{ +{ /* does the BSP support break callbacks ? */ #if defined(BIOCSETBREAKCB) && defined(BIOCGETBREAKCB) rtems_libio_ioctl_args_t *ioa=arg; @@ -269,7 +269,7 @@ rtems_libio_ioctl_args_t *ioa=arg; return BSP_uart_set_break_cb(minor, ioa); case BIOCGETBREAKCB: return BSP_uart_get_break_cb(minor, ioa); - + default: break; } @@ -282,45 +282,45 @@ conSetAttr(int minor, const struct termios *t) { int baud; - switch (t->c_cflag & CBAUD) + switch (t->c_cflag & CBAUD) { - case B50: + case B50: baud = 50; break; - case B75: - baud = 75; + case B75: + baud = 75; break; - case B110: - baud = 110; + case B110: + baud = 110; break; - case B134: - baud = 134; + case B134: + baud = 134; break; - case B150: - baud = 150; + case B150: + baud = 150; break; case B200: - baud = 200; + baud = 200; break; - case B300: + case B300: baud = 300; break; - case B600: - baud = 600; + case B600: + baud = 600; break; - case B1200: + case B1200: baud = 1200; break; - case B1800: - baud = 1800; + case B1800: + baud = 1800; break; - case B2400: + case B2400: baud = 2400; break; - case B4800: + case B4800: baud = 4800; break; - case B9600: + case B9600: baud = 9600; break; case B19200: @@ -329,7 +329,7 @@ conSetAttr(int minor, const struct termios *t) case B38400: baud = 38400; break; - case B57600: + case B57600: baud = 57600; break; case B115200: diff --git a/c/src/lib/libbsp/powerpc/shared/console/inch.c b/c/src/lib/libbsp/powerpc/shared/console/inch.c index f92ed2e21e..4b30a22978 100644 --- a/c/src/lib/libbsp/powerpc/shared/console/inch.c +++ b/c/src/lib/libbsp/powerpc/shared/console/inch.c @@ -56,7 +56,7 @@ static char shift_map[] = '*',0x80,' ',0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, 0x80,0x80,0x80,0x80,'7','8','9',0x80,'4','5','6',0x80, '1','2','3','0',177 -}; /* Keyboard scancode -> character map with SHIFT key modifier. */ +}; /* Keyboard scancode -> character map with SHIFT key modifier. */ static char kbd_buffer[KBD_BUF_SIZE]; static uint16_t kbd_first = 0; @@ -152,7 +152,7 @@ _IBMPC_scankey(char *outChar) break; case 0x53: - if (ctrl_pressed && alt_pressed) + if (ctrl_pressed && alt_pressed) rtemsReboot(); /* ctrl+alt+del -> reboot */ break; @@ -251,11 +251,11 @@ _IBMPC_inch(void) return c; } /* _IBMPC_inch */ - + /* * Routine that can be used before interrupt management is initialized. */ - + char BSP_wait_polled_input(void) { @@ -268,7 +268,7 @@ BSP_wait_polled_input(void) /*-------------------------------------------------------------------------+ | Function: _IBMPC_inch_sleep -| Description: If charcter is ready return it, otherwise sleep until +| Description: If charcter is ready return it, otherwise sleep until | it is ready | Global Variables: None. | Arguments: None. @@ -288,14 +288,14 @@ _IBMPC_inch_sleep(void) { return c; } - + if(ticks_per_second == 0) { - rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, + rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second); } rtems_task_wake_after((ticks_per_second+24)/25); } - + return c; } /* _IBMPC_inch */ diff --git a/c/src/lib/libbsp/powerpc/shared/console/polled_io.c b/c/src/lib/libbsp/powerpc/shared/console/polled_io.c index b2958098b7..7172e8d222 100644 --- a/c/src/lib/libbsp/powerpc/shared/console/polled_io.c +++ b/c/src/lib/libbsp/powerpc/shared/console/polled_io.c @@ -205,34 +205,34 @@ unsigned int keymap_count = 7; */ char func_buf[] = { - '\033', '[', '[', 'A', 0, - '\033', '[', '[', 'B', 0, - '\033', '[', '[', 'C', 0, - '\033', '[', '[', 'D', 0, - '\033', '[', '[', 'E', 0, - '\033', '[', '1', '7', '~', 0, - '\033', '[', '1', '8', '~', 0, - '\033', '[', '1', '9', '~', 0, - '\033', '[', '2', '0', '~', 0, - '\033', '[', '2', '1', '~', 0, - '\033', '[', '2', '3', '~', 0, - '\033', '[', '2', '4', '~', 0, - '\033', '[', '2', '5', '~', 0, - '\033', '[', '2', '6', '~', 0, - '\033', '[', '2', '8', '~', 0, - '\033', '[', '2', '9', '~', 0, - '\033', '[', '3', '1', '~', 0, - '\033', '[', '3', '2', '~', 0, - '\033', '[', '3', '3', '~', 0, - '\033', '[', '3', '4', '~', 0, - '\033', '[', '1', '~', 0, - '\033', '[', '2', '~', 0, - '\033', '[', '3', '~', 0, - '\033', '[', '4', '~', 0, - '\033', '[', '5', '~', 0, - '\033', '[', '6', '~', 0, - '\033', '[', 'M', 0, - '\033', '[', 'P', 0, + '\033', '[', '[', 'A', 0, + '\033', '[', '[', 'B', 0, + '\033', '[', '[', 'C', 0, + '\033', '[', '[', 'D', 0, + '\033', '[', '[', 'E', 0, + '\033', '[', '1', '7', '~', 0, + '\033', '[', '1', '8', '~', 0, + '\033', '[', '1', '9', '~', 0, + '\033', '[', '2', '0', '~', 0, + '\033', '[', '2', '1', '~', 0, + '\033', '[', '2', '3', '~', 0, + '\033', '[', '2', '4', '~', 0, + '\033', '[', '2', '5', '~', 0, + '\033', '[', '2', '6', '~', 0, + '\033', '[', '2', '8', '~', 0, + '\033', '[', '2', '9', '~', 0, + '\033', '[', '3', '1', '~', 0, + '\033', '[', '3', '2', '~', 0, + '\033', '[', '3', '3', '~', 0, + '\033', '[', '3', '4', '~', 0, + '\033', '[', '1', '~', 0, + '\033', '[', '2', '~', 0, + '\033', '[', '3', '~', 0, + '\033', '[', '4', '~', 0, + '\033', '[', '5', '~', 0, + '\033', '[', '6', '~', 0, + '\033', '[', 'M', 0, + '\033', '[', 'P', 0, }; char *funcbufptr = func_buf; @@ -320,7 +320,7 @@ unsigned int accent_table_size = 68; /* These #defines have been copied from drivers/char/pc_keyb.h, by - * Martin Mares (mj@ucw.cz). + * Martin Mares (mj@ucw.cz). * converted to offsets by Till Straumann <strauman@slac.stanford.edu> */ #define KBD_STATUS_REG 0x4 /* Status register (R) */ @@ -385,7 +385,7 @@ SPR_RO(PVR) #endif /* USE_KBD_SUPPORT */ -/* Early messages after mm init but before console init are kept in log +/* Early messages after mm init but before console init are kept in log * buffers. */ #define PAGE_LOG_CHARS (PAGE_SIZE-sizeof(int)-sizeof(u_long)-1) @@ -509,7 +509,7 @@ static void pfree(void* p) --global_index; } #endif - + void log_putc(const u_char c) { console_log *l; @@ -519,11 +519,11 @@ void log_putc(const u_char c) { if (!l) { l=__palloc(sizeof(console_log)); memset(l, 0, sizeof(console_log)); - if (!console_global_data.log) + if (!console_global_data.log) console_global_data.log = l; else { console_log *p; - for (p=console_global_data.log; + for (p=console_global_data.log; p->next; p=p->next); p->next = l; } @@ -534,7 +534,7 @@ void log_putc(const u_char c) { /* This puts is non standard since it does not automatically add a newline * at the end. So it is made private to avoid confusion in other files. */ -static +static void puts(const u_char *s) { char c; @@ -549,10 +549,10 @@ static void flush_log(void) { console_log *p, *next; if (console_global_data.vacuum_sent) { -#ifdef TRACE_FLUSH_LOG - printk("%d characters sent into oblivion before MM init!\n", +#ifdef TRACE_FLUSH_LOG + printk("%d characters sent into oblivion before MM init!\n", console_global_data.vacuum_sent); -#endif +#endif } for(p=console_global_data.log; p; p=next) { puts(p->data); @@ -570,7 +570,7 @@ void serial_putc(const u_char c) while ((INL_CONSOLE_INB(lsr) & LSR_THRE) == 0) ; INL_CONSOLE_OUTB(thr, c); } - + int serial_getc(void) { while ((INL_CONSOLE_INB(lsr) & LSR_DR) == 0) ; @@ -587,16 +587,16 @@ static void scroll(void) { int i; - memcpy ( (u_char *)vidmem, (u_char *)vidmem + console_global_data.cols * 2, + memcpy ( (u_char *)vidmem, (u_char *)vidmem + console_global_data.cols * 2, ( console_global_data.lines - 1 ) * console_global_data.cols * 2 ); - for ( i = ( console_global_data.lines - 1 ) * console_global_data.cols * 2; - i < console_global_data.lines * console_global_data.cols * 2; + for ( i = ( console_global_data.lines - 1 ) * console_global_data.cols * 2; + i < console_global_data.lines * console_global_data.cols * 2; i += 2 ) vidmem[i] = ' '; } /* - * cursor() sets an offset (0-1999) into the 80x25 text area + * cursor() sets an offset (0-1999) into the 80x25 text area */ static void cursor(int x, int y) @@ -608,7 +608,7 @@ cursor(int x, int y) vga_outb(0x15, pos); } -void +void vga_putc(const u_char c) { int x,y; @@ -628,7 +628,7 @@ vga_putc(const u_char c) } else if (c == '\r') { x = 0; } else { - vidmem [ ( x + console_global_data.cols * y ) * 2 ] = c; + vidmem [ ( x + console_global_data.cols * y ) * 2 ] = c; if ( ++x >= console_global_data.cols ) { x = 0; if ( ++y >= console_global_data.lines ) { @@ -765,7 +765,7 @@ static int kbd_get(int ms) { else return data; } - if (--ms < 0) return -1; + if (--ms < 0) return -1; #ifdef __BOOT__ boot_udelay(1000); #else @@ -776,7 +776,7 @@ static int kbd_get(int ms) { static void kbd_put(u_char c, int ms, int port) { while (kbd_inb(KBD_STATUS_REG) & KBD_STAT_IBF) { - if (--ms < 0) return; + if (--ms < 0) return; #ifdef __BOOT__ boot_udelay(1000); #else @@ -800,14 +800,14 @@ int kbdreset(void) /* Enable then reset the KB */ kbd_put(KBD_CCMD_KBD_ENABLE, 10, KBD_CNTL_REG); - + while (1) { kbd_put(KBD_CMD_RESET, 10, KBD_DATA_REG); c = kbd_get(1000); if (c == KBD_REPLY_ACK) break; if (c != KBD_REPLY_RESEND) return 2; } - + if (kbd_get(1000) != KBD_REPLY_POR) return 3; /* Disable the keyboard while setting up the controller */ @@ -816,7 +816,7 @@ int kbdreset(void) /* Enable interrupts and keyboard controller */ kbd_put(KBD_CCMD_WRITE_MODE, 10, KBD_CNTL_REG); - kbd_put(KBD_MODE_KBD_INT | KBD_MODE_SYS | + kbd_put(KBD_MODE_KBD_INT | KBD_MODE_SYS | KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC, 10, KBD_DATA_REG); @@ -833,30 +833,30 @@ int kbd_tstc(void) } #endif /* USE_KBD_SUPPORT */ -const struct console_io +const struct console_io vacuum_console_functions = { - vacuum_putc, - vacuum_getc, + vacuum_putc, + vacuum_getc, vacuum_tstc }; static const struct console_io log_console_functions = { - log_putc, - vacuum_getc, + log_putc, + vacuum_getc, vacuum_tstc } , serial_console_functions = { - serial_putc, - serial_getc, + serial_putc, + serial_getc, serial_tstc } #if defined(USE_KBD_SUPPORT) && defined(USE_VGA_SUPPORT) , vga_console_functions = { - vga_putc, - kbd_getc, + vga_putc, + kbd_getc, kbd_tstc } #endif @@ -866,7 +866,7 @@ console_io* curIo = (console_io*) &vacuum_console_functions; int select_console(ioType t) { static ioType curType = CONSOLE_VACUUM; - + switch (t) { case CONSOLE_VACUUM : curIo = (console_io*)&vacuum_console_functions; break; case CONSOLE_LOG : curIo = (console_io*)&log_console_functions; break; @@ -909,7 +909,7 @@ int printk(const char *fmt, ...) { int i; /* Should not be a problem with 8kB of stack */ char buf[1024]; - + va_start(args, fmt); i = k_vsprintf(buf, fmt, args); va_end(args); @@ -947,7 +947,7 @@ do { u32 t1, t2, t3; \ "=r" (num), "=&r" (t1), "=&r" (t2), "=&r"(t3), "=&b" (rmd) : \ "0" (num)); \ \ -} while(0); +} while(0); #define SIGN 1 /* unsigned/signed long */ #define LARGE 2 /* use 'ABCDEF' instead of 'abcdef' */ @@ -974,7 +974,7 @@ static char * number(char * str, int size, int type, u64 num) sign = '-'; num = -num; size--; - } + } } i = 0; @@ -988,7 +988,7 @@ static char * number(char * str, int size, int type, u64 num) } tmp[i++] = digits[rem]; } while (num != 0); - + size -= i; if (!(type&(ZEROPAD))) while(size-->0) @@ -1022,14 +1022,14 @@ int k_vsprintf(char *buf, const char *fmt, va_list args) *str++ = *fmt; continue; } - + /* process flags, only 0 padding needed */ flags = 0; if (*++fmt == '0' ) { flags |= ZEROPAD; fmt++; } - + /* get field width */ field_width = -1; if (is_digit(*fmt)) @@ -1092,14 +1092,14 @@ int k_vsprintf(char *buf, const char *fmt, va_list args) --fmt; continue; } - /* This ugly code tries to minimize the number of va_arg() - * since they expand to a lot of code on PPC under the SYSV - * calling conventions (but not with -mcall-aix which has + /* This ugly code tries to minimize the number of va_arg() + * since they expand to a lot of code on PPC under the SYSV + * calling conventions (but not with -mcall-aix which has * other problems). Arguments have at least the size of a * long allocated, and we use this fact to minimize bloat. * (and pointers are assimilated to unsigned long too). */ - if (sizeof(long long) > sizeof(long) && flags & LLONG) + if (sizeof(long long) > sizeof(long) && flags & LLONG) num = va_arg(args, unsigned long long); else { u_long n = va_arg(args, unsigned long); @@ -1109,10 +1109,10 @@ int k_vsprintf(char *buf, const char *fmt, va_list args) else n = (unsigned short) n; } else if (! flags & LONG) { - /* Here the compiler correctly removes this + /* Here the compiler correctly removes this * do nothing code on 32 bit PPC. */ - if (flags & SIGN) + if (flags & SIGN) n = (int) n; else n = (unsigned) n; diff --git a/c/src/lib/libbsp/powerpc/shared/console/uart.c b/c/src/lib/libbsp/powerpc/shared/console/uart.c index 5bdf8e110b..7fb5597873 100644 --- a/c/src/lib/libbsp/powerpc/shared/console/uart.c +++ b/c/src/lib/libbsp/powerpc/shared/console/uart.c @@ -57,10 +57,10 @@ static struct uart_data uart_data[2] = { #define MAX_UARTS (sizeof(uart_data)/sizeof(uart_data[0])) #define SANITY_CHECK(uart) \ assert( MAX_UARTS > (unsigned)(uart) && uart_data[(uart)].ioBase != UART_UNSUPP ) -/* +/* * Macros to read/wirte register of uart, if configuration is * different just rewrite these macros - */ + */ static inline unsigned char uread(int uart, unsigned int reg) @@ -70,7 +70,7 @@ uread(int uart, unsigned int reg) } -static inline void +static inline void uwrite(int uart, int reg, unsigned int val) { out_8((unsigned char*)(uart_data[uart].ioBase + reg), val); @@ -111,7 +111,7 @@ inline void uartError(int uart, void *termiosPrivate) { unsigned char uartStatus,dummy; BSP_UartBreakCbProc h; - + uartStatus = uread(uart, LSR); dummy = uread(uart, RBR); if ((uartStatus & BI) && (h=uart_data[uart].breakCallback.handler)) @@ -122,7 +122,7 @@ inline void uartError(int uart, void *termiosPrivate) } #endif -/* +/* * Uart initialization, it is hardcoded to 8 bit, no parity, * one stop bit, FIFO, things to be changed * are baud rate and nad hw flow control, @@ -132,10 +132,10 @@ void BSP_uart_init(int uart, int baud, int hwFlow) { unsigned char tmp; - + /* Sanity check */ SANITY_CHECK(uart); - + switch(baud) { case 50: @@ -156,23 +156,23 @@ BSP_uart_init(int uart, int baud, int hwFlow) assert(0); return; } - + /* Set DLAB bit to 1 */ uwrite(uart, LCR, DLAB); - + /* Set baud rate */ - uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); - uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); + uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); + uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); /* 8-bit, no parity , 1 stop */ uwrite(uart, LCR, CHR_8_BITS); - + /* Set DTR, RTS and OUT2 high */ uwrite(uart, MCR, DTR | RTS | OUT_2); /* Enable FIFO */ - uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); + uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); /* Disable Interrupts */ uwrite(uart, IER, 0); @@ -188,7 +188,7 @@ BSP_uart_init(int uart, int baud, int hwFlow) return; } -/* +/* * Set baud */ void @@ -198,10 +198,10 @@ BSP_uart_set_baud(int uart, int baud) /* Sanity check */ SANITY_CHECK(uart); - - /* + + /* * This function may be called whenever TERMIOS parameters - * are changed, so we have to make sire that baud change is + * are changed, so we have to make sire that baud change is * indeed required */ @@ -217,14 +217,14 @@ BSP_uart_set_baud(int uart, int baud) uwrite(uart, MCR, mcr); uwrite(uart, IER, ier); - + return; } /* - * Enable/disable interrupts + * Enable/disable interrupts */ -void +void BSP_uart_intr_ctrl(int uart, int cmd) { @@ -282,7 +282,7 @@ BSP_uart_intr_ctrl(int uart, int cmd) assert(0); break; } - + return; } @@ -290,7 +290,7 @@ void BSP_uart_throttle(int uart) { unsigned int mcr; - + SANITY_CHECK(uart); if(!uart_data[uart].hwFlow) @@ -332,12 +332,12 @@ BSP_uart_unthrottle(int uart) * Status function, -1 if error * detected, 0 if no received chars available, * 1 if received char available, 2 if break - * is detected, it will eat break and error - * chars. It ignores overruns - we cannot do + * is detected, it will eat break and error + * chars. It ignores overruns - we cannot do * anything about - it execpt count statistics * and we are not counting it. */ -int +int BSP_uart_polled_status(int uart) { unsigned char val; @@ -355,7 +355,7 @@ BSP_uart_polled_status(int uart) if((val & (DR | OE | FE)) == 1) { - /* No error, character present */ + /* No error, character present */ return BSP_UART_STATUS_CHAR; } @@ -365,12 +365,12 @@ BSP_uart_polled_status(int uart) return BSP_UART_STATUS_NOCHAR; } - /* + /* * Framing or parity error * eat character */ uread(uart, RBR); - + return BSP_UART_STATUS_ERROR; } @@ -378,14 +378,14 @@ BSP_uart_polled_status(int uart) /* * Polled mode write function */ -void +void BSP_uart_polled_write(int uart, int val) { unsigned char val1; - + /* Sanity check */ SANITY_CHECK(uart); - + for(;;) { if((val1=uread(uart, LSR)) & THRE) @@ -406,7 +406,7 @@ BSP_uart_polled_write(int uart, int val) } uwrite(uart, THR, val & 0xff); - + return; } @@ -417,16 +417,16 @@ BSP_output_char_via_serial(const char val) if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); } -/* +/* * Polled mode read function */ -int +int BSP_uart_polled_read(int uart) { unsigned char val; SANITY_CHECK(uart); - + for(;;) { if(uread(uart, LSR) & DR) @@ -434,13 +434,13 @@ BSP_uart_polled_read(int uart) break; } } - + val = uread(uart, RBR); return (int)(val & 0xff); } -unsigned +unsigned BSP_poll_char_via_serial() { return BSP_uart_polled_read(BSPConsolePort); @@ -453,7 +453,7 @@ uart_noop(const rtems_irq_connect_data *unused) } /* note that the IRQ names contain _ISA_ for legacy - * reasons. They can be any interrupt, depending + * reasons. They can be any interrupt, depending * on the particular BSP... */ @@ -469,7 +469,7 @@ static int doit(int uart, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*)) { rtems_irq_connect_data d={0}; - d.name = (uart == BSP_UART_COM1) ? + d.name = (uart == BSP_UART_COM1) ? BSP_ISA_UART_COM1_IRQ : BSP_ISA_UART_COM2_IRQ; d.off = d.on = uart_noop; d.isOn = uart_isr_is_on; @@ -482,7 +482,7 @@ BSP_uart_install_isr(int uart, rtems_irq_hdl handler) { return doit(uart, handler, BSP_install_rtems_irq_handler); } - + int BSP_uart_remove_isr(int uart, rtems_irq_hdl handler) { @@ -499,14 +499,14 @@ static char termios_tx_hold_com[2] = {0,0}; static volatile char termios_tx_hold_valid_com[2] = {0,0}; /* - * Set channel parameters + * Set channel parameters */ void BSP_uart_termios_set(int uart, void *ttyp) { unsigned char val; SANITY_CHECK(uart); - + if(uart_data[uart].hwFlow) { val = uread(uart, MSR); @@ -519,7 +519,7 @@ BSP_uart_termios_set(int uart, void *ttyp) } termios_tx_active_com[uart] = 0; termios_ttyp_com[uart] = ttyp; - termios_tx_hold_com[uart] = 0; + termios_tx_hold_com[uart] = 0; termios_tx_hold_valid_com[uart] = 0; return; @@ -538,7 +538,7 @@ BSP_uart_termios_write_com(int minor, const char *buf, int len) /* If there TX buffer is busy - something is royally screwed up */ /* assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); */ - + if(termios_stopped_com[uart]) { @@ -566,7 +566,7 @@ BSP_uart_termios_write_com(int minor, const char *buf, int len) else if(!termios_tx_active_com[uart]) { termios_tx_active_com[uart] = 1; - uwrite(uart, IER, + uwrite(uart, IER, (RECEIVE_ENABLE | TRANSMIT_ENABLE | RECEIVER_LINE_ST_ENABLE @@ -589,7 +589,7 @@ BSP_uart_termios_isr_com(int uart) for(;;) { vect = uread(uart, IIR) & 0xf; - + switch(vect) { case MODEM_STATUS : @@ -625,9 +625,9 @@ BSP_uart_termios_isr_com(int uart) } return; case TRANSMITTER_HODING_REGISTER_EMPTY : - /* - * TX holding empty: we have to disable these interrupts - * if there is nothing more to send. + /* + * TX holding empty: we have to disable these interrupts + * if there is nothing more to send. */ ret = rtems_termios_dequeue_characters(termios_ttyp_com[uart], 1); @@ -670,7 +670,7 @@ BSP_uart_termios_isr_com(int uart) } } } - + void BSP_uart_termios_isr_com1(void) { diff --git a/c/src/lib/libbsp/powerpc/shared/console/uart.h b/c/src/lib/libbsp/powerpc/shared/console/uart.h index 087d151462..8396603d47 100644 --- a/c/src/lib/libbsp/powerpc/shared/console/uart.h +++ b/c/src/lib/libbsp/powerpc/shared/console/uart.h @@ -59,7 +59,7 @@ typedef struct BSP_UartBreakCbRec_ { /* * Command values for BSP_uart_intr_ctrl(), - * values are strange in order to catch errors + * values are strange in order to catch errors * with assert */ #define BSP_UART_INTR_CTRL_DISABLE (0) diff --git a/c/src/lib/libbsp/powerpc/shared/include/bsp.h b/c/src/lib/libbsp/powerpc/shared/include/bsp.h index 85488eb076..fb79919160 100644 --- a/c/src/lib/libbsp/powerpc/shared/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/shared/include/bsp.h @@ -48,7 +48,7 @@ #define BSP_CONSOLE_PORT BSP_UART_COM1 #define BSP_UART_BAUD_BASE 115200 - + #include <bsp/openpic.h> #define BSP_PIC_DO_EOI openpic_eoi(0) diff --git a/c/src/lib/libbsp/powerpc/shared/include/nvram.h b/c/src/lib/libbsp/powerpc/shared/include/nvram.h index 49edc54d3d..3f6f77988a 100644 --- a/c/src/lib/libbsp/powerpc/shared/include/nvram.h +++ b/c/src/lib/libbsp/powerpc/shared/include/nvram.h @@ -166,5 +166,5 @@ char *prep_nvram_first_var(void); char *prep_nvram_next_var(char *name); #endif /* ASM */ - + #endif /* _PPC_NVRAM_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/irq/i8259.c b/c/src/lib/libbsp/powerpc/shared/irq/i8259.c index 0261d892f3..806a7eb19b 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/i8259.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/i8259.c @@ -11,7 +11,7 @@ * * $Id$ */ - + #include <bsp.h> #include <bsp/irq.h> @@ -29,7 +29,7 @@ volatile rtems_i8259_masks i8259s_cache = 0xfffb; | Description: Mask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: vector_offset - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -40,12 +40,12 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) ((int)irqLine > BSP_ISA_IRQ_MAX_OFFSET) ) return 1; - + _CPU_ISR_Disable(level); - + mask = 1 << irqLine; i8259s_cache |= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -57,14 +57,14 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) _CPU_ISR_Enable (level); return 0; -} +} /*-------------------------------------------------------------------------+ | Function: BSP_irq_enable_at_i8259s | Description: Unmask IRQ line in appropriate PIC chip. | Global Variables: i8259s_cache | Arguments: irqLine - number of IRQ line to mask. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -77,10 +77,10 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) return 1; _CPU_ISR_Disable(level); - + mask = ~(1 << irqLine); i8259s_cache &= mask; - + if (irqLine < 8) { outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff); @@ -106,14 +106,14 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine) mask = (1 << irqLine); return (~(i8259s_cache & mask)); } - + /*-------------------------------------------------------------------------+ | Function: BSP_irq_ack_at_i8259s | Description: Signal generic End Of Interrupt (EOI) to appropriate PIC. | Global Variables: None. | Arguments: irqLine - number of IRQ line to acknowledge. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine) { @@ -147,5 +147,5 @@ void BSP_i8259s_init(void) outport_byte(PIC_SLAVE_IMR_IO_PORT, 0x02);/* edge triggered, Cascade (slave) on IRQ2 */ outport_byte(PIC_SLAVE_IMR_IO_PORT, 0x01); /* Select 8086 mode */ outport_byte(PIC_SLAVE_IMR_IO_PORT, 0xFF); /* Mask all */ - + } diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.c b/c/src/lib/libbsp/powerpc/shared/irq/irq.c index 0f7d50fa9b..356c7921f9 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.c @@ -12,7 +12,7 @@ */ #include <stdlib.h> - + #include <bsp.h> #include <bsp/irq.h> #include <bsp/VME.h> @@ -80,7 +80,7 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine) /* * ------------------------ RTEMS Irq helper functions ---------------- */ - + /* * Caution : this function assumes the variable "internal_config" * is already set and that the tables it contains are still valid @@ -126,7 +126,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; rtems_irq_connect_data* vchain; - + if (!isValidInterrupt(irq->name)) { printk("Invalid interrupt vector %d\n",irq->name); return 0; @@ -144,7 +144,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) /* save off topmost handler */ vchain[0]= rtems_hdl_tbl[irq->name]; - + /* * store the data provided by user */ @@ -153,14 +153,14 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) /* link chain to new topmost handler */ rtems_hdl_tbl[irq->name].next_handler = (void *)vchain; - + if (is_isa_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_i8259s (irq->name); } - + if (is_pci_irq(irq->name)) { /* * Enable interrupt at OPENPIC level @@ -177,7 +177,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -191,7 +191,7 @@ int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { printk("Invalid interrupt vector %d\n",irq->name); return 0; @@ -215,14 +215,14 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) */ rtems_hdl_tbl[irq->name] = *irq; rtems_hdl_tbl[irq->name].next_handler = (void *)-1; - + if (is_isa_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_i8259s (irq->name); } - + if (is_pci_irq(irq->name)) { /* * Enable interrupt at OPENPIC level @@ -239,7 +239,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -263,7 +263,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_connect_data *pchain= NULL, *vchain = NULL; unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -302,7 +302,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) } else { - if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) + if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) { _CPU_ISR_Enable(level); return 0; @@ -325,7 +325,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* * disable exception at processor level */ - } + } /* * Disable interrupt on device @@ -394,7 +394,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -406,7 +406,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); @@ -434,7 +434,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -447,13 +447,13 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); } } - + openpic_disable_irq ((int) i - BSP_PCI_IRQ_LOWEST_OFFSET); } } @@ -470,7 +470,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->on(vchain); @@ -483,7 +483,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) { rtems_irq_connect_data* vchain; for( vchain = &rtems_hdl_tbl[i]; - ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); + ((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl); vchain = (rtems_irq_connect_data*)vchain->next_handler ) { vchain->off(vchain); @@ -500,10 +500,10 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config) { *config = internal_config; return 0; -} +} int _BSP_vme_bridge_irq = -1; - + unsigned BSP_spuriousIntr = 0; /* * High level IRQ handler called from shared_raw_irq_code_entry @@ -522,12 +522,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[BSP_DECREMENTER].hdl(); _CPU_MSR_SET(msr); return; - + } irq = openpic_irq(0); if (irq == OPENPIC_VEC_SPURIOUS) { @@ -554,7 +554,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + /* rtems_hdl_tbl[irq].hdl(); */ { rtems_irq_connect_data* vchain; @@ -585,9 +585,9 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) openpic_eoi(0); } } - - - + + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.h b/c/src/lib/libbsp/powerpc/shared/irq/irq.h index 9d1fab5102..f2457d36e5 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.h @@ -104,7 +104,7 @@ typedef enum { BSP_MAX_OFFSET = BSP_MISC_IRQ_MAX_OFFSET, /* * Some ISA IRQ symbolic name definition - */ + */ BSP_ISA_PERIODIC_TIMER = 0, BSP_ISA_KEYBOARD = 1, @@ -114,7 +114,7 @@ typedef enum { BSP_ISA_UART_COM1_IRQ = 4, BSP_ISA_RT_TIMER1 = 8, - + BSP_ISA_RT_TIMER3 = 10, /* * Some PCI IRQ symbolic name definition @@ -125,10 +125,10 @@ typedef enum { * Some Processor execption handled as rtems IRQ symbolic name definition */ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET - + }rtems_irq_symbolic_name; - + /* @@ -162,9 +162,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -205,7 +205,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -282,7 +282,7 @@ int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data*); @@ -329,7 +329,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); extern void BSP_i8259s_init(void); diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S index 6faaf9f587..7eb018d606 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -15,22 +15,22 @@ * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> #include <libcpu/raw_exception.h> - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* * let room for exception frame @@ -41,11 +41,11 @@ SYM (decrementer_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -56,12 +56,12 @@ SYM (external_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -72,7 +72,7 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) @@ -81,10 +81,10 @@ SYM (shared_raw_irq_code_entry): */ stw r2, GPR2_OFFSET(r1) stw r3, GPR3_OFFSET(r1) - + mfsrr0 r0 mfsrr1 r3 - + stw r0, SRR0_FRAME_OFFSET(r1) stw r3, SRR1_FRAME_OFFSET(r1) @@ -123,7 +123,7 @@ SYM (shared_raw_irq_code_entry): mfctr r6 mfxer r7 mflr r8 - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) @@ -161,9 +161,9 @@ SYM (shared_raw_irq_code_entry): cmpwi r3,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R3 */ addi r3,r3,1 @@ -180,7 +180,7 @@ nested: /* store new nesting level in _ISR_Nest_level */ stw r3, _ISR_Nest_level@l(r7) #endif - + addi r6, r6, 1 mfmsr r5 /* @@ -190,7 +190,7 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just @@ -199,7 +199,7 @@ nested: addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ @@ -223,7 +223,7 @@ nested: stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -231,14 +231,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -270,12 +270,12 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - + lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -290,21 +290,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -312,7 +312,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -341,7 +341,7 @@ easy_exit: /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r3, SRR0_FRAME_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c index 5d14948608..c8de84c5e9 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c @@ -125,25 +125,25 @@ void VIA_isa_bridge_interrupts_setup(void) maxBus = BusCountPCI(); pci_dev.function = 0; /* Assumes the bidge is the first function */ - + for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) { -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus); -#endif +#endif for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) { -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device); -#endif +#endif pci_read_config_dword(pci_dev.bus, pci_dev.device, pci_dev.function, PCI_VENDOR_ID, &temp); -#ifdef SCAN_PCI_PRINT +#ifdef SCAN_PCI_PRINT printk("Vendor/device = %x\n", temp); #endif if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16))) ) { bridge = pci_dev; via_82c586 = &bridge; -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS /* * Should print : bus = 0, device = 11, function = 0 on a MCP750. */ @@ -151,27 +151,27 @@ void VIA_isa_bridge_interrupts_setup(void) via_82c586->bus, via_82c586->device, via_82c586->function); -#endif +#endif found = 1; goto loop_exit; - + } } } loop_exit: if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n"); - + tmp = inb(0x810); if ( !(tmp & 0x2)) { -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk("This is a second generation MCP750 board\n"); printk("We must reprogram the PCI/ISA bridge...\n"); -#endif +#endif pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x47, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); -#endif +#endif /* * Enable 4D0/4D1 ISA interrupt level/edge config registers */ @@ -190,31 +190,31 @@ loop_exit: */ pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); -#endif +#endif tmp = 0; pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, tmp); } else { -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk("This is a first generation MCP750 board\n"); printk("We just show the actual value used by PCI/ISA bridge\n"); -#endif +#endif pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x47, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp); -#endif +#endif /* * Show the Interrupt inputs inverting/non-inverting level status */ pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function, 0x54, &tmp); -#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS +#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp); -#endif +#endif } } @@ -229,15 +229,15 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) rtems_raw_except_connect_data vectorDesc; int known_cpi_isa_bridge = 0; int i; - + /* * First initialize the Interrupt management hardware */ -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize raven interrupt controller (openpic compliant)\n"); -#endif +#endif openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses); -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); #endif if ( currentBoard == MESQUITE ) { @@ -258,9 +258,9 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n"); printk("currentBoard = %i\n", currentBoard); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("Going to initialize the ISA PC legacy IRQ management hardware\n"); -#endif +#endif BSP_i8259s_init(); /* * Initialize Rtems management interrupt table @@ -287,7 +287,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -309,7 +309,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc60x_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } diff --git a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.c b/c/src/lib/libbsp/powerpc/shared/motorola/motorola.c index 262bd5e265..f30cfc5d2d 100644 --- a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.c +++ b/c/src/lib/libbsp/powerpc/shared/motorola/motorola.c @@ -61,7 +61,7 @@ ** multiple interrupt lines over the interrupt pin supplied by the ** record. If more than one entry is present, the most preferable ** should supplied first. -** +** */ #define NULL_PINMAP {-1,{-1,-1,-1,-1}} @@ -69,7 +69,7 @@ -static struct _int_map mcp750_intmap[] = { +static struct _int_map mcp750_intmap[] = { { 0, 16, 0, {{1, {5, 19,-1,-1}}, /* pmc slot */ NULL_PINMAP}}, @@ -226,12 +226,12 @@ motorolaBoard getMotorolaBoard() for (entry = 0; mot_boards[entry].cpu_type != 0; entry++) { if ((mot_boards[entry].cpu_type & 0xff) != cpu_type) continue; - + if (mot_boards[entry].base_type == 0) { mot_entry = entry; break; } - + if (mot_boards[entry].base_type != base_mod) continue; else{ diff --git a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h b/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h index f5b3a908cb..11d3fff4c4 100644 --- a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h +++ b/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h @@ -60,9 +60,9 @@ typedef enum { HOST_BRIDGE_HAWK = 1, HOST_BRIDGE_UNKNOWN = 255 }motorolaHostBridge; - + #define MOTOROLA_CPUTYPE_REG 0x800 -#define MOTOROLA_BASETYPE_REG 0x803 +#define MOTOROLA_BASETYPE_REG 0x803 extern prep_t checkPrepBoardType(RESIDUAL *res); extern prep_t currentPrepType; diff --git a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c index ad927a4e72..0a619ba1c2 100644 --- a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c +++ b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c @@ -243,13 +243,13 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses /* No processor */ openpic_maptimer(i, 0); } - + /* Initialize IPI interrupts */ for (i = 0; i < OPENPIC_NUM_IPI; i++) { /* Disabled, Priority 0 */ openpic_initipi(i, 0, OPENPIC_VEC_IPI+i); } - + /* Initialize external interrupts */ for (i = 0; i < NumSources; i++) { /* Enabled, Priority 8 */ @@ -259,14 +259,14 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses /* Processor 0 */ openpic_mapirq(i, 1<<0); } - + /* Initialize the spurious interrupt */ openpic_set_spurious(OPENPIC_VEC_SPURIOUS); -#if 0 +#if 0 if (request_irq(IRQ_8259_CASCADE, no_action, SA_INTERRUPT, "82c59 cascade", NULL)) printk("Unable to get OpenPIC IRQ 0 for cascade\n"); -#endif +#endif openpic_set_priority(0, 0); openpic_disable_8259_pass_through(); } diff --git a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c index f68f7be2aa..7748e3c307 100644 --- a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c +++ b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c @@ -57,25 +57,25 @@ void detect_host_bridge() PPC_DEVICE *hostbridge; unsigned int id0; unsigned int tmp; - + /* * This code assumes that the host bridge is located at * bus 0, dev 0, func 0 AND that the old pre PCI 2.1 * standart devices detection mecahnism that was used on PC * (still used in BSD source code) works. */ - hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, + hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, BridgeController, PCIBridge, -1, 0); if (hostbridge) { if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) { pci.pci_functions=&pci_indirect_functions; - /* Should be extracted from residual data, + /* Should be extracted from residual data, * indeed MPC106 in CHRP mode is different, * but we should not use residual data in - * this case anyway. + * this case anyway. */ - pci.pci_config_addr = ((volatile unsigned char *) + pci.pci_config_addr = ((volatile unsigned char *) (ptr_mem_map->io_base+0xcf8)); pci.pci_config_data = ptr_mem_map->io_base+0xcfc; } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) { @@ -87,7 +87,7 @@ void detect_host_bridge() /* Let us try by experimentation at our own risk! */ pci.pci_functions = &pci_direct_functions; /* On all direct bridges I know the host bridge itself - * appears as device 0 function 0. + * appears as device 0 function 0. */ pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0); if (id0==~0U) { @@ -108,27 +108,27 @@ void detect_host_bridge() * We have a Raven bridge. We will get information about its settings */ pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0); -#ifdef SHOW_RAVEN_SETTING +#ifdef SHOW_RAVEN_SETTING printk("RAVEN PCI command register = %x\n",id0); -#endif +#endif id0 |= RAVEN_CLEAR_EVENTS_MASK; pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0); pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0); -#ifdef SHOW_RAVEN_SETTING +#ifdef SHOW_RAVEN_SETTING printk("After error clearing RAVEN PCI command register = %x\n",id0); -#endif - +#endif + if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) { pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp); -#ifdef SHOW_RAVEN_SETTING +#ifdef SHOW_RAVEN_SETTING printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1)); -#endif +#endif } if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) { pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp); -#ifdef SHOW_RAVEN_SETTING +#ifdef SHOW_RAVEN_SETTING printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp); -#endif +#endif OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE); printk("OpenPIC found at %x.\n", OpenPIC); diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.c b/c/src/lib/libbsp/powerpc/shared/pci/pci.c index 506221c8e2..ba5a97d44d 100644 --- a/c/src/lib/libbsp/powerpc/shared/pci/pci.c +++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.c @@ -44,9 +44,9 @@ unsigned char ucMaxPCIBus; static int indirect_pci_read_config_byte(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned char *val) { - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); *val = in_8(pci.pci_config_data + (offset&3)); return PCIBIOS_SUCCESSFUL; @@ -54,11 +54,11 @@ indirect_pci_read_config_byte(unsigned char bus, unsigned char slot, static int indirect_pci_read_config_word(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned short *val) { - *val = 0xffff; + *val = 0xffff; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3))); return PCIBIOS_SUCCESSFUL; @@ -66,11 +66,11 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char slot, static int indirect_pci_read_config_dword(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned int *val) { - *val = 0xffffffff; + *val = 0xffffffff; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); *val = in_le32((volatile unsigned int *)pci.pci_config_data); return PCIBIOS_SUCCESSFUL; @@ -78,9 +78,9 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char slot, static int indirect_pci_write_config_byte(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned char val) { - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); out_8(pci.pci_config_data + (offset&3), val); return PCIBIOS_SUCCESSFUL; @@ -88,10 +88,10 @@ indirect_pci_write_config_byte(unsigned char bus, unsigned char slot, static int indirect_pci_write_config_word(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned short val) { if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val); return PCIBIOS_SUCCESSFUL; @@ -99,10 +99,10 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char slot, static int indirect_pci_write_config_dword(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned int val) { if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; - out_be32((unsigned int*) pci.pci_config_addr, + out_be32((unsigned int*) pci.pci_config_addr, 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); out_le32((volatile unsigned int *)pci.pci_config_data, val); return PCIBIOS_SUCCESSFUL; @@ -123,22 +123,22 @@ pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR, static int direct_pci_read_config_byte(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned char *val) { if (bus != 0 || (1<<slot & 0xff8007fe)) { *val=0xff; return PCIBIOS_DEVICE_NOT_FOUND; } - *val=in_8(pci.pci_config_data + ((1<<slot)&~1) + *val=in_8(pci.pci_config_data + ((1<<slot)&~1) + (function<<8) + offset); return PCIBIOS_SUCCESSFUL; } static int direct_pci_read_config_word(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned short *val) { - *val = 0xffff; + *val = 0xffff; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<slot & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; @@ -151,9 +151,9 @@ direct_pci_read_config_word(unsigned char bus, unsigned char slot, static int direct_pci_read_config_dword(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned int *val) { - *val = 0xffffffff; + *val = 0xffffffff; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<slot & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; @@ -166,20 +166,20 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char slot, static int direct_pci_write_config_byte(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned char val) { if (bus != 0 || (1<<slot & 0xff8007fe)) { return PCIBIOS_DEVICE_NOT_FOUND; } - out_8(pci.pci_config_data + ((1<<slot)&~1) - + (function<<8) + offset, + out_8(pci.pci_config_data + ((1<<slot)&~1) + + (function<<8) + offset, val); return PCIBIOS_SUCCESSFUL; } static int direct_pci_write_config_word(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned short val) { if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<slot & 0xff8007fe)) { @@ -194,7 +194,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char slot, static int direct_pci_write_config_dword(unsigned char bus, unsigned char slot, - unsigned char function, + unsigned char function, unsigned char offset, unsigned int val) { if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (bus != 0 || (1<<slot & 0xff8007fe)) { @@ -232,7 +232,7 @@ const pci_config_access_functions pci_direct_functions = { printk("pci : Device %d:%02x routed to interrupt_line %d\n", pbus, pslot, int_name ) -/* +/* ** Validate a test interrupt name and print a warning if its not one of ** the names defined in the routing record. */ @@ -244,19 +244,19 @@ static int test_intname( for(j=0; row->pin_route[j].pin > -1; j++) { - if( row->pin_route[j].pin == int_pin ) + if( row->pin_route[j].pin == int_pin ) { _nopin = 0; - + for(k=0; k<4 && row->pin_route[j].int_name[k] > -1; k++ ) { - if( row->pin_route[j].int_name[k] == int_name ){ _noname=0; break; } + if( row->pin_route[j].int_name[k] == int_name ){ _noname=0; break; } } break; } } - if( _nopin ) + if( _nopin ) { printk("pci : Device %d:%02x supplied a bogus interrupt_pin %d\n", pbus, pslot, int_pin ); return -1; @@ -288,7 +288,7 @@ static int FindPCIbridge( int mybus, struct pcibridge *pb ) for(pbus=0; pbus< BusCountPCI(); pbus++) { for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) - { + { pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); if( devid == 0xffff ) continue; @@ -297,7 +297,7 @@ static int FindPCIbridge( int mybus, struct pcibridge *pb ) pci_read_config_word(pbus, pslot, 0, PCI_CLASS_DEVICE, &dclass); - if( dclass == PCI_CLASS_BRIDGE_PCI ) + if( dclass == PCI_CLASS_BRIDGE_PCI ) { pci_read_config_byte(pbus, pslot, 0, PCI_PRIMARY_BUS, &buspri); pci_read_config_byte(pbus, pslot, 0, PCI_SECONDARY_BUS, &bussec); @@ -349,7 +349,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) ) for(pbus=0; pbus< BusCountPCI(); pbus++) { for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) - { + { pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); if( devid == 0xffff ) continue; @@ -406,13 +406,13 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) ) } } - + if( !ismatch ) { - /* + /* ** no match, which means we're on a bus someplace. Work ** backwards from it to one of our defined busses, - ** swizzling thru each bridge on the way. + ** swizzling thru each bridge on the way. */ /* keep pbus, pslot pointed to the device being @@ -481,7 +481,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) ) { struct pcibridge pb; - /* + /* ** Haven't found our bus in the int map, so work ** upwards thru the bridges till we find it. */ @@ -504,7 +504,7 @@ void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) ) printk("pci : No bridge from bus %d towards root found\n", tbus ); goto donesearch; } - + } } diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.h b/c/src/lib/libbsp/powerpc/shared/pci/pci.h index 0971a0ec48..4ce74f7307 100644 --- a/c/src/lib/libbsp/powerpc/shared/pci/pci.h +++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.h @@ -43,7 +43,7 @@ #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ #define PCI_STATUS_PARITY 0x100 /* Detected parity error */ #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ -#define PCI_STATUS_DEVSEL_FAST 0x000 +#define PCI_STATUS_DEVSEL_FAST 0x000 #define PCI_STATUS_DEVSEL_MEDIUM 0x200 #define PCI_STATUS_DEVSEL_SLOW 0x400 #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ @@ -72,8 +72,8 @@ /* * Base addresses specify locations in memory or I/O space. - * Decoded size can be determined by writing a value of - * 0xffffffff to the register, and reading it back. Only + * Decoded size can be determined by writing a value of + * 0xffffffff to the register, and reading it back. Only * 1 bits are decoded. */ #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ @@ -97,7 +97,7 @@ /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c -#define PCI_SUBSYSTEM_ID 0x2e +#define PCI_SUBSYSTEM_ID 0x2e #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL) @@ -456,8 +456,8 @@ #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 -#define PCI_VENDOR_ID_DPT 0x1044 -#define PCI_DEVICE_ID_DPT 0xa400 +#define PCI_VENDOR_ID_DPT 0x1044 +#define PCI_DEVICE_ID_DPT 0xa400 #define PCI_VENDOR_ID_OPTI 0x1045 #define PCI_DEVICE_ID_OPTI_92C178 0xc178 @@ -1112,37 +1112,37 @@ typedef struct { extern pci_config BSP_pci_configuration; extern inline int -pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned char * val) { return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val); } extern inline int -pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned short * val) { return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val); } extern inline int -pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, +pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned int * val) { return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); } extern inline int -pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned char val) { return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val); } extern inline int -pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned short val) { return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val); } extern inline int -pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, +pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char where, unsigned int val) { return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val); } diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c b/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c index 6ba8d9cc05..3371eefe6f 100644 --- a/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c +++ b/c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c @@ -28,7 +28,7 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid, hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1); for (fun=0; fun<hd; fun++) { - /* + /* * The last devfn id/slot is special; must skip it */ if (PCI_MAX_DEVICES-1==dev && PCI_MAX_FUNCTIONS-1 == fun) diff --git a/c/src/lib/libbsp/powerpc/shared/residual/residual.c b/c/src/lib/libbsp/powerpc/shared/residual/residual.c index 4327382c67..7d5b1a4aa8 100644 --- a/c/src/lib/libbsp/powerpc/shared/residual/residual.c +++ b/c/src/lib/libbsp/powerpc/shared/residual/residual.c @@ -22,7 +22,7 @@ static int same_DevID(unsigned short vendor, unsigned short Number, - char * str) + char * str) { static unsigned const char hexdigit[]="0123456789ABCDEF"; if (strlen(str)!=7) return 0; @@ -68,11 +68,11 @@ PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, if (tag_type(packet_tag)) mask=0xff; else mask=0xF8; masked_tag = packet_tag&mask; for(; *p != END_TAG; p+=size) { - if ((*p & mask) == masked_tag && !(n--)) + if ((*p & mask) == masked_tag && !(n--)) return (PnP_TAG_PACKET *) p; if (tag_type(*p)) size=ld_le16((unsigned short *)(p+1))+3; - else + else size=tag_small_count(*p)+1; } return 0; /* not found */ @@ -85,7 +85,7 @@ PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p, int next=0; while (p) { p = (unsigned char *) PnP_find_packet(p, 0x70, next); - if (p && p[1]==packet_type && !(n--)) + if (p && p[1]==packet_type && !(n--)) return (PnP_TAG_PACKET *) p; next = 1; }; @@ -99,7 +99,7 @@ PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p, int next=0; while (p) { p = (unsigned char *) PnP_find_packet(p, 0x84, next); - if (p && p[3]==packet_type && !(n--)) + if (p && p[3]==packet_type && !(n--)) return (PnP_TAG_PACKET *) p; next = 1; }; diff --git a/c/src/lib/libbsp/powerpc/shared/start/rtems_crti.S b/c/src/lib/libbsp/powerpc/shared/start/rtems_crti.S index 3d63d1261b..81ec2ae557 100644 --- a/c/src/lib/libbsp/powerpc/shared/start/rtems_crti.S +++ b/c/src/lib/libbsp/powerpc/shared/start/rtems_crti.S @@ -4,11 +4,11 @@ #include <libcpu/io.h> /* terminate the __init() function and create - * a new head '_init' for use by RTEMS to + * a new head '_init' for use by RTEMS to * invoke C++ global constructors * NOTE: it is essential that this snippet * is hooked between ecrti and crtbegin - * + * * ecrti has the following .init section: * __init: * stwu r1,-16(r1) diff --git a/c/src/lib/libbsp/powerpc/shared/start/start.S b/c/src/lib/libbsp/powerpc/shared/start/start.S index c986564cb7..8c90a442f0 100644 --- a/c/src/lib/libbsp/powerpc/shared/start/start.S +++ b/c/src/lib/libbsp/powerpc/shared/start/start.S @@ -28,20 +28,20 @@ li r10,0x63 ; \ sc - + .text .globl __rtems_entry_point .type __rtems_entry_point,@function __rtems_entry_point: #ifdef DEBUG_EARLY_START MONITOR_ENTER -#endif - -/* +#endif + +/* * PREP * This is jumped to on prep systems right after the kernel is relocated * to its proper place in memory by the boot loader. The expected layout - * of the regs is: + * of the regs is: * r3: ptr to residual data * r4: initrd_start or if no initrd then 0 * r5: initrd_end - unused if r4 is 0 @@ -51,7 +51,7 @@ __rtems_entry_point: * The Prep boot loader insure that the MMU is currently off... * */ - + mr r31,r3 /* save parameters */ mr r30,r4 mr r29,r5 @@ -64,7 +64,7 @@ __rtems_entry_point: bl flush_tlbs /* * Use the first pair of BAT registers to map the 1st 256MB - * of RAM to KERNELBASE. + * of RAM to KERNELBASE. */ lis r11,KERNELBASE@h ori r11,r11,0x1ffe /* set up BAT registers for 604 */ @@ -77,14 +77,14 @@ __rtems_entry_point: isync /* - * we now have the 1st 256M of ram mapped with the bats. We are still - * running on the bootloader stack and cannot switch to an RTEMS allocated + * we now have the 1st 256M of ram mapped with the bats. We are still + * running on the bootloader stack and cannot switch to an RTEMS allocated * init stack before copying the residual data that may have been set just after * rtems_end address. This bug has been experienced on MVME2304. Thank to - * Till Straumann <strauman@SLAC.Stanford.EDU> for hunting it and suggesting + * Till Straumann <strauman@SLAC.Stanford.EDU> for hunting it and suggesting * the appropriate code. */ - + enter_C_code: bl MMUon bl __eabi /* setup EABI and SYSV environment */ @@ -96,7 +96,7 @@ enter_C_code: mr r4,r30 mr r5,r29 mr r6,r28 - mr r7,r27 + mr r7,r27 bl save_boot_params /* * stack = &__rtems_end + 4096 @@ -113,10 +113,10 @@ enter_C_code: li r3, 0 /* argc */ bl boot_card bl _return_to_ppcbug - + .globl MMUon .type MMUon,@function -MMUon: +MMUon: mfmsr r0 #if (PPC_HAS_FPU == 0) ori r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP @@ -130,10 +130,10 @@ MMUon: mtsrr1 r0 SYNC rfi - + .globl MMUoff .type MMUoff,@function -MMUoff: +MMUoff: mfmsr r0 ori r0,r0,MSR_IR| MSR_DR | MSR_IP mflr r11 @@ -146,22 +146,22 @@ MMUoff: .globl _return_to_ppcbug .type _return_to_ppcbug,@function - + _return_to_ppcbug: mflr r30 bl MMUoff MONITOR_ENTER bl MMUon mtctr r30 - bctr + bctr -/* +/* * An undocumented "feature" of 604e requires that the v bit * be cleared before changing BAT values. * * Also, newer IBM firmware does not clear bat3 and 4 so * this makes sure it's done. - * -- Cort + * -- Cort */ clear_bats: li r20,0 @@ -171,14 +171,14 @@ clear_bats: SYNC beq 1f mtspr DBAT0U,r20 - mtspr DBAT0L,r20 + mtspr DBAT0L,r20 mtspr DBAT1U,r20 mtspr DBAT1L,r20 mtspr DBAT2U,r20 - mtspr DBAT2L,r20 + mtspr DBAT2L,r20 mtspr DBAT3U,r20 mtspr DBAT3L,r20 -1: +1: mtspr IBAT0U,r20 mtspr IBAT0L,r20 mtspr IBAT1U,r20 @@ -187,7 +187,7 @@ clear_bats: mtspr IBAT2L,r20 mtspr IBAT3U,r20 mtspr IBAT3L,r20 - SYNC + SYNC blr flush_tlbs: @@ -197,6 +197,6 @@ flush_tlbs: bgt 1b sync blr - + .comm environ,4,4 diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c index 2565b9a251..82ade603ef 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @@ -51,7 +51,7 @@ SPR_RW(SPRG1) /* * Copy of residuals passed by firmware */ -RESIDUAL residualCopy; +RESIDUAL residualCopy; /* * Copy Additional boot param passed by boot loader */ @@ -85,15 +85,15 @@ unsigned int BSP_time_base_divisor; void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } - + /* * The original table from the application and our copy of it with * some changes. @@ -110,7 +110,7 @@ char *rtems_progname; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -127,10 +127,10 @@ void bsp_libc_init( void *, uint32_t, int ); * not yet initialized. * */ - + void bsp_pretasking_hook(void) { - uint32_t heap_start; + uint32_t heap_start; uint32_t heap_size; uint32_t heap_sbrk_spared; extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*); @@ -145,7 +145,7 @@ void bsp_pretasking_hook(void) #ifdef SHOW_MORE_INIT_SETTINGS printk(" HEAP start %x size %x (%x bytes spared for sbrk)\n", heap_start, heap_size, heap_sbrk_spared); -#endif +#endif bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared); @@ -167,7 +167,7 @@ void zero_bss() void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options) { - + residualCopy = *r3; strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM); loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0'; @@ -209,7 +209,7 @@ void bsp_start( void ) l2cr = get_L2CR(); #ifdef SHOW_LCR2_REGISTER printk("Initial L2CR value = %x\n", l2cr); -#endif +#endif if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1)) set_L2CR(0xb9A14000); /* @@ -262,15 +262,15 @@ void bsp_start( void ) /* T. Straumann: give more PCI address space */ setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE); /* - * Must have acces to open pic PCI ACK registers + * Must have acces to open pic PCI ACK registers * provided by the RAVEN - * + * */ setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE); select_console(CONSOLE_LOG); - /* We check that the keyboard is present and immediately + /* We check that the keyboard is present and immediately * select the serial console if not. */ err = kbdreset(); @@ -282,11 +282,11 @@ void bsp_start( void ) while (1); } myBoard = getMotorolaBoard(); - + printk("-----------------------------------------\n"); printk("Welcome to %s on %s\n", _RTEMS_version, motorolaBoardToString(myBoard)); printk("-----------------------------------------\n"); -#ifdef SHOW_MORE_INIT_SETTINGS +#ifdef SHOW_MORE_INIT_SETTINGS printk("Residuals are located at %x\n", (unsigned) &residualCopy); printk("Additionnal boot options are %s\n", loaderParam); printk("Initial system stack at %x\n",stack); @@ -294,7 +294,7 @@ void bsp_start( void ) printk("-----------------------------------------\n"); #endif -#ifdef TEST_RETURN_TO_PPCBUG +#ifdef TEST_RETURN_TO_PPCBUG printk("Hit <Enter> to return to PPCBUG monitor\n"); printk("When Finished hit GO. It should print <Back from monitor>\n"); debug_getc(); @@ -305,7 +305,7 @@ void bsp_start( void ) #ifdef SHOW_MORE_INIT_SETTINGS printk("Going to start PCI buses scanning and initialization\n"); -#endif +#endif InitializePCI(); { @@ -323,7 +323,7 @@ void bsp_start( void ) #ifdef SHOW_MORE_INIT_SETTINGS printk("Number of PCI buses found is : %d\n", BusCountPCI()); #endif -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE printk("Testing exception handling Part 1\n"); /* * Cause a software exception @@ -334,7 +334,7 @@ void bsp_start( void ) */ printk("Testing exception handling Part 2\n"); __asm__ __volatile ("sc"); -#endif +#endif BSP_mem_size = residualCopy.TotalMemory; @@ -369,7 +369,7 @@ void bsp_start( void ) )) { printk("WARNING: unable to setup page tables VME bridge must share PCI space\n"); } - + /* * Set up our hooks * Make sure libc_init is done before drivers initialized so that @@ -385,8 +385,8 @@ void bsp_start( void ) #ifdef SHOW_MORE_INIT_SETTINGS printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size); -#endif - work_space_start = +#endif + work_space_start = (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size; if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) { @@ -401,18 +401,18 @@ void bsp_start( void ) */ BSP_rtems_irq_mng_init(0); - + /* Activate the page table mappings only after * initializing interrupts because the irq_mng_init() * routine needs to modify the text - */ + */ if (pt) { #ifdef SHOW_MORE_INIT_SETTINGS printk("Page table setup finished; will activate it NOW...\n"); #endif BSP_pgtbl_activate(pt); /* finally, switch off DBAT3 */ - setdbat(3, 0, 0, 0, 0); + setdbat(3, 0, 0, 0, 0); } /* @@ -430,5 +430,5 @@ void bsp_start( void ) #ifdef SHOW_MORE_INIT_SETTINGS printk("Exit from bspstart\n"); -#endif +#endif } diff --git a/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c index 5cd462a65d..7f957bfc48 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c @@ -61,7 +61,7 @@ unsigned ldPtSize,tmp; 0, /* WIMG */ TRIV121_PP_RO_PAGE); if (TRIV121_MAP_SUCCESS != tmp) { - printk("Unable to map page index %i; reverting to BAT0\n", + printk("Unable to map page index %i; reverting to BAT0\n", tmp); pt = 0; } else { @@ -74,7 +74,7 @@ unsigned ldPtSize,tmp; 0, /* WIMG */ TRIV121_PP_RW_PAGE); if (TRIV121_MAP_SUCCESS != tmp) { - printk("Unable to map page index %i; reverting to BAT0\n", + printk("Unable to map page index %i; reverting to BAT0\n", tmp); pt = 0; } diff --git a/c/src/lib/libbsp/powerpc/shared/startup/sbrk.c b/c/src/lib/libbsp/powerpc/shared/startup/sbrk.c index 3a8b5664f8..8cd9e05cd9 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/sbrk.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/sbrk.c @@ -32,7 +32,7 @@ static uint32_t remaining_size=0; #define LIMIT_32M 0x02000000 -uint32_t +uint32_t _bsp_sbrk_init(uint32_t heap_start, uint32_t *heap_size_p) { uint32_t rval=0; diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S index 17c4ffecd6..55f990ec33 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S @@ -2,37 +2,37 @@ * (c) 1999, Eric Valette valette@crf.canon.fr * * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * exception veneers for RTEMS. * * $Id$ */ - + #include <rtems/asm.h> #include <rtems/score/cpu.h> #include <bsp/vectors.h> - + #define SYNC \ sync; \ isync - + PUBLIC_VAR (__rtems_start) .section .entry_point_section,"awx",@progbits /* * Entry point information used by bootloader code */ -SYM (__rtems_start): +SYM (__rtems_start): .long __rtems_entry_point /* * end of special Entry point section - */ + */ .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(default_exception_vector_code_prolog) SYM (default_exception_vector_code_prolog): /* @@ -48,7 +48,7 @@ SYM (default_exception_vector_code_prolog): stw r3, EXC_LR_OFFSET(r1) bl 0f 0: /* - * r3 = exception vector entry point + * r3 = exception vector entry point * (256 * vector number) + few instructions */ mflr r3 @@ -57,13 +57,13 @@ SYM (default_exception_vector_code_prolog): */ srwi r3,r3,8 ba push_normalized_frame - + PUBLIC_VAR (default_exception_vector_code_prolog_size) - + default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - + .p2align 5 -PUBLIC_VAR (push_normalized_frame) +PUBLIC_VAR (push_normalized_frame) SYM (push_normalized_frame): stw r3, EXCEPTION_NUMBER_OFFSET(r1) stw r0, GPR0_OFFSET(r1) @@ -77,7 +77,7 @@ SYM (push_normalized_frame): * Saved a few line above : R0 * * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance + * series of individual "stw" but who cares about performance * for the DEFAULT exception handler? */ stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ @@ -107,7 +107,7 @@ SYM (push_normalized_frame): ori r3,r3, MSR_RI | MSR_IR | MSR_DR mtmsr r3 SYNC - + /* * Call C exception handler */ @@ -148,12 +148,12 @@ SYM (push_normalized_frame): /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h index f995b16303..976af3d7f4 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h @@ -1,4 +1,4 @@ -/* +/* * vectors.h Exception frame related contant and API. * * This include file describe the data structure and the functions implemented @@ -16,10 +16,10 @@ #define LIBBSP_POWERPC_MCP750_VECTORS_H /* - * The callee (high level exception code written in C) + * The callee (high level exception code written in C) * will store the Link Registers (return address) at entry r1 + 4 !!!. * So let room for it!!!. - */ + */ #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 #define SRR0_FRAME_OFFSET 8 #define SRR1_FRAME_OFFSET 12 @@ -86,7 +86,7 @@ extern int default_exception_vector_code_prolog_size[]; * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); extern void initialize_exceptions(); diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c index 0a8577b92d..c897d89159 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c @@ -1,4 +1,4 @@ -/* +/* * vectors_init.c Exception hanlding initialisation (and generic handler). * * This include file describe the data structure and the functions implemented @@ -72,7 +72,7 @@ void *lr; void C_exception_handler(BSP_Exception_frame* excPtr) { int recoverable = 0; - + printk("exception handler called for exception %d\n", excPtr->_EXC_number); printk("\t Next PC or Address of fault = %x\n", excPtr->EXC_SRR0); printk("\t Saved MSR = %x\n", excPtr->EXC_SRR1); @@ -119,7 +119,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) if (excPtr->_EXC_number == ASM_DEC_VECTOR) recoverable = 1; if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; diff --git a/c/src/lib/libbsp/powerpc/shared/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/shared/vme/VMEConfig.h index 04347d270a..482e0bfc39 100644 --- a/c/src/lib/libbsp/powerpc/shared/vme/VMEConfig.h +++ b/c/src/lib/libbsp/powerpc/shared/vme/VMEConfig.h @@ -4,7 +4,7 @@ /* BSP specific address space configuration parameters */ -/* +/* * The BSP maps VME address ranges into * one BAT. * NOTE: the BSP (startup/bspstart.c) uses diff --git a/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c b/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c index 0a3b92c4c3..0cbda2f24a 100644 --- a/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c @@ -63,6 +63,6 @@ int BSP_connect_clock_handler (rtems_irq_hdl hdl) clockIrqData.on = (rtems_irq_enable)clockOn; clockIrqData.off = (rtems_irq_enable)clockOff; clockIrqData.isOn = (rtems_irq_is_enabled)clockIsOn; - + return BSP_install_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/powerpc/ss555/console/console.c b/c/src/lib/libbsp/powerpc/ss555/console/console.c index 810cf69bda..fdfbf88a73 100644 --- a/c/src/lib/libbsp/powerpc/ss555/console/console.c +++ b/c/src/lib/libbsp/powerpc/ss555/console/console.c @@ -18,7 +18,7 @@ * (although that would be easy to change). * * I/O may be interrupt-driven (recommended for real-time applications) or - * polled. + * polled. * * LIMITATIONS: * @@ -34,7 +34,7 @@ * Interrupt-driven I/O requires termios. * * TESTS: - * + * * TO RUN THE TESTS, USE POLLED I/O WITHOUT TERMIOS SUPPORT. Some tests * play with the interrupt masks and turn off I/O. Those tests will hang * when interrupt-driven I/O is used. Other tests, such as cdtest, do I/O @@ -44,17 +44,17 @@ * should all be fixed to work with interrupt-driven I/O and to * produce output in the expected sequence. Obviously, the termios test * requires termios support in the driver. - * + * * Set CONSOLE_MINOR to the appropriate device minor number in the * config file. This allows the RTEMS application console to be different * from the GDB port. - * + * * This driver handles both available serial ports: it distinguishes * the sub-devices using minor device numbers. It is not possible to have * other protocols running on the other ports when this driver is used as * currently written. * - * + * * SS555 port sponsored by Defence Research and Development Canada - Suffield * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) * @@ -133,7 +133,7 @@ static rtems_status_code do_poll_read( * Output characters through polled I/O. Returns only once every character has * been sent. * - * CR is transmitted AFTER a LF on output. + * CR is transmitted AFTER a LF on output. * * Input parameters: * major - ignored. Should be the major number for this driver. @@ -176,8 +176,8 @@ static rtems_status_code do_poll_write( static void _BSP_output_char( char c ) { char cr = '\r'; - - /* + + /* * Can't rely on console_initialize having been called before this * function is used, so it may fail. */ @@ -206,14 +206,14 @@ rtems_device_driver console_initialize( ) { rtems_status_code status; - + /* * Set up TERMIOS if needed */ #if UARTS_USE_TERMIOS == 1 rtems_termios_initialize (); #endif /* UARTS_USE_TERMIOS */ - + /* * Do device-specific initialization */ @@ -223,17 +223,17 @@ rtems_device_driver console_initialize( status = rtems_io_register_name ("/dev/tty0", major, SCI1_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + m5xx_uart_initialize(SCI2_MINOR); status = rtems_io_register_name ("/dev/tty1", major, SCI2_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + /* Now register the RTEMS console */ status = rtems_io_register_name ("/dev/console", major, CONSOLE_MINOR); if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); - + return RTEMS_SUCCESSFUL; } @@ -249,10 +249,10 @@ rtems_device_driver console_open( { rtems_status_code sc; - if ( minor > NUM_PORTS - 1 ) + if ( minor > NUM_PORTS - 1 ) return RTEMS_INVALID_NUMBER; - #if (UARTS_USE_TERMIOS == 1) + #if (UARTS_USE_TERMIOS == 1) { #if (UARTS_IO_MODE == 1) /* RTEMS interrupt-driven I/O with termios */ @@ -283,7 +283,7 @@ rtems_device_driver console_open( sc = rtems_termios_open( major, minor, arg, &callbacks ); #endif - + return sc; } @@ -365,7 +365,7 @@ rtems_device_driver console_control( rtems_device_minor_number minor, void *arg ) -{ +{ if ( minor > NUM_PORTS-1 ) return RTEMS_INVALID_NUMBER; diff --git a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h b/c/src/lib/libbsp/powerpc/ss555/include/bsp.h index 03eb954350..fcc22c8b43 100644 --- a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/ss555/include/bsp.h @@ -40,7 +40,7 @@ extern "C" { /* * Clock definitions */ - + #define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */ #define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz @@ -72,9 +72,9 @@ typedef struct cpld_ { rtems_unsigned8 nflash_writess; /* Enable/disable NAND-flash writes */ rtems_unsigned8 padA[0xC00000 - 0xA00002]; } cpld_t; - + extern volatile cpld_t cpld; /* defined in linkcmds */ - + /* * Define the time limits for RTEMS Test Suite test durations. * Long test and short test duration limits are provided. These @@ -154,7 +154,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h b/c/src/lib/libbsp/powerpc/ss555/irq/irq.h index 8265b84b70..34f7401380 100644 --- a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/ss555/irq/irq.h @@ -38,8 +38,8 @@ extern "C" { /* * The SS555 has no external interrupt controller chip, so use the standard * routines from the CPU-dependent code. - */ -#define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr) + */ +#define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr) #define BSP_get_current_rtems_irq_handler(ptr) CPU_get_current_rtems_irq_handler(ptr) #define BSP_remove_rtems_irq_handler(ptr) CPU_remove_rtems_irq_handler(ptr) #define BSP_rtems_irq_mngt_set(config) CPU_rtems_irq_mngt_set(config) diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c index 9e990f354a..626b510732 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c @@ -64,13 +64,13 @@ void bsp_libc_init( void *, unsigned32, int ); void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } /* @@ -95,7 +95,7 @@ void _BSP_Fatal_error(unsigned int v) */ void bsp_pretasking_hook(void) { - /* + /* * These are assigned addresses in the linkcmds file for the BSP. This * approach is better than having these defined as manifest constants and * compiled into the kernel, but it is still not ideal when dealing with @@ -105,13 +105,13 @@ void bsp_pretasking_hook(void) * the kernel and the application can be linked and burned into ROM * independently of each other. */ - unsigned char *_HeapStart = - (char*)BSP_Configuration.work_space_start + unsigned char *_HeapStart = + (char*)BSP_Configuration.work_space_start + BSP_Configuration.work_space_size; extern unsigned char _HeapEnd[]; bsp_libc_init( _HeapStart, _HeapEnd - _HeapStart, 0 ); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -141,11 +141,11 @@ void bsp_pretasking_hook(void) void bsp_start(void) { extern char _WorkspaceBase[]; - + ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; register unsigned char* intrStack; - + /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() * function stores the result in global variables so that it can be used @@ -190,7 +190,7 @@ void bsp_start(void) Cpu_table.clicks_per_usec = BSP_CRYSTAL_HZ / 4 / 1000000; Cpu_table.clock_speed = BSP_CLOCK_HZ; /* for SCI baud rate generator */ - /* + /* * Call this in case we use TERMIOS for console I/O */ m5xx_uart_reserve_resources( &BSP_Configuration ); diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c b/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c index 34731848d2..133fad3b2d 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c @@ -38,7 +38,7 @@ void _InitSS555 (void) * Initialize the System Protection Control Register (SYPCR). * The SYPCR can only be written once after Reset. */ - usiu.sypcr = + usiu.sypcr = USIU_SYPCR_SWTC(WATCHDOG_TIMEOUT) /* set watchdog timeout */ | USIU_SYPCR_BMT(0xFF) /* set bus monitor timeout */ | USIU_SYPCR_BME /* enable bus monitor */ @@ -50,12 +50,12 @@ void _InitSS555 (void) | USIU_SYPCR_SWP; /* prescale watchdog by 2048 */ TICKLE_WATCHDOG(); /* restart watchdog timer */ - - /* + + /* * Re-tune the PLL to the desired system clock frequency. */ usiu.plprck = USIU_UNLOCK_KEY; /* unlock PLPRCR */ - usiu.plprcr = + usiu.plprcr = USIU_PLPRCR_TEXPS /* assert TEXP always */ | USIU_PLPRCR_MF(BSP_CLOCK_HZ / BSP_CRYSTAL_HZ); /* PLL multiplication factor */ @@ -63,11 +63,11 @@ void _InitSS555 (void) while (((plprcr = usiu.plprcr) & USIU_PLPRCR_SPLS) == 0) ; /* wait for PLL to re-lock */ - - /* + + /* * Enable the timebase and decrementer, then initialize decrementer * register to a large value to guarantee that a decrementer interrupt - * will not be generated before the kernel is fully initialized. + * will not be generated before the kernel is fully initialized. * Initialize the timebase register to zero. */ usiu.tbscrk = USIU_UNLOCK_KEY; @@ -84,7 +84,7 @@ void _InitSS555 (void) * Run the Inter-Module Bus at full speed. */ imb.uimb.umcr &= ~UIMB_UMCR_HSPEED; - + /* * Initialize Memory Controller for External RAM * @@ -96,19 +96,19 @@ void _InitSS555 (void) * zero but set it up appropriately. */ extern char int_ram_top[]; /* top of internal ram */ - + usiu.memc[0]._or = USIU_MEMC_OR_512K /* bank size */ | USIU_MEMC_OR_SCY(0) /* wait states in first beat of burst */ | USIU_MEMC_OR_BSCY(0); /* wait states in subsequent beats */ - + usiu.memc[0]._br = - USIU_MEMC_BR_BA(_read_IMMR() & IMMR_FLEN + USIU_MEMC_BR_BA(_read_IMMR() & IMMR_FLEN ? (rtems_unsigned32)int_ram_top : 0) /* base address */ | USIU_MEMC_BR_PS32 /* 32-bit data bus */ | USIU_MEMC_BR_TBDIP /* toggle bdip */ | USIU_MEMC_BR_V; /* base register valid */ - + /* * Initialize Memory Controller for External CPLD * @@ -120,21 +120,21 @@ void _InitSS555 (void) | USIU_MEMC_OR_CSNT /* negate CS/WE early */ | USIU_MEMC_OR_ACS_HALF /* assert CS half cycle after address */ | USIU_MEMC_OR_SCY(15) /* wait states in first beat of burst */ - | USIU_MEMC_OR_TRLX; /* relaxed timing */ + | USIU_MEMC_OR_TRLX; /* relaxed timing */ usiu.memc[3]._br = USIU_MEMC_BR_BA(&cpld) /* base address */ | USIU_MEMC_BR_PS16 /* 16-bit data bus */ | USIU_MEMC_BR_BI /* inhibit bursting */ | USIU_MEMC_BR_V; /* base register valid */ - + /* * Disable show cycles and serialization so that burst accesses will work * properly. A different value, such as 0x0, may be more appropriate for * debugging, but can be set with the debugger, if needed. */ _write_ICTRL(0x00000007); - + /* * Set up Burst Buffer Controller (BBC) */ @@ -144,6 +144,6 @@ void _InitSS555 (void) _isync; _CPU_MSR_GET(msr); - msr |= MSR_IP; /* set prefix for exception relocation */ + msr |= MSR_IP; /* set prefix for exception relocation */ _CPU_MSR_SET(msr); } diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/start.S b/c/src/lib/libbsp/powerpc/ss555/startup/start.S index ec759f1fa6..73a4606a8d 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/start.S +++ b/c/src/lib/libbsp/powerpc/ss555/startup/start.S @@ -5,28 +5,28 @@ * all remaining initialization. * * This file is based on several others: - * - * (1) start360.s from the gen68360 BSP by + * + * (1) start360.s from the gen68360 BSP by * W. Eric Norum (eric@skatter.usask.ca) * with the following copyright and license: * * COPYRIGHT (c) 1989-1998. * On-Line Applications Research Corporation (OAR). - * + * * The license and distribution terms for this file may in * the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * * (2) start.s for the eth_comm port by * Jay Monkman (jmonkman@fracsa.com), - * which itself is based on the - * + * which itself is based on the + * * (3) dlentry.s for the Papyrus BSP, written by: * Andrew Bray <andy@i-cubed.co.uk> * with the following copyright and license: * * COPYRIGHT (c) 1995 by i-cubed ltd. - * + * * (4) start860.S for the MBX821/MBX860, written by: * Darlene A. Stewart <darlene.stewart@iit.nrc.ca> * Copyright (c) 1999, National Research Council of Canada @@ -182,7 +182,7 @@ .L_D4_e: .L_D2: .previous - + /* * Tell C's eabi-ctor's that we have an atexit function, * and that it is to register __do_global_dtors. @@ -191,7 +191,7 @@ PUBLIC_VAR(__atexit) .section ".sdata","aw" .align 2 -SYM(__atexit): +SYM(__atexit): EXT_PROC_REF(atexit)@fixup .previous @@ -201,7 +201,7 @@ SYM(__atexit): .previous /* That should do it */ - + /* * Put the entry point in its own section. That way, we can guarantee * to put it first in the .text section in the linker script. @@ -211,7 +211,7 @@ SYM(__atexit): PUBLIC_VAR (start) SYM(start): bl .startup /* or bl .spin */ -base_addr: +base_addr: /* * Parameters from linker @@ -219,19 +219,19 @@ base_addr: stack_top: .long initStackPtr -toc_pointer: +toc_pointer: .long __GOT_START__ -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start -data_length: +data_length: .long data.size -data_addr: +data_addr: .long data.start -contents_addr: +contents_addr: .long data.contents.start PUBLIC_VAR (text_addr) @@ -244,7 +244,7 @@ text_length: /* * Spin, if necessary, to acquire control from debugger (CodeWarrior). - */ + */ spin: .long 0x0001 .spin: @@ -254,9 +254,9 @@ spin: beq .spin /* - * Initialization code + * Initialization code */ -.startup: +.startup: /* Capture address of linker parameters. */ mflr r3 @@ -273,7 +273,7 @@ spin: /* Initialize the memory mapped MPC555 registers (done in C). */ EXTERN_PROC (_InitSS555) bl PROC (_InitSS555) - + /* Clear the .bss section. */ bl bssclr @@ -295,7 +295,7 @@ spin: li r3, 0 /* argc */ EXTERN_PROC (boot_card) bl PROC (boot_card) /* call the first C routine */ - + /* We should never return from boot_card, but in case we do ... */ /* The next instructions are dependent on your runtime environment. */ @@ -323,7 +323,7 @@ dc1: addi r4, r4, 0x4 /* next source */ addi r5, r5, 0x4 /* next target */ bdnz dc1 /* dec counter and loop */ - + blr /* return */ /* @@ -345,7 +345,7 @@ clear_bss: stw r5, 0(r4) /* store r6 */ addi r4, r4, 0x4 /* update r4 */ bdnz clear_bss /* dec counter and loop */ - + blr /* return */ /* @@ -356,7 +356,7 @@ clear_bss: * r0 - scratch */ initregs: - /* + /* * Set the processor for big-endian mode, exceptions vectored to * 0x000n_nnnn, no execution tracing, machine check exceptions * enabled, floating-point not available, supervisor priviledge @@ -366,10 +366,10 @@ initregs: li r0, 0x1000 /* MSR_ME */ mtmsr r0 /* Context-synchronizing */ isync - + /* * Clear the exception handling registers. - */ + */ li r0, 0x0000 mtdar r0 mtspr sprg0, r0 @@ -378,13 +378,13 @@ initregs: mtspr sprg3, r0 mtspr srr0, r0 mtspr srr1, r0 - + mr r6, r0 mr r7, r0 mr r8, r0 mr r9, r0 mr r10, r0 - mr r11, r0 + mr r11, r0 mr r12, r0 mr r13, r0 mr r14, r0 @@ -405,9 +405,9 @@ initregs: mr r29, r0 mr r30, r0 mr r31, r0 - + blr /* return */ - + .L_text_e: .comm environ,4,4 diff --git a/c/src/lib/libbsp/powerpc/ss555/wrapup/Makefile.am b/c/src/lib/libbsp/powerpc/ss555/wrapup/Makefile.am index f50a893094..e4652a6b5d 100644 --- a/c/src/lib/libbsp/powerpc/ss555/wrapup/Makefile.am +++ b/c/src/lib/libbsp/powerpc/ss555/wrapup/Makefile.am @@ -9,7 +9,7 @@ CLEANFILES = ../libbsp.a ___libbsp_a_SOURCES = ___libbsp_a_LIBADD = ../pclock$(LIB_VARIANT).rel \ - ../console$(LIB_VARIANT).rel ../startup$(LIB_VARIANT).rel + ../console$(LIB_VARIANT).rel ../startup$(LIB_VARIANT).rel ___libbsp_a_LIBADD += \ ../../../../libcpu/powerpc/shared/cpuIdent$(LIB_VARIANT).rel \ diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c index f31add1feb..660747d5b8 100644 --- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c +++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c @@ -83,7 +83,7 @@ void _CPU_Context_Initialize( *((uint32_t*)sp) = 0; the_context->gpr1 = sp; - + _CPU_MSR_GET( msr_value ); if (!(new_level & CPU_MODES_INTERRUPT_MASK)) { @@ -97,7 +97,7 @@ void _CPU_Context_Initialize( /* * The FP bit of the MSR should only be enabled if this is a floating - * point task. Unfortunately, the vfprintf_r routine in newlib + * point task. Unfortunately, the vfprintf_r routine in newlib * ends up pushing a floating point register regardless of whether or * not a floating point number is being printed. Serious restructuring * of vfprintf.c will be required to avoid this behavior. At this @@ -124,14 +124,14 @@ void _CPU_Context_Initialize( #if (PPC_ABI == PPC_ABI_SVR4) { unsigned r13 = 0; asm volatile ("mr %0, 13" : "=r" ((r13))); - + the_context->gpr13 = r13; } #elif (PPC_ABI == PPC_ABI_EABI) { uint32_t r2 = 0; unsigned r13 = 0; asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); - + the_context->gpr2 = r2; the_context->gpr13 = r13; } diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S index 847091f6c9..74845982b2 100644 --- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S +++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S @@ -109,7 +109,7 @@ .set FP_30, (FP_29 + FP_SIZE) .set FP_31, (FP_30 + FP_SIZE) .set FP_FPSCR, (FP_31 + FP_SIZE) - + .set IP_LINK, 0 .set IP_0, (IP_LINK + 8) .set IP_2, (IP_0 + 4) @@ -118,12 +118,12 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) @@ -133,15 +133,15 @@ .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) .set IP_END, (IP_MSR + 16) - + BEGIN_CODE /* * _CPU_Context_save_fp_context diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c index 77f10642a8..11ddae9bf6 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c @@ -93,7 +93,7 @@ void _CPU_Initialize( * Store Msr Value in the IRQ info structure. */ _CPU_MSR_Value(_CPU_IRQ_info.msr_initial); - + #if (PPC_USE_SPRG) i = _CPU_IRQ_info.msr_initial; asm volatile("mtspr 0x112, %0" : "=r" (i) : "0" (i)); /* SPRG 2 */ @@ -111,7 +111,7 @@ void _CPU_Initialize( * * Complete initialization since the table is now allocated. */ - + void _CPU_Initialize_vectors(void) { int i; @@ -126,7 +126,7 @@ void _CPU_Initialize_vectors(void) _ISR_Vector_table[i] = handler; } - + /*PAGE * * _CPU_ISR_Calculate_level @@ -137,7 +137,7 @@ void _CPU_Initialize_vectors(void) * is why it was necessary to adopt a scheme which allowed the user * to specify specifically which interrupt sources were enabled. */ - + uint32_t _CPU_ISR_Calculate_level( uint32_t new_level ) @@ -189,7 +189,7 @@ void _CPU_ISR_Set_level( * * _CPU_ISR_Get_level * - * This routine gets the current interrupt level from the MSR and + * This routine gets the current interrupt level from the MSR and * converts it to an RTEMS interrupt level. */ @@ -197,9 +197,9 @@ uint32_t _CPU_ISR_Get_level( void ) { uint32_t level = 0; uint32_t msr; - + asm volatile("mfmsr %0" : "=r" ((msr))); - + msr &= PPC_MSR_DISABLE_MASK; /* @@ -246,12 +246,12 @@ void _CPU_Context_Initialize( sp = (uint32_t)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE; *((uint32_t*)sp) = 0; the_context->gpr1 = sp; - + the_context->msr = _CPU_ISR_Calculate_level( new_level ); /* * The FP bit of the MSR should only be enabled if this is a floating - * point task. Unfortunately, the vfprintf_r routine in newlib + * point task. Unfortunately, the vfprintf_r routine in newlib * ends up pushing a floating point register regardless of whether or * not a floating point number is being printed. Serious restructuring * of vfprintf.c will be required to avoid this behavior. At this @@ -266,7 +266,7 @@ void _CPU_Context_Initialize( * * + Set the exception prefix bit to point to the exception table * + Force the RI bit - * + Use the DR and IR bits + * + Use the DR and IR bits */ _CPU_MSR_Value( msr_value ); the_context->msr |= (msr_value & PPC_MSR_EP); @@ -284,7 +284,7 @@ void _CPU_Context_Initialize( #if (PPC_ABI == PPC_ABI_SVR4) { unsigned r13 = 0; asm volatile ("mr %0, 13" : "=r" ((r13))); - + the_context->pc = (uint32_t)entry_point; the_context->gpr13 = r13; } @@ -294,7 +294,7 @@ void _CPU_Context_Initialize( { uint32_t r2 = 0; unsigned r13 = 0; asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); - + the_context->pc = (uint32_t)entry_point; the_context->gpr2 = r2; the_context->gpr13 = r13; @@ -335,7 +335,7 @@ void _CPU_ISR_install_vector( /* * Install the wrapper so this ISR can be invoked properly. */ - if (_CPU_Table.exceptions_in_RAM) + if (_CPU_Table.exceptions_in_RAM) _CPU_ISR_install_raw_handler( vector, _ISR_Handler, &ignored ); /* @@ -344,7 +344,7 @@ void _CPU_ISR_install_vector( */ _ISR_Vector_table[ vector ] = new_handler ? (ISR_Handler_entry)new_handler : - _CPU_Table.spurious_handler ? + _CPU_Table.spurious_handler ? (ISR_Handler_entry)_CPU_Table.spurious_handler : (ISR_Handler_entry)ppc_spurious; } @@ -440,7 +440,7 @@ const CPU_Trap_table_entry _CPU_Trap_slot_template_m860 = { }; #endif /* mpc860 */ -uint32_t ppc_exception_vector_addr( +uint32_t ppc_exception_vector_addr( uint32_t vector ); @@ -453,24 +453,24 @@ uint32_t ppc_exception_vector_addr( * supported trap handler (a.k.a. interrupt service routine). * * Input Parameters: - * vector - trap table entry number plus synchronous + * vector - trap table entry number plus synchronous * vs. asynchronous information * new_handler - address of the handler to be installed * old_handler - pointer to an address of the handler previously installed * * Output Parameters: NONE * *new_handler - address of the handler previously installed - * - * NOTE: + * + * NOTE: * * This routine is based on the SPARC routine _CPU_ISR_install_raw_handler. - * Install a software trap handler as an executive interrupt handler + * Install a software trap handler as an executive interrupt handler * (which is desirable since RTEMS takes care of window and register issues), - * then the executive needs to know that the return address is to the trap + * then the executive needs to know that the return address is to the trap * rather than the instruction following the trap. * */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, @@ -506,8 +506,8 @@ void _CPU_ISR_install_raw_handler( #define LOW_BITS_MASK 0x000003FF if (slot->stwu_r1 == _CPU_Trap_slot_template.stwu_r1) { - /* - * Set u32_handler = to target address + /* + * Set u32_handler = to target address */ u32_handler = slot->b_Handler & 0x03fffffc; @@ -518,15 +518,15 @@ void _CPU_ISR_install_raw_handler( *old_handler = (proc_ptr) u32_handler; } else -/* There are two kinds of handlers for the MPC860. One is the 'standard' +/* There are two kinds of handlers for the MPC860. One is the 'standard' * one like above. The other is for the cascaded interrupts from the SIU * and CPM. Therefore we must check for the alternate one if the standard * one is not present */ #if defined(mpc860) || defined(mpc821) if (slot->stwu_r1 == _CPU_Trap_slot_template_m860.stwu_r1) { - /* - * Set u32_handler = to target address + /* + * Set u32_handler = to target address */ u32_handler = slot->b_Handler & 0x03fffffc; *old_handler = (proc_ptr) u32_handler; @@ -547,9 +547,9 @@ void _CPU_ISR_install_raw_handler( u32_handler = (uint32_t) new_handler; - /* - * IMD FIX: insert address fragment only (bits 6..29) - * therefore check for proper address range + /* + * IMD FIX: insert address fragment only (bits 6..29) + * therefore check for proper address range * and remove unwanted bits */ if ((u32_handler & 0xfc000000) == 0xfc000000) { @@ -568,7 +568,7 @@ void _CPU_ISR_install_raw_handler( _CPU_Data_Cache_Block_Flush( slot ); } -uint32_t ppc_exception_vector_addr( +uint32_t ppc_exception_vector_addr( uint32_t vector ) { @@ -632,7 +632,7 @@ uint32_t ppc_exception_vector_addr( break; #if defined(ppc403) || defined(ppc405) - + /* PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET case PPC_IRQ_CRIT: Offset = 0x00100; diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S index 1aed87b6ac..cd35eb02af 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S @@ -38,7 +38,7 @@ #include <rtems/asm.h> #include <rtems/score/ppc_offs.h> - + BEGIN_CODE /* * _CPU_Context_save_fp_context @@ -365,7 +365,7 @@ PROC (_CPU_Context_switch): stw r7, GP_PC-GP_26(r3) mfmsr r8 stw r8, GP_MSR-GP_26(r3) - + #if ( PPC_USE_DATA_CACHE ) dcbt r5, r4 #endif diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/irq_stub.S b/c/src/lib/libbsp/powerpc/support/old_exception_processing/irq_stub.S index 71c6332a41..6a0dd00342 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/irq_stub.S +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/irq_stub.S @@ -74,7 +74,7 @@ slwi r4,r0,2 lwz r28, Nest_level(r11) add r4, r4, r30 - + lwz r30, 0(r28) mr r3, r0 lwz r31, Stack(r11) @@ -86,14 +86,14 @@ */ /* Switch stacks, here we must prevent ALL interrupts */ #if (PPC_USE_SPRG) - mfmsr r5 - mfspr r6, sprg2 -#else + mfmsr r5 + mfspr r6, sprg2 +#else lwz r6,msr_initial(r11) lis r5,~PPC_MSR_DISABLE_MASK@ha ori r5,r5,~PPC_MSR_DISABLE_MASK@l and r6,r6,r5 - mfmsr r5 + mfmsr r5 #endif mtmsr r6 cmpwi r30, 0 @@ -154,10 +154,10 @@ LABEL (nested): /* We must re-disable the interrupts */ #if (PPC_USE_SPRG) mfspr r11, sprg3 - mfspr r0, sprg2 + mfspr r0, sprg2 #else lis r11,_CPU_IRQ_info@ha - addi r11,r11,_CPU_IRQ_info@l + addi r11,r11,_CPU_IRQ_info@l lwz r0,msr_initial(r11) lis r30,~PPC_MSR_DISABLE_MASK@ha ori r30,r30,~PPC_MSR_DISABLE_MASK@l @@ -190,8 +190,8 @@ LABEL (nested): bne LABEL (easy_exit) lwz r30, 0(r30) lwz r31, Signal(r11) - - /* + + /* * if ( _Context_Switch_necessary ) * goto switch */ @@ -199,7 +199,7 @@ LABEL (nested): lwz r28, 0(r31) li r6,0 bne LABEL (switch) - /* + /* * if ( !_ISR_Signals_to_thread_executing ) * goto easy_exit * _ISR_Signals_to_thread_executing = 0; @@ -232,14 +232,14 @@ LABEL (switch): mfspr r0, sprg2 #else lis r11,_CPU_IRQ_info@ha - addi r11,r11,_CPU_IRQ_info@l + addi r11,r11,_CPU_IRQ_info@l lwz r0,msr_initial(r11) lis r5,~PPC_MSR_DISABLE_MASK@ha ori r5,r5,~PPC_MSR_DISABLE_MASK@l and r0,r0,r5 #endif mtmsr r0 - + /* * easy_exit: * prepare to get out of interrupt diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/rtems/score/ppc_offs.h b/c/src/lib/libbsp/powerpc/support/old_exception_processing/rtems/score/ppc_offs.h index d319107aaa..05a4fddb8f 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/rtems/score/ppc_offs.h +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/rtems/score/ppc_offs.h @@ -104,7 +104,7 @@ .set FP_31, (FP_30 + 4) .set FP_FPSCR, (FP_31 + 4) #endif - + .set IP_LINK, 0 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) .set IP_0, (IP_LINK + 56) @@ -117,12 +117,12 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) @@ -132,15 +132,15 @@ .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) .set IP_END, (IP_MSR + 16) - + /* _CPU_IRQ_info offsets */ /* These must be in this order */ @@ -162,5 +162,5 @@ #endif .set Signal, Switch_necessary + 4 .set msr_initial, Signal + 4 - + #endif /* __PPC_OFFS_H */ diff --git a/c/src/lib/libbsp/shared/bootcard.c b/c/src/lib/libbsp/shared/bootcard.c index 52d938d88e..dfecda6643 100644 --- a/c/src/lib/libbsp/shared/bootcard.c +++ b/c/src/lib/libbsp/shared/bootcard.c @@ -1,7 +1,7 @@ /* * A simple main which can be used on any embedded target. * - * This style of initialization insures that the C++ global + * This style of initialization insures that the C++ global * constructors are executed after RTEMS is initialized. * * Thanks to Chris Johns <cjohns@plessey.com.au> for this idea. @@ -130,7 +130,7 @@ int boot_card(int argc, char **argv, char **envp) * Perform any BSP specific shutdown actions. */ - bsp_cleanup(); + bsp_cleanup(); /* * Now return to the start code. diff --git a/c/src/lib/libbsp/shared/bsppost.c b/c/src/lib/libbsp/shared/bsppost.c index 3442df4f4d..3b44239ff5 100644 --- a/c/src/lib/libbsp/shared/bsppost.c +++ b/c/src/lib/libbsp/shared/bsppost.c @@ -1,5 +1,5 @@ /* - * This is a basic BSP post driver hook. + * This is a basic BSP post driver hook. * * After drivers are setup, register some "filenames" * and open stdin, stdout, stderr files diff --git a/c/src/lib/libbsp/shared/clockdrv_shell.c b/c/src/lib/libbsp/shared/clockdrv_shell.c index c36fbebc83..d9b98e2bc9 100644 --- a/c/src/lib/libbsp/shared/clockdrv_shell.c +++ b/c/src/lib/libbsp/shared/clockdrv_shell.c @@ -41,11 +41,11 @@ volatile uint32_t Clock_driver_ticks; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * Major and minor number. */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -74,7 +74,7 @@ rtems_isr Clock_isr( Clock_driver_ticks += 1; #ifdef CLOCK_DRIVER_USE_FAST_IDLE - do { + do { rtems_clock_tick(); } while ( _Thread_Executing == _Thread_Idle && _Thread_Heir == _Thread_Executing); @@ -169,7 +169,7 @@ void Clock_exit( void ) /* do not restore old vector */ } - + /* * Clock_initialize * @@ -193,14 +193,14 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + /* * If we are counting ISRs per tick, then initialize the counter. */ @@ -211,7 +211,7 @@ rtems_device_driver Clock_initialize( return RTEMS_SUCCESSFUL; } - + /* * Clock_control * @@ -237,18 +237,18 @@ rtems_device_driver Clock_control( uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; rtems_isr_entry ignored_ticker; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { - + Clock_isr(CLOCK_VECTOR); } else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) @@ -257,7 +257,7 @@ rtems_device_driver Clock_control( Clock_driver_support_install_isr( args->buffer, ignored_ticker ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/shared/console-polled.c b/c/src/lib/libbsp/shared/console-polled.c index 32b2a3ea34..e95863c51e 100644 --- a/c/src/lib/libbsp/shared/console-polled.c +++ b/c/src/lib/libbsp/shared/console-polled.c @@ -1,5 +1,5 @@ /* - * This file contains the hardware independent portion of a polled + * This file contains the hardware independent portion of a polled * console device driver. If a BSP chooses to use this, then it * only has to provide a few board dependent routines. * @@ -56,7 +56,7 @@ int console_write_support ( * Console Device Driver Entry Points * */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -106,12 +106,12 @@ rtems_device_driver console_open( assert( minor <= 1 ); if ( minor > 2 ) return RTEMS_INVALID_NUMBER; - + sc = rtems_termios_open (major, minor, arg, &pollCallbacks ); return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -120,7 +120,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -129,7 +129,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -138,7 +138,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/shared/console.c b/c/src/lib/libbsp/shared/console.c index 0b1fbcecb7..c897544a79 100644 --- a/c/src/lib/libbsp/shared/console.c +++ b/c/src/lib/libbsp/shared/console.c @@ -30,7 +30,7 @@ extern console_data Console_Port_Data[]; extern unsigned long Console_Port_Count; extern rtems_device_minor_number Console_Port_Minor; - + /*PAGE * * console_open @@ -74,17 +74,17 @@ rtems_device_driver console_open( Callbacks.startRemoteTx = cptr->pDeviceFlow->deviceStartRemoteTx; Callbacks.outputUsesInterrupts = cptr->pDeviceFns->deviceOutputUsesInterrupts; - /* XXX what about + /* XXX what about * Console_Port_Tbl[minor].ulMargin, * Console_Port_Tbl[minor].ulHysteresis); */ status = rtems_termios_open ( major, minor, arg, &Callbacks ); Console_Port_Data[minor].termios_data = args->iop->data1; - + /* Get tty pointeur from the Console_Port_Data */ current_tty = Console_Port_Data[minor].termios_data; - + if ( (current_tty->refcount == 1) ) { /* * If it's the first open, modified, if need, the port parameters @@ -112,7 +112,7 @@ rtems_device_driver console_open( return status; } - + /*PAGE * * console_close @@ -136,7 +136,7 @@ rtems_device_driver console_close( return rtems_termios_close (arg); } - + /*PAGE * * console_read @@ -152,7 +152,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + /*PAGE * * console_write @@ -168,7 +168,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + /*PAGE * * console_control @@ -228,7 +228,7 @@ rtems_device_driver console_initialize( */ rtems_fatal_error_occurred(RTEMS_IO_ERROR); } - + Console_Port_Minor=minor; /* diff --git a/c/src/lib/libbsp/shared/gdbstub/rtems-stub-glue.c b/c/src/lib/libbsp/shared/gdbstub/rtems-stub-glue.c index 54288eaa21..bbb038dfa1 100644 --- a/c/src/lib/libbsp/shared/gdbstub/rtems-stub-glue.c +++ b/c/src/lib/libbsp/shared/gdbstub/rtems-stub-glue.c @@ -9,16 +9,16 @@ * as far as this copyight notice is kept unchanged, but does not imply * an endorsement by T.sqware of the product in which it is included. * - * + * * Modifications for RTEMS threads and more * - * Copyright (C) 2000 Quality Quorum, Inc. - * + * Copyright (C) 2000 Quality Quorum, Inc. + * * All Rights Reserved - * - * Permission to use, copy, modify, and distribute this software and its - * documentation for any purpose and without fee is hereby granted. - * + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose and without fee is hereby granted. + * * QQI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING * ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL * QQI BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR @@ -35,7 +35,7 @@ /* Change it to something meaningful when debugging */ #undef ASSERT -#define ASSERT(x) +#define ASSERT(x) extern const char gdb_hexchars[]; @@ -45,7 +45,7 @@ extern const char gdb_hexchars[]; * at the bottom of this file. */ -void rtems_gdb_stub_get_registers_from_context( +void rtems_gdb_stub_get_registers_from_context( int *registers, Thread_Control *th ); @@ -85,7 +85,7 @@ int rtems_gdb_stub_id_to_index( if (_System_state_Get() != SYSTEM_STATE_UP) { /* We have one thread let us use value reserved for idle thread */ - return 1; + return 1; } if (_Thread_Executing == _Thread_Idle) { @@ -109,7 +109,7 @@ int rtems_gdb_stub_id_to_index( min_id = _Objects_Information_table[OBJECTS_POSIX_API][1]->minimum_id; return first_posix_id + (thread_obj_id - min_id); -} +} @@ -208,7 +208,7 @@ int rtems_gdb_stub_get_next_thread(int athread) } first_rtems_id = 2; - + obj_info = _Objects_Information_table[OBJECTS_CLASSIC_API][1]; min_id = obj_info->minimum_id; @@ -229,7 +229,7 @@ int rtems_gdb_stub_get_next_thread(int athread) } } } - + first_posix_id = first_rtems_id + (max_id - min_id) + 1; obj_info = _Objects_Information_table[OBJECTS_POSIX_API][1]; @@ -245,7 +245,7 @@ int rtems_gdb_stub_get_next_thread(int athread) } else { start = 1 + athread; } - + for (id=start; id<=lim; id++) { if (obj_info->local_table[id - first_posix_id + 1] != NULL) { return id; @@ -262,7 +262,7 @@ int rtems_gdb_stub_get_next_thread(int athread) -/* Get thread registers, return 0 if thread does not +/* Get thread registers, return 0 if thread does not exist, and 1 otherwise */ int rtems_gdb_stub_get_thread_regs( int thread, @@ -286,8 +286,8 @@ int rtems_gdb_stub_get_thread_regs( -/* Set thread registers, return 0 if thread does not - exist or register values will screw up the threads, +/* Set thread registers, return 0 if thread does not + exist or register values will screw up the threads, and 1 otherwise */ int rtems_gdb_stub_set_thread_regs( @@ -296,7 +296,7 @@ int rtems_gdb_stub_set_thread_regs( ) { /* In current situation there is no point in changing any registers here - thread status is displayed as being deep inside thread switching + thread status is displayed as being deep inside thread switching and we better do not screw up anything there - it may be fixed eventually though */ return 1; @@ -307,7 +307,7 @@ int rtems_gdb_stub_set_thread_regs( -/* Get thread information, return 0 if thread does not +/* Get thread information, return 0 if thread does not exist and 1 otherwise */ int rtems_gdb_stub_get_thread_info( int thread, @@ -343,14 +343,14 @@ int rtems_gdb_stub_get_thread_info( /* Let us figure out thread_id for gdb */ first_rtems_id = 2; - + obj_info = _Objects_Information_table[OBJECTS_CLASSIC_API][1]; min_id = obj_info->minimum_id; max_id = obj_info->maximum_id; if (thread <= (first_rtems_id + (max_id - min_id))) { - th = (Thread_Control *)(obj_info->local_table[thread - + th = (Thread_Control *)(obj_info->local_table[thread - first_rtems_id + 1]); if (th == NULL) { @@ -374,7 +374,7 @@ int rtems_gdb_stub_get_thread_info( #if 0 name = *(uint32_t*)(obj_info->local_table[thread]->name); #else - name = *(uint32_t*)(obj_info->local_table[thread - + name = *(uint32_t*)(obj_info->local_table[thread - first_rtems_id + 1]->name); #endif info->name[0] = (name >> 24) & 0xff; @@ -416,7 +416,7 @@ int rtems_gdb_stub_get_thread_info( strcat(info->display, tmp_buf); - name = *(uint32_t*)(obj_info->local_table[thread - + name = *(uint32_t*)(obj_info->local_table[thread - first_posix_id + 1]->name); info->name[0] = (name >> 24) & 0xff; @@ -426,7 +426,7 @@ int rtems_gdb_stub_get_thread_info( info->name[4] = 0; info->more_display[0] = 0; /* Nothing */ - + return 1; } @@ -441,7 +441,7 @@ int rtems_gdb_stub_get_thread_info( int parse_zbreak(const char *in, int *type, unsigned char **addr, int *len) { int ttmp, atmp, ltmp; - + ASSERT(in != NULL); ASSERT(type != NULL); ASSERT(addr != NULL); @@ -681,7 +681,7 @@ pack_qm_header(char *out, int count, int done, int athread) -void rtems_gdb_process_query( +void rtems_gdb_process_query( char *inbuffer, char *outbuffer, int do_threads, @@ -689,7 +689,7 @@ void rtems_gdb_process_query( ) { char *optr; - + switch(inbuffer[1]) { case 'C': /* Current thread query query - return stopped thread */ @@ -865,7 +865,7 @@ thread2vhstr(char *buf, int thread) for(i=0, shift=28; i<8; i++, shift-=4) { nibble = (thread >> shift) & 0x0f; - + if (nibble != 0) { break; @@ -988,7 +988,7 @@ vhstr2thread(const char *buf, int *thread) *thread = val; return buf; } - + ASSERT(nibble >= 0 && nibble < 16); val = (val << 4) | nibble; @@ -999,7 +999,7 @@ vhstr2thread(const char *buf, int *thread) /* Value is too long */ return NULL; } - + *thread = val; return buf; } @@ -1016,7 +1016,7 @@ int2vhstr(char *buf, int val) for(i=0, shift=28; i<8; i++, shift-=4) { nibble = (val >> shift) & 0x0f; - + if (nibble != 0) { break; @@ -1126,7 +1126,7 @@ vhstr2int(const char *buf, int *ival) *ival = val; return buf; } - + ASSERT(nibble >= 0 && nibble < 16); val = (val << 4) | nibble; @@ -1159,7 +1159,7 @@ hstr2byte(const char *buf, int *bval) return 1; } -int +int hstr2nibble(const char *buf, int *nibble) { int ch; @@ -1196,7 +1196,7 @@ static void (*volatile mem_fault_routine) (void) = NULL; -/* convert count bytes of the memory pointed to by mem into hex string, +/* convert count bytes of the memory pointed to by mem into hex string, placing result in buf, return pointer to next location in hex strng in case of success or NULL otherwise */ char* @@ -1208,7 +1208,7 @@ mem2hstr(char *buf, const unsigned char *mem, int count) mem_err = 0; mem_fault_routine = set_mem_err; - + for (i = 0; i<count; i++, mem++) { ch = get_byte (mem); @@ -1217,11 +1217,11 @@ mem2hstr(char *buf, const unsigned char *mem, int count) mem_fault_routine = NULL; return NULL; } - + *buf++ = gdb_hexchars[ch >> 4]; *buf++ = gdb_hexchars[ch & 0x0f]; } - + *buf = 0; mem_fault_routine = NULL; @@ -1248,7 +1248,7 @@ hstr2mem (unsigned char *mem, const char *buf, int count) mem_fault_routine = NULL; return 0; } - + ASSERT(bval >=0 && bval < 256); set_byte (mem, bval); @@ -1276,7 +1276,7 @@ set_mem_err (void) to mem_fault, they won't get restored, so there better not be any saved). */ -unsigned char +unsigned char get_byte (const unsigned char *addr) { return *addr; @@ -1315,7 +1315,7 @@ enum i386_stub_regnames { I386_STUB_REG_FS, I386_STUB_REG_GS }; -void rtems_gdb_stub_get_registers_from_context( +void rtems_gdb_stub_get_registers_from_context( int *registers, Thread_Control *th ) @@ -1331,7 +1331,7 @@ void rtems_gdb_stub_get_registers_from_context( registers[I386_STUB_REG_PC] = *(int *)th->Registers.esp; registers[I386_STUB_REG_PS] = (int)th->Registers.eflags; - /* RTEMS never changes base registers (especially once + /* RTEMS never changes base registers (especially once threads are running) */ registers[I386_STUB_REG_CS] = 0x8; /* We just know these values */ @@ -1344,7 +1344,7 @@ void rtems_gdb_stub_get_registers_from_context( int rtems_gdb_stub_get_offsets( unsigned char **text_addr, - unsigned char **data_addr, + unsigned char **data_addr, unsigned char **bss_addr ) { @@ -1366,7 +1366,7 @@ int rtems_gdb_stub_get_offsets( #elif defined(__mips__) -void rtems_gdb_stub_get_registers_from_context( +void rtems_gdb_stub_get_registers_from_context( int *registers, Thread_Control *th ) @@ -1390,10 +1390,10 @@ void rtems_gdb_stub_get_registers_from_context( int rtems_gdb_stub_get_offsets( unsigned char **text_addr, - unsigned char **data_addr, + unsigned char **data_addr, unsigned char **bss_addr ) -{ +{ /* extern uint32_t _ftext; extern uint32_t _fdata; @@ -1412,7 +1412,7 @@ int rtems_gdb_stub_get_offsets( #elif defined(__mc68000__) -void rtems_gdb_stub_get_registers_from_context( +void rtems_gdb_stub_get_registers_from_context( int *registers, Thread_Control *th ) @@ -1422,7 +1422,7 @@ void rtems_gdb_stub_get_registers_from_context( * they are located on thread stack ... * -> they are not needed for context switch */ - registers[D0] = 0; + registers[D0] = 0; registers[D1] = 0; registers[D2] = (uint32_t)th->Registers.d2; registers[D3] = (uint32_t)th->Registers.d3; @@ -1439,7 +1439,7 @@ void rtems_gdb_stub_get_registers_from_context( registers[A5] = (uint32_t)th->Registers.a5; registers[A6] = (uint32_t)th->Registers.a6; registers[A7] = (uint32_t)th->Registers.a7_msp; - + registers[PS] = (uint32_t)th->Registers.sr; #if 0 registers[PC] = *(uint32_t*)th->Registers.a7_msp; /* *SP = ret adr */ @@ -1451,10 +1451,10 @@ void rtems_gdb_stub_get_registers_from_context( int rtems_gdb_stub_get_offsets( unsigned char **text_addr, - unsigned char **data_addr, + unsigned char **data_addr, unsigned char **bss_addr ) -{ +{ /* extern uint32_t _ftext; extern uint32_t _fdata; diff --git a/c/src/lib/libbsp/shared/gnatinstallhandler.c b/c/src/lib/libbsp/shared/gnatinstallhandler.c index 64ce384625..6c9d0b8de4 100644 --- a/c/src/lib/libbsp/shared/gnatinstallhandler.c +++ b/c/src/lib/libbsp/shared/gnatinstallhandler.c @@ -1,11 +1,11 @@ /* - * Default implementation of __gnat_install_handler to satisfy + * Default implementation of __gnat_install_handler to satisfy * reference in a-init.c in GNAT's run-time. Each BSP really * should provide its own version of this routine but this * version lets programs link. * * This routine is responsible for installing fault/exception/trap - * handlers that map them onto POSIX signals so they can be + * handlers that map them onto POSIX signals so they can be * propagated to the GNAT run-time. See the sparc/erc32 BSP * for an example. * diff --git a/c/src/lib/libbsp/shared/ide_ctrl.c b/c/src/lib/libbsp/shared/ide_ctrl.c index 57349b824a..444ae961d5 100644 --- a/c/src/lib/libbsp/shared/ide_ctrl.c +++ b/c/src/lib/libbsp/shared/ide_ctrl.c @@ -1,6 +1,6 @@ /* * ide_controller.c - * + * * This is generic rtems driver for IDE controllers. * * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia @@ -10,7 +10,7 @@ * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ * */ @@ -23,7 +23,7 @@ /* * ide_controller_initialize -- - * Initializes all configured IDE controllers. Controllers configuration + * Initializes all configured IDE controllers. Controllers configuration * table is provided by BSP * * PARAMETERS: @@ -35,7 +35,7 @@ * RTEMS_SUCCESSFUL on success, or error code if * error occured */ -rtems_device_driver +rtems_device_driver ide_controller_initialize(rtems_device_major_number major, rtems_device_minor_number minor_arg, void *args) @@ -46,22 +46,22 @@ ide_controller_initialize(rtems_device_major_number major, /* FIXME: may be it should be done on compilation phase */ if (IDE_Controller_Count > IDE_CTRL_MAX_MINOR_NUMBER) rtems_fatal_error_occurred(RTEMS_TOO_MANY); - + for (minor=0; minor < IDE_Controller_Count; minor++) { IDE_Controller_Table[minor].status = IDE_CTRL_NON_INITIALIZED; - - if ((IDE_Controller_Table[minor].probe != NULL && + + if ((IDE_Controller_Table[minor].probe != NULL && IDE_Controller_Table[minor].probe(minor)) || IDE_Controller_Table[minor].fns->ctrl_probe(minor)) { - status = rtems_io_register_name(IDE_Controller_Table[minor].name, + status = rtems_io_register_name(IDE_Controller_Table[minor].name, major, minor); - if (status != RTEMS_SUCCESSFUL) + if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); IDE_Controller_Table[minor].fns->ctrl_initialize(minor); - + IDE_Controller_Table[minor].status = IDE_CTRL_INITIALIZED; } } @@ -133,7 +133,7 @@ ide_controller_write_data_block(rtems_device_minor_number minor, */ void ide_controller_read_register(rtems_device_minor_number minor, - int reg, + int reg, uint16_t *value) { IDE_Controller_Table[minor].fns->ctrl_reg_read(minor, reg, value); @@ -152,7 +152,7 @@ ide_controller_read_register(rtems_device_minor_number minor, * NONE */ void -ide_controller_write_register(rtems_device_minor_number minor, int reg, +ide_controller_write_register(rtems_device_minor_number minor, int reg, uint16_t value) { IDE_Controller_Table[minor].fns->ctrl_reg_write(minor, reg, value); @@ -170,10 +170,10 @@ ide_controller_write_register(rtems_device_minor_number minor, int reg, * RTEMS_SUCCESSFUL on success, or error code if * error occured */ -rtems_status_code +rtems_status_code ide_controller_config_io_speed(int minor, uint8_t modes_avaible) { return IDE_Controller_Table[minor].fns->ctrl_config_io_speed( - minor, + minor, modes_avaible); } diff --git a/c/src/lib/libbsp/shared/main.c b/c/src/lib/libbsp/shared/main.c index 0e1f080176..8397902bd3 100644 --- a/c/src/lib/libbsp/shared/main.c +++ b/c/src/lib/libbsp/shared/main.c @@ -1,7 +1,7 @@ /* * A simple main which can be used on any embedded target. * - * This style of initialization insures that the C++ global + * This style of initialization insures that the C++ global * constructors are executed after RTEMS is initialized. * * Thanks to Chris Johns <cjohns@plessey.com.au> for this idea. diff --git a/c/src/lib/libbsp/shared/setvec.c b/c/src/lib/libbsp/shared/setvec.c index 0658acbfcd..826f13b399 100644 --- a/c/src/lib/libbsp/shared/setvec.c +++ b/c/src/lib/libbsp/shared/setvec.c @@ -34,7 +34,7 @@ rtems_isr_entry set_vector( /* returns old vector */ if ( type ) rtems_interrupt_catch( handler, vector, &previous_isr ); - else + else _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); return previous_isr; diff --git a/c/src/lib/libbsp/shared/timerstub.c b/c/src/lib/libbsp/shared/timerstub.c index bba07bcf7c..dc3144c928 100644 --- a/c/src/lib/libbsp/shared/timerstub.c +++ b/c/src/lib/libbsp/shared/timerstub.c @@ -1,4 +1,4 @@ -/* +/* * This file implements a stub benchmark timer that is sufficient to * satisfy linking the RTEMS Benchmarks. * diff --git a/c/src/lib/libbsp/shared/tod.c b/c/src/lib/libbsp/shared/tod.c index 14a588ac58..0f90f11915 100644 --- a/c/src/lib/libbsp/shared/tod.c +++ b/c/src/lib/libbsp/shared/tod.c @@ -6,7 +6,7 @@ * http://www.rtems.com/license/LICENSE. * * $Id$ - */ + */ #include <rtems.h> #include <libchip/rtc.h> @@ -36,13 +36,13 @@ rtems_device_driver rtc_initialize( rtems_status_code status; for (minor=0; minor < RTC_Count ; minor++) { - /* + /* * First perform the configuration dependent probe, then the * device dependent probe */ if (RTC_Table[minor].deviceProbe && RTC_Table[minor].deviceProbe(minor)) { - /* + /* * Use this device as the primary RTC */ RTC_Minor = minor; @@ -52,7 +52,7 @@ rtems_device_driver rtc_initialize( } if ( !RTC_Present ) { - /* + /* * Failed to find an RTC -- this is not a fatal error. */ @@ -71,7 +71,7 @@ rtems_device_driver rtc_initialize( RTC_Table[minor].pDeviceFns->deviceInitialize( RTC_Minor ); /* - * Now initialize any secondary RTC's + * Now initialize any secondary RTC's */ for ( minor++ ; minor<RTC_Count ; minor++) { @@ -105,9 +105,9 @@ rtems_device_driver rtc_initialize( /*PAGE * * This routine copies the time from the real time clock to RTEMS - * + * * Input parameters: NONE - * + * * Output parameters: NONE * * Return values: NONE @@ -129,9 +129,9 @@ void setRealTimeToRTEMS() * setRealTimeFromRTEMS * * This routine copies the time from RTEMS to the real time clock - * + * * Input parameters: NONE - * + * * Output parameters: NONE * * Return values: NONE @@ -153,9 +153,9 @@ void setRealTimeFromRTEMS() * getRealTime * * This routine reads the current time from the RTC. - * + * * Input parameters: NONE - * + * * Output parameters: NONE * * Return values: NONE @@ -173,29 +173,29 @@ void getRealTime( } /*PAGE - * + * * setRealTime - * + * * This routine sets the RTC. - * + * * Input parameters: NONE - * + * * Output parameters: NONE * * Return values: NONE */ -/* XXX this routine should be part of the public RTEMS interface */ +/* XXX this routine should be part of the public RTEMS interface */ rtems_boolean _TOD_Validate( rtems_time_of_day *tod ); int setRealTime( rtems_time_of_day *tod ) { - + if (!RTC_Present) return -1; - + if ( !_TOD_Validate(tod) ) return -1; @@ -210,16 +210,16 @@ int setRealTime( * * This routine reads the returns the variance betweent the real time and * rtems time. - * + * * Input parameters: NONE - * + * * Output parameters: NONE * - * Return values: + * Return values: * int The differance between the real time clock and rtems time. */ -/* XXX this routine should be part of the public RTEMS interface */ +/* XXX this routine should be part of the public RTEMS interface */ uint32_t _TOD_To_seconds( rtems_time_of_day *tod ); int checkRealTime() @@ -235,8 +235,8 @@ int checkRealTime() rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod ); RTC_Table[RTC_Minor].pDeviceFns->deviceGetTime(RTC_Minor, &rtc_tod); - rtems_time = _TOD_To_seconds( &rtems_tod ); - rtc_time = _TOD_To_seconds( &rtc_tod ); + rtems_time = _TOD_To_seconds( &rtems_tod ); + rtc_time = _TOD_To_seconds( &rtc_tod ); return rtems_time - rtc_time; } diff --git a/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.c b/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.c index 9a521446df..47c9d3d1d0 100644 --- a/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.c +++ b/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.c @@ -131,7 +131,7 @@ WRITE_LE( #warning "SYNC instruction unknown for this architecture" #endif -/* registers should be mapped to guarded, non-cached memory; hence +/* registers should be mapped to guarded, non-cached memory; hence * subsequent stores are ordered. eieio is only needed to enforce * ordering of loads with respect to stores. */ @@ -174,11 +174,11 @@ return READ_LE0((volatile LERegister *)(((unsigned long)adrs)+off)); } #define PORT_UNALIGNED(addr,port) \ - ( (port)%4 ? ((addr) & 0xffff) : ((addr) & 4095) ) + ( (port)%4 ? ((addr) & 0xffff) : ((addr) & 4095) ) #define UNIV_REV(base) (READ_LE(base,2*sizeof(LERegister)) & 0xff) - + #if defined(__rtems__) && 0 static int uprintk(char *fmt, va_list ap) @@ -213,7 +213,7 @@ va_list ap; * to a buffer. */ vprintk(fmt,ap); - } else + } else #endif { vfprintf(f,fmt,ap); @@ -440,7 +440,7 @@ unsigned long mode=0; */ if (ismaster) mode |= UNIV_MCTL_EN | UNIV_MCTL_PWEN | UNIV_MCTL_VDW64 | UNIV_MCTL_VCT; - else + else mode |= UNIV_SCTL_EN | UNIV_SCTL_PWEN | UNIV_SCTL_PREN; #ifdef TSILL @@ -521,7 +521,7 @@ showUniversePort( cntrl&UNIV_MCTL_PGM ? "Pgm" : "Dat", cntrl&UNIV_MCTL_SUPER ? "Sup" : "Usr"); } else { - uprintf(f,"%s %s %s %s", + uprintf(f,"%s %s %s %s", cntrl&UNIV_SCTL_PGM ? "Pgm," : " ", cntrl&UNIV_SCTL_DAT ? "Dat," : " ", cntrl&UNIV_SCTL_SUPER ? "Sup," : " ", @@ -614,7 +614,7 @@ int rval; uprintf(stderr,"unable to find the universe in pci config space\n"); return -1; } - rptr = (base + + rptr = (base + (ismaster ? UNIV_REGOFF_PCITGT0_CTRL : UNIV_REGOFF_VMESLV0_CTRL)/sizeof(LERegister)); #undef TSILL #ifdef TSILL @@ -629,7 +629,7 @@ int rval; /* only rev. 2 has 8 ports */ if (UNIV_REV(base)<2) return -1; - rptr = (base + + rptr = (base + (ismaster ? UNIV_REGOFF_PCITGT4_CTRL : UNIV_REGOFF_VMESLV4_CTRL)/sizeof(LERegister)); for (port=4; port<UNIV_NUM_MPORTS; port++) { if ((rval=func(ismaster,port,rptr,arg))) return rval; @@ -724,7 +724,7 @@ vmeUniverseReset(void) vmeUniverseDisableAllSlaves(); vmeUniverseDisableAllMasters(); - + vmeUniverseWriteReg(UNIV_VCSR_CLR_SYSFAIL, UNIV_REGOFF_VCSR_CLR); /* clear interrupt status bits */ @@ -955,14 +955,14 @@ register unsigned long status; * like this: * * - * VME IRQ ------ - * & ----- LINT_STAT ---- + * VME IRQ ------ + * & ----- LINT_STAT ---- * | & ---------- PCI LINE * | | - * | | - * LINT_EN --------------------------- + * | | + * LINT_EN --------------------------- * - * I.e. + * I.e. * - if LINT_EN is disabled, a VME IRQ will not set LINT_STAT. * - while LINT_STAT is set, it will pull the PCI line unless * masked by LINT_EN. @@ -999,7 +999,7 @@ unsigned long lvl,msk,lintstat,linten,status; /* try the special handler */ universeSpecialISR(); - /* + /* * let the pic end this cycle */ BSP_PIC_DO_EOI; @@ -1165,7 +1165,7 @@ vmeUniverseIntEnable(unsigned int level) if (!vmeUniverseIrqMgrInstalled || level<1 || level>7) return -1; vmeUniverseWriteReg( - (vmeUniverseReadReg(UNIV_REGOFF_LINT_EN) | + (vmeUniverseReadReg(UNIV_REGOFF_LINT_EN) | (UNIV_LINT_EN_VIRQ1 << (level-1)) ), UNIV_REGOFF_LINT_EN); @@ -1178,7 +1178,7 @@ vmeUniverseIntDisable(unsigned int level) if (!vmeUniverseIrqMgrInstalled || level<1 || level>7) return -1; vmeUniverseWriteReg( - (vmeUniverseReadReg(UNIV_REGOFF_LINT_EN) & + (vmeUniverseReadReg(UNIV_REGOFF_LINT_EN) & ~ (UNIV_LINT_EN_VIRQ1 << (level-1)) ), UNIV_REGOFF_LINT_EN); diff --git a/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.h b/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.h index 6e62b9040f..06ecffedf9 100644 --- a/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.h +++ b/c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.h @@ -361,7 +361,7 @@ typedef struct VmeUniverseDMAPacketRec_ { /* Location Monitor control register */ #define UNIV_REGOFF_LM_CTL 0xf64 -# define UNIV_LM_CTL_EN (1<<31) /* image enable */ +# define UNIV_LM_CTL_EN (1<<31) /* image enable */ # define UNIV_LM_CTL_PGM (1<<23) /* program AM */ # define UNIV_LM_CTL_DATA (1<<22) /* data AM */ # define UNIV_LM_CTL_SUPER (1<<21) /* supervisor AM */ @@ -375,7 +375,7 @@ typedef struct VmeUniverseDMAPacketRec_ { /* VMEbus register access image control register */ #define UNIV_REGOFF_VRAI_CTL 0xf70 -# define UNIV_VRAI_CTL_EN (1<<31) /* image enable */ +# define UNIV_VRAI_CTL_EN (1<<31) /* image enable */ # define UNIV_VRAI_CTL_PGM (1<<23) /* program AM */ # define UNIV_VRAI_CTL_DATA (1<<22) /* data AM */ # define UNIV_VRAI_CTL_SUPER (1<<21) /* supervisor AM */ @@ -453,7 +453,7 @@ vmeUniverseReset(void); * #include <vmeUniverse.h> */ #ifdef _VME_UNIVERSE_DECLARE_SHOW_ROUTINES -/* print the current configuration of all master ports to +/* print the current configuration of all master ports to * f (stderr if NULL) */ void @@ -638,7 +638,7 @@ vmeUniverseIntDisable(unsigned int level); /* use these special vectors to connect a handler to the - * universe specific interrupts (such as "DMA done", + * universe specific interrupts (such as "DMA done", * VOWN, error irqs etc.) * NOTE: The wrapper clears all status LINT bits (except * for regular VME irqs). Also note that it is the user's @@ -649,7 +649,7 @@ vmeUniverseIntDisable(unsigned int level); * DO NOT CHANGE THE ORDER OF THESE VECTORS - THE DRIVER * DEPENDS ON IT * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * + * */ #define UNIV_VOWN_INT_VEC 256 #define UNIV_DMA_INT_VEC 257 @@ -674,7 +674,7 @@ vmeUniverseIntDisable(unsigned int level); * (VME) interrupts to 8 different lines (some of) which may be hooked up * in a (board specific) way to a PIC. * - * This driver only supports at most two lines. It routes the 7 VME + * This driver only supports at most two lines. It routes the 7 VME * interrupts to the main line and optionally, it routes the 'special' * interrupts generated by the universe itself (DMA done, VOWN etc.) * to a second line. If no second line is available, all IRQs are routed @@ -689,7 +689,7 @@ vmeUniverseIntDisable(unsigned int level); * are wired. * Optionally, the first PIC input line can be read from PCI config space * but the second must be passed to this routine. Note that the info read - * from PCI config space is wrong for many boards! + * from PCI config space is wrong for many boards! * * PARAMETERS: * vmeIrqUnivOut: to which output pin (of the universe) should the 7 @@ -705,7 +705,7 @@ vmeUniverseIntDisable(unsigned int level); * the PIC is determined by reading PCI config space. * * RETURNS: 0 on success, -1 on failure. - * + * */ int vmeUniverseInstallIrqMgr(int vmeIrqUnivOut, diff --git a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c index c6c2d8c687..da962c41d6 100644 --- a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c +++ b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c @@ -15,10 +15,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -53,11 +53,11 @@ extern uint32_t CPU_SPARC_CLICKS_PER_TICK; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -88,7 +88,7 @@ rtems_isr Clock_isr( #if SIMSPARC_FAST_IDLE ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK; ERC32_MEC_Set_Real_Time_Clock_Timer_Control( - ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | + ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER ); #endif @@ -135,14 +135,14 @@ void Install_clock( ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK; ERC32_MEC_Set_Real_Time_Clock_Timer_Control( - ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | - ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | - ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER + ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | + ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | + ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER ); - + ERC32_MEC_Set_Real_Time_Clock_Timer_Control( ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | - ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO + ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO ); atexit( Clock_exit ); @@ -167,12 +167,12 @@ void Clock_exit( void ) ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK ); ERC32_MEC_Set_Real_Time_Clock_Timer_Control( - ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING + ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING ); /* do not restore old vector */ } - + /* * Clock_initialize * @@ -196,17 +196,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /* * Clock_control * @@ -231,15 +231,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -250,7 +250,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/sparc/erc32/console/console.c b/c/src/lib/libbsp/sparc/erc32/console/console.c index 90102fbc1e..c7ec8a366a 100644 --- a/c/src/lib/libbsp/sparc/erc32/console/console.c +++ b/c/src/lib/libbsp/sparc/erc32/console/console.c @@ -20,7 +20,7 @@ /* * Should we use a polled or interrupt drived console? - * + * * NOTE: This is defined in the custom/erc32.cfg file. * * WARNING: In sis 1.6, it did not appear that the UART interrupts @@ -28,7 +28,7 @@ * a character into the TX buffer, an interrupt was generated. * This did not allow enough time for the program to put more * characters in the buffer. So every character resulted in - * "priming" the transmitter. This effectively results in + * "priming" the transmitter. This effectively results in * in a polled console with a useless interrupt per character * on output. It is reasonable to assume that input does not * share this problem although it was not investigated. @@ -49,7 +49,7 @@ void console_outbyte_polled( /* body is in debugputs.c */ /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -69,10 +69,10 @@ int console_inbyte_nonblocking( int port ); */ #include <rtems/ringbuf.h> - + Ring_buffer_t TX_Buffer[ 2 ]; boolean Is_TX_active[ 2 ]; - + void *console_termios_data[ 2 ]; /* @@ -81,7 +81,7 @@ void *console_termios_data[ 2 ]; * This routine is the console interrupt handler for Channel A. * * Input parameters: - * vector - vector number + * vector - vector number * * Output parameters: NONE * @@ -91,10 +91,10 @@ void *console_termios_data[ 2 ]; rtems_isr console_isr_a( rtems_vector_number vector ) -{ +{ char ch; int UStat; - + if ( (UStat = ERC32_MEC.UART_Status) & ERC32_MEC_UART_STATUS_DRA ) { if (UStat & ERC32_MEC_UART_STATUS_ERRA) { ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA; @@ -104,7 +104,7 @@ rtems_isr console_isr_a( rtems_termios_enqueue_raw_characters( console_termios_data[ 0 ], &ch, 1 ); } - + if ( ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA ) { if ( !Ring_buffer_Is_empty( &TX_Buffer[ 0 ] ) ) { Ring_buffer_Remove_character( &TX_Buffer[ 0 ], ch ); @@ -112,7 +112,7 @@ rtems_isr console_isr_a( } else Is_TX_active[ 0 ] = FALSE; } - + ERC32_Clear_interrupt( ERC32_INTERRUPT_UART_A_RX_TX ); } @@ -122,13 +122,13 @@ rtems_isr console_isr_a( * This routine is the console interrupt handler for Channel B. * * Input parameters: - * vector - vector number + * vector - vector number * * Output parameters: NONE * * Return values: NONE */ - + rtems_isr console_isr_b( rtems_vector_number vector ) @@ -194,11 +194,11 @@ void console_exit() * Now wait for all the data to actually get out ... the send register * should be empty. */ - - while ( (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) != + + while ( (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) != ERC32_MEC_UART_STATUS_THEA ); - while ( (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) != + while ( (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) != ERC32_MEC_UART_STATUS_THEB ); } @@ -253,7 +253,7 @@ void console_initialize_interrupts( void ) * * Return values: NONE */ - + void console_outbyte_interrupt( int port, char ch @@ -300,7 +300,7 @@ int console_write_support (int minor, const char *buf, int len) * Console Device Driver Entry Points * */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -326,7 +326,7 @@ rtems_device_driver console_initialize( /* * Initialize Hardware */ - + #if (CONSOLE_USE_INTERRUPTS) console_initialize_interrupts(); #endif @@ -369,7 +369,7 @@ rtems_device_driver console_open( assert( minor <= 1 ); if ( minor > 2 ) return RTEMS_INVALID_NUMBER; - + #if (CONSOLE_USE_INTERRUPTS) sc = rtems_termios_open (major, minor, arg, &intrCallbacks); @@ -380,7 +380,7 @@ rtems_device_driver console_open( return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -389,7 +389,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -398,7 +398,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -407,7 +407,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/sparc/erc32/console/debugputs.c b/c/src/lib/libbsp/sparc/erc32/console/debugputs.c index c55dab64c4..a836174df5 100644 --- a/c/src/lib/libbsp/sparc/erc32/console/debugputs.c +++ b/c/src/lib/libbsp/sparc/erc32/console/debugputs.c @@ -40,7 +40,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -104,7 +104,7 @@ void DEBUG_puts( uint32_t old_level; ERC32_Disable_interrupt( ERC32_INTERRUPT_UART_A_RX_TX, old_level ); - for ( s = string ; *s ; s++ ) + for ( s = string ; *s ; s++ ) console_outbyte_polled( 0, *s ); console_outbyte_polled( 0, '\r' ); diff --git a/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c b/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c index 2619f33f49..55313646c3 100644 --- a/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c +++ b/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c @@ -87,8 +87,8 @@ uint32_t erc32_sonic_read_register( #define SONIC_VECTOR 0x1E sonic_configuration_t erc32_sonic_configuration = { - SONIC_BASE_ADDRESS, /* base address */ - SONIC_VECTOR, /* vector number */ + SONIC_BASE_ADDRESS, /* base address */ + SONIC_VECTOR, /* vector number */ SONIC_DCR, /* DCR register value */ SONIC_DC2, /* DC2 register value */ TDA_COUNT, /* number of transmit descriptors */ @@ -105,5 +105,5 @@ int rtems_erc32_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config) ERC32_MEC.Control |= 0x10000; /* Enable DMA */ ERC32_MEC.Interrupt_Mask &= ~(1 << (SONIC_VECTOR - 0x10)); return(rtems_sonic_driver_attach( config, &erc32_sonic_configuration )); - + } diff --git a/c/src/lib/libbsp/sparc/erc32/include/bsp.h b/c/src/lib/libbsp/sparc/erc32/include/bsp.h index 90cef02065..1e936df29b 100644 --- a/c/src/lib/libbsp/sparc/erc32/include/bsp.h +++ b/c/src/lib/libbsp/sparc/erc32/include/bsp.h @@ -10,10 +10,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -90,9 +90,9 @@ extern int rtems_erc32_sonic_driver_attach (struct rtems_bsdnet_ifconfig *config #define Cause_tm27_intr() \ asm volatile( "ta 0x10; nop " ); -#define Clear_tm27_intr() +#define Clear_tm27_intr() -#define Lower_tm27_intr() +#define Lower_tm27_intr() /* * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. @@ -104,13 +104,13 @@ extern int rtems_erc32_sonic_driver_attach (struct rtems_bsdnet_ifconfig *config #define TEST_INTERRUPT_SOURCE2 (ERC32_INTERRUPT_EXTERNAL_1+1) #define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) #define TEST_VECTOR2 ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 ) - + #define MUST_WAIT_FOR_INTERRUPT 1 - + #define Install_tm27_vector( handler ) \ set_vector( (handler), TEST_VECTOR, 1 ); \ set_vector( (handler), TEST_VECTOR2, 1 ); - + #define Cause_tm27_intr() \ do { \ ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1) ); \ @@ -118,10 +118,10 @@ extern int rtems_erc32_sonic_driver_attach (struct rtems_bsdnet_ifconfig *config nop(); \ nop(); \ } while (0) - + #define Clear_tm27_intr() \ ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE ) - + #define Lower_tm27_intr() #endif @@ -144,28 +144,28 @@ extern void Clock_delay(uint32_t microseconds); extern int RAM_START; extern int RAM_END; extern int RAM_SIZE; - + extern int PROM_START; extern int PROM_END; extern int PROM_SIZE; extern int CLOCK_SPEED; - + extern int end; /* last address in the program */ /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - - + + /* miscellaneous stuff assumed to exist */ void bsp_cleanup( void ); diff --git a/c/src/lib/libbsp/sparc/erc32/include/coverhd.h b/c/src/lib/libbsp/sparc/erc32/include/coverhd.h index eea7cc91ca..1d50a4ff7a 100644 --- a/c/src/lib/libbsp/sparc/erc32/include/coverhd.h +++ b/c/src/lib/libbsp/sparc/erc32/include/coverhd.h @@ -11,10 +11,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ diff --git a/c/src/lib/libbsp/sparc/erc32/include/erc32.h b/c/src/lib/libbsp/sparc/erc32/include/erc32.h index 3d214ee10f..959b4ba527 100644 --- a/c/src/lib/libbsp/sparc/erc32/include/erc32.h +++ b/c/src/lib/libbsp/sparc/erc32/include/erc32.h @@ -5,9 +5,9 @@ * 601/602 chipset. This CPU has a number of on-board peripherals and * was developed by the European Space Agency to target space applications. * - * NOTE: Other than where absolutely required, this version currently - * supports only the peripherals and bits used by the basic board - * support package. This includes at least significant pieces of + * NOTE: Other than where absolutely required, this version currently + * supports only the peripherals and bits used by the basic board + * support package. This includes at least significant pieces of * the following items: * * + UART Channels A and B @@ -26,20 +26,20 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ */ - + #ifndef _INCLUDE_ERC32_h #define _INCLUDE_ERC32_h #include <rtems/score/sparc.h> - + #ifdef __cplusplus extern "C" { #endif @@ -47,7 +47,7 @@ extern "C" { /* * Interrupt Sources * - * The interrupt source numbers directly map to the trap type and to + * The interrupt source numbers directly map to the trap type and to * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask, * and the Interrupt Pending Registers. */ @@ -75,7 +75,7 @@ extern "C" { * * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments * - * NOTE: The priority level for each source corresponds to the least + * NOTE: The priority level for each source corresponds to the least * significant nibble of the trap type. */ @@ -88,12 +88,12 @@ extern "C" { (_trap) <= ERC32_TRAP_TYPE( ERC32_INTERRUPT_WATCHDOG_TIMEOUT ) ) /* - * Structure for ERC32 memory mapped registers. + * Structure for ERC32 memory mapped registers. * * Source: Section 3.25.2 - Register Address Map * - * NOTE: There is only one of these structures per CPU, its base address - * is 0x01f80000, and the variable MEC is placed there by the + * NOTE: There is only one of these structures per CPU, its base address + * is 0x01f80000, and the variable MEC is placed there by the * linkcmds file. */ @@ -116,7 +116,7 @@ typedef struct { volatile uint32_t Interrupt_Force; /* offset 0x54 */ volatile uint32_t Unimplemented_3[ 2 ]; /* offset 0x58 */ /* offset 0x60 */ - volatile uint32_t Watchdog_Program_and_Timeout_Acknowledge; + volatile uint32_t Watchdog_Program_and_Timeout_Acknowledge; volatile uint32_t Watchdog_Trap_Door_Set; /* offset 0x64 */ volatile uint32_t Unimplemented_4[ 6 ]; /* offset 0x68 */ volatile uint32_t Real_Time_Clock_Counter; /* offset 0x80 */ @@ -249,7 +249,7 @@ typedef struct { #define ERC32_MEMORY_CONFIGURATION_PROM_SIZE_4M ( 5 << 18 ) #define ERC32_MEMORY_CONFIGURATION_PROM_SIZE_8M ( 6 << 18 ) #define ERC32_MEMORY_CONFIGURATION_PROM_SIZE_16M ( 7 << 18 ) - + /* * The following defines the bits in the Timer Control Register. */ @@ -277,8 +277,8 @@ typedef struct { * */ -#define ERC32_MEC_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ - +#define ERC32_MEC_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ + /* * The following defines the bits in the MEC UART Control Registers. */ @@ -324,7 +324,7 @@ typedef struct { */ extern ERC32_Register_Map ERC32_MEC; - + /* * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, * and the Interrupt Pending Registers. @@ -349,13 +349,13 @@ extern ERC32_Register_Map ERC32_MEC; ERC32_MEC.Interrupt_Force = (1 << (_source)); \ sparc_enable_interrupts( _level ); \ } while (0) - + #define ERC32_Is_interrupt_pending( _source ) \ (ERC32_MEC.Interrupt_Pending & (1 << (_source))) - + #define ERC32_Is_interrupt_masked( _source ) \ (ERC32_MEC.Interrupt_Masked & (1 << (_source))) - + #define ERC32_Mask_interrupt( _source ) \ do { \ uint32_t _level; \ @@ -364,7 +364,7 @@ extern ERC32_Register_Map ERC32_MEC; ERC32_MEC.Interrupt_Mask |= (1 << (_source)); \ sparc_enable_interrupts( _level ); \ } while (0) - + #define ERC32_Unmask_interrupt( _source ) \ do { \ uint32_t _level; \ @@ -385,7 +385,7 @@ extern ERC32_Register_Map ERC32_MEC; sparc_enable_interrupts( _level ); \ (_previous) &= _mask; \ } while (0) - + #define ERC32_Restore_interrupt( _source, _previous ) \ do { \ uint32_t _level; \ @@ -405,9 +405,9 @@ extern ERC32_Register_Map ERC32_MEC; * and status of the other timer. * * This code promotes the view that the two timers are completely independent. - * By exclusively using the routines below to access the Timer Control + * By exclusively using the routines below to access the Timer Control * Register, the application can view the system as having a General Purpose - * Timer Control Register and a Real Time Clock Timer Control Register + * Timer Control Register and a Real Time Clock Timer Control Register * rather than the single shared value. * * Each logical timer control register is organized as follows: @@ -451,7 +451,7 @@ extern ERC32_Register_Map ERC32_MEC; extern uint32_t _ERC32_MEC_Timer_Control_Mirror; /* - * This macros manipulate the General Purpose Timer portion of the + * This macros manipulate the General Purpose Timer portion of the * Timer Control register and promote the view that there are actually * two independent Timer Control Registers. */ @@ -480,11 +480,11 @@ extern uint32_t _ERC32_MEC_Timer_Control_Mirror; } while ( 0 ) /* - * This macros manipulate the Real Timer Clock Timer portion of the + * This macros manipulate the Real Timer Clock Timer portion of the * Timer Control register and promote the view that there are actually * two independent Timer Control Registers. */ - + #define ERC32_MEC_Set_Real_Time_Clock_Timer_Control( _value ) \ do { \ uint32_t _level; \ @@ -502,7 +502,7 @@ extern uint32_t _ERC32_MEC_Timer_Control_Mirror; ERC32_MEC.Timer_Control = _control; \ sparc_enable_interrupts( _level ); \ } while ( 0 ) - + #define ERC32_MEC_Get_Real_Time_Clock_Timer_Control( _value ) \ do { \ (_value) = (_ERC32_MEC_Timer_Control_Mirror >> 8) & 0xf; \ @@ -514,6 +514,6 @@ extern uint32_t _ERC32_MEC_Timer_Control_Mirror; #ifdef __cplusplus } #endif - + #endif /* !_INCLUDE_ERC32_h */ /* end of include file */ diff --git a/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S b/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S index 7866c4700a..acdda46cc2 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S +++ b/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S @@ -19,11 +19,11 @@ __bsp_board_init: */ set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals - ld [%g3], %g2 + ld [%g3], %g2 set 0xfe080000, %g1 andcc %g1, %g2, %g0 bne 2f - + /* Stop the watchdog */ st %g0, [%g3 + SYM(ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET)] @@ -33,8 +33,8 @@ __bsp_board_init: st %g0, [%g3 + SYM(ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET)] /* Set the correct memory size in MEC memory config register */ - - set SYM(PROM_SIZE), %l0 + + set SYM(PROM_SIZE), %l0 set 0, %l1 srl %l0, 18, %l0 1: @@ -43,8 +43,8 @@ __bsp_board_init: bne,a 1b inc %l1 sll %l1, 8, %l1 - - set SYM(RAM_SIZE), %l0 + + set SYM(RAM_SIZE), %l0 srl %l0, 19, %l0 1: tst %l0 @@ -52,10 +52,10 @@ __bsp_board_init: bne,a 1b inc %l1 sll %l1, 10, %l1 - + ! set the Memory Configuration st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ] - + set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker set SYM(RAM_SIZE), %l2 add %l1, %l2, %sp diff --git a/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c b/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c index a49662831b..f3d4e3fbc5 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/erc32mec.c @@ -13,5 +13,5 @@ #include <rtems.h> #include <bsp.h> - + ERC32_Register_Map ERC32_MEC; diff --git a/c/src/lib/libbsp/sparc/erc32/startup/setvec.c b/c/src/lib/libbsp/sparc/erc32/startup/setvec.c index 2bd9ad95b6..bd6f2f65e9 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/setvec.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/setvec.c @@ -21,10 +21,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */ if ( type ) rtems_interrupt_catch( handler, vector, &previous_isr ); - else + else _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); real_trap = SPARC_REAL_TRAP_NUMBER( vector ); if ( ERC32_Is_MEC_Trap( real_trap ) ) { - + source = ERC32_TRAP_SOURCE( real_trap ); ERC32_Clear_interrupt( source ); diff --git a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c index a3d3936df0..6f4d46d37e 100644 --- a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c +++ b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c @@ -1,11 +1,11 @@ /* * ERC32 Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * - * Developed as part of the port of RTEMS to the ERC32 implementation - * of the SPARC by On-Line Applications Research Corporation (OAR) + * Developed as part of the port of RTEMS to the ERC32 implementation + * of the SPARC by On-Line Applications Research Corporation (OAR) * under contract to the European Space Agency (ESA). * * COPYRIGHT (c) 1995. European Space Agency. @@ -60,33 +60,33 @@ rtems_isr bsp_spurious_handler( * First the ones defined by the basic architecture */ - case 0x00: + case 0x00: DEBUG_puts( "reset" ); break; - case 0x01: + case 0x01: DEBUG_puts( "instruction access exception" ); break; - case 0x02: + case 0x02: DEBUG_puts( "illegal instruction" ); break; - case 0x03: + case 0x03: DEBUG_puts( "privileged instruction" ); break; - case 0x04: + case 0x04: DEBUG_puts( "fp disabled" ); break; - case 0x07: + case 0x07: DEBUG_puts( "memory address not aligned" ); break; - case 0x08: + case 0x08: DEBUG_puts( "fp exception" ); break; - case 0x09: + case 0x09: strcpy(line, "data access exception at 0x " ); itos(ERC32_MEC.First_Failing_Address, &line[27]); DEBUG_puts( line ); break; - case 0x0A: + case 0x0A: DEBUG_puts( "tag overflow" ); break; @@ -178,7 +178,7 @@ void bsp_spurious_initialize() */ if (( trap == 5 || trap == 6 ) || - (( trap >= 0x11 ) && ( trap <= 0x1f )) || + (( trap >= 0x11 ) && ( trap <= 0x1f )) || (( trap >= 0x70 ) && ( trap <= 0x83 ))) continue; diff --git a/c/src/lib/libbsp/sparc/erc32/timer/timer.c b/c/src/lib/libbsp/sparc/erc32/timer/timer.c index 6432b84982..5903dc484d 100644 --- a/c/src/lib/libbsp/sparc/erc32/timer/timer.c +++ b/c/src/lib/libbsp/sparc/erc32/timer/timer.c @@ -11,10 +11,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -43,12 +43,12 @@ void Timer_initialize() Timer_driver_Is_initialized = TRUE; } - ERC32_MEC_Set_General_Purpose_Timer_Control( - ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | + ERC32_MEC_Set_General_Purpose_Timer_Control( + ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER ); - ERC32_MEC_Set_General_Purpose_Timer_Control( + ERC32_MEC_Set_General_Purpose_Timer_Control( ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING ); diff --git a/c/src/lib/libbsp/sparc/leon/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon/clock/ckinit.c index 10b465682c..fc4d3b3608 100644 --- a/c/src/lib/libbsp/sparc/leon/clock/ckinit.c +++ b/c/src/lib/libbsp/sparc/leon/clock/ckinit.c @@ -14,10 +14,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to LEON implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -52,11 +52,11 @@ extern uint32_t CPU_SPARC_CLICKS_PER_TICK; rtems_isr_entry Old_ticker; void Clock_exit( void ); - + /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -87,7 +87,7 @@ rtems_isr Clock_isr( #if SIMSPARC_FAST_IDLE LEON_REG.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK; LEON_REG_Set_Real_Time_Clock_Timer_Control( - LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | + LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | LEON_REG_TIMER_COUNTER_LOAD_COUNTER ); #endif @@ -131,11 +131,11 @@ void Install_clock( LEON_REG.Timer_Reload_1 = CPU_SPARC_CLICKS_PER_TICK - 1; LEON_REG.Timer_Control_1 = ( - LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | + LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO | - LEON_REG_TIMER_COUNTER_LOAD_COUNTER + LEON_REG_TIMER_COUNTER_LOAD_COUNTER ); - + atexit( Clock_exit ); } @@ -165,7 +165,7 @@ void Clock_exit( void ) /* do not restore old vector */ } } - + /* * Clock_initialize * @@ -189,17 +189,17 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } - + /* * Clock_control * @@ -224,15 +224,15 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args == 0) goto done; - + /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -243,7 +243,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/sparc/leon/console/console.c b/c/src/lib/libbsp/sparc/leon/console/console.c index a43db1544d..9723c7b281 100644 --- a/c/src/lib/libbsp/sparc/leon/console/console.c +++ b/c/src/lib/libbsp/sparc/leon/console/console.c @@ -20,7 +20,7 @@ /* * Should we use a polled or interrupt drived console? - * + * * NOTE: This is defined in the custom/leon.cfg file. * * WARNING: In sis 1.6, it did not appear that the UART interrupts @@ -28,7 +28,7 @@ * a character into the TX buffer, an interrupt was generated. * This did not allow enough time for the program to put more * characters in the buffer. So every character resulted in - * "priming" the transmitter. This effectively results in + * "priming" the transmitter. This effectively results in * in a polled console with a useless interrupt per character * on output. It is reasonable to assume that input does not * share this problem although it was not investigated. @@ -49,7 +49,7 @@ void console_outbyte_polled( /* body is in debugputs.c */ /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -69,10 +69,10 @@ int console_inbyte_nonblocking( int port ); */ #include <rtems/ringbuf.h> - + Ring_buffer_t TX_Buffer[ 2 ]; boolean Is_TX_active[ 2 ]; - + void *console_termios_data[ 2 ]; /* @@ -81,7 +81,7 @@ void *console_termios_data[ 2 ]; * This routine is the console interrupt handler for Channel 1. * * Input parameters: - * vector - vector number + * vector - vector number * * Output parameters: NONE * @@ -91,10 +91,10 @@ void *console_termios_data[ 2 ]; rtems_isr console_isr_a( rtems_vector_number vector ) -{ +{ char ch; int UStat; - + if ( (UStat = LEON_REG.UART_Status_1) & LEON_REG_UART_STATUS_DR ) { if (UStat & LEON_REG_UART_STATUS_ERR) { LEON_REG.UART_Status_1 = LEON_REG_UART_STATUS_CLR; @@ -103,7 +103,7 @@ rtems_isr console_isr_a( rtems_termios_enqueue_raw_characters( console_termios_data[ 0 ], &ch, 1 ); } - + if ( LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE ) { if ( !Ring_buffer_Is_empty( &TX_Buffer[ 0 ] ) ) { Ring_buffer_Remove_character( &TX_Buffer[ 0 ], ch ); @@ -111,7 +111,7 @@ rtems_isr console_isr_a( } else Is_TX_active[ 0 ] = FALSE; } - + LEON_Clear_interrupt( LEON_INTERRUPT_UART_1_RX_TX ); } @@ -121,13 +121,13 @@ rtems_isr console_isr_a( * This routine is the console interrupt handler for Channel 2. * * Input parameters: - * vector - vector number + * vector - vector number * * Output parameters: NONE * * Return values: NONE */ - + rtems_isr console_isr_b( rtems_vector_number vector ) @@ -192,11 +192,11 @@ void console_exit() * Now wait for all the data to actually get out ... the send register * should be empty. */ - - while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) != + + while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) != LEON_REG_UART_STATUS_THE ); - while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) != + while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) != LEON_REG_UART_STATUS_THE ); LEON_REG.UART_Control_1 = 0; @@ -260,7 +260,7 @@ void console_initialize_interrupts( void ) * * Return values: NONE */ - + void console_outbyte_interrupt( int port, char ch @@ -307,7 +307,7 @@ int console_write_support (int minor, const char *buf, int len) * Console Device Driver Entry Points * */ - + rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, @@ -333,7 +333,7 @@ rtems_device_driver console_initialize( /* * Initialize Hardware */ - + LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE; LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE | LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */ @@ -381,7 +381,7 @@ rtems_device_driver console_open( assert( minor <= 1 ); if ( minor > 2 ) return RTEMS_INVALID_NUMBER; - + #if (CONSOLE_USE_INTERRUPTS) sc = rtems_termios_open (major, minor, arg, &intrCallbacks); @@ -392,7 +392,7 @@ rtems_device_driver console_open( return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, @@ -401,7 +401,7 @@ rtems_device_driver console_close( { return rtems_termios_close (arg); } - + rtems_device_driver console_read( rtems_device_major_number major, rtems_device_minor_number minor, @@ -410,7 +410,7 @@ rtems_device_driver console_read( { return rtems_termios_read (arg); } - + rtems_device_driver console_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -419,7 +419,7 @@ rtems_device_driver console_write( { return rtems_termios_write (arg); } - + rtems_device_driver console_control( rtems_device_major_number major, rtems_device_minor_number minor, diff --git a/c/src/lib/libbsp/sparc/leon/console/debugputs.c b/c/src/lib/libbsp/sparc/leon/console/debugputs.c index f5e634d1b3..0ff828cbfa 100644 --- a/c/src/lib/libbsp/sparc/leon/console/debugputs.c +++ b/c/src/lib/libbsp/sparc/leon/console/debugputs.c @@ -40,7 +40,7 @@ void console_outbyte_polled( } /* - * console_inbyte_nonblocking + * console_inbyte_nonblocking * * This routine polls for a character. */ @@ -100,7 +100,7 @@ void DEBUG_puts( LEON_Disable_interrupt( LEON_INTERRUPT_UART_1_RX_TX, old_level ); LEON_REG.UART_Control_1 = LEON_REG_UART_CTRL_TE; - for ( s = string ; *s ; s++ ) + for ( s = string ; *s ; s++ ) console_outbyte_polled( 0, *s ); console_outbyte_polled( 0, '\r' ); diff --git a/c/src/lib/libbsp/sparc/leon/include/bsp.h b/c/src/lib/libbsp/sparc/leon/include/bsp.h index 6714a539fa..758768e059 100644 --- a/c/src/lib/libbsp/sparc/leon/include/bsp.h +++ b/c/src/lib/libbsp/sparc/leon/include/bsp.h @@ -10,10 +10,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -91,9 +91,9 @@ extern int rtems_leon_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *conf #define Cause_tm27_intr() \ asm volatile( "ta 0x10; nop " ); -#define Clear_tm27_intr() +#define Clear_tm27_intr() -#define Lower_tm27_intr() +#define Lower_tm27_intr() /* * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. @@ -106,11 +106,11 @@ extern int rtems_leon_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *conf #define TEST_INTERRUPT_SOURCE2 LEON_INTERRUPT_EXTERNAL_1+1 #define TEST_VECTOR2 LEON_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 ) #define MUST_WAIT_FOR_INTERRUPT 1 - + #define Install_tm27_vector( handler ) \ set_vector( (handler), TEST_VECTOR, 1 ); \ set_vector( (handler), TEST_VECTOR2, 1 ); - + #define Cause_tm27_intr() \ do { \ LEON_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1)); \ @@ -118,10 +118,10 @@ extern int rtems_leon_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *conf nop(); \ nop(); \ } while (0) - + #define Clear_tm27_intr() \ LEON_Clear_interrupt( TEST_INTERRUPT_SOURCE ) - + #define Lower_tm27_intr() #endif @@ -144,28 +144,28 @@ extern void Clock_delay(uint32_t microseconds); extern int RAM_START; extern int RAM_END; extern int RAM_SIZE; - + extern int PROM_START; extern int PROM_END; extern int PROM_SIZE; extern int CLOCK_SPEED; - + extern int end; /* last address in the program */ /* * Device Driver Table Entries */ - + /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - - + + /* miscellaneous stuff assumed to exist */ void bsp_cleanup( void ); diff --git a/c/src/lib/libbsp/sparc/leon/include/coverhd.h b/c/src/lib/libbsp/sparc/leon/include/coverhd.h index eea7cc91ca..1d50a4ff7a 100644 --- a/c/src/lib/libbsp/sparc/leon/include/coverhd.h +++ b/c/src/lib/libbsp/sparc/leon/include/coverhd.h @@ -11,10 +11,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ diff --git a/c/src/lib/libbsp/sparc/leon/include/leon.h b/c/src/lib/libbsp/sparc/leon/include/leon.h index 130ef177c5..ac9822e3fa 100644 --- a/c/src/lib/libbsp/sparc/leon/include/leon.h +++ b/c/src/lib/libbsp/sparc/leon/include/leon.h @@ -5,9 +5,9 @@ * This CPU has a number of on-board peripherals and * was developed by the European Space Agency to target space applications. * - * NOTE: Other than where absolutely required, this version currently - * supports only the peripherals and bits used by the basic board - * support package. This includes at least significant pieces of + * NOTE: Other than where absolutely required, this version currently + * supports only the peripherals and bits used by the basic board + * support package. This includes at least significant pieces of * the following items: * * + UART Channels A and B @@ -23,20 +23,20 @@ * http://www.rtems.com/license/LICENSE. * * Ported to LEON implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ */ - + #ifndef _INCLUDE_LEON_h #define _INCLUDE_LEON_h #include <rtems/score/sparc.h> - + #ifdef __cplusplus extern "C" { #endif @@ -44,7 +44,7 @@ extern "C" { /* * Interrupt Sources * - * The interrupt source numbers directly map to the trap type and to + * The interrupt source numbers directly map to the trap type and to * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask, * and the Interrupt Pending Registers. */ @@ -72,7 +72,7 @@ extern "C" { * * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments * - * NOTE: The priority level for each source corresponds to the least + * NOTE: The priority level for each source corresponds to the least * significant nibble of the trap type. */ @@ -85,12 +85,12 @@ extern "C" { (_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) ) /* - * Structure for LEON memory mapped registers. + * Structure for LEON memory mapped registers. * * Source: Section 6.1 - On-chip registers * - * NOTE: There is only one of these structures per CPU, its base address - * is 0x80000000, and the variable LEON_REG is placed there by the + * NOTE: There is only one of these structures per CPU, its base address + * is 0x80000000, and the variable LEON_REG is placed there by the * linkcmds file. */ @@ -107,7 +107,7 @@ typedef struct { volatile unsigned int Leon_Configuration; volatile unsigned int dummy2; volatile unsigned int dummy3; - volatile unsigned int dummy4; + volatile unsigned int dummy4; volatile unsigned int dummy5; volatile unsigned int dummy6; volatile unsigned int dummy7; @@ -213,7 +213,7 @@ typedef struct { #define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00 - + /* * The following defines the bits in the Timer Control Register. */ @@ -230,8 +230,8 @@ typedef struct { * */ -#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ - +#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ + /* * The following defines the bits in the LEON UART Status Registers. */ @@ -245,7 +245,7 @@ typedef struct { #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ - + /* * The following defines the bits in the LEON UART Status Registers. */ @@ -269,7 +269,7 @@ typedef struct { */ extern LEON_Register_Map LEON_REG; - + /* * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, * and the Interrupt Pending Registers. @@ -289,13 +289,13 @@ extern LEON_Register_Map LEON_REG; do { \ LEON_REG.Interrupt_Force = (1 << (_source)); \ } while (0) - + #define LEON_Is_interrupt_pending( _source ) \ (LEON_REG.Interrupt_Pending & (1 << (_source))) - + #define LEON_Is_interrupt_masked( _source ) \ (LEON_REG.Interrupt_Masked & (1 << (_source))) - + #define LEON_Mask_interrupt( _source ) \ do { \ uint32_t _level; \ @@ -304,7 +304,7 @@ extern LEON_Register_Map LEON_REG; LEON_REG.Interrupt_Mask &= ~(1 << (_source)); \ sparc_enable_interrupts( _level ); \ } while (0) - + #define LEON_Unmask_interrupt( _source ) \ do { \ uint32_t _level; \ @@ -325,7 +325,7 @@ extern LEON_Register_Map LEON_REG; sparc_enable_interrupts( _level ); \ (_previous) &= _mask; \ } while (0) - + #define LEON_Restore_interrupt( _source, _previous ) \ do { \ uint32_t _level; \ @@ -349,7 +349,7 @@ extern LEON_Register_Map LEON_REG; * 0 = stop counter at zero * * D2 - Counter Load - * 1 = load counter with preset value + * 1 = load counter with preset value * 0 = no function * */ @@ -373,6 +373,6 @@ extern LEON_Register_Map LEON_REG; #ifdef __cplusplus } #endif - + #endif /* !_INCLUDE_LEON_h */ /* end of include file */ diff --git a/c/src/lib/libbsp/sparc/leon/leon_open_eth/leon_open_eth.c b/c/src/lib/libbsp/sparc/leon/leon_open_eth/leon_open_eth.c index 8ec61779f5..966abbfd05 100644 --- a/c/src/lib/libbsp/sparc/leon/leon_open_eth/leon_open_eth.c +++ b/c/src/lib/libbsp/sparc/leon/leon_open_eth/leon_open_eth.c @@ -27,8 +27,8 @@ #define OPEN_ETH_VECTOR 0x1C open_eth_configuration_t leon_open_eth_configuration = { - OPEN_ETH_BASE_ADDRESS, /* base address */ - OPEN_ETH_VECTOR, /* vector number */ + OPEN_ETH_BASE_ADDRESS, /* base address */ + OPEN_ETH_VECTOR, /* vector number */ TDA_COUNT, /* number of transmit descriptors */ RDA_COUNT /* number of receive descriptors */ }; diff --git a/c/src/lib/libbsp/sparc/leon/startup/boardinit.S b/c/src/lib/libbsp/sparc/leon/startup/boardinit.S index dc918ef970..652346b9f6 100644 --- a/c/src/lib/libbsp/sparc/leon/startup/boardinit.S +++ b/c/src/lib/libbsp/sparc/leon/startup/boardinit.S @@ -20,7 +20,7 @@ __bsp_board_init: set SYM(LEON_REG), %l0 ! %l0 = base address of peripherals ld [%l0+LEON_REG_CACHECTRL_OFFSET], %l1 ! Check if LEON has been initialised - andcc %l1, 3, %g0 + andcc %l1, 3, %g0 bne 2f nop diff --git a/c/src/lib/libbsp/sparc/leon/startup/setvec.c b/c/src/lib/libbsp/sparc/leon/startup/setvec.c index fc81f43ae3..d9699ce1ca 100644 --- a/c/src/lib/libbsp/sparc/leon/startup/setvec.c +++ b/c/src/lib/libbsp/sparc/leon/startup/setvec.c @@ -21,10 +21,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to LEON implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */ if ( type ) rtems_interrupt_catch( handler, vector, &previous_isr ); - else + else _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); real_trap = SPARC_REAL_TRAP_NUMBER( vector ); if ( LEON_INT_TRAP( real_trap ) ) { - + source = LEON_TRAP_SOURCE( real_trap ); LEON_Clear_interrupt( source ); diff --git a/c/src/lib/libbsp/sparc/leon/startup/spurious.c b/c/src/lib/libbsp/sparc/leon/startup/spurious.c index 47eb8cd3c0..081d9ba3a1 100644 --- a/c/src/lib/libbsp/sparc/leon/startup/spurious.c +++ b/c/src/lib/libbsp/sparc/leon/startup/spurious.c @@ -1,11 +1,11 @@ /* * LEON Spurious Trap Handler * - * This is just enough of a trap handler to let us know what + * This is just enough of a trap handler to let us know what * the likely source of the trap was. * - * Developed as part of the port of RTEMS to the LEON implementation - * of the SPARC by On-Line Applications Research Corporation (OAR) + * Developed as part of the port of RTEMS to the LEON implementation + * of the SPARC by On-Line Applications Research Corporation (OAR) * under contract to the European Space Agency (ESA). * * COPYRIGHT (c) 1995. European Space Agency. @@ -60,33 +60,33 @@ rtems_isr bsp_spurious_handler( * First the ones defined by the basic architecture */ - case 0x00: + case 0x00: DEBUG_puts( "reset" ); break; - case 0x01: + case 0x01: DEBUG_puts( "instruction access exception" ); break; - case 0x02: + case 0x02: DEBUG_puts( "illegal instruction" ); break; - case 0x03: + case 0x03: DEBUG_puts( "privileged instruction" ); break; - case 0x04: + case 0x04: DEBUG_puts( "fp disabled" ); break; - case 0x07: + case 0x07: DEBUG_puts( "memory address not aligned" ); break; - case 0x08: + case 0x08: DEBUG_puts( "fp exception" ); break; - case 0x09: + case 0x09: strcpy(line, "data access exception at 0x " ); itos(LEON_REG.Failed_Address, &line[27]); DEBUG_puts( line ); break; - case 0x0A: + case 0x0A: DEBUG_puts( "tag overflow" ); break; @@ -160,7 +160,7 @@ void bsp_spurious_initialize() */ if (( trap == 5 || trap == 6 ) || - (( trap >= 0x11 ) && ( trap <= 0x1f )) || + (( trap >= 0x11 ) && ( trap <= 0x1f )) || (( trap >= 0x70 ) && ( trap <= 0x83 ))) continue; diff --git a/c/src/lib/libbsp/sparc/leon/timer/timer.c b/c/src/lib/libbsp/sparc/leon/timer/timer.c index 9cf535477a..22cbe0446a 100644 --- a/c/src/lib/libbsp/sparc/leon/timer/timer.c +++ b/c/src/lib/libbsp/sparc/leon/timer/timer.c @@ -10,10 +10,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to LEON implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -42,8 +42,8 @@ void Timer_initialize() Timer_driver_Is_initialized = TRUE; } - LEON_REG.Timer_Control_2 = ( - LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | + LEON_REG.Timer_Control_2 = ( + LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | LEON_REG_TIMER_COUNTER_LOAD_COUNTER ); diff --git a/c/src/lib/libbsp/sparc/shared/bspclean.c b/c/src/lib/libbsp/sparc/shared/bspclean.c index af17096332..c88025e8f6 100644 --- a/c/src/lib/libbsp/sparc/shared/bspclean.c +++ b/c/src/lib/libbsp/sparc/shared/bspclean.c @@ -10,10 +10,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ diff --git a/c/src/lib/libbsp/sparc/shared/bspstart.c b/c/src/lib/libbsp/sparc/shared/bspstart.c index c9cadc8954..2509c3fa50 100644 --- a/c/src/lib/libbsp/sparc/shared/bspstart.c +++ b/c/src/lib/libbsp/sparc/shared/bspstart.c @@ -12,10 +12,10 @@ * http://www.rtems.com/license/LICENSE. * * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space + * Research Corporation (OAR) under contract to the European Space * Agency (ESA). * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. + * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * European Space Agency. * * $Id$ @@ -29,12 +29,12 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> - + /* * The original table from the application and our copy of it with * some changes. */ - + extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; @@ -62,8 +62,8 @@ uint32_t CPU_SPARC_CLICKS_PER_TICK; * * Try to speed those tests up by speeding up the clock when in the idle task. * - * NOTE: At the current setting, 5 second delays in the tests take - * approximately 5 seconds of wall time. + * NOTE: At the current setting, 5 second delays in the tests take + * approximately 5 seconds of wall time. */ rtems_extension fast_idle_switch_hook( @@ -98,7 +98,7 @@ rtems_extension fast_idle_switch_hook( /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); extern void bsp_spurious_initialize(); @@ -148,7 +148,7 @@ void bsp_pretasking_hook(void) rc = rtems_extension_create( rtems_build_name('F', 'D', 'L', 'E'), - &fast_idle_extension, + &fast_idle_extension, &extension_id ); if (rc != RTEMS_SUCCESSFUL) @@ -195,7 +195,7 @@ void bsp_start( void ) Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; - work_space_start = + work_space_start = (unsigned char *)rdb_start - BSP_Configuration.work_space_size; if ( work_space_start <= (unsigned char *)&end ) { diff --git a/c/src/lib/libbsp/sparc/shared/gnatcommon.c b/c/src/lib/libbsp/sparc/shared/gnatcommon.c index 4a43764687..37a2d623fd 100644 --- a/c/src/lib/libbsp/sparc/shared/gnatcommon.c +++ b/c/src/lib/libbsp/sparc/shared/gnatcommon.c @@ -56,7 +56,7 @@ rtems_isr __gnat_interrupt_handler } /* - * Default signal handler with error reporting + * Default signal handler with error reporting */ void @@ -98,7 +98,7 @@ __gnat_install_handler_common (int t1, int t2) * Skip window overflow, underflow, and flush as well as software * trap 0 which we will use as a shutdown. Also avoid trap 0x70 - 0x7f * which cannot happen and where some of the space is used to pass - * paramaters to the program. 0x80 for system traps and + * paramaters to the program. 0x80 for system traps and * 0x81 - 0x83 by the remote debugging stub. * Avoid two bsp specific interrupts which normally are used * by the real-time clock and UART B. diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S index 400ae90e47..90c0fb8702 100644 --- a/c/src/lib/libbsp/sparc/shared/start.S +++ b/c/src/lib/libbsp/sparc/shared/start.S @@ -36,10 +36,10 @@ SYM(start): start: -/* +/* * The trap table has to be the first code in a boot PROM. But because * the Memory Configuration comes up thinking we only have 4K of PROM, we - * cannot have a full trap table and still have room left over to + * cannot have a full trap table and still have room left over to * reprogram the Memory Configuration register correctly. This file * uses an abbreviated trap which has every entry which might be used * before RTEMS installs its own trap table. @@ -49,8 +49,8 @@ start: PUBLIC(trap_table) SYM(trap_table): - RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap - BAD_TRAP; ! 01 instruction access + RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap + BAD_TRAP; ! 01 instruction access ! exception BAD_TRAP; ! 02 illegal instruction BAD_TRAP; ! 03 privileged instruction @@ -68,7 +68,7 @@ SYM(trap_table): BAD_TRAP; ! 0F undefined BAD_TRAP; ! 10 undefined - /* + /* * ERC32 defined traps */ @@ -115,7 +115,7 @@ SYM(trap_table): BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined -/* +/* This is a sad patch to make sure that we know where the MEC timer control register mirror is so we can stop the timers from an external debugger. It is needed because the control @@ -138,10 +138,10 @@ SYM(_ERC32_MEC_Timer_Control_Mirror): SYM(CLOCK_SPEED): .word 0x0a, 0, 0, 0 ! 7E (10 MHz default) - + BAD_TRAP; ! 7F undefined - /* + /* * Software traps * * NOTE: At the risk of being redundant... this is not a full @@ -207,7 +207,7 @@ SYM(hard_reset): and %g2, 0x7, %g2 set 1, %g3 sll %g3, %g2, %g3 - mov %g3, %wim + mov %g3, %wim or %g1, 0x20, %g1 wr %g1, %psr ! enable traps @@ -233,11 +233,11 @@ SYM(hard_reset): /* * Copy the initialized data to RAM * - * FROM: _endtext - * TO: _data_start + * FROM: _endtext + * TO: _data_start * LENGTH: (__bss_start - _data_start) bytes */ - + sethi %hi(_endtext),%g2 or %g2,%lo(_endtext),%g2 ! g2 = start of initialized data in ROM diff --git a/c/src/lib/libbsp/unix/posix/clock/clock.c b/c/src/lib/libbsp/unix/posix/clock/clock.c index ddd7487bc8..ac4e6fb211 100644 --- a/c/src/lib/libbsp/unix/posix/clock/clock.c +++ b/c/src/lib/libbsp/unix/posix/clock/clock.c @@ -105,7 +105,7 @@ rtems_device_driver Clock_control( (void) set_vector( args->buffer, Clock_driver_vector, 1 ); rtems_interrupt_enable( isrlevel ); } - + done: return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/unix/posix/console/console.c b/c/src/lib/libbsp/unix/posix/console/console.c index 3638de0029..92a3b90e63 100644 --- a/c/src/lib/libbsp/unix/posix/console/console.c +++ b/c/src/lib/libbsp/unix/posix/console/console.c @@ -41,7 +41,7 @@ rtems_device_driver console_open( { return RTEMS_SUCCESSFUL; } - + /* * Close entry point */ @@ -69,7 +69,7 @@ rtems_device_driver console_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver console_write( diff --git a/c/src/lib/libbsp/unix/posix/include/bsp.h b/c/src/lib/libbsp/unix/posix/include/bsp.h index c9e80d56ba..3b0b127ab0 100644 --- a/c/src/lib/libbsp/unix/posix/include/bsp.h +++ b/c/src/lib/libbsp/unix/posix/include/bsp.h @@ -77,11 +77,11 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ - + /* functions */ rtems_isr_entry set_vector(rtems_isr_entry, rtems_vector_number, int); diff --git a/c/src/lib/libbsp/unix/posix/shmsupp/cause_intr.c b/c/src/lib/libbsp/unix/posix/shmsupp/cause_intr.c index 09558e1c0a..b1ecec4559 100644 --- a/c/src/lib/libbsp/unix/posix/shmsupp/cause_intr.c +++ b/c/src/lib/libbsp/unix/posix/shmsupp/cause_intr.c @@ -28,6 +28,6 @@ void Shm_Cause_interrupt_unix( { Shm_Interrupt_information *intr; intr = &Shm_Interrupt_table[node]; - + _CPU_SHM_Send_interrupt( (pid_t) intr->address, intr->value ); } diff --git a/c/src/lib/libbsp/unix/posix/startup/bspstart.c b/c/src/lib/libbsp/unix/posix/startup/bspstart.c index f288ecc22d..9c573aff80 100644 --- a/c/src/lib/libbsp/unix/posix/startup/bspstart.c +++ b/c/src/lib/libbsp/unix/posix/startup/bspstart.c @@ -58,7 +58,7 @@ uint32_t CPU_CLICKS_PER_TICK; /* * Use the shared implementations of the following routines */ - + void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); @@ -83,7 +83,7 @@ void bsp_pretasking_hook(void) Heap_size = strtol(getenv("RTEMS_HEAPSPACE_SIZE"), 0, 0); else Heap_size = DEFAULT_HEAPSPACE_SIZE; - + heap_start = 0; bsp_libc_init((void *)heap_start, Heap_size, 1024 * 1024); @@ -102,9 +102,9 @@ void bsp_pretasking_hook(void) } /* - * DO NOT Use the shared bsp_postdriver_hook() implementation + * DO NOT Use the shared bsp_postdriver_hook() implementation */ - + void bsp_postdriver_hook(void) { return; @@ -125,7 +125,7 @@ void bsp_start(void) */ BSP_Configuration = Configuration; - + /* * If the node number is -1 then the application better provide * it through environment variables RTEMS_NODE. @@ -134,17 +134,17 @@ void bsp_start(void) if (BSP_Configuration.User_multiprocessing_table) { char *p; - + /* make a copy for possible editing */ BSP_Multiprocessing = *BSP_Configuration.User_multiprocessing_table; BSP_Configuration.User_multiprocessing_table = &BSP_Multiprocessing; - + if (BSP_Multiprocessing.node == -1) { p = getenv("RTEMS_NODE"); BSP_Multiprocessing.node = p ? atoi(p) : 1; } - + /* If needed provide maximum_nodes also */ if (BSP_Multiprocessing.maximum_nodes == -1) { @@ -163,22 +163,22 @@ void bsp_start(void) cpu_number = 0; if (getenv("RTEMS_WORKSPACE_SIZE")) - BSP_Configuration.work_space_size = + BSP_Configuration.work_space_size = strtol(getenv("RTEMS_WORKSPACE_SIZE"), 0, 0); else BSP_Configuration.work_space_size = DEFAULT_WORKSPACE_SIZE; - + /* * Allocate workspace memory, ensuring it is properly aligned */ - - workspace_ptr = + + workspace_ptr = (uint32_t) sbrk(BSP_Configuration.work_space_size + CPU_ALIGNMENT); workspace_ptr += CPU_ALIGNMENT - 1; workspace_ptr &= ~(CPU_ALIGNMENT - 1); BSP_Configuration.work_space_start = (void *) workspace_ptr; - + /* * Set up our hooks * Make sure libc_init is done before drivers init'd so that diff --git a/c/src/lib/libbsp/unix/posix/startup/setvec.c b/c/src/lib/libbsp/unix/posix/startup/setvec.c index 7e83ce1667..2b5b081615 100644 --- a/c/src/lib/libbsp/unix/posix/startup/setvec.c +++ b/c/src/lib/libbsp/unix/posix/startup/setvec.c @@ -40,5 +40,5 @@ set_vector( /* returns old vector */ _CPU_ISR_install_vector( vector, (proc_ptr) handler, &raw_isr_ptr ); return raw_isr_ptr; } - + } diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c index f31add1feb..660747d5b8 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c @@ -83,7 +83,7 @@ void _CPU_Context_Initialize( *((uint32_t*)sp) = 0; the_context->gpr1 = sp; - + _CPU_MSR_GET( msr_value ); if (!(new_level & CPU_MODES_INTERRUPT_MASK)) { @@ -97,7 +97,7 @@ void _CPU_Context_Initialize( /* * The FP bit of the MSR should only be enabled if this is a floating - * point task. Unfortunately, the vfprintf_r routine in newlib + * point task. Unfortunately, the vfprintf_r routine in newlib * ends up pushing a floating point register regardless of whether or * not a floating point number is being printed. Serious restructuring * of vfprintf.c will be required to avoid this behavior. At this @@ -124,14 +124,14 @@ void _CPU_Context_Initialize( #if (PPC_ABI == PPC_ABI_SVR4) { unsigned r13 = 0; asm volatile ("mr %0, 13" : "=r" ((r13))); - + the_context->gpr13 = r13; } #elif (PPC_ABI == PPC_ABI_EABI) { uint32_t r2 = 0; unsigned r13 = 0; asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); - + the_context->gpr2 = r2; the_context->gpr13 = r13; } diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S index 847091f6c9..74845982b2 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S +++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S @@ -109,7 +109,7 @@ .set FP_30, (FP_29 + FP_SIZE) .set FP_31, (FP_30 + FP_SIZE) .set FP_FPSCR, (FP_31 + FP_SIZE) - + .set IP_LINK, 0 .set IP_0, (IP_LINK + 8) .set IP_2, (IP_0 + 4) @@ -118,12 +118,12 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) @@ -133,15 +133,15 @@ .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) .set IP_END, (IP_MSR + 16) - + BEGIN_CODE /* * _CPU_Context_save_fp_context diff --git a/c/src/lib/libcpu/powerpc/old-exceptions/cpu.c b/c/src/lib/libcpu/powerpc/old-exceptions/cpu.c index 77f10642a8..11ddae9bf6 100644 --- a/c/src/lib/libcpu/powerpc/old-exceptions/cpu.c +++ b/c/src/lib/libcpu/powerpc/old-exceptions/cpu.c @@ -93,7 +93,7 @@ void _CPU_Initialize( * Store Msr Value in the IRQ info structure. */ _CPU_MSR_Value(_CPU_IRQ_info.msr_initial); - + #if (PPC_USE_SPRG) i = _CPU_IRQ_info.msr_initial; asm volatile("mtspr 0x112, %0" : "=r" (i) : "0" (i)); /* SPRG 2 */ @@ -111,7 +111,7 @@ void _CPU_Initialize( * * Complete initialization since the table is now allocated. */ - + void _CPU_Initialize_vectors(void) { int i; @@ -126,7 +126,7 @@ void _CPU_Initialize_vectors(void) _ISR_Vector_table[i] = handler; } - + /*PAGE * * _CPU_ISR_Calculate_level @@ -137,7 +137,7 @@ void _CPU_Initialize_vectors(void) * is why it was necessary to adopt a scheme which allowed the user * to specify specifically which interrupt sources were enabled. */ - + uint32_t _CPU_ISR_Calculate_level( uint32_t new_level ) @@ -189,7 +189,7 @@ void _CPU_ISR_Set_level( * * _CPU_ISR_Get_level * - * This routine gets the current interrupt level from the MSR and + * This routine gets the current interrupt level from the MSR and * converts it to an RTEMS interrupt level. */ @@ -197,9 +197,9 @@ uint32_t _CPU_ISR_Get_level( void ) { uint32_t level = 0; uint32_t msr; - + asm volatile("mfmsr %0" : "=r" ((msr))); - + msr &= PPC_MSR_DISABLE_MASK; /* @@ -246,12 +246,12 @@ void _CPU_Context_Initialize( sp = (uint32_t)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE; *((uint32_t*)sp) = 0; the_context->gpr1 = sp; - + the_context->msr = _CPU_ISR_Calculate_level( new_level ); /* * The FP bit of the MSR should only be enabled if this is a floating - * point task. Unfortunately, the vfprintf_r routine in newlib + * point task. Unfortunately, the vfprintf_r routine in newlib * ends up pushing a floating point register regardless of whether or * not a floating point number is being printed. Serious restructuring * of vfprintf.c will be required to avoid this behavior. At this @@ -266,7 +266,7 @@ void _CPU_Context_Initialize( * * + Set the exception prefix bit to point to the exception table * + Force the RI bit - * + Use the DR and IR bits + * + Use the DR and IR bits */ _CPU_MSR_Value( msr_value ); the_context->msr |= (msr_value & PPC_MSR_EP); @@ -284,7 +284,7 @@ void _CPU_Context_Initialize( #if (PPC_ABI == PPC_ABI_SVR4) { unsigned r13 = 0; asm volatile ("mr %0, 13" : "=r" ((r13))); - + the_context->pc = (uint32_t)entry_point; the_context->gpr13 = r13; } @@ -294,7 +294,7 @@ void _CPU_Context_Initialize( { uint32_t r2 = 0; unsigned r13 = 0; asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13))); - + the_context->pc = (uint32_t)entry_point; the_context->gpr2 = r2; the_context->gpr13 = r13; @@ -335,7 +335,7 @@ void _CPU_ISR_install_vector( /* * Install the wrapper so this ISR can be invoked properly. */ - if (_CPU_Table.exceptions_in_RAM) + if (_CPU_Table.exceptions_in_RAM) _CPU_ISR_install_raw_handler( vector, _ISR_Handler, &ignored ); /* @@ -344,7 +344,7 @@ void _CPU_ISR_install_vector( */ _ISR_Vector_table[ vector ] = new_handler ? (ISR_Handler_entry)new_handler : - _CPU_Table.spurious_handler ? + _CPU_Table.spurious_handler ? (ISR_Handler_entry)_CPU_Table.spurious_handler : (ISR_Handler_entry)ppc_spurious; } @@ -440,7 +440,7 @@ const CPU_Trap_table_entry _CPU_Trap_slot_template_m860 = { }; #endif /* mpc860 */ -uint32_t ppc_exception_vector_addr( +uint32_t ppc_exception_vector_addr( uint32_t vector ); @@ -453,24 +453,24 @@ uint32_t ppc_exception_vector_addr( * supported trap handler (a.k.a. interrupt service routine). * * Input Parameters: - * vector - trap table entry number plus synchronous + * vector - trap table entry number plus synchronous * vs. asynchronous information * new_handler - address of the handler to be installed * old_handler - pointer to an address of the handler previously installed * * Output Parameters: NONE * *new_handler - address of the handler previously installed - * - * NOTE: + * + * NOTE: * * This routine is based on the SPARC routine _CPU_ISR_install_raw_handler. - * Install a software trap handler as an executive interrupt handler + * Install a software trap handler as an executive interrupt handler * (which is desirable since RTEMS takes care of window and register issues), - * then the executive needs to know that the return address is to the trap + * then the executive needs to know that the return address is to the trap * rather than the instruction following the trap. * */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, @@ -506,8 +506,8 @@ void _CPU_ISR_install_raw_handler( #define LOW_BITS_MASK 0x000003FF if (slot->stwu_r1 == _CPU_Trap_slot_template.stwu_r1) { - /* - * Set u32_handler = to target address + /* + * Set u32_handler = to target address */ u32_handler = slot->b_Handler & 0x03fffffc; @@ -518,15 +518,15 @@ void _CPU_ISR_install_raw_handler( *old_handler = (proc_ptr) u32_handler; } else -/* There are two kinds of handlers for the MPC860. One is the 'standard' +/* There are two kinds of handlers for the MPC860. One is the 'standard' * one like above. The other is for the cascaded interrupts from the SIU * and CPM. Therefore we must check for the alternate one if the standard * one is not present */ #if defined(mpc860) || defined(mpc821) if (slot->stwu_r1 == _CPU_Trap_slot_template_m860.stwu_r1) { - /* - * Set u32_handler = to target address + /* + * Set u32_handler = to target address */ u32_handler = slot->b_Handler & 0x03fffffc; *old_handler = (proc_ptr) u32_handler; @@ -547,9 +547,9 @@ void _CPU_ISR_install_raw_handler( u32_handler = (uint32_t) new_handler; - /* - * IMD FIX: insert address fragment only (bits 6..29) - * therefore check for proper address range + /* + * IMD FIX: insert address fragment only (bits 6..29) + * therefore check for proper address range * and remove unwanted bits */ if ((u32_handler & 0xfc000000) == 0xfc000000) { @@ -568,7 +568,7 @@ void _CPU_ISR_install_raw_handler( _CPU_Data_Cache_Block_Flush( slot ); } -uint32_t ppc_exception_vector_addr( +uint32_t ppc_exception_vector_addr( uint32_t vector ) { @@ -632,7 +632,7 @@ uint32_t ppc_exception_vector_addr( break; #if defined(ppc403) || defined(ppc405) - + /* PPC_IRQ_CRIT is the same vector as PPC_IRQ_RESET case PPC_IRQ_CRIT: Offset = 0x00100; diff --git a/c/src/lib/libcpu/powerpc/old-exceptions/cpu_asm.S b/c/src/lib/libcpu/powerpc/old-exceptions/cpu_asm.S index 1aed87b6ac..cd35eb02af 100644 --- a/c/src/lib/libcpu/powerpc/old-exceptions/cpu_asm.S +++ b/c/src/lib/libcpu/powerpc/old-exceptions/cpu_asm.S @@ -38,7 +38,7 @@ #include <rtems/asm.h> #include <rtems/score/ppc_offs.h> - + BEGIN_CODE /* * _CPU_Context_save_fp_context @@ -365,7 +365,7 @@ PROC (_CPU_Context_switch): stw r7, GP_PC-GP_26(r3) mfmsr r8 stw r8, GP_MSR-GP_26(r3) - + #if ( PPC_USE_DATA_CACHE ) dcbt r5, r4 #endif diff --git a/c/src/lib/libcpu/powerpc/old-exceptions/irq_stub.S b/c/src/lib/libcpu/powerpc/old-exceptions/irq_stub.S index 71c6332a41..6a0dd00342 100644 --- a/c/src/lib/libcpu/powerpc/old-exceptions/irq_stub.S +++ b/c/src/lib/libcpu/powerpc/old-exceptions/irq_stub.S @@ -74,7 +74,7 @@ slwi r4,r0,2 lwz r28, Nest_level(r11) add r4, r4, r30 - + lwz r30, 0(r28) mr r3, r0 lwz r31, Stack(r11) @@ -86,14 +86,14 @@ */ /* Switch stacks, here we must prevent ALL interrupts */ #if (PPC_USE_SPRG) - mfmsr r5 - mfspr r6, sprg2 -#else + mfmsr r5 + mfspr r6, sprg2 +#else lwz r6,msr_initial(r11) lis r5,~PPC_MSR_DISABLE_MASK@ha ori r5,r5,~PPC_MSR_DISABLE_MASK@l and r6,r6,r5 - mfmsr r5 + mfmsr r5 #endif mtmsr r6 cmpwi r30, 0 @@ -154,10 +154,10 @@ LABEL (nested): /* We must re-disable the interrupts */ #if (PPC_USE_SPRG) mfspr r11, sprg3 - mfspr r0, sprg2 + mfspr r0, sprg2 #else lis r11,_CPU_IRQ_info@ha - addi r11,r11,_CPU_IRQ_info@l + addi r11,r11,_CPU_IRQ_info@l lwz r0,msr_initial(r11) lis r30,~PPC_MSR_DISABLE_MASK@ha ori r30,r30,~PPC_MSR_DISABLE_MASK@l @@ -190,8 +190,8 @@ LABEL (nested): bne LABEL (easy_exit) lwz r30, 0(r30) lwz r31, Signal(r11) - - /* + + /* * if ( _Context_Switch_necessary ) * goto switch */ @@ -199,7 +199,7 @@ LABEL (nested): lwz r28, 0(r31) li r6,0 bne LABEL (switch) - /* + /* * if ( !_ISR_Signals_to_thread_executing ) * goto easy_exit * _ISR_Signals_to_thread_executing = 0; @@ -232,14 +232,14 @@ LABEL (switch): mfspr r0, sprg2 #else lis r11,_CPU_IRQ_info@ha - addi r11,r11,_CPU_IRQ_info@l + addi r11,r11,_CPU_IRQ_info@l lwz r0,msr_initial(r11) lis r5,~PPC_MSR_DISABLE_MASK@ha ori r5,r5,~PPC_MSR_DISABLE_MASK@l and r0,r0,r5 #endif mtmsr r0 - + /* * easy_exit: * prepare to get out of interrupt diff --git a/c/src/lib/libcpu/powerpc/old-exceptions/rtems/score/ppc_offs.h b/c/src/lib/libcpu/powerpc/old-exceptions/rtems/score/ppc_offs.h index d319107aaa..05a4fddb8f 100644 --- a/c/src/lib/libcpu/powerpc/old-exceptions/rtems/score/ppc_offs.h +++ b/c/src/lib/libcpu/powerpc/old-exceptions/rtems/score/ppc_offs.h @@ -104,7 +104,7 @@ .set FP_31, (FP_30 + 4) .set FP_FPSCR, (FP_31 + 4) #endif - + .set IP_LINK, 0 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) .set IP_0, (IP_LINK + 56) @@ -117,12 +117,12 @@ .set IP_4, (IP_3 + 4) .set IP_5, (IP_4 + 4) .set IP_6, (IP_5 + 4) - + .set IP_7, (IP_6 + 4) .set IP_8, (IP_7 + 4) .set IP_9, (IP_8 + 4) .set IP_10, (IP_9 + 4) - + .set IP_11, (IP_10 + 4) .set IP_12, (IP_11 + 4) .set IP_13, (IP_12 + 4) @@ -132,15 +132,15 @@ .set IP_30, (IP_29 + 4) .set IP_31, (IP_30 + 4) .set IP_CR, (IP_31 + 4) - + .set IP_CTR, (IP_CR + 4) .set IP_XER, (IP_CTR + 4) .set IP_LR, (IP_XER + 4) .set IP_PC, (IP_LR + 4) - + .set IP_MSR, (IP_PC + 4) .set IP_END, (IP_MSR + 16) - + /* _CPU_IRQ_info offsets */ /* These must be in this order */ @@ -162,5 +162,5 @@ #endif .set Signal, Switch_necessary + 4 .set msr_initial, Signal + 4 - + #endif /* __PPC_OFFS_H */ |