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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 10:43:04 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 10:43:04 +0000
commit6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch)
treeaf53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/powerpc/score603e/console
parent2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2
Remove stray white spaces.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/score603e/console')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/85c30.c44
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/85c30.h6
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/console.c62
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h18
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c98
5 files changed, 114 insertions, 114 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
index ed5592e6b1..0bad370f35 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
@@ -1,5 +1,5 @@
/*
- * This file contains the console driver chip level routines for the
+ * This file contains the console driver chip level routines for the
* z85c30 chip.
*
* Currently only polled mode is supported.
@@ -11,7 +11,7 @@
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
- * $Id:
+ * $Id:
*/
#include <rtems.h>
@@ -42,19 +42,19 @@ typedef struct {
} char_size_info;
static const char_size_info Char_size_85c30[] = {
- { Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF },
- { Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F },
- { Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F },
+ { Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF },
+ { Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F },
+ { Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F },
{ Z8530_READ_CHARACTER_BITS_5, Z8530_WRITE_CHARACTER_BITS_5, 0x1F }
};
-static const unsigned char Clock_speed_85c30[] = {
+static const unsigned char Clock_speed_85c30[] = {
Z8530_x1_CLOCK, Z8530_x16_CLOCK, Z8530_x32_CLOCK, Z8530_x64_CLOCK };
-static const unsigned char Stop_bit_85c30[] = {
+static const unsigned char Stop_bit_85c30[] = {
Z8530_STOP_BITS_1, Z8530_STOP_BITS_1_AND_A_HALF, Z8530_STOP_BITS_2 };
-static const unsigned char Parity_85c30[] = {
+static const unsigned char Parity_85c30[] = {
Z8530_PARITY_NONE, Z8530_PARITY_ODD, Z8530_PARITY_EVEN };
@@ -64,19 +64,19 @@ static const unsigned char Parity_85c30[] = {
*
* Read a Z85c30 register
*/
-static unsigned char Read_85c30_register(
+static unsigned char Read_85c30_register(
volatile unsigned char *csr, /* IN */
unsigned char register_number /* IN */
)
{
unsigned char Data;
-
- *csr = register_number;
+
+ *csr = register_number;
rtems_bsp_delay_in_bus_cycles( 40 );
Data = *csr;
-
+
rtems_bsp_delay_in_bus_cycles( 40 );
return Data;
@@ -118,7 +118,7 @@ void Reset_85c30_chip(
Write_85c30_register( ctrl_0, 0x09, 0x80 );
Write_85c30_register( ctrl_1, 0x09, 0x40 );
}
-
+
/* PAGE
*
@@ -138,7 +138,7 @@ void initialize_85c30_port(
Setup = Port->Protocol;
ctrl = Port->ctrl;
- baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency,
+ baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency,
Port->Chip->clock_x, Setup->baud_rate );
/*
@@ -244,13 +244,13 @@ void initialize_85c30_port(
value = 0x8a;
value = value | Char_size_85c30[ Setup->write_char_bits ].write_setup;
Write_85c30_register( ctrl, 0x05, value );
-
+
/*
* Reset Tx UNDERRUN/EOM LATCH and ERROR
- * via register 0
+ * via register 0
*/
Write_85c30_register( ctrl, 0x00, 0xf0 );
-
+
#if CONSOLE_USE_INTERRUPTS
/*
* Set Write Register 1 to interrupt on Rx characters or special condition.
@@ -311,7 +311,7 @@ void outbyte_polled_85c30(
{
unsigned char z8530_status;
uint32_t isrlevel;
-
+
rtems_interrupt_disable( isrlevel );
/*
@@ -324,7 +324,7 @@ void outbyte_polled_85c30(
/*
* Write the character.
*/
- Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch );
+ Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch );
rtems_interrupt_enable( isrlevel );
}
@@ -336,7 +336,7 @@ void outbyte_polled_85c30(
* This routine polls for a character.
*/
-int inbyte_nonblocking_85c30(
+int inbyte_nonblocking_85c30(
const Port_85C30_info *Port
)
{
@@ -352,7 +352,7 @@ int inbyte_nonblocking_85c30(
z8530_status = Read_85c30_register( csr, STATUS_REGISTER );
if ( !Z8530_Status_Is_RX_character_available( z8530_status ) )
return -1;
-
+
/*
* Return the character read.
*/
@@ -396,7 +396,7 @@ rtems_isr ISR_85c30_Async(
if ( Z8530_Status_Is_RX_character_available( status ) ) {
data = Read_85c30_register( Port->ctrl, DATA_REGISTER );
data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value;
-
+
rtems_termios_enqueue_raw_characters( Port->Protocol->console_termios_data,
&data, 1 );
did_something = TRUE;
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/85c30.h b/c/src/lib/libbsp/powerpc/score603e/console/85c30.h
index 4a1e482a06..121d641994 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/85c30.h
+++ b/c/src/lib/libbsp/powerpc/score603e/console/85c30.h
@@ -1,6 +1,6 @@
/* 85c30.h
*
- * This include file contains z85c30 chip information.
+ * This include file contains z85c30 chip information.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
@@ -9,7 +9,7 @@
* the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
- * $Id:
+ * $Id:
*/
#ifndef __85c30_H
@@ -18,7 +18,7 @@
/*
* Clock Speed Definations
*/
-
+
#define Z8530_x1_CLOCK 0x00
#define Z8530_x16_CLOCK 0x40
#define Z8530_x32_CLOCK 0x80
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/console.c b/c/src/lib/libbsp/powerpc/score603e/console/console.c
index 5391eeca47..78cf33c9e0 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/console.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/console.c
@@ -24,8 +24,8 @@
#if (1)
/*
- * The Port Used for the Console interface is based upon which
- * debugger is being used. The SDS debugger uses a binary
+ * The Port Used for the Console interface is based upon which
+ * debugger is being used. The SDS debugger uses a binary
* interface on port 0 as part of the debugger. Thus port 0 can
* not be used as the console port for the SDS debugger.
*/
@@ -58,7 +58,7 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
*
* Console Device Driver Entry Points
*/
-
+
/* PAGE
*
* DEBUG_puts
@@ -89,7 +89,7 @@ void DEBUG_puts(
/* should disable interrupts here */
- for ( s = string ; *s ; s++ )
+ for ( s = string ; *s ; s++ )
outbyte_polled_85c30( csr, *s );
outbyte_polled_85c30( csr, '\r' );
@@ -100,28 +100,28 @@ void DEBUG_puts(
/* PAGE
*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* Console Termios polling input entry point.
*/
-int console_inbyte_nonblocking(
- int minor
+int console_inbyte_nonblocking(
+ int minor
)
{
int port = minor;
- /*
- * verify port Number
+ /*
+ * verify port Number
*/
assert ( port < NUM_Z85C30_PORTS );
-
+
/*
* return a character from the 85c30 port.
*/
return inbyte_nonblocking_85c30( &Ports_85C30[ port ] );
}
-
+
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -130,7 +130,7 @@ rtems_device_driver console_close(
{
return rtems_termios_close (arg);
}
-
+
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -139,7 +139,7 @@ rtems_device_driver console_read(
{
return rtems_termios_read (arg);
}
-
+
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -148,7 +148,7 @@ rtems_device_driver console_write(
{
return rtems_termios_write (arg);
}
-
+
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -171,7 +171,7 @@ rtems_isr console_isr(
)
{
int i;
-
+
for (i=0; i < NUM_Z85C30_PORTS; i++){
ISR_85c30_Async( &Ports_85C30[i] );
@@ -180,7 +180,7 @@ rtems_isr console_isr(
ISR_85c30_Async( &Ports_85C30[i] );
}
#endif
- }
+ }
}
void console_exit()
@@ -190,12 +190,12 @@ void console_exit()
uint32_t ch;
for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) {
-
+
buffer = &( Ports_85C30[i].Protocol->TX_Buffer);
while ( !Ring_buffer_Is_empty( buffer ) ) {
Ring_buffer_Remove_character( buffer, ch );
- outbyte_polled_85c30( Ports_85C30[i].ctrl, ch );
+ outbyte_polled_85c30( Ports_85C30[i].ctrl, ch );
}
}
}
@@ -205,7 +205,7 @@ void console_initialize_interrupts( void )
volatile Ring_buffer_t *buffer;
Console_Protocol *protocol;
int i;
-
+
for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) {
protocol = Ports_85C30[i].Protocol;
@@ -217,15 +217,15 @@ void console_initialize_interrupts( void )
protocol->Is_TX_active = FALSE;
}
- /*
+ /*
* Connect each vector to the interupt service routine.
*/
for (i=0; i < NUM_Z85C30_CHIPS; i++)
set_vector( console_isr, Chips_85C30[i].vector, 1 );
-
+
atexit( console_exit );
-
+
}
void console_outbyte_interrupts(
const Port_85C30_info *Port,
@@ -282,7 +282,7 @@ rtems_device_driver console_initialize(
* Force to perform a hardware reset w/o
* Master interrupt enable via register 9
*/
-
+
for (port=0; port<NUM_Z85C30_PORTS; port++){
p0 = port;
port++;
@@ -290,7 +290,7 @@ rtems_device_driver console_initialize(
Reset_85c30_chip( Ports_85C30[p0].ctrl, Ports_85C30[p1].ctrl );
}
#else
- /* TEMP - To see if this makes a diff with the new ports.
+ /* TEMP - To see if this makes a diff with the new ports.
* Never reset chip 1 when using the chip as a monitor
*/
for (port=2; port<NUM_Z85C30_PORTS; port++){
@@ -301,7 +301,7 @@ rtems_device_driver console_initialize(
}
#endif
- /*
+ /*
* Initialize each port.
* Note: the ports are numbered such that 0,1 are on the first chip
* 2,3 are on the second ....
@@ -327,16 +327,16 @@ rtems_device_driver console_initialize(
*
*/
int console_write_support(
- int minor,
- const char *buf,
+ int minor,
+ const char *buf,
int len)
{
int nwrite = 0;
volatile uint8_t *csr;
int port = minor;
- /*
- * verify port Number
+ /*
+ * verify port Number
*/
assert ( port < NUM_Z85C30_PORTS );
@@ -453,7 +453,7 @@ void console_outbyte_interrupts(
uint32_t isrlevel;
protocol = Port->Protocol;
-
+
/*
* If this is the first character then we need to prime the pump
*/
@@ -469,7 +469,7 @@ void console_outbyte_interrupts(
}
while ( Ring_buffer_Is_full( &protocol->TX_Buffer ) );
-
+
Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
}
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h b/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
index 65a7100676..7e20003b41 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
+++ b/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
@@ -9,7 +9,7 @@
* the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
- * $Id:
+ * $Id:
*/
#ifndef __CONSOLEBSP_H
@@ -25,12 +25,12 @@ extern "C" {
/*
*
- * Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1
- * being on the first chip, and ports 2 and 3 being on the
+ * Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1
+ * being on the first chip, and ports 2 and 3 being on the
* second chip...
*/
-
+
/*
* Z85c30 configuration informaiton.
*/
@@ -60,7 +60,7 @@ typedef enum {
typedef enum {
CONSOLE_PARITY_NONE,
CONSOLE_PARITY_ODD,
- CONSOLE_PARITY_EVEN,
+ CONSOLE_PARITY_EVEN,
} CONSOLE_Parity;
typedef enum {
@@ -72,7 +72,7 @@ typedef enum {
typedef struct {
uint32_t baud_rate; /* baud rate value */
- CONSOLE_Stop_bits stop_bits;
+ CONSOLE_Stop_bits stop_bits;
CONSOLE_Parity parity;
CONSOLE_Character_bits read_char_bits;
CONSOLE_Character_bits write_char_bits;
@@ -83,7 +83,7 @@ typedef struct {
void *console_termios_data;
#endif
-} Console_Protocol;
+} Console_Protocol;
/*
@@ -112,7 +112,7 @@ typedef struct {
} Port_85C30_info;
/*
- * Console port chip configuration tables.
+ * Console port chip configuration tables.
*/
extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ];
extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ];
@@ -130,7 +130,7 @@ void outbyte_polled_85c30(
char ch
);
-int inbyte_nonblocking_85c30(
+int inbyte_nonblocking_85c30(
const Port_85C30_info *Port
);
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c b/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c
index a7b5e8dfea..2212260e0c 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c
@@ -1,5 +1,5 @@
/*
- * This file contains the table for the z85c30 port
+ * This file contains the table for the z85c30 port
* used by the console driver.
*
* COPYRIGHT (c) 1989-1997.
@@ -9,7 +9,7 @@
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
- * $Id:
+ * $Id:
*/
#include "consolebsp.h"
@@ -17,9 +17,9 @@
#define CONSOLE_DEFAULT_BAUD_RATE 9600
#define CONSOLE_DEFAULT_BAUD_CONSTANT Score603e_Z8530_Chip0_Baud(9600)
-
-#define CONSOLE_DEFAULT_STOP_BITS CONSOLE_STOP_BITS_1
-#define CONSOLE_DEFAULT_PARITY CONSOLE_PARITY_NONE
+
+#define CONSOLE_DEFAULT_STOP_BITS CONSOLE_STOP_BITS_1
+#define CONSOLE_DEFAULT_PARITY CONSOLE_PARITY_NONE
#define CONSOLE_DEFAULT_READ_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8
#define CONSOLE_DEFAULT_WRITE_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8
#define CONSOLE_DEFAULT_CONSOLE_CLOCK CONSOLE_x16_CLOCK
@@ -34,7 +34,7 @@
/*
* Tables of information necessary to use the console 85c30 routines.
*/
-Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] =
+Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] =
{
DEFAULT_PROTOCOL,
DEFAULT_PROTOCOL,
@@ -64,8 +64,8 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =
SCORE603E_85C30_0_CLOCK,
SCORE603E_85C30_0_CLOCK_X,
CONSOLE_DEFAULT_CONSOLE_CLOCK
- },
- {
+ },
+ {
SCORE603E_85C30_1_IRQ,
SCORE603E_85C30_1_CLOCK,
SCORE603E_85C30_1_CLOCK_X,
@@ -73,25 +73,25 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =
},
#if (HAS_PMC_PSC8)
- {
+ {
SCORE603E_85C30_2_IRQ,
SCORE603E_85C30_2_CLOCK,
SCORE603E_85C30_2_CLOCK_X,
CONSOLE_DEFAULT_CONSOLE_CLOCK
},
- {
+ {
SCORE603E_85C30_3_IRQ,
SCORE603E_85C30_3_CLOCK,
SCORE603E_85C30_3_CLOCK_X,
CONSOLE_DEFAULT_CONSOLE_CLOCK
},
- {
+ {
SCORE603E_85C30_4_IRQ,
SCORE603E_85C30_4_CLOCK,
SCORE603E_85C30_4_CLOCK_X,
CONSOLE_DEFAULT_CONSOLE_CLOCK
},
- {
+ {
SCORE603E_85C30_5_IRQ,
SCORE603E_85C30_5_CLOCK,
SCORE603E_85C30_5_CLOCK_X,
@@ -106,91 +106,91 @@ Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =
* See consolebsp.h for the Port_85C30_info structure defination.
*/
const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ] = {
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_0,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_0,
(volatile unsigned char *) SCORE603E_85C30_DATA_0,
0x00,
&Protocols_85c30[0],
- &Chips_85C30[0],
+ &Chips_85C30[0],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_1,
- (volatile unsigned char *) SCORE603E_85C30_DATA_1,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_1,
+ (volatile unsigned char *) SCORE603E_85C30_DATA_1,
0x01,
&Protocols_85c30[1],
- &Chips_85C30[0],
+ &Chips_85C30[0],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_2,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_2,
(volatile unsigned char *) SCORE603E_85C30_DATA_2,
0x02,
&Protocols_85c30[2],
- &Chips_85C30[1],
+ &Chips_85C30[1],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_3,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_3,
(volatile unsigned char *) SCORE603E_85C30_DATA_3,
0x03,
&Protocols_85c30[3],
- &Chips_85C30[1],
+ &Chips_85C30[1],
},
#if (HAS_PMC_PSC8)
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_4,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_4,
(volatile unsigned char *) SCORE603E_85C30_DATA_4,
0x04,
&Protocols_85c30[4],
- &Chips_85C30[2],
+ &Chips_85C30[2],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_5,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_5,
(volatile unsigned char *) SCORE603E_85C30_DATA_5,
0x05,
&Protocols_85c30[5],
- &Chips_85C30[2],
+ &Chips_85C30[2],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_6,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_6,
(volatile unsigned char *) SCORE603E_85C30_DATA_6,
0x06,
&Protocols_85c30[6],
- &Chips_85C30[3],
+ &Chips_85C30[3],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_7,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_7,
(volatile unsigned char *) SCORE603E_85C30_DATA_7,
0x07,
&Protocols_85c30[7],
- &Chips_85C30[3],
+ &Chips_85C30[3],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_8,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_8,
(volatile unsigned char *) SCORE603E_85C30_DATA_8,
0x08,
&Protocols_85c30[8],
- &Chips_85C30[4],
+ &Chips_85C30[4],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_9,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_9,
(volatile unsigned char *) SCORE603E_85C30_DATA_9,
0x09,
&Protocols_85c30[9],
- &Chips_85C30[4],
+ &Chips_85C30[4],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_10,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_10,
(volatile unsigned char *) SCORE603E_85C30_DATA_10,
0x0a,
&Protocols_85c30[10],
- &Chips_85C30[5],
+ &Chips_85C30[5],
},
- {
- (volatile unsigned char *) SCORE603E_85C30_CTRL_11,
+ {
+ (volatile unsigned char *) SCORE603E_85C30_CTRL_11,
(volatile unsigned char *) SCORE603E_85C30_DATA_11,
0x0b,
&Protocols_85c30[11],
- &Chips_85C30[5],
+ &Chips_85C30[5],
},
#endif
};