Remove stray white spaces.

4 files changed, 87 insertions, 87 deletions

diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
index 1b8f8c2da1..2a5afa4569 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
@@ -10,7 +10,7 @@
  *
  *  $Id$
  */
-  
+
 #include <rtems/system.h>
 #include <bsp.h>
 #include <bsp/irq.h>
@@ -66,9 +66,9 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
 
 
 /*
- * masks used to mask off the interrupts. For exmaple, for ILVL2, the  
- * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7    
- * and ILVL7.                                                          
+ * masks used to mask off the interrupts. For exmaple, for ILVL2, the
+ * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7
+ * and ILVL7.
  *
  */
 const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] =
@@ -132,10 +132,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine)
 int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine)
 {
   int cpm_irq_index;
-  
+
   if (!is_cpm_irq(irqLine))
     return 1;
-  
+
   cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
   ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_irq_index);
 
@@ -145,10 +145,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine)
 int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine)
 {
   int cpm_irq_index;
-  
+
   if (!is_cpm_irq(irqLine))
     return 0;
-  
+
   cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET);
   return (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr & (1 << cpm_irq_index));
 }
@@ -156,7 +156,7 @@ int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine)
 int BSP_irq_enable_at_siu(const rtems_irq_symbolic_name irqLine)
 {
   int siu_irq_index;
-  
+
   if (!is_siu_irq(irqLine))
     return 1;
 
@@ -173,7 +173,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_symbolic_name irqLine)
 
   if (!is_siu_irq(irqLine))
     return 1;
-  
+
   siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET);
   ppc_cached_irq_mask &= ~(1 << (31-siu_irq_index));
   ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
@@ -199,7 +199,7 @@ int BSP_irq_enabled_at_siu     	(const rtems_irq_symbolic_name irqLine)
 int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 {
     unsigned int level;
-  
+
     if (!isValidInterrupt(irq->name)) {
       return 0;
     }
@@ -220,14 +220,14 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      * store the data provided by user
      */
     rtems_hdl_tbl[irq->name] = *irq;
-    
+
     if (is_cpm_irq(irq->name)) {
       /*
        * Enable interrupt at PIC level
        */
       BSP_irq_enable_at_cpm (irq->name);
     }
-    
+
     if (is_siu_irq(irq->name)) {
       /*
        * Enable interrupt at SIU level
@@ -245,7 +245,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      * Enable interrupt on device
      */
     irq->on(irq);
-    
+
     _CPU_ISR_Enable(level);
 
     return 1;
@@ -264,7 +264,7 @@ int BSP_get_current_rtems_irq_handler	(rtems_irq_connect_data* irq)
 int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 {
     unsigned int level;
-  
+
     if (!isValidInterrupt(irq->name)) {
       return 0;
     }
@@ -296,7 +296,7 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
       /*
        * disable exception at processor level
        */
-    }    
+    }
 
     /*
      * Disable interrupt on device
@@ -412,7 +412,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
     _CPU_MSR_GET(msr);
     new_msr = msr | MSR_EE;
     _CPU_MSR_SET(new_msr);
-    
+
     rtems_hdl_tbl[BSP_DECREMENTER].hdl();
 
     _CPU_MSR_SET(msr);
@@ -423,12 +423,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
    */
 #ifdef DISPATCH_HANDLER_STAT
   loopCounter = 0;
-#endif  
+#endif
   while (1) {
     if ((ppc_cached_irq_mask & ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend) == 0) {
 #ifdef DISPATCH_HANDLER_STAT
       if (loopCounter >  maxLoop) maxLoop = loopCounter;
-#endif      
+#endif
       break;
     }
     irq = (((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26);
@@ -443,12 +443,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
      * Acknowledge current interrupt. This has no effect on internal level interrupt.
      */
     ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = (1 << (31 - irq));
-    
+
     if (cpmIntr)  {
       /*
        * We will reenable the SIU CPM interrupt to allow nesting of CPM interrupt.
        * We must before acknowledege the current irq at CPM level to avoid trigerring
-       * the interrupt again. 
+       * the interrupt again.
        */
       /*
        * Acknowledge and get the vector.
@@ -468,7 +468,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
     _CPU_MSR_GET(msr);
     new_msr = msr | MSR_EE;
     _CPU_MSR_SET(new_msr);
-    
+
     rtems_hdl_tbl[irq].hdl();
 
     _CPU_MSR_SET(msr);
@@ -481,12 +481,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
     ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
 #ifdef DISPATCH_HANDLER_STAT
     ++ loopCounter;
-#endif    
+#endif
   }
 }
 
-    
-  
+
+
 void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
 {
   /*
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h
index a3b2f71f0c..49e720a6b5 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.h
@@ -69,7 +69,7 @@ typedef enum {
      * Some SIU IRQ symbolic name definition. Please note that
      * INT IRQ are defined but a single one will be used to
      * redirect all CPM interrupt.
-     */	       
+     */
   BSP_SIU_EXT_IRQ_0      	= 	0,
   BSP_SIU_INT_IRQ_0         	= 	1,
 
@@ -78,19 +78,19 @@ typedef enum {
 
   BSP_SIU_EXT_IRQ_2      	= 	4,
   BSP_SIU_INT_IRQ_2         	= 	5,
-  
+
   BSP_SIU_EXT_IRQ_3      	= 	6,
   BSP_SIU_INT_IRQ_3         	= 	7,
-  
+
   BSP_SIU_EXT_IRQ_4      	= 	8,
   BSP_SIU_INT_IRQ_4         	= 	9,
 
   BSP_SIU_EXT_IRQ_5      	= 	10,
   BSP_SIU_INT_IRQ_5         	= 	11,
-  
+
   BSP_SIU_EXT_IRQ_6      	= 	12,
   BSP_SIU_INT_IRQ_6         	= 	13,
-  
+
   BSP_SIU_EXT_IRQ_7      	= 	14,
   BSP_SIU_INT_IRQ_7         	= 	15,
   /*
@@ -110,18 +110,18 @@ typedef enum {
   BSP_CPM_IRQ_SPI		=	BSP_CPM_IRQ_LOWEST_OFFSET + 5,
   BSP_CPM_IRQ_PARALLEL_IO_PC6	=	BSP_CPM_IRQ_LOWEST_OFFSET + 6,
   BSP_CPM_IRQ_TIMER_4		=	BSP_CPM_IRQ_LOWEST_OFFSET + 7,
-  
+
   BSP_CPM_IRQ_PARALLEL_IO_PC7	=	BSP_CPM_IRQ_LOWEST_OFFSET + 9,
   BSP_CPM_IRQ_PARALLEL_IO_PC8	=	BSP_CPM_IRQ_LOWEST_OFFSET + 10,
   BSP_CPM_IRQ_PARALLEL_IO_PC9	=	BSP_CPM_IRQ_LOWEST_OFFSET + 11,
   BSP_CPM_IRQ_TIMER_3		=	BSP_CPM_IRQ_LOWEST_OFFSET + 12,
-  
+
   BSP_CPM_IRQ_PARALLEL_IO_PC10	=	BSP_CPM_IRQ_LOWEST_OFFSET + 14,
   BSP_CPM_IRQ_PARALLEL_IO_PC11	=	BSP_CPM_IRQ_LOWEST_OFFSET + 15,
   BSP_CPM_I2C			=	BSP_CPM_IRQ_LOWEST_OFFSET + 16,
   BSP_CPM_RISC_TIMER_TABLE	=	BSP_CPM_IRQ_LOWEST_OFFSET + 17,
   BSP_CPM_IRQ_TIMER_2		=	BSP_CPM_IRQ_LOWEST_OFFSET + 18,
-  
+
   BSP_CPM_IDMA2			=	BSP_CPM_IRQ_LOWEST_OFFSET + 20,
   BSP_CPM_IDMA1			=	BSP_CPM_IRQ_LOWEST_OFFSET + 21,
   BSP_CPM_SDMA_CHANNEL_BUS_ERR	=	BSP_CPM_IRQ_LOWEST_OFFSET + 22,
@@ -138,10 +138,10 @@ typedef enum {
      * Some Processor exception handled as rtems IRQ symbolic name definition
      */
   BSP_DECREMENTER		=	BSP_PROCESSOR_IRQ_LOWEST_OFFSET
-  
+
 }rtems_irq_symbolic_name;
 
-#define CPM_INTERRUPT		    
+#define CPM_INTERRUPT
 
 
 /*
@@ -171,9 +171,9 @@ typedef struct __rtems_irq_connect_data__ {
    * It is usually called immediately AFTER connecting the interrupt handler.
    * RTEMS may well need such a function when restoring normal interrupt
    * processing after a debug session.
-   * 
+   *
    */
-    rtems_irq_enable		on;	
+    rtems_irq_enable		on;
   /*
    * function for disabling interrupts at device level (ONLY!).
    * The code will disable it at SIU and CPM level. RATIONALE : anyway
@@ -209,7 +209,7 @@ typedef struct {
   rtems_irq_symbolic_name	irqBase;
   /*
    * software priorities associated with interrupts.
-   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that  
+   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
    * interrupt handler hdl connected for interrupt name i
    * will  not be interrupted by the handler connected for interrupt j
    * The interrupt source  will be physically masked at i8259 level.
@@ -285,7 +285,7 @@ int BSP_irq_enabled_at_siu     	(const rtems_irq_symbolic_name irqLine);
  *	4) perform rescheduling when necessary,
  *	5) restore the C scratch registers...
  *	6) restore initial execution flow
- * 
+ *
  */
 int BSP_install_rtems_irq_handler   	(const rtems_irq_connect_data*);
 /*
@@ -328,7 +328,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
  * (Re) get info on current RTEMS interrupt management.
  */
 int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
-  
+
 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
index 1d3e1d2fcf..fa877aafaf 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
@@ -1,5 +1,5 @@
 /*
- *  This file contains the assembly code for the PowerPC 
+ *  This file contains the assembly code for the PowerPC
  *  IRQ veneers for RTEMS.
  *
  *  The license and distribution terms for this file may be
@@ -15,22 +15,22 @@
  *
  * $Id$
  */
-  	
+
 #include <rtems/asm.h>
 #include <rtems/score/cpu.h>
 #include <bsp/vectors.h>
 #include <libcpu/raw_exception.h>
-	
+
 
 #define SYNC \
 	sync; \
 	isync
-	
+
 	.text
-	.p2align 5	
-		
+	.p2align 5
+
 	PUBLIC_VAR(decrementer_exception_vector_prolog_code)
-	
+
 SYM (decrementer_exception_vector_prolog_code):
 	/*
 	 * let room for exception frame
@@ -38,32 +38,32 @@ SYM (decrementer_exception_vector_prolog_code):
 	stwu    r1, - (EXCEPTION_FRAME_END)(r1)
 	stw	r4, GPR4_OFFSET(r1)
 #ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	/* 
+	/*
 	 * save link register
 	 */
 	mflr	r4
 	stw	r4,  EXC_LR_OFFSET(r1)
-	/* 
+	/*
 	 * make link register contain shared_raw_irq_code_entry
 	 * address
 	 */
 	lis	r4,shared_raw_irq_code_entry@h
 	ori	r4,r4,shared_raw_irq_code_entry@l
 	mtlr	r4
-	
+
 	li	r4, ASM_DEC_VECTOR
 	blr
 #else
 	li	r4, ASM_DEC_VECTOR
 	ba	shared_raw_irq_code_entry
-#endif			
+#endif
 
 	PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
-	
+
 	decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
 
 	PUBLIC_VAR(external_exception_vector_prolog_code)
-	
+
 SYM (external_exception_vector_prolog_code):
 	/*
 	 * let room for exception frame
@@ -71,12 +71,12 @@ SYM (external_exception_vector_prolog_code):
 	stwu    r1, - (EXCEPTION_FRAME_END)(r1)
 	stw	r4, GPR4_OFFSET(r1)
 #ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	/* 
+	/*
 	 * save link register
 	 */
 	mflr	r4
 	stw	r4,  EXC_LR_OFFSET(r1)
-	/* 
+	/*
 	 * make link register contain shared_raw_irq_code_entry
 	 * address
 	 */
@@ -90,14 +90,14 @@ SYM (external_exception_vector_prolog_code):
 	li	r4, ASM_EXT_VECTOR
 	ba	shared_raw_irq_code_entry
 #endif
-	
+
 	PUBLIC_VAR (external_exception_vector_prolog_code_size)
-	
+
 	external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
 
 	PUBLIC_VAR(shared_raw_irq_code_entry)
 	PUBLIC_VAR(C_dispatch_irq_handler)
-	
+
 	.p2align 5
 SYM (shared_raw_irq_code_entry):
 	/*
@@ -108,17 +108,17 @@ SYM (shared_raw_irq_code_entry):
 	 *	R4  :	vector number
 	 */
 	/*
-	 * Save SRR0/SRR1 As soon As possible as it is the minimal needed 
+	 * Save SRR0/SRR1 As soon As possible as it is the minimal needed
 	 * to reenable exception processing
 	 */
 	stw	r0, GPR0_OFFSET(r1)
 	stw	r2, GPR2_OFFSET(r1)
 	stw	r3, GPR3_OFFSET(r1)
-	
+
 	mfsrr0  r0
 	mfsrr1  r2
 	mfmsr	r3
-	
+
 	stw	r0, SRR0_FRAME_OFFSET(r1)
 	stw	r2, SRR1_FRAME_OFFSET(r1)
 	/*
@@ -157,14 +157,14 @@ SYM (shared_raw_irq_code_entry):
 #ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
 	mflr	r8
 #endif
-		
+
 	stw	r5,  EXC_CR_OFFSET(r1)
 	stw	r6,  EXC_CTR_OFFSET(r1)
 	stw	r7,  EXC_XER_OFFSET(r1)
-#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE	
+#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
 	stw	r8,  EXC_LR_OFFSET(r1)
 #endif
-		
+
 	/*
 	 * Add some non volatile registers to store information
 	 * that will be used when returning from C handler
@@ -197,9 +197,9 @@ SYM (shared_raw_irq_code_entry):
 	cmpwi	r2,0
 	bne	nested
 	mfspr	r1, SPRG1
-	
-nested:	
-	/* 
+
+nested:
+	/*
 	 * Start Incrementing nesting level in R2
 	 */
 	addi	r2,r2,1
@@ -216,7 +216,7 @@ nested:
 	/* store new nesting level in _ISR_Nest_level */
 	stw		r2, _ISR_Nest_level@l(r7)
 #endif
-	
+
 	addi	r6, r6, 1
 	mfmsr	r5
 	/*
@@ -226,7 +226,7 @@ nested:
 	/*
 	 * We are now running on the interrupt stack. External and decrementer
 	 * exceptions are still disabled. I see no purpose trying to optimize
-	 * further assembler code. 
+	 * further assembler code.
 	 */
 	/*
 	 * Call C exception handler for decrementer Interrupt frame is passed just
@@ -235,7 +235,7 @@ nested:
 	addi	r3, r14, 0x8
 	bl	C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */
 	/*
-	 * start decrementing nesting level. Note : do not test result against 0 
+	 * start decrementing nesting level. Note : do not test result against 0
 	 * value as an easy exit condition because if interrupt nesting level > 1
 	 * then _Thread_Dispatch_disable_level > 1
 	 */
@@ -259,7 +259,7 @@ nested:
 	stw	r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
 	cmpwi	r3, 0
 	/*
-	 * switch back to original stack (done here just optimize registers 
+	 * switch back to original stack (done here just optimize registers
 	 * contention. Could have been done before...)
 	 */
 	addi	r1, r14, 0
@@ -267,14 +267,14 @@ nested:
 	/*
 	 * Here we are running again on the thread system stack.
 	 * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0.
-	 * Interrupt are still disabled. Time to check if scheduler request to 
+	 * Interrupt are still disabled. Time to check if scheduler request to
 	 * do something with the current thread...
 	 */
 	addis	r4, 0, _Context_Switch_necessary@ha
 	lwz	r5, _Context_Switch_necessary@l(r4)
 	cmpwi	r5, 0
 	bne	switch
-	
+
 	addis	r6, 0, _ISR_Signals_to_thread_executing@ha
 	lwz	r7, _ISR_Signals_to_thread_executing@l(r6)
 	cmpwi	r7, 0
@@ -306,12 +306,12 @@ nested:
 	lwz	r30,  EXC_XER_OFFSET(r1)
 	lwz	r29,  EXC_CR_OFFSET(r1)
 	lwz	r28,  EXC_LR_OFFSET(r1)
-	
+
 	mtctr	r31
 	mtxer	r30
 	mtcr	r29
 	mtlr	r28
-	
+
 	lmw	r4, GPR4_OFFSET(r1)
 	lwz	r2, GPR2_OFFSET(r1)
 	lwz	r0, GPR0_OFFSET(r1)
@@ -326,21 +326,21 @@ nested:
 	/*
 	 * Restore rfi related settings
 	 */
-		 
+
 	lwz	r3, SRR1_FRAME_OFFSET(r1)
 	mtsrr1	r3
 	lwz	r3, SRR0_FRAME_OFFSET(r1)
 	mtsrr0	r3
-	
+
 	lwz	r3, GPR3_OFFSET(r1)
 	addi 	r1,r1, EXCEPTION_FRAME_END
 	SYNC
 	rfi
-	
+
 switch:
 	bl	SYM (_Thread_Dispatch)
-	
-easy_exit:	
+
+easy_exit:
 	/*
 	 * start restoring interrupt frame
 	 */
@@ -348,7 +348,7 @@ easy_exit:
 	lwz	r4,  EXC_XER_OFFSET(r1)
 	lwz	r5,  EXC_CR_OFFSET(r1)
 	lwz	r6,  EXC_LR_OFFSET(r1)
-	
+
 	mtctr	r3
 	mtxer	r4
 	mtcr	r5
@@ -377,7 +377,7 @@ easy_exit:
 	/*
 	 * Restore rfi related settings
 	 */
-		 
+
 	lwz	r4, SRR1_FRAME_OFFSET(r1)
 	lwz	r2, SRR0_FRAME_OFFSET(r1)
 	lwz	r3, GPR3_OFFSET(r1)
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c
index 01d2d14cd4..98406a91b5 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c
@@ -80,7 +80,7 @@ void BSP_SIU_irq_init()
   ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
 }
 
-/* 
+/*
  * Initialize CPM interrupt management
  */
 void
@@ -94,7 +94,7 @@ BSP_CPM_irq_init(void)
     (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
 #else
     (CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-#endif    
+#endif
     ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
   ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
 
@@ -105,7 +105,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
 {
   rtems_raw_except_connect_data vectorDesc;
   int i;
-  
+
   BSP_SIU_irq_init();
   BSP_CPM_irq_init();
   /*
@@ -133,7 +133,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
        */
       BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
     }
-  
+
   /*
    * We must connect the raw irq handler for the two
    * expected interrupt sources : decrementer and external interrupts.
@@ -155,7 +155,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
     if (!mpc8xx_set_exception (&vectorDesc)) {
       BSP_panic("Unable to initialize RTEMS external raw exception\n");
     }
-#ifdef TRACE_IRQ_INIT  
+#ifdef TRACE_IRQ_INIT
     printk("RTEMS IRQ management is now operationnal\n");
 #endif
 }