diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:14:55 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:14:55 +0000 |
| commit | b335c503112791edc634167b59ed98d377547701 (patch) | |
| tree | 144e316e346758a243a9d0e8babd35481bc76ff4 /c/src/lib/libbsp/mips/jmr3904/timer | |
| parent | 2001-04-20 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-b335c503112791edc634167b59ed98d377547701.tar.bz2 | |
2001-04-20 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h (Clear_tm27_intr): Stop the timer and disable
the interrupt. This was not quite right before and we were
getting uncontrolled interrupt nesting in tm27.
* timer/timer.c (Timer_Initialize): Added an extra reset and
changed the ITMR register so we will never get an interrupt.
(Read_timer): Fixed so the timer actually stops before it
is read. Before some times reported were outraguously high.
* start/start.S: Major clean including using stack in linkcmds,
deleting unused code, and zeroing the BSS using the linkcmds
information.
* startup/linkcmds: Put heap in lower memory than workspace
and move _clear_end so both are zeroed.
Diffstat (limited to 'c/src/lib/libbsp/mips/jmr3904/timer')
| -rw-r--r-- | c/src/lib/libbsp/mips/jmr3904/timer/timer.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c index 5a4375fe5e..241e719fea 100644 --- a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c +++ b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c @@ -31,12 +31,12 @@ void Timer_initialize() * the compare register is set to the maximum value. */ + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CCDR, 0x3 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TRR, 0x0 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TISR, 0x00 ); - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x8001 ); - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x0001 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0xe0 ); } @@ -49,7 +49,6 @@ int Read_timer() { rtems_unsigned32 total; - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x03 ); total = TX3904_TIMER_READ( TX3904_TIMER1_BASE, TX3904_TIMER_TRR ); if ( Timer_driver_Find_average_overhead == 1 ) |