diff options
Diffstat (limited to 'c/src/lib/libbsp/mips/jmr3904/timer/timer.c')
| -rw-r--r-- | c/src/lib/libbsp/mips/jmr3904/timer/timer.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c index 5a4375fe5e..241e719fea 100644 --- a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c +++ b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c @@ -31,12 +31,12 @@ void Timer_initialize() * the compare register is set to the maximum value. */ + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CCDR, 0x3 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TRR, 0x0 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TISR, 0x00 ); - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x8001 ); - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x0001 ); TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0xe0 ); } @@ -49,7 +49,6 @@ int Read_timer() { rtems_unsigned32 total; - TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x03 ); total = TX3904_TIMER_READ( TX3904_TIMER1_BASE, TX3904_TIMER_TRR ); if ( Timer_driver_Find_average_overhead == 1 ) |