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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-04-20 13:14:55 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-04-20 13:14:55 +0000
commitb335c503112791edc634167b59ed98d377547701 (patch)
tree144e316e346758a243a9d0e8babd35481bc76ff4 /c/src/lib/libbsp/mips
parent2001-04-20 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-b335c503112791edc634167b59ed98d377547701.tar.bz2
2001-04-20 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h (Clear_tm27_intr): Stop the timer and disable the interrupt. This was not quite right before and we were getting uncontrolled interrupt nesting in tm27. * timer/timer.c (Timer_Initialize): Added an extra reset and changed the ITMR register so we will never get an interrupt. (Read_timer): Fixed so the timer actually stops before it is read. Before some times reported were outraguously high. * start/start.S: Major clean including using stack in linkcmds, deleting unused code, and zeroing the BSS using the linkcmds information. * startup/linkcmds: Put heap in lower memory than workspace and move _clear_end so both are zeroed.
Diffstat (limited to 'c/src/lib/libbsp/mips')
-rw-r--r--c/src/lib/libbsp/mips/jmr3904/ChangeLog15
-rw-r--r--c/src/lib/libbsp/mips/jmr3904/include/bsp.h6
-rw-r--r--c/src/lib/libbsp/mips/jmr3904/start/start.S131
-rw-r--r--c/src/lib/libbsp/mips/jmr3904/startup/linkcmds6
-rw-r--r--c/src/lib/libbsp/mips/jmr3904/timer/timer.c5
5 files changed, 73 insertions, 90 deletions
diff --git a/c/src/lib/libbsp/mips/jmr3904/ChangeLog b/c/src/lib/libbsp/mips/jmr3904/ChangeLog
index 56cdcebb97..f9a9eb4eae 100644
--- a/c/src/lib/libbsp/mips/jmr3904/ChangeLog
+++ b/c/src/lib/libbsp/mips/jmr3904/ChangeLog
@@ -1,3 +1,18 @@
+2001-04-20 Joel Sherrill <joel@OARcorp.com>
+
+ * include/bsp.h (Clear_tm27_intr): Stop the timer and disable
+ the interrupt. This was not quite right before and we were
+ getting uncontrolled interrupt nesting in tm27.
+ * timer/timer.c (Timer_Initialize): Added an extra reset and
+ changed the ITMR register so we will never get an interrupt.
+ (Read_timer): Fixed so the timer actually stops before it
+ is read. Before some times reported were outraguously high.
+ * start/start.S: Major clean including using stack in linkcmds,
+ deleting unused code, and zeroing the BSS using the linkcmds
+ information.
+ * startup/linkcmds: Put heap in lower memory than workspace
+ and move _clear_end so both are zeroed.
+
2001-01-12 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h, timer/timer.c: Updated so timer appears to
diff --git a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h
index 7f147040c2..3b0f52556c 100644
--- a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h
+++ b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h
@@ -74,7 +74,11 @@ extern "C" {
} while(0)
#define Clear_tm27_intr() \
- TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0x03 );
+ do { \
+ TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \
+ TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
+ TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \
+ } while(0)
#define Lower_tm27_intr() \
mips_enable_in_interrupt_mask( 0xff01 );
diff --git a/c/src/lib/libbsp/mips/jmr3904/start/start.S b/c/src/lib/libbsp/mips/jmr3904/start/start.S
index c484b7b0bd..525232e2c8 100644
--- a/c/src/lib/libbsp/mips/jmr3904/start/start.S
+++ b/c/src/lib/libbsp/mips/jmr3904/start/start.S
@@ -17,22 +17,14 @@
* they apply.
*/
+#include <asm.h>
+#include "regs.S"
+
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
-#include <asm.h>
-#include "regs.S"
-
-/*
- * Set up some room for a stack. We just grab a chunk of memory.
- */
-#define STACK_SIZE 0x4000
-#define GLOBAL_SIZE 0x2000
-
-#define STARTUP_STACK_SIZE 0x0100
-
/* This is for referencing addresses that are not in the .sdata or
.sbss section under embedded-pic, or before we've set up gp. */
#ifdef __mips_embedded_pic
@@ -45,10 +37,6 @@
# define LA(t,x) la t,x
#endif /* __mips_embedded_pic */
- .comm __memsize, 12
- .comm __lstack, STARTUP_STACK_SIZE
- .comm __stackbase,4
-
.text
.align 2
@@ -62,6 +50,38 @@
.ent _start
_start:
.set noreorder
+ # Get the address of start into $5 in a position independent fashion.
+ # This lets us know whether we have been relocated or not.
+
+ $LF1 = . + 8
+ bal $LF1
+ nop
+_branch:
+ move $5, $31 # $5 == where are we
+ li $6, 0x8800000c # $6 == where we want to be
+ #la $6,_branch
+ beq $5, $6, _start_in_ram
+ nop
+ # relocate the code from EEPROM to RAM
+ la $7, _edata
+relocate:
+ lw $8, ($5) # $8 = *EEPROM
+ addu $5, $5, 4 # EEPROM++
+ sw $8, ($6) # *RAM = $8
+ addu $6, $6, 4 # RAM++
+ bne $6, $7, relocate # copied all the way to edata?
+ nop
+ la $6, _start_in_ram
+ jr $6
+ nop
+ .end _start
+
+
+ .globl _start_in_ram
+ .ent _start_in_ram
+_start_in_ram:
+ nop
+
#ifdef __mips_embedded_pic
PICBASE = .+8
bal PICBASE
@@ -111,9 +131,6 @@ _start:
* zero out the bss section.
*/
.globl __memsize
- .globl get_mem_info .text
- .globl __stack
- .globl __global
.globl zerobss
.ent zerobss
zerobss:
@@ -124,22 +141,7 @@ zerobss:
bltu v0,v1,3b
addiu v0,v0,4 # executed in delay slot
- la t0, __lstack # make a small stack so we
- addiu sp, t0, STARTUP_STACK_SIZE # can run some C code
- la a0, __memsize # get the usable memory size
- jal get_mem_info
- nop
-
- /* setup the stack pointer */
- LA (t0, __stack) # is __stack set ?
- bne t0,zero,4f
- nop
-
- /* NOTE: a0[0] contains the amount of memory available, and
- not the last memory address. */
- lw t0,0(a0) # last address of memory available
- la t1,K0BASE # cached kernel memory
- addu t0,t0,t1 # get the end of memory address
+ la t0, _stack_init # initialize stack so we
/* We must subtract 24 bytes for the 3 8 byte arguments to main, in
case main wants to write them back to the stack. The caller is
supposed to allocate stack space for parameters in registers in
@@ -149,73 +151,36 @@ zerobss:
Some ports need a larger alignment for the stack, so we subtract
32, which satisifes the stack for the arguments and keeps the
stack pointer better aligned. */
- subu t0,t0,32 # and generate a starting stack-pointer
-4:
+ subu t0,t0,32
move sp,t0 # set stack pointer
- sw sp,__stackbase # keep this for future ref
.end zerobss
-/*
- * initialize target specific stuff. Only execute these
- * functions it they exist.
- */
-#if 0
- .globl hardware_init_hook .text
- .globl software_init_hook .text
- .globl __do_global_dtors .text
- .globl atexit .text
-#endif
.globl exit .text
.globl init
.ent init
init:
-#if 0
- LA (t9, hardware_init_hook) # init the hardware if needed
- beq t9,zero,6f
- nop
- jal t9
- nop
-6:
- LA (t9, software_init_hook) # init the hardware if needed
- beq t9,zero,7f
- nop
- jal t9
- nop
-7:
- LA (a0, __do_global_dtors)
- jal atexit
- nop
-#endif
-
-#ifdef GCRT0
- .globl _ftext
- .globl _extext
- LA (a0, _ftext)
- LA (a1, _etext)
- jal monstartup
- nop
-#endif
move a0,zero # set argc to 0
jal boot_card # call the program start function
nop
# fall through to the "exit" routine
- jal exit # call libc exit to run the G++
+ jal _sys_exit # call libc exit to run the G++
# destructors
move a0,v0 # pass through the exit code
.end init
/*
- * Exit from the application. Normally we cause a user trap
- * to return to the ROM monitor for another run. NOTE: This is
- * the only other routine we provide in the crt0.o object, since
- * it may be tied to the "_start" routine. It also allows
- * executables that contain a complete world to be linked with
- * just the crt0.o object.
+ * _sys_exit -- Exit from the application. Normally we cause a user trap
+ * to return to the ROM monitor for another run. NOTE: This is
+ * the only other routine we provide in the crt0.o object, since
+ * it may be tied to the "_start" routine. It also allows
+ * executables that contain a complete world to be linked with
+ * just the crt0.o object.
*/
-
-FRAME(_sys_exit,sp,0,ra)
+ .globl _sys_exit
+ .ent _sys_exit
+_sys_exit:
7:
#ifdef GCRT0
jal _mcleanup
@@ -226,6 +191,6 @@ FRAME(_sys_exit,sp,0,ra)
nop
b 7b # but loop back just in-case
nop
-ENDFRAME(_sys_exit)
+ .end _sys_exit
/* EOF crt0.S */
diff --git a/c/src/lib/libbsp/mips/jmr3904/startup/linkcmds b/c/src/lib/libbsp/mips/jmr3904/startup/linkcmds
index 17836e5319..885cfc292e 100644
--- a/c/src/lib/libbsp/mips/jmr3904/startup/linkcmds
+++ b/c/src/lib/libbsp/mips/jmr3904/startup/linkcmds
@@ -108,12 +108,12 @@ SECTIONS
. += _StackSize;
__stack = .;
_stack_init = .;
- _clear_end = .;
+ HeapBase = .;
+ . += HeapSize; /* reserve some memory for heap */
WorkspaceBase = .;
/* HACK -- tied to value bspstart */
. += 4096K; /* reserve some memory for workspace */
- HeapBase = .;
- . += HeapSize; /* reserve some memory for heap */
+ _clear_end = .;
}
end = .;
_end = .;
diff --git a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c
index 5a4375fe5e..241e719fea 100644
--- a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c
+++ b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c
@@ -31,12 +31,12 @@ void Timer_initialize()
* the compare register is set to the maximum value.
*/
+ TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 );
TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CCDR, 0x3 );
TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TRR, 0x0 );
TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF );
TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TISR, 0x00 );
- TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x8001 );
- TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 );
+ TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x0001 );
TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0xe0 );
}
@@ -49,7 +49,6 @@ int Read_timer()
{
rtems_unsigned32 total;
- TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x03 );
total = TX3904_TIMER_READ( TX3904_TIMER1_BASE, TX3904_TIMER_TRR );
if ( Timer_driver_Find_average_overhead == 1 )