bsps/riscv/riscv: Fix fe310_uart_read

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This fixes the riscv fe310 console driver fe310_uart_read function. The function
reads the RX status/data register to check if data is available, but discards
the data and reads it a seconds time.
Also cleared the interrupt enable bit in the first_open function.

Close #4719

1 files changed, 5 insertions, 2 deletions

diff --git a/bsps/riscv/riscv/console/fe310-uart.c b/bsps/riscv/riscv/console/fe310-uart.c
index 4ae62d7176..506521add0 100644
--- a/bsps/riscv/riscv/console/fe310-uart.c
+++ b/bsps/riscv/riscv/console/fe310-uart.c
@@ -34,11 +34,13 @@
 int fe310_uart_read(rtems_termios_device_context *base)
 {
   fe310_uart_context * ctx = (fe310_uart_context*) base;
+  int32_t              rxdata;
 
-  if ((ctx->regs->rxdata & TXRXREADY) != 0) {
+  rxdata = ctx->regs->rxdata;
+  if ((rxdata & TXRXREADY) != 0) {
     return -1;
   } else {
-    return ctx->regs->rxdata;
+    return rxdata & 0xFF;
   }
 }
 
@@ -91,6 +93,7 @@ static bool fe310_uart_first_open (
   (ctx->regs)->div = riscv_get_core_frequency() / 115200 - 1;
   (ctx->regs)->txctrl |= 1;
   (ctx->regs)->rxctrl |= 1;
+  (ctx->regs)->ie = 0;
   return true;
 };