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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 12:08:01 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 12:08:16 +0200 |
| commit | 79d69aef54f396120d2bb91a0da217fd2e2b22aa (patch) | |
| tree | b668469c018c9499acee04d5d79925a2229ca7e6 | |
| parent | riscv: Add SMP context switch support (diff) | |
| download | rtems-79d69aef54f396120d2bb91a0da217fd2e2b22aa.tar.bz2 | |
riscv: Fix SMP context switch support
Update #3433.
| -rw-r--r-- | cpukit/score/cpu/riscv/riscv-context-switch.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/riscv/riscv-context-switch.S b/cpukit/score/cpu/riscv/riscv-context-switch.S index 03ce1429bb..6643f21ee9 100644 --- a/cpukit/score/cpu/riscv/riscv-context-switch.S +++ b/cpukit/score/cpu/riscv/riscv-context-switch.S @@ -153,8 +153,8 @@ SYM(_CPU_Context_restore): /* We may have a new heir */ /* Read the executing and heir */ - lw a4, PER_CPU_OFFSET_EXECUTING(a2) - lw a5, PER_CPU_OFFSET_HEIR(a2) + LREG a4, PER_CPU_OFFSET_EXECUTING(a2) + LREG a5, PER_CPU_OFFSET_HEIR(a2) /* * Update the executing only if necessary to avoid cache line |