From 79d69aef54f396120d2bb91a0da217fd2e2b22aa Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 29 Jun 2018 12:08:01 +0200 Subject: riscv: Fix SMP context switch support Update #3433. --- cpukit/score/cpu/riscv/riscv-context-switch.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cpukit/score/cpu/riscv/riscv-context-switch.S b/cpukit/score/cpu/riscv/riscv-context-switch.S index 03ce1429bb..6643f21ee9 100644 --- a/cpukit/score/cpu/riscv/riscv-context-switch.S +++ b/cpukit/score/cpu/riscv/riscv-context-switch.S @@ -153,8 +153,8 @@ SYM(_CPU_Context_restore): /* We may have a new heir */ /* Read the executing and heir */ - lw a4, PER_CPU_OFFSET_EXECUTING(a2) - lw a5, PER_CPU_OFFSET_HEIR(a2) + LREG a4, PER_CPU_OFFSET_EXECUTING(a2) + LREG a5, PER_CPU_OFFSET_HEIR(a2) /* * Update the executing only if necessary to avoid cache line -- cgit v1.2.3