diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-05-05 14:41:18 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-05-22 15:47:26 +0200 |
| commit | a0032254c179e687de41f1ad48c68871404fae20 (patch) | |
| tree | 98fb054752c77b7c5d7f0cdb9de004470798df33 | |
| parent | Fix JSON format errors (diff) | |
| download | rtems-central-a0032254c179e687de41f1ad48c68871404fae20.tar.bz2 | |
spec: Register blocks access -> properties
29 files changed, 1278 insertions, 1278 deletions
diff --git a/spec/dev/grlib/if/ahbstat.yml b/spec/dev/grlib/if/ahbstat.yml index fe01b3b1..34499f03 100644 --- a/spec/dev/grlib/if/ahbstat.yml +++ b/spec/dev/grlib/if/ahbstat.yml @@ -31,55 +31,55 @@ register-block-size: 8 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ME' start: 13 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'FW' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CF' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AF' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NE' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'HWRITE' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'HMASTER' start: 3 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'HSIZE' @@ -93,7 +93,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'HADDR' diff --git a/spec/dev/grlib/if/ahbtrace.yml b/spec/dev/grlib/if/ahbtrace.yml index bcbe7f11..a9354121 100644 --- a/spec/dev/grlib/if/ahbtrace.yml +++ b/spec/dev/grlib/if/ahbtrace.yml @@ -61,55 +61,55 @@ register-block-size: 32 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DCNT' start: 16 width: 7 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PF' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'BW' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RF' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AF' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FR' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FW' start: 2 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DM' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -123,7 +123,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INDEX' @@ -137,7 +137,7 @@ registers: width: 32 - bits: - default: - - access: [] + - properties: [] brief: null description: null name: 'TIMETAG' @@ -151,13 +151,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SMASK_15_0' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MMASK_15_0' @@ -171,7 +171,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BADDR_31_2' @@ -185,19 +185,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMASK_31_2' start: 2 width: 30 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LD' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ST' diff --git a/spec/dev/grlib/if/apbuart.yml b/spec/dev/grlib/if/apbuart.yml index ff5c409c..0d5357a0 100644 --- a/spec/dev/grlib/if/apbuart.yml +++ b/spec/dev/grlib/if/apbuart.yml @@ -46,7 +46,7 @@ register-block-size: 20 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' @@ -60,79 +60,79 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RCNT' start: 26 width: 6 - - access: [r] + - properties: [r] brief: null description: null name: 'TCNT' start: 20 width: 6 - - access: [r] + - properties: [r] brief: null description: null name: 'RF' start: 10 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TF' start: 9 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RH' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TH' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FE' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OV' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BR' start: 3 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TE' start: 2 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TS' start: 1 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DR' @@ -146,97 +146,97 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'FA' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SI' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BI' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DB' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RF' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TF' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EC' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LB' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FL' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PS' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RI' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' @@ -250,7 +250,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SCALER_RELOAD_VALUE' @@ -264,7 +264,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' diff --git a/spec/dev/grlib/if/dsu4.yml b/spec/dev/grlib/if/dsu4.yml index 97415ab8..54b9b8f7 100644 --- a/spec/dev/grlib/if/dsu4.yml +++ b/spec/dev/grlib/if/dsu4.yml @@ -151,73 +151,73 @@ register-block-size: 4194344 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'PW' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HL' start: 10 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PE' start: 9 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EB' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EE' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DM' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BZ' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BX' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BS' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BW' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' @@ -231,7 +231,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TIMETAG' @@ -245,13 +245,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SS_3_0' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BN_3_0' @@ -265,13 +265,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DM_3_0' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ED_3_0' @@ -285,13 +285,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'EM' start: 12 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TRAPTYPE' @@ -305,7 +305,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ASI' @@ -319,55 +319,55 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DCNT' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DF' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SF' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TF' start: 5 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'BW' start: 3 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BR' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DM' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -381,7 +381,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INDEX' @@ -395,37 +395,37 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WPF' start: 12 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BPF' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PF' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AF' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FR' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FW' @@ -439,13 +439,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SMASK_15_0' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MMASK_15_0' @@ -459,7 +459,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BADDR_31_2' @@ -473,19 +473,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMASK_31_2' start: 2 width: 30 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LD' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ST' @@ -499,25 +499,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IC' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 29 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICOUNT_28_0' @@ -531,37 +531,37 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IN' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CP' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IN' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CP' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -575,7 +575,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' @@ -589,7 +589,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -603,13 +603,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TFILT' start: 28 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITPOINTER' @@ -623,19 +623,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WO' start: 27 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TLIM' start: 24 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TOV' diff --git a/spec/dev/grlib/if/ftmctrl.yml b/spec/dev/grlib/if/ftmctrl.yml index 6bb2a043..332ba773 100644 --- a/spec/dev/grlib/if/ftmctrl.yml +++ b/spec/dev/grlib/if/ftmctrl.yml @@ -41,79 +41,79 @@ register-block-size: 28 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PBRDY' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ABRDY' start: 29 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IOBUSW' start: 27 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IBRDY' start: 26 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BEXCN' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IO_WAITSTATES' start: 20 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IOEN' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'R' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ROMBANKSZ' start: 14 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PWEN' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PROM_WIDTH' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PROM_WRITE_WS' start: 4 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PROM_READ_WS' @@ -127,31 +127,31 @@ registers: width: 32 - bits: - default: - - access: [] + - properties: [] brief: null description: null name: 'ME' start: 27 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WB' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RB' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCB' @@ -165,13 +165,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IOHWS' start: 23 width: 7 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ROMHWS' @@ -185,13 +185,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BRDYNCNT' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BRDYNRLD' diff --git a/spec/dev/grlib/if/gptimer-timer.yml b/spec/dev/grlib/if/gptimer-timer.yml index ee0e534f..6cd751df 100644 --- a/spec/dev/grlib/if/gptimer-timer.yml +++ b/spec/dev/grlib/if/gptimer-timer.yml @@ -41,7 +41,7 @@ register-block-size: 16 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCVAL' @@ -55,7 +55,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRLDVAL' @@ -69,55 +69,55 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WS' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WN' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DH' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CH' start: 5 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IP' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LD' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -131,7 +131,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LTCV' diff --git a/spec/dev/grlib/if/gptimer.yml b/spec/dev/grlib/if/gptimer.yml index cc91f8f6..caaaba18 100644 --- a/spec/dev/grlib/if/gptimer.yml +++ b/spec/dev/grlib/if/gptimer.yml @@ -49,7 +49,7 @@ register-block-size: 256 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SCALER' @@ -63,7 +63,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SRELOAD' @@ -77,49 +77,49 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EV' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ES' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EL' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EE' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DF' start: 9 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SI' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IRQ' start: 3 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'TIMERS' @@ -133,7 +133,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LATCHSEL' diff --git a/spec/dev/grlib/if/gr1553b.yml b/spec/dev/grlib/if/gr1553b.yml index d3d78e3f..e4a586d9 100644 --- a/spec/dev/grlib/if/gr1553b.yml +++ b/spec/dev/grlib/if/gr1553b.yml @@ -181,49 +181,49 @@ register-block-size: 228 registers: - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'BMTOF' start: 17 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'BMD' start: 16 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RTTE' start: 10 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RTD' start: 9 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RTEV' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'BCWK' start: 2 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'BCD' start: 1 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'BCEV' @@ -237,49 +237,49 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMTOE' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMDE' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RTTEE' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RTDE' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RTEVE' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BCWKE' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BCDE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BCEVE' @@ -293,37 +293,37 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'MOD' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CVER' start: 12 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'XKEYS' start: 11 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ENDIAN' start: 9 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'SCLK' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'CCFREQ' @@ -337,43 +337,43 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'BCSUP' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'BCFEAT' start: 28 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BCCHK' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ASADL' start: 11 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'ASST' start: 8 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'SCADL' start: 3 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'SCST' @@ -387,49 +387,49 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'BCKEY' start: 16 width: 16 - - access: [w] + - properties: [w] brief: null description: null name: 'ASSTP' start: 9 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'ASSRT' start: 8 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'CLRT' start: 4 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'SETT' start: 3 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'SCSTP' start: 2 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'SCSUS' start: 1 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'SCSRT' @@ -443,7 +443,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POINTER' @@ -457,7 +457,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POINTER' @@ -471,7 +471,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SCTM' @@ -485,7 +485,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POSITION' @@ -499,7 +499,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SWAP' @@ -513,7 +513,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'POINTER' @@ -527,7 +527,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'POINTER' @@ -541,31 +541,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RTSUP' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ACT' start: 3 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SHDA' start: 2 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SHDB' start: 1 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RUN' @@ -579,43 +579,43 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'RTKEY' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SYS' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SYDS' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BRS' start: 13 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RTEIS' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RTADDR' start: 1 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RTEN' @@ -629,37 +629,37 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TFDE' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SREQ' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BUSY' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SSF' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DBCA' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TFLG' @@ -673,13 +673,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BITW' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'VECW' @@ -693,13 +693,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SYTM' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'SYD' @@ -713,7 +713,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SATB' @@ -727,91 +727,91 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RRTB' start: 28 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RRT' start: 26 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITFB' start: 24 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITF' start: 22 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ISTB' start: 20 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IST' start: 18 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DBC' start: 16 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TBW' start: 14 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TVW' start: 12 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TSB' start: 10 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TS' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SDB' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SD' start: 4 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SB' start: 2 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S' @@ -825,13 +825,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRES' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TVAL' @@ -845,7 +845,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -859,7 +859,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POINTER' @@ -873,7 +873,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'POINTER' @@ -887,13 +887,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'BMSUP' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'KEYEN' @@ -907,43 +907,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMKEY' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WRSTP' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EXST' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IMCL' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UDWL' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MANL' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BMEN' @@ -957,7 +957,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -971,7 +971,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -985,115 +985,115 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STSB' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STS' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TLC' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TSW' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RRTB' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RRT' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITFB' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITF' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ISTB' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IST' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DBC' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TBW' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TVW' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TSB' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TS' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SDB' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SD' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SB' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S' @@ -1107,7 +1107,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'START' @@ -1121,7 +1121,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'END' @@ -1135,7 +1135,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POSITION' @@ -1149,13 +1149,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRES' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TVAL' diff --git a/spec/dev/grlib/if/gr740thsens.yml b/spec/dev/grlib/if/gr740thsens.yml index dddc74c0..2e675d44 100644 --- a/spec/dev/grlib/if/gr740thsens.yml +++ b/spec/dev/grlib/if/gr740thsens.yml @@ -36,37 +36,37 @@ register-block-size: 12 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIV' start: 16 width: 10 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ALEN' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PDN' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DCORRECT' start: 2 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SRSTN' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CLKEN' @@ -80,43 +80,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MAX' start: 24 width: 7 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MIN' start: 16 width: 7 - - access: [r] + - properties: [r] brief: null description: null name: 'SCLK' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WE' start: 10 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'UPD' start: 9 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ALACT' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DATA' @@ -130,7 +130,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'THRES' diff --git a/spec/dev/grlib/if/grcan.yml b/spec/dev/grlib/if/grcan.yml index 157d4503..6b1cac0a 100644 --- a/spec/dev/grlib/if/grcan.yml +++ b/spec/dev/grlib/if/grcan.yml @@ -116,67 +116,67 @@ register-block-size: 800 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SCALER' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PS1' start: 20 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PS2' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RSJ' start: 12 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BPR' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SAM' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SILNT' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SELECT' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE1' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE0' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ABORT' @@ -190,55 +190,55 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TXCHANNELS' start: 28 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'RXCHANNELS' start: 24 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'TXERRCNT' start: 16 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'RXERRCNT' start: 8 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'ACTIVE' start: 4 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AHBERR' start: 3 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'OR' start: 2 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'OFF' start: 1 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PASS' @@ -252,13 +252,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RESET' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE' @@ -272,7 +272,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -286,7 +286,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SYNC' @@ -300,19 +300,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SINGLE' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ONGOING' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE' @@ -326,7 +326,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' @@ -340,7 +340,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SIZE' @@ -354,7 +354,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WRITE' @@ -368,7 +368,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'READ' @@ -382,7 +382,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQ' @@ -396,13 +396,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ONGOING' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE' @@ -416,7 +416,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' @@ -430,7 +430,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SIZE' @@ -444,7 +444,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WRITE' @@ -458,7 +458,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'READ' @@ -472,7 +472,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQ' @@ -486,7 +486,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AM' @@ -500,7 +500,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AC' diff --git a/spec/dev/grlib/if/grclkgate.yml b/spec/dev/grlib/if/grclkgate.yml index 749e5e32..4cdb3688 100644 --- a/spec/dev/grlib/if/grclkgate.yml +++ b/spec/dev/grlib/if/grclkgate.yml @@ -41,7 +41,7 @@ register-block-size: 16 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UNLOCK' @@ -55,7 +55,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ENABLE' @@ -69,7 +69,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RESET' @@ -83,13 +83,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FOVERRIDE' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OVERRIDE' diff --git a/spec/dev/grlib/if/grethgbit.yml b/spec/dev/grlib/if/grethgbit.yml index 2989e85d..2313fa44 100644 --- a/spec/dev/grlib/if/grethgbit.yml +++ b/spec/dev/grlib/if/grethgbit.yml @@ -66,121 +66,121 @@ register-block-size: 48 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'EA' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'BS' start: 28 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'GA' start: 27 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MA' start: 26 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MC' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ED' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DD' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ME' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PI' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BM' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GB' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SP' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RS' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PM' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FD' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' @@ -194,55 +194,55 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PS' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IA' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TS' start: 6 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TA' start: 5 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RA' start: 4 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TI' start: 3 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RI' start: 2 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TE' start: 1 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RE' @@ -256,7 +256,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MSB' @@ -270,7 +270,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LSB' @@ -284,43 +284,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PHYADDR' start: 11 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REGADDR' start: 6 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'BU' start: 3 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'LF' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WR' @@ -334,13 +334,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCPNT' @@ -354,13 +354,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCPNT' @@ -374,7 +374,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MSB' @@ -388,7 +388,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LSB' diff --git a/spec/dev/grlib/if/grgpio.yml b/spec/dev/grlib/if/grgpio.yml index 2ca654c0..3053fcfc 100644 --- a/spec/dev/grlib/if/grgpio.yml +++ b/spec/dev/grlib/if/grgpio.yml @@ -131,7 +131,7 @@ register-block-size: 128 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DATA' @@ -145,7 +145,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' @@ -159,7 +159,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIR' @@ -173,7 +173,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -187,7 +187,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POL' @@ -201,7 +201,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDGE' @@ -215,7 +215,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BYPASS' @@ -229,31 +229,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'PU' start: 18 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IER' start: 17 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IFL' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IRQGEN' start: 8 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'NLINES' @@ -267,25 +267,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_I_0' start: 24 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_I_1' start: 16 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_I_2' start: 8 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_I_3' @@ -299,7 +299,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'IMASK' @@ -313,7 +313,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IFLAG' @@ -327,7 +327,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IPEN' @@ -341,7 +341,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PULSE' @@ -355,7 +355,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'DATA' @@ -369,7 +369,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'DATA' @@ -383,7 +383,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'DATA' diff --git a/spec/dev/grlib/if/grgprbank.yml b/spec/dev/grlib/if/grgprbank.yml index dd776827..7bcec0b6 100644 --- a/spec/dev/grlib/if/grgprbank.yml +++ b/spec/dev/grlib/if/grgprbank.yml @@ -66,7 +66,7 @@ register-block-size: 36 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FTMEN' @@ -80,7 +80,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ALTEN' @@ -94,19 +94,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SMEM' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DMEM' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SPWOE' @@ -120,25 +120,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SWTAG' start: 27 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SPWPLLCFG' start: 18 width: 9 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MEMPLLCFG' start: 9 width: 9 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SYSPLLCFG' @@ -152,7 +152,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RECONF' @@ -166,25 +166,25 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SWTAG' start: 27 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'SPWPLLCFG' start: 18 width: 9 - - access: [r] + - properties: [r] brief: null description: null name: 'MEMPLLCFG' start: 9 width: 9 - - access: [r] + - properties: [r] brief: null description: null name: 'SYSPLLCFG' @@ -198,61 +198,61 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S9' start: 18 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S8' start: 16 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S7' start: 14 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S6' start: 12 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S5' start: 10 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S4' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S3' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S2' start: 4 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S1' start: 2 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S0' @@ -266,61 +266,61 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S19' start: 18 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S18' start: 16 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S17' start: 14 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S16' start: 12 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S15' start: 10 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S14' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S13' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S12' start: 4 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S11' start: 2 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'S10' @@ -334,13 +334,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PERMANENT' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REVOCABLE' diff --git a/spec/dev/grlib/if/grgpreg.yml b/spec/dev/grlib/if/grgpreg.yml index bb2af449..5c5bedae 100644 --- a/spec/dev/grlib/if/grgpreg.yml +++ b/spec/dev/grlib/if/grgpreg.yml @@ -26,67 +26,67 @@ register-block-size: 4 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B10' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B9' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B8' start: 23 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B7' start: 22 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B6' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B5' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B4' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B3' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B2' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'B1' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GPIO' diff --git a/spec/dev/grlib/if/griommu.yml b/spec/dev/grlib/if/griommu.yml index bb9a6c07..438f0e63 100644 --- a/spec/dev/grlib/if/griommu.yml +++ b/spec/dev/grlib/if/griommu.yml @@ -121,91 +121,91 @@ register-block-size: 272 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'A' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AC' start: 30 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'CA' start: 29 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'CP' start: 28 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'NARB' start: 20 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'CS' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'FT' start: 17 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'ST' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'I' start: 15 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IT' start: 14 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IA' start: 13 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IP' start: 12 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MB' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'GRPS' start: 4 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'MSTS' @@ -219,31 +219,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'CADDR' start: 20 width: 12 - - access: [r] + - properties: [r] brief: null description: null name: 'CMASK' start: 16 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'CTAGBITS' start: 8 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'CISIZE' start: 5 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'CLINES' @@ -257,37 +257,37 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TMASK' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'MTYPE' start: 18 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'TTYPE' start: 16 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'TTAGBITS' start: 8 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'ISIZE' start: 5 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'TLBENT' @@ -301,85 +301,85 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PGSZ' start: 18 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LB' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SP' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ITR' start: 12 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DP' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SIV' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HPROT' start: 8 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AU' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WP' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DM' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GS' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PM' start: 1 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -393,19 +393,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FGRP' start: 4 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GF' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'F' @@ -419,37 +419,37 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PE' start: 5 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'DE' start: 4 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'FC' start: 3 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'FL' start: 2 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'AD' start: 1 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TE' @@ -463,31 +463,31 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PEI' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FCI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FLI' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADI' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TEI' @@ -501,19 +501,19 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'FADDR_31_5' start: 5 width: 27 - - access: [r] + - properties: [r] brief: null description: null name: 'FW' start: 4 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'FMASTER' @@ -527,25 +527,25 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'VENDOR' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'DEVICE' start: 12 width: 12 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BS' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GROUP' @@ -559,19 +559,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BASE_31_4' start: 4 width: 28 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'P' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AG' @@ -585,31 +585,31 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DA' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RW' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DP' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TP' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SETADDR' @@ -623,7 +623,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CDATAN' @@ -637,13 +637,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TAG' start: 1 width: 31 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'V' @@ -657,7 +657,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DPERRINJ' @@ -671,7 +671,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TPERRINJ' @@ -685,25 +685,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FC' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SC' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MC' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GRPACCSZCTRL' diff --git a/spec/dev/grlib/if/grpci2.yml b/spec/dev/grlib/if/grpci2.yml index 8e26ca99..58d0bc3a 100644 --- a/spec/dev/grlib/if/grpci2.yml +++ b/spec/dev/grlib/if/grpci2.yml @@ -116,85 +116,85 @@ register-block-size: 160 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MR' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TR' start: 29 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SI' start: 27 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 26 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ER' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EI' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BUS_NUMBER' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DFA' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IB' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CB' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIF' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEVICE_INT_MASK' start: 4 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HOST_INT_MASK' @@ -208,85 +208,85 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'HOST' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MST' start: 30 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TAR' start: 29 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DMA' start: 28 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DI' start: 27 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'HI' start: 26 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IRQ_MODE' start: 24 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'TRACE' start: 23 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CFGDO' start: 20 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CFGER' start: 19 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CORE_INT_STATUS' start: 12 width: 7 - - access: [r] + - properties: [r] brief: null description: null name: 'HOST_INT_STATUS' start: 8 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'FDEPTH' start: 2 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'FNUM' @@ -300,13 +300,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AHB_MASTER_UNMASK' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'BURST_LENGTH' @@ -320,7 +320,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AHB_TO_PCI_IO' @@ -334,73 +334,73 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SAFE' start: 31 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CHIRQ' start: 12 width: 8 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'MA' start: 11 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TA' start: 10 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PE' start: 9 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'AE' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'DE' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NUMCH' start: 4 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'ACTIVE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIS' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -414,7 +414,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BASE' @@ -428,7 +428,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CHAN' @@ -442,7 +442,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' @@ -456,7 +456,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' @@ -470,37 +470,37 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TRIG_INDEX' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'AR' start: 15 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EN' start: 14 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DEPTH' start: 4 width: 8 - - access: [w] + - properties: [w] brief: null description: null name: 'SO' start: 1 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'SA' @@ -514,19 +514,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRACING_MODE' start: 24 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRIG_COUNT' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DELAYED_STOP' @@ -540,7 +540,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PATTERN' @@ -554,7 +554,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -568,85 +568,85 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBE_3_0' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FRAME' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRDY' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRDY' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STOP' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEVSEL' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PAR' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PERR' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SERR' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IDSEL' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REQ' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GNT' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LOCK' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RST' @@ -660,85 +660,85 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBE_3_0' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FRAME' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRDY' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRDY' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STOP' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEVSEL' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PAR' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PERR' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SERR' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IDSEL' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REQ' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'GNT' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LOCK' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RST' @@ -752,7 +752,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SIGNAL' @@ -766,85 +766,85 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'CBE_3_0' start: 16 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'FRAME' start: 15 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IRDY' start: 14 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TRDY' start: 13 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'STOP' start: 12 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DEVSEL' start: 11 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PAR' start: 10 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PERR' start: 9 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SERR' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IDSEL' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'REQ' start: 6 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'GNT' start: 5 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'LOCK' start: 4 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RST' diff --git a/spec/dev/grlib/if/grspw2.yml b/spec/dev/grlib/if/grspw2.yml index 116bcdb6..a9e772a6 100644 --- a/spec/dev/grlib/if/grspw2.yml +++ b/spec/dev/grlib/if/grspw2.yml @@ -76,121 +76,121 @@ register-block-size: 52 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RA' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RX' start: 30 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RC' start: 29 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'NCH' start: 27 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'PO' start: 26 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TL' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TF' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TR' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TT' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LI' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TQ' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PM' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AS' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LS' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LD' @@ -204,61 +204,61 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NRXD' start: 26 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'NTXD' start: 24 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'LS' start: 21 width: 3 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EE' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IA' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PE' start: 4 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'DE' start: 3 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ER' start: 2 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CE' start: 1 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TO' @@ -272,13 +272,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEFMASK' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEFADDR' @@ -292,13 +292,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CLKDIVSTART' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CLKDIVRUN' @@ -312,7 +312,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DESTKEY' @@ -326,13 +326,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCTRL' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TIMECNT' @@ -346,133 +346,133 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EP' start: 23 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TR' start: 22 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RP' start: 19 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TP' start: 18 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TL' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LE' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SP' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SA' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NS' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 11 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RX' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AT' start: 9 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RA' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TA' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PR' start: 6 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PS' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AI' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' @@ -486,7 +486,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RXMAXLEN' @@ -500,13 +500,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCBASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCSEL' @@ -520,13 +520,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCBASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCSEL' @@ -540,13 +540,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' diff --git a/spec/dev/grlib/if/grspwrouter.yml b/spec/dev/grlib/if/grspwrouter.yml index c3b5c5f3..20607a23 100644 --- a/spec/dev/grlib/if/grspwrouter.yml +++ b/spec/dev/grlib/if/grspwrouter.yml @@ -181,79 +181,79 @@ register-block-size: 188 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RA' start: 31 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RX' start: 30 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RC' start: 29 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'NCH' start: 27 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'DI' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ME' start: 23 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TQ' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PM' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' @@ -267,43 +267,43 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NIRQ' start: 28 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'NRXD' start: 26 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'NTXD' start: 24 width: 2 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ME' start: 12 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EE' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IA' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TO' @@ -317,13 +317,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEFMASK' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEFADDR' @@ -337,7 +337,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESTKEY' @@ -351,25 +351,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCMSK' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCVAL' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCTRL' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TIMECNT' @@ -383,139 +383,139 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INTNUM' start: 26 width: 6 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EP' start: 23 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TR' start: 22 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IT' start: 20 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RP' start: 19 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TP' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SP' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SA' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NS' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 11 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RX' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AT' start: 9 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RA' start: 8 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TA' start: 7 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PR' start: 6 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PS' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AI' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TI' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' @@ -529,7 +529,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RXMAXLEN' @@ -543,13 +543,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCBASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCSEL' @@ -563,13 +563,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCBASEADDR' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DESCSEL' @@ -583,13 +583,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' @@ -603,73 +603,73 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INTNUM' start: 26 width: 6 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EE' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IA' start: 23 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TQ' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AQ' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IQ' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AA' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AT' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IT' start: 13 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ID' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'II' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TXINT' @@ -683,7 +683,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RXIRQ' @@ -697,7 +697,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RXACK' @@ -711,7 +711,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'INTTO' @@ -725,7 +725,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'INTTO' @@ -739,7 +739,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' @@ -753,7 +753,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' diff --git a/spec/dev/grlib/if/irqamp-timestamp.yml b/spec/dev/grlib/if/irqamp-timestamp.yml index 877bd3cf..bddc1d7d 100644 --- a/spec/dev/grlib/if/irqamp-timestamp.yml +++ b/spec/dev/grlib/if/irqamp-timestamp.yml @@ -41,7 +41,7 @@ register-block-size: 16 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TCNT' @@ -55,31 +55,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TSTAMP' start: 27 width: 5 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'S1' start: 26 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'S2' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'KS' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TSISEL' @@ -93,7 +93,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TASSERTION' @@ -107,7 +107,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TACKNOWLEDGE' diff --git a/spec/dev/grlib/if/irqamp.yml b/spec/dev/grlib/if/irqamp.yml index 0bcfa92a..b725e646 100644 --- a/spec/dev/grlib/if/irqamp.yml +++ b/spec/dev/grlib/if/irqamp.yml @@ -104,7 +104,7 @@ register-block-size: 1024 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IL_15_1' @@ -118,13 +118,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EIP_31_16' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IP_15_1' @@ -138,7 +138,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IF_15_1' @@ -152,13 +152,13 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'EIC_31_16' start: 16 width: 16 - - access: [w] + - properties: [w] brief: null description: null name: 'IC_15_1' @@ -172,31 +172,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NCPU' start: 28 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'BA' start: 27 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ER' start: 26 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EIRQ' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STATUS' @@ -210,7 +210,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BM15_1' @@ -224,7 +224,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ERRMODE_3_0' @@ -238,19 +238,19 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NWDOG' start: 27 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WDOGIRQ' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WDOGMSK' @@ -264,19 +264,19 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NCTRL' start: 28 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICF' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'L' @@ -290,25 +290,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICSEL0' start: 28 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICSEL1' start: 24 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICSEL2' start: 20 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ICSEL3' @@ -322,13 +322,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EIM_31_16' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IM15_1' @@ -342,13 +342,13 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'FC_15_1' start: 17 width: 15 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IF15_1' @@ -362,7 +362,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'EID_4_0' @@ -376,13 +376,13 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'BOOTADDR_31_3' start: 3 width: 29 - - access: [w] + - properties: [w] brief: null description: null name: 'AS' @@ -396,25 +396,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_4_N_0' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_4_N_1' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_4_N_2' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQMAP_4_N_3' diff --git a/spec/dev/grlib/if/l2cache.yml b/spec/dev/grlib/if/l2cache.yml index 01837aef..7aa91ac4 100644 --- a/spec/dev/grlib/if/l2cache.yml +++ b/spec/dev/grlib/if/l2cache.yml @@ -91,73 +91,73 @@ register-block-size: 132 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDAC' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REPL' start: 28 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BBS' start: 16 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INDEX_WAY' start: 12 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LOCK' start: 8 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HPRHB' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HPB' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UC' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HC' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WP' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HP' @@ -171,43 +171,43 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LS' start: 24 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AT' start: 23 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MP' start: 22 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MTRR' start: 16 width: 6 - - access: [r] + - properties: [r] brief: null description: null name: 'BBUS_W' start: 13 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'WAY_SIZE' start: 2 width: 11 - - access: [r] + - properties: [r] brief: null description: null name: 'WAY' @@ -221,19 +221,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' start: 5 width: 27 - - access: [w] + - properties: [w] brief: null description: null name: 'DI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FMODE' @@ -247,55 +247,55 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INDEX' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TAG' start: 10 width: 22 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FL' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'VB' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DB' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WAY' start: 4 width: 2 - - access: [w] + - properties: [w] brief: null description: null name: 'DI' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WF' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FMODE' @@ -309,103 +309,103 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'AHB_MASTER_INDEX' start: 28 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'SCRUB' start: 27 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TYPE' start: 24 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'TAG_DATA' start: 23 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'COR_UCOR' start: 22 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'MULTI' start: 21 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'VALID' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DISERESP' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'CORRECTABLE_ERROR_COUNTER' start: 16 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'IRQ_PENDING' start: 12 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQ_MASK' start: 8 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SELECT_CB' start: 6 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SELECT_TCB' start: 4 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'XCB' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RCB' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'COMP' start: 1 width: 1 - - access: [w] + - properties: [w] brief: null description: null name: 'RST' @@ -419,7 +419,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'EADDR' @@ -433,7 +433,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TCB' @@ -447,7 +447,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CB' @@ -461,25 +461,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INDEX' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WAY' start: 2 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PEN' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' @@ -493,7 +493,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DEL' @@ -507,13 +507,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' start: 2 width: 30 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INJ' @@ -527,67 +527,67 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DSC' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SH' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SPLITQ' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NHM' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BERR' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OAPM' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FLINE' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DBPF' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: '128WF' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DBPWS' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SPLIT' @@ -601,19 +601,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDI' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TER' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IMD' @@ -627,31 +627,31 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ADDR' start: 18 width: 14 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ACC' start: 16 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MASK' start: 2 width: 14 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WP' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AC' diff --git a/spec/dev/grlib/if/l4stat.yml b/spec/dev/grlib/if/l4stat.yml index 4c442967..af263a4d 100644 --- a/spec/dev/grlib/if/l4stat.yml +++ b/spec/dev/grlib/if/l4stat.yml @@ -56,7 +56,7 @@ register-block-size: 388 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CVAL' @@ -70,85 +70,85 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'NCPU' start: 28 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'NCNT' start: 23 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'MC' start: 22 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IA' start: 21 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DS' start: 20 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EE' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AE' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EL' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CD' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SU' start: 14 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CL' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EVENT_ID' start: 4 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CPU_AHBM' @@ -162,7 +162,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CSVAL' @@ -176,7 +176,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TSTAMP' diff --git a/spec/dev/grlib/if/memscrub.yml b/spec/dev/grlib/if/memscrub.yml index ce9f65d9..aa207ee3 100644 --- a/spec/dev/grlib/if/memscrub.yml +++ b/spec/dev/grlib/if/memscrub.yml @@ -81,61 +81,61 @@ register-block-size: 52 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CECNT' start: 22 width: 10 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UECNT' start: 14 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'DONE' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SEC' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SBC' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NE' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'HWRITE' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'HMASTER' start: 3 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'HSIZE' @@ -149,7 +149,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'AHB_FAILING_ADDRESS' @@ -163,25 +163,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CECNTT' start: 22 width: 10 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UECNTT' start: 14 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CECTE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UECTE' @@ -195,31 +195,31 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RUNCOUNT' start: 22 width: 10 - - access: [r] + - properties: [r] brief: null description: null name: 'BLKCOUNT' start: 14 width: 8 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'DONE' start: 13 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'BURSTLEN' start: 1 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'ACTIVE' @@ -233,43 +233,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DELAY' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IRQD' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SERA' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LOOP' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MODE' start: 2 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ES' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SCEN' @@ -283,7 +283,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RLADDR' @@ -297,7 +297,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RHADDR' @@ -311,7 +311,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'POSITION' @@ -325,25 +325,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RECT' start: 22 width: 10 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BECT' start: 14 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RECTE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BECTE' @@ -357,7 +357,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'DATA' @@ -371,7 +371,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RLADDR' @@ -385,7 +385,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RHADDR' diff --git a/spec/dev/grlib/if/mmctrl.yml b/spec/dev/grlib/if/mmctrl.yml index 6333fa0b..77596a9d 100644 --- a/spec/dev/grlib/if/mmctrl.yml +++ b/spec/dev/grlib/if/mmctrl.yml @@ -56,61 +56,61 @@ register-block-size: 52 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RF' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRP' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRFC' start: 27 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TC' start: 26 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BANKSZ' start: 23 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'COLSZ' start: 21 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'COMMAND' start: 18 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'MS' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: '64' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RFLOAD' @@ -124,25 +124,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN2T' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DCS' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BPARK' @@ -156,61 +156,61 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ERRLOC' start: 20 width: 12 - - access: [r] + - properties: [r] brief: null description: null name: 'DDERR' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DWIDTH' start: 16 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'BEID' start: 12 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATAMUX' start: 5 width: 3 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CEN' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BAUPD' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'BAEN' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CODE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDEN' @@ -224,7 +224,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FTDA' @@ -238,25 +238,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBD' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBC' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBB' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CBA' @@ -270,7 +270,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DATA' @@ -284,7 +284,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FTBND_31_3' diff --git a/spec/dev/grlib/if/spictrl.yml b/spec/dev/grlib/if/spictrl.yml index 68148edc..315d0845 100644 --- a/spec/dev/grlib/if/spictrl.yml +++ b/spec/dev/grlib/if/spictrl.yml @@ -66,61 +66,61 @@ register-block-size: 64 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SSSZ' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'MAXWLEN' start: 20 width: 4 - - access: [r] + - properties: [r] brief: null description: null name: 'TWEN' start: 19 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AMODE' start: 18 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ASELA' start: 17 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SSEN' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'FDEPTH' start: 8 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'SR' start: 7 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'FT' start: 5 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'REV' @@ -134,115 +134,115 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LOOP' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CPOL' start: 29 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CPHA' start: 28 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIV_16' start: 27 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'REV' start: 26 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MX' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LEN' start: 20 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PM' start: 16 width: 4 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TWEN' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ASEL' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'FACT' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OD' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CG' start: 7 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ASELDEL' start: 5 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TAC' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TTO' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IGSEL' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CITE' @@ -256,43 +256,43 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TIP' start: 31 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'LT' start: 14 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'OV' start: 12 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'UN' start: 11 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'MME' start: 10 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'NE' start: 9 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'NF' @@ -306,43 +306,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TIPE' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LTE' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OVE' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UNE' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MMEE' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NEEE' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NFE' @@ -356,7 +356,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'LST' @@ -370,7 +370,7 @@ registers: width: 32 - bits: - default: - - access: [w] + - properties: [w] brief: null description: null name: 'TDATA' @@ -384,7 +384,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RDATA' @@ -398,7 +398,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SLVSEL' @@ -412,7 +412,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ASLVSEL' diff --git a/spec/dev/grlib/if/spwpnp.yml b/spec/dev/grlib/if/spwpnp.yml index eed21f7c..5c103702 100644 --- a/spec/dev/grlib/if/spwpnp.yml +++ b/spec/dev/grlib/if/spwpnp.yml @@ -90,13 +90,13 @@ register-block-size: 49156 registers: - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'VEND' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'PROD' @@ -110,19 +110,19 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'MAJOR' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'MINOR' start: 16 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'PATCH' @@ -136,7 +136,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'STATUS' @@ -150,7 +150,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ACTIVE' @@ -164,7 +164,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RA' @@ -178,7 +178,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RA' @@ -192,7 +192,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'RA' @@ -206,7 +206,7 @@ registers: width: 32 - bits: - default: - - access: [r, w, cas] + - properties: [r, w, cas] brief: null description: null name: 'DID' @@ -220,13 +220,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'VEND' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'PROD' @@ -240,7 +240,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'USN' @@ -254,7 +254,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LEN' @@ -268,7 +268,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LEN' @@ -282,7 +282,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'PC' @@ -296,7 +296,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'AC' diff --git a/spec/dev/grlib/if/spwrmap.yml b/spec/dev/grlib/if/spwrmap.yml index 09ebd891..4ab47f1f 100644 --- a/spec/dev/grlib/if/spwrmap.yml +++ b/spec/dev/grlib/if/spwrmap.yml @@ -180,13 +180,13 @@ register-block-size: 4104 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 1 width: 12 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PD' @@ -200,25 +200,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SR' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PR' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HD' @@ -232,19 +232,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PL' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TS' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TR' @@ -258,115 +258,115 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RD' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ST' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SR' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AD' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LR' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PL' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TS' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IC' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ET' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TR' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PR' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TF' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AS' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LS' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LD' @@ -380,85 +380,85 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EO' start: 31 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'EE' start: 30 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PL' start: 29 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TT' start: 28 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PT' start: 27 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'HC' start: 26 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PI' start: 25 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CE' start: 24 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'EC' start: 20 width: 4 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TS' start: 18 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ME' start: 17 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'IP' start: 7 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CP' start: 4 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PC' @@ -472,127 +472,127 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'PT' start: 30 width: 2 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PL' start: 29 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TT' start: 28 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'RS' start: 27 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'SR' start: 26 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'LR' start: 22 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SP' start: 21 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AC' start: 20 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'TS' start: 18 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ME' start: 17 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TF' start: 16 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'RE' start: 15 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'LS' start: 12 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'IP' start: 7 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'PR' start: 6 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PB' start: 5 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IA' start: 4 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'CE' start: 3 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ER' start: 2 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'DE' start: 1 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'PE' @@ -606,7 +606,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RL' @@ -620,19 +620,19 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SM' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SV' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OR' @@ -646,61 +646,61 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SM' start: 24 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SV' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'OR' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UR' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AT' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AR' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IT' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IR' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SD' start: 1 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SC' @@ -714,103 +714,103 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'SP' start: 27 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'AP' start: 22 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'SR' start: 15 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PE' start: 14 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IC' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IS' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IP' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AI' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AT' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EE' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SA' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TF' start: 3 width: 1 - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'ME' start: 2 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'TA' start: 1 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PP' @@ -824,25 +824,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 8 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'CF' start: 6 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'TC' @@ -856,25 +856,25 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'MA' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'MI' start: 16 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'PA' start: 8 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ID' @@ -888,7 +888,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ID' @@ -902,7 +902,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'WE' @@ -916,7 +916,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RL' @@ -930,67 +930,67 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SR' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TT' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PL' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TS' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AC' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IA' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ME' @@ -1004,7 +1004,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IE' @@ -1018,7 +1018,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IP' @@ -1032,43 +1032,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HI' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'UA' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AH' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IT' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IN' @@ -1082,7 +1082,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IB' @@ -1096,7 +1096,7 @@ registers: width: 32 - bits: - default: - - access: [r, w1c] + - properties: [r, w1c] brief: null description: null name: 'IB' @@ -1110,7 +1110,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RL' @@ -1124,7 +1124,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RL' @@ -1138,7 +1138,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RL' @@ -1152,7 +1152,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LR' @@ -1166,61 +1166,61 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'AF' start: 24 width: 2 - - access: [r] + - properties: [r] brief: null description: null name: 'PF' start: 20 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'RM' start: 16 width: 3 - - access: [r] + - properties: [r] brief: null description: null name: 'AS' start: 14 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'AX' start: 13 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'DP' start: 12 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'ID' start: 11 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'SD' start: 10 width: 1 - - access: [r] + - properties: [r] brief: null description: null name: 'PC' start: 5 width: 5 - - access: [r] + - properties: [r] brief: null description: null name: 'CC' @@ -1234,13 +1234,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'VI' start: 16 width: 16 - - access: [r] + - properties: [r] brief: null description: null name: 'PI' @@ -1254,13 +1254,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'VI' start: 16 width: 16 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PI' @@ -1274,7 +1274,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SN' @@ -1288,7 +1288,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ML' @@ -1302,13 +1302,13 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'OC' start: 6 width: 6 - - access: [r] + - properties: [r] brief: null description: null name: 'IC' @@ -1322,37 +1322,37 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SR' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PR' start: 29 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'HD' start: 28 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PE' start: 1 width: 19 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'PD' diff --git a/spec/dev/grlib/if/spwtdp.yml b/spec/dev/grlib/if/spwtdp.yml index 6928ffbc..44087355 100644 --- a/spec/dev/grlib/if/spwtdp.yml +++ b/spec/dev/grlib/if/spwtdp.yml @@ -206,97 +206,97 @@ register-block-size: 296 registers: - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'JE' start: 24 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ST' start: 21 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EP' start: 20 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ET' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SP' start: 18 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SE' start: 17 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'LE' start: 16 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'AE' start: 15 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MAPPING' start: 8 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TD' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'MU' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SEL' start: 4 width: 2 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'ME' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RE' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'RS' @@ -310,43 +310,43 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'STM' start: 16 width: 6 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI64R' start: 13 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI64T' start: 12 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI64' start: 11 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DI' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INRX' start: 5 width: 5 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'INTX' @@ -360,25 +360,25 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NC' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'IS' start: 30 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SPWTC' start: 16 width: 8 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CPF' @@ -392,7 +392,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CET0' @@ -406,7 +406,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CET1' @@ -420,7 +420,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CET2' @@ -434,7 +434,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CET3' @@ -448,7 +448,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CET4' @@ -462,7 +462,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DPF' @@ -476,7 +476,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DET0' @@ -490,7 +490,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DET1' @@ -504,7 +504,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DET2' @@ -518,7 +518,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DET3' @@ -532,7 +532,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'DET4' @@ -546,7 +546,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TRPF' @@ -560,7 +560,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TR0' @@ -574,7 +574,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TR1' @@ -588,7 +588,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TR2' @@ -602,7 +602,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TR3' @@ -616,7 +616,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TR4' @@ -630,13 +630,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TSTC' start: 24 width: 8 - - access: [r] + - properties: [r] brief: null description: null name: 'TTPF' @@ -650,7 +650,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TT0' @@ -664,7 +664,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TT1' @@ -678,7 +678,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TT2' @@ -692,7 +692,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TT3' @@ -706,7 +706,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'TT4' @@ -720,7 +720,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'LPF' @@ -734,73 +734,73 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'NCTCE' start: 19 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SETE' start: 10 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDIE3' start: 9 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDIE2' start: 8 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDIE1' start: 7 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDIE0' start: 6 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DITE' start: 5 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DIRE' start: 4 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TTE' start: 3 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TME' start: 2 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'TRE' start: 1 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'SE' @@ -814,7 +814,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'DC' @@ -828,13 +828,13 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EN' start: 31 width: 1 - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'CD' @@ -848,7 +848,7 @@ registers: width: 32 - bits: - default: - - access: [r, w] + - properties: [r, w] brief: null description: null name: 'EDM0' @@ -862,7 +862,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'EDPF0' @@ -876,7 +876,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ED0ET0' @@ -890,7 +890,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ED0ET1' @@ -904,7 +904,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ED0ET2' @@ -918,7 +918,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ED0ET3' @@ -932,7 +932,7 @@ registers: width: 32 - bits: - default: - - access: [r] + - properties: [r] brief: null description: null name: 'ED0ET4' |