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-rw-r--r--spec/dev/grlib/if/grspw2.yml132
1 files changed, 66 insertions, 66 deletions
diff --git a/spec/dev/grlib/if/grspw2.yml b/spec/dev/grlib/if/grspw2.yml
index 116bcdb6..a9e772a6 100644
--- a/spec/dev/grlib/if/grspw2.yml
+++ b/spec/dev/grlib/if/grspw2.yml
@@ -76,121 +76,121 @@ register-block-size: 52
registers:
- bits:
- default:
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'RA'
start: 31
width: 1
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'RX'
start: 30
width: 1
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'RC'
start: 29
width: 1
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'NCH'
start: 27
width: 2
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'PO'
start: 26
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RD'
start: 17
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RE'
start: 16
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TL'
start: 13
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TF'
start: 12
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TR'
start: 11
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TT'
start: 10
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'LI'
start: 9
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TQ'
start: 8
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RS'
start: 6
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'PM'
start: 5
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TI'
start: 4
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'IE'
start: 3
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'AS'
start: 2
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'LS'
start: 1
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'LD'
@@ -204,61 +204,61 @@ registers:
width: 32
- bits:
- default:
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'NRXD'
start: 26
width: 2
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'NTXD'
start: 24
width: 2
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'LS'
start: 21
width: 3
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'EE'
start: 8
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'IA'
start: 7
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'PE'
start: 4
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'DE'
start: 3
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'ER'
start: 2
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'CE'
start: 1
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'TO'
@@ -272,13 +272,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DEFMASK'
start: 8
width: 8
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DEFADDR'
@@ -292,13 +292,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'CLKDIVSTART'
start: 8
width: 8
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'CLKDIVRUN'
@@ -312,7 +312,7 @@ registers:
width: 32
- bits:
- default:
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'DESTKEY'
@@ -326,13 +326,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TCTRL'
start: 6
width: 2
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TIMECNT'
@@ -346,133 +346,133 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'EP'
start: 23
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'TR'
start: 22
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'RP'
start: 19
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'TP'
start: 18
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'TL'
start: 17
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'LE'
start: 16
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'SP'
start: 15
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'SA'
start: 14
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'EN'
start: 13
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'NS'
start: 12
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RD'
start: 11
width: 1
- - access: [r]
+ - properties: [r]
brief: null
description: null
name: 'RX'
start: 10
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'AT'
start: 9
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'RA'
start: 8
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'TA'
start: 7
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'PR'
start: 6
width: 1
- - access: [r, w1c]
+ - properties: [r, w1c]
brief: null
description: null
name: 'PS'
start: 5
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'AI'
start: 4
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RI'
start: 3
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TI'
start: 2
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RE'
start: 1
width: 1
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'TE'
@@ -486,7 +486,7 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'RXMAXLEN'
@@ -500,13 +500,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DESCBASEADDR'
start: 10
width: 22
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DESCSEL'
@@ -520,13 +520,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DESCBASEADDR'
start: 10
width: 22
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'DESCSEL'
@@ -540,13 +540,13 @@ registers:
width: 32
- bits:
- default:
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'MASK'
start: 8
width: 8
- - access: [r, w]
+ - properties: [r, w]
brief: null
description: null
name: 'ADDR'
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-28 23:43:41 +0000