diff options
| author | Jarielle Catbagan <jcatbagan93@gmail.com> | 2015-08-04 11:03:23 -0700 |
|---|---|---|
| committer | Ed Sutter <edsutterjr@gmail.com> | 2015-08-04 18:45:33 -0400 |
| commit | 04903c8befe2f92755494072390f0caa1059e6b4 (patch) | |
| tree | b6add51ceb78a391609812a6390b2feb3d46d138 /ports | |
| parent | BBB: Migrate MMC0 clock enable from am335x_sd.c:sdInit() to cpuio.c:initCPUio() (diff) | |
| download | umon-04903c8befe2f92755494072390f0caa1059e6b4.tar.bz2 | |
BBB: cpuio.c: Configure pins used by MMC1
Diffstat (limited to 'ports')
| -rw-r--r-- | ports/beagleboneblack/cpuio.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/ports/beagleboneblack/cpuio.c b/ports/beagleboneblack/cpuio.c index a1ca3aa..1579fb0 100644 --- a/ports/beagleboneblack/cpuio.c +++ b/ports/beagleboneblack/cpuio.c @@ -173,6 +173,38 @@ pinMuxInit(void) PULLUP | MUXMODE_0; CNTL_MODULE_REG(CONF_SPI0_CS1) = RX_ON | PULL_ON | PULLUP | MUXMODE_5; + + // Configure the pins for the MMC1 interface + /* MMC1_DAT0 */ + CNTL_MODULE_REG(CONF_GPMC_AD0) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT1 */ + CNTL_MODULE_REG(CONF_GPMC_AD1) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT2 */ + CNTL_MODULE_REG(CONF_GPMC_AD2) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT3 */ + CNTL_MODULE_REG(CONF_GPMC_AD3) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT4 */ + CNTL_MODULE_REG(CONF_GPMC_AD4) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT5 */ + CNTL_MODULE_REG(CONF_GPMC_AD5) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT6 */ + CNTL_MODULE_REG(CONF_GPMC_AD6) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_DAT7 */ + CNTL_MODULE_REG(CONF_GPMC_AD7) = RX_ON | PULL_ON | + PULLUP | MUXMODE_1; + /* MMC1_CLK */ + CNTL_MODULE_REG(CONF_GPMC_CSN1) = RX_ON | PULL_OFF | + MUXMODE_2; + /* MMC1_CMD */ + CNTL_MODULE_REG(CONF_GPMC_CSN2) = RX_ON | PULL_ON | + PULLUP | MUXMODE_2; } void |