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authorJarielle Catbagan <jcatbagan93@gmail.com>2015-08-04 11:03:22 -0700
committerEd Sutter <edsutterjr@gmail.com>2015-08-04 18:45:33 -0400
commit0e24873e3a38776a8aff5f64c4338bf7135e15a9 (patch)
treedba30ccb3e9cd0bea8de5b24620c2e56d093b6b9 /ports
parentBBB: am335x.h: Add defines for register and pins used by MMC1 (diff)
downloadumon-0e24873e3a38776a8aff5f64c4338bf7135e15a9.tar.bz2
BBB: Migrate MMC0 clock enable from am335x_sd.c:sdInit() to cpuio.c:initCPUio()
The reason why the MMC0 clock enable has to be executed much earlier is a result of the invocation of sdInstalled() in sd.h before sdInit(). Without this migration, an exception occurs since the MMC0 interface has not been enabled before it is accessed by sdInstalled().
Diffstat (limited to 'ports')
-rw-r--r--ports/beagleboneblack/am335x_sd.c4
-rw-r--r--ports/beagleboneblack/cpuio.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/ports/beagleboneblack/am335x_sd.c b/ports/beagleboneblack/am335x_sd.c
index ac2392c..7eb0180 100644
--- a/ports/beagleboneblack/am335x_sd.c
+++ b/ports/beagleboneblack/am335x_sd.c
@@ -47,10 +47,6 @@ sdInit(int interface, int verbosity)
{
uint32_t cmd, arg, resp[4];
- /* Enable MMC0 clocks */
- CM_PER_REG(CM_PER_MMC0_CLKCTRL) |= CM_PER_MMC0_CLKCTRL_MODULEMODE_ENABLE;
- while (CM_PER_REG(CM_PER_MMC0_CLKCTRL) & CM_PER_MMC0_CLKCTRL_IDLEST);
-
/* Reset the MMC/SD controller */
MMCHS0_REG(SD_SYSCONFIG) = SD_SYSCONFIG_SOFTRESET;
while (!(MMCHS0_REG(SD_SYSSTATUS) & SD_SYSSTATUS_RESETDONE));
diff --git a/ports/beagleboneblack/cpuio.c b/ports/beagleboneblack/cpuio.c
index eab0a00..a1ca3aa 100644
--- a/ports/beagleboneblack/cpuio.c
+++ b/ports/beagleboneblack/cpuio.c
@@ -205,6 +205,10 @@ initCPUio(void)
// Enable clock for GPIO1:
CM_PER_REG(CM_PER_GPIO1_CLKCTRL) |= 2;
+ /* Enable MMC0 clocks */
+ CM_PER_REG(CM_PER_MMC0_CLKCTRL) |= CM_PER_MMC0_CLKCTRL_MODULEMODE_ENABLE;
+ while (CM_PER_REG(CM_PER_MMC0_CLKCTRL) & CM_PER_MMC0_CLKCTRL_IDLEST);
+
pinMuxInit();
InitUART(DEFAULT_BAUD_RATE);