sis - Simple Instruction Simulator

	Commit message (Collapse)	Author	Age	Files	Lines
*	Added support for RISCV32 systems with CLINT/PLIC	Jiri Gaisler	2020-12-15	1	-1/+2
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*	Added emulation of GR740 SOC2.25	Jiri Gaisler	2020-12-01	1	-1/+1
\| \| \| \|	* Only limited functionality with standard peripherals
*	Make grlib IP cores more modular and move them to grlib.c	Jiri Gaisler	2020-12-01	1	-26/+13
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*	Add networking support using host tap device2.23	Jiri Gaisler	2020-10-28	1	-6/+7
\| \| \| \| \| \|	* Emulation of GRETH 10/100 Mbit MAC and PHY * Supported only on linux
*	Add -rt option to synch sim to wall time	Jiri Gaisler	2020-10-25	1	-0/+18
\| \| \| \| \|	* Active during cpu power-down to avoid run-away sim time. Useful for interactive applications.
*	Fix incorrect operation on big-endian hosts	Jiri Gaisler	2020-02-29	1	-3/+3
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*	Avoid reserved word sparc on SPARC hosts	Jiri Gaisler	2020-02-26	1	-1/+1
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*	Cross-platform support for async gdb break (ctrl-c)	Jiri Gaisler	2019-11-14	1	-37/+25
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*	Support building on MinGW-W64/MSYS22.19	Jiri Gaisler	2019-11-09	1	-6/+12
\| \| \| \|	* Depends on MinGW64-readline to build
*	Improve gdb watchpoint handling	Jiri Gaisler	2019-11-08	1	-0/+2
\| \| \| \| \|	* show old/new values * stop at correct instruction
*	Added support for gdb hw break/watchpoints	Jiri Gaisler	2019-11-02	1	-17/+13
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*	Fix C formatting with indent	Jiri Gaisler	2019-06-11	1	-938/+1206
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*	Silence warnings when compiled with LLVM	Jiri Gaisler	2019-06-11	1	-15/+9
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*	Made L1 cache optional through --enable-l1cache	Jiri Gaisler	2019-05-28	1	-9/+23
\| \| \| \| \| \| \|	* Removed stale config.h * Updated autoconf script with relevant checks * Re-implemented leon3/grlib timer with less events * Bumped version to 2.15
*	Add emulated L1 cache to SMP configurations	Jiri Gaisler	2019-05-27	1	-4/+17
\| \| \| \|	* Also improve timing accuracy for certain instructions
*	Standalone sis - initial commit	Jiri Gaisler	2019-05-14	1	-0/+1362