index
:
sis
master
Simple Instruction Simulator
devel@rtems.org
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
func.c
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
Added support for RISCV32 systems with CLINT/PLIC
Jiri Gaisler
2020-12-15
1
-1
/
+2
*
Added emulation of GR740 SOC
2.25
Jiri Gaisler
2020-12-01
1
-1
/
+1
*
Make grlib IP cores more modular and move them to grlib.c
Jiri Gaisler
2020-12-01
1
-26
/
+13
*
Add networking support using host tap device
2.23
Jiri Gaisler
2020-10-28
1
-6
/
+7
*
Add -rt option to synch sim to wall time
Jiri Gaisler
2020-10-25
1
-0
/
+18
*
Fix incorrect operation on big-endian hosts
Jiri Gaisler
2020-02-29
1
-3
/
+3
*
Avoid reserved word sparc on SPARC hosts
Jiri Gaisler
2020-02-26
1
-1
/
+1
*
Cross-platform support for async gdb break (ctrl-c)
Jiri Gaisler
2019-11-14
1
-37
/
+25
*
Support building on MinGW-W64/MSYS2
2.19
Jiri Gaisler
2019-11-09
1
-6
/
+12
*
Improve gdb watchpoint handling
Jiri Gaisler
2019-11-08
1
-0
/
+2
*
Added support for gdb hw break/watchpoints
Jiri Gaisler
2019-11-02
1
-17
/
+13
*
Fix C formatting with indent
Jiri Gaisler
2019-06-11
1
-938
/
+1206
*
Silence warnings when compiled with LLVM
Jiri Gaisler
2019-06-11
1
-15
/
+9
*
Made L1 cache optional through --enable-l1cache
Jiri Gaisler
2019-05-28
1
-9
/
+23
*
Add emulated L1 cache to SMP configurations
Jiri Gaisler
2019-05-27
1
-4
/
+17
*
Standalone sis - initial commit
Jiri Gaisler
2019-05-14
1
-0
/
+1362