| Commit message (Collapse) | Author | Age | Files | Lines |
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Unconditionally make a CONFIGURE_TICKS_PER_TIMESLICE value less than or equal
to zero an error.
Update #4986.
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Updates #3053.
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Updates #3053.
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The use of CONFIGURE_APPLICATION_NEEDS_TIMER_DRIVER does not define
anything, so remove the <rtems/btimer.h> include.
Update #3875.
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- Add a small memory test config file.
- Update the small memory PowerPC BSPs to use the new test config.
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Update #3533.
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calling rtems_print_printer_fprintf_putc() results in usage of vfprintf()
which may use floating point instructions in its implementation.
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This change is part of the testsuite Makefile.am reorganization.
Update #3382
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This header file contained timing overhead values which are hard to
maintain.
Update #3254.
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Update #3170.
Update #3199.
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The TEST_EXTERN is a used only by the system.h style tests and they use
CONFIGURE_INIT appropriately.
Update #3170.
Update #3199.
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- Remove the printf support leaving the direct printk support configured
with TESTS_USE_PRINTK and all other output goes via a buffered vsniprintf
call to printk.
- Control the test's single init for functions and global data with
TEST_INIT and not CONFIGURE_INIT. They are now separate.
Updates #3170.
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Replace Thread_Scheduler_control::control and
Thread_Scheduler_control::own_control with new
Thread_Scheduler_control::home.
Update #2556.
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Introduce Thread_queue_Lock_context to contain the context necessary for
thread queue lock and thread wait lock acquire/release operations to
reduce the Thread_Control size.
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Add _Thread_queue_Context_set_MP_callout() to simplify
_Thread_queue_Context_initialize(). This makes it possible to more
easily add additional fields to Thread_queue_Context.
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Drop the multiprocessing (MP) dependent callout parameter from the
thread queue extract, dequeue, flush and unblock methods. Merge this
parameter with the lock context into new structure Thread_queue_Context.
This helps to gets rid of the conditionally compiled method call
helpers.
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Uniformly use *_Get() to get an object by identifier with a lock
context.
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Use _Objects_Get_local() for _Semaphore_Get_interrupt_disable() to get
rid of the location parameter. Move remote object handling to semaphore
MPCI support.
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This is a preparation to remove the Giant lock.
Update #2555.
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Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable()
into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant().
This is a preparation to remove the Giant lock.
Update #2555.
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Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename
_ISR_Enable_without_giant() into _ISR_Local_enable().
This is a preparation to remove the Giant lock.
Update #2555.
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Replace _Thread_Disable_dispatch() with _Thread_Dispatch_disable().
Replace _Thread_Enable_dispatch() with _Thread_Dispatch_enable().
This is a preparation to remove the Giant lock.
Update #2555.
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Replace _Thread_Get() with _Thread_Get_interrupt_disable() to avoid the
Giant lock.
Update #2555.
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Update #2555.
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Update #2555.
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Add rtems_interrupt_local_disable|enable() as suggested by Pavel Pisa to
emphasize that interrupts are only disabled on the current processor.
Do not define the rtems_interrupt_disable|enable|flash() macros and
functions on SMP configurations since they don't ensure system wide
mutual exclusion.
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It is wrong to restore the floating point context here. The
_Context_Switch() ends up in _Thread_Handler() which will call
_Thread_Restore_fp(). In _Thread_Do_dispatch() the FP restore is after
the context switch.
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There is no NULL pointer access. Please note that
_Thread_Get_executing() != executing variable in Low_task().
This reverts commit 5611839a7e2e371dd1f327c336c785095f634e55.
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The _Thread_Dispatch() function is quite complex and the time to set up
and tear down the stack frame is significant. Split this function into
two parts. The complex part is now in _Thread_Do_dispatch(). Call
_Thread_Do_dispatch() in _Thread_Enable_dispatch() only if necessary.
This increases the average case performance.
Simplify _Thread_Handler() for SMP configurations.
Update #2273.
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The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task context. The processor architecture specific
low-level task context switch code will mark that a task context is no
longer executing and waits that the heir context stopped execution
before it restores the heir context and resumes execution of the heir
task. So there is one point in time in which a processor is without a
task. This is essential to avoid cyclic dependencies in case multiple
tasks migrate at once. Otherwise some supervising entity is necessary to
prevent life-locks. Such a global supervisor would lead to scalability
problems so this approach is not used. Currently the thread dispatch is
performed with interrupts disabled. So in case the heir task is
currently executing on another processor then this prolongs the time of
disabled interrupts since one processor has to wait for another
processor to make progress.
It is difficult to avoid this issue with the interrupt latency since
interrupts normally store the context of the interrupted task on its
stack. In case a task is marked as not executing we must not use its
task stack to store such an interrupt context. We cannot use the heir
stack before it stopped execution on another processor. So if we enable
interrupts during this transition we have to provide an alternative task
independent stack for this time frame. This issue needs further
investigation.
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Do not allocate the scheduler control structures from the workspace.
This is a preparation step for configuration of clustered/partitioned
schedulers on SMP.
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Scheduler operations must be free of a global scheduler context to
enable partitioned/clustered scheduling.
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Delete global variables _Priority_Major_bit_map and _Priority_Bit_map.
This makes it possible to use multiple priority scheduler instances for
example with clustered/partitioned scheduling on SMP.
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This function was only used in some tests and can be replaced with other
functions.
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Some _Context_Switch() invocations end up in _Thread_Handler(). Create
the right context for this function.
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Add and use _ISR_Disable_without_giant() and
_ISR_Enable_without_giant() if RTEMS_SMP is defined.
On single processor systems the ISR disable/enable was the big hammer
which ensured system-wide mutual exclusion. On SMP configurations this
no longer works since other processors do not care about disabled
interrupts on this processor and continue to execute freely.
On SMP in addition to ISR disable/enable an SMP lock must be used.
Currently we have only the Giant lock so we can check easily that ISR
disable/enable is used only in the right context.
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Use a per-CPU thread dispatch disable level. So instead of one global
thread dispatch disable level we have now one instance per processor.
This is a major performance improvement for SMP. On non-SMP
configurations this may simplifiy the interrupt entry/exit code.
The giant lock is still present, but it is now decoupled from the thread
dispatching in _Thread_Dispatch(), _Thread_Handler(),
_Thread_Restart_self() and the interrupt entry/exit. Access to the
giant lock is now available via _Giant_Acquire() and _Giant_Release().
The giant lock is still implicitly acquired via
_Thread_Dispatch_decrement_disable_level().
The giant lock is only acquired for high-level operations in interrupt
handlers (e.g. release of a semaphore, sending of an event).
As a side-effect this change fixes the lost thread dispatch necessary
indication bug in _Thread_Dispatch().
A per-CPU thread dispatch disable level greatly simplifies the SMP
support for the interrupt entry/exit code since no spin locks have to be
acquired in this area. It is only necessary to get the current
processor index and use this to calculate the address of the own per-CPU
control. This reduces the interrupt latency considerably.
All elements for the interrupt entry/exit code are now part of the
Per_CPU_Control structure: thread dispatch disable level, ISR nest level
and thread dispatch necessary. Nothing else is required (except CPU
port specific stuff like on SPARC).
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Move implementation specific parts of sem.h and sem.inl into new header
file semimpl.h. The sem.h contains now only the application visible
API.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
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