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The current ARM support in libdebugger does not cover Cortex-M series
cores since it requires support for CP14 system register accessor
instructions. Cortex-M series cores support debug monitor mode, but its
configuration is accessed by memory mapped registers instead of using
CP14. This omits building libdebugger from BSPs that use a cortex-m ABI
flag.
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Merge the "default" and "default-by-variant" attributes. Use an
"enabled-by" expression to select the default value based on the enabled
set. This makes it possible to select default values depending on other
options. For example you could choose memory settings based on whether
RTEMS_SMP is enabled or disabled.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
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Add MicroBlaze support for libdebugger. This uses only software break
type instructions to provide self-hosted GDB debugging support for
applications since internal control of debug hardware is not possible.
Also of note, this implementation for MicroBlaze would typically use the
brki instruction for software break, but instead uses an illegal opcode
to manage software breaks as exceptions. This is due to poor interaction
with the debug hardware where the debug hardware will intercept software
breaks instead of allowing the software break vector to execute.
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This adds support for libdebugger under AArch64 using software
breakpoints and the single-step execution mode present in all AArch64
CPUs.
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Closes #4533
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