| Commit message (Collapse) | Author | Age | Files | Lines |
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closes #2443.
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updates #2452.
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updates #2446.
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Add multilib section for ARM and PowerPC
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* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
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Use register g6 for the per-CPU control of the current processor. The
register g6 is reserved for the operating system by the SPARC ABI. On
Linux register g6 is used for a similar purpose with the same method
since 1996.
The register g6 must be initialized during system startup and then must
remain unchanged.
Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures. An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
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The registers g2 through g4 are reserved for applications. GCC uses
them as volatile registers by default. So they are treated like
volatile registers in RTEMS as well.
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The TLS section symbols had wrong values in case of an empty TLS data
section and a nonempty TLS BSS section.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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In PDF, DVI, and PostScript files, the contents of the @top
node were being printed. These are intended only for info
and html output formats.
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See http://www.rtems.org/pipermail/rtems-devel/2013-February/002466.html
for instructions on how to do this.
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Texinfo 5.0 is a complete reimplementation and has stricter
interpretations of the texinfo language.
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Port
+ v850 does not have appear to have any optimized bit scan instructions
+ v850 does have single instructions for wap u16 and u32
+ Code path optimization preferences set
+ Add BSP variants for each GCC CPU model flag and a README
- v850e1 variant does not work (fails during BSP initialization)
BSP for GDB v850 Simulator
+ linkcmds matches defaults in GDB simulator with RTEMS mods
+ crt1.c added from v850 newlib port for __main()
+ BSP exits cleanly
+ printk and console I/O work
+ uses clock tick from IDLE task
+ Tests not requiring real clock ISR work
Documentation
+ CPU Supplment chapter for v850 added
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
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PR 1793/doc
* .cvsignore, Makefile.am, README, configure.ac, index.html.in,
main.am, project.am, ada_user/.cvsignore, ada_user/ada_user.texi,
ada_user/example.texi, bsp_howto/.cvsignore,
bsp_howto/bsp_howto.texi, cpu_supplement/.cvsignore,
cpu_supplement/cpu_supplement.texi, cpu_supplement/preface.texi,
develenv/.cvsignore, develenv/develenv.texi, develenv/intro.texi,
filesystem/.cvsignore, filesystem/filesystem.texi,
filesystem/preface.texi, networking/.cvsignore,
networking/networking.texi, networking/preface.texi,
porting/.cvsignore, porting/porting.texi, porting/preface.texi,
posix1003.1/.cvsignore, posix1003.1/posix1003_1.texi,
posix_users/.cvsignore, posix_users/posix_users.texi,
posix_users/preface.texi, shell/.cvsignore, shell/preface.texi,
shell/shell.texi, started/.cvsignore, started/started.texi,
user/.cvsignore, user/c_user.texi, user/dirstat.texi,
user/example.texi, user/glossary.texi, user/preface.texi: Convert
from texi2www to texi2html.
* texi2html_init.in: New file.
* rtems_footer.html.in, rtems_header.html.in: Removed.
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* ada_user/version.texi, bsp_howto/version.texi,
cpu_supplement/version.texi, develenv/version.texi,
filesystem/version.texi, networking/version.texi,
porting/version.texi, posix1003.1/version.texi,
posix_users/version.texi, shell/version.texi, started/version.texi,
user/version.texi: Update to match when files in directory where last
touched.
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PR 1752/doc
* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
cpu_supplement/cpu_supplement.texi: Remove TI C4x CPU Supplement
chapter.
* cpu_supplement/tic4x.t: Removed.
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* Makefile.am, configure.ac, common/cpright.texi, common/rtems.texi.in,
cpu_supplement/.cvsignore, started/Makefile.am, started/binaries.t,
started/buildc.t, started/buildrt.t, started/intro.t,
started/nextstep.t, started/nt.t, started/require.t,
started/sample.t, started/started.texi, started/version.texi: Major
update which includes removal of references to specific tool versions
and patches.
* started/tversions.texi.in: Removed.
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PR 1565/cpukit
* cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Merge
SPARC64 port.
* cpu_supplement/sparc64.t: New file.
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* cpu_supplement/Makefile.am: Include main.am.
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* cpu_supplement/arm.t: Update.
* cpu_supplement/preface.texi: Typo.
* cpu_supplement/general.t: Expanded abbreviation.
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* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
cpu_supplement/cpu_supplement.texi: Add shell for Atmel AVR chapter.
* cpu_supplement/avr.t: New file.
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* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
cpu_supplement/cpu_supplement.texi: Add Lattice Mico32 support.
* cpu_supplement/lm32.t: New file.
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* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
cpu_supplement/arm.t, cpu_supplement/bfin.t,
cpu_supplement/cpu_supplement.texi, cpu_supplement/i386.t,
cpu_supplement/m68k.t, cpu_supplement/mips.t,
cpu_supplement/powerpc.t, cpu_supplement/preface.texi,
cpu_supplement/sh.t: Remove duplicated text from each CPU specific
chapter. This text was necessary when each CPU was a separate manual
but now only needs to be one place and that is in an introductory
chapter.
* cpu_supplement/general.t: New file.
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* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
cpu_supplement/sparc.t, cpu_supplement/tic4x.t, porting/cpuinit.t,
user/conf.t, user/init.t: Move interrupt_stack_size field from CPU
Table to Configuration Table. Eliminate CPU Table from all ports.
Delete references to CPU Table in all forms.
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* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
cpu_supplement/sparc.t, cpu_supplement/tic4x.t, user/conf.t: Moved
most of the remaining CPU Table fields to the Configuration Table.
This included pretasking_hook, predriver_hook, postdriver_hook,
idle_task, do_zero_of_workspace, extra_mpci_receive_server_stack,
stack_allocate_hook, and stack_free_hook. As a side-effect of this
effort some multiprocessing code was made conditional and some style
clean up occurred.
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* cpu_supplement/powerpc.t: Eliminate PowerPC specific elements from
the CPU Table. They have been replaced with variables named bsp_XXX
as needed.
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