| Commit message (Collapse) | Author | Age | Files | Lines |
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In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates
a level parameter and returns a boolean value.
Update #2811.
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This is a preparation to remove the Giant lock.
Update #2555.
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Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable()
into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant().
This is a preparation to remove the Giant lock.
Update #2555.
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Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename
_ISR_Enable_without_giant() into _ISR_Local_enable().
This is a preparation to remove the Giant lock.
Update #2555.
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Add _Debug_Is_owner_of_giant(). This makes it possible to assert the
opposite.
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Make _ISR_Enable_without_giant() available for non-SMP configurations.
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Disable interrupts as the first step in _Internal_error_Occurred() to
get a defined execution context for the fatal extensions.
Make _ISR_Disable_without_giant() available for non-SMP configurations.
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Add and use _ISR_Disable_without_giant() and
_ISR_Enable_without_giant() if RTEMS_SMP is defined.
On single processor systems the ISR disable/enable was the big hammer
which ensured system-wide mutual exclusion. On SMP configurations this
no longer works since other processors do not care about disabled
interrupts on this processor and continue to execute freely.
On SMP in addition to ISR disable/enable an SMP lock must be used.
Currently we have only the Giant lock so we can check easily that ISR
disable/enable is used only in the right context.
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Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().
The ISR disable/enable interface has no parameter to pass a specific
object. Thus it is only possible to implement a single global lock
object with this interface. Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.
Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections. This works since on single processor configurations there is
only one thread of execution that can block. On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).
The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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* score/Makefile.am, score/preinstall.am,
score/include/rtems/score/isr.h, score/include/rtems/score/percpu.h:
Split isrlevel into its own file to avoid a circular dependancy in
smp code.
* score/include/rtems/score/isrlevel.h: New file.
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