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Commit message (
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Author
Age
Files
Lines
*
riscv: Optimize context switch and interrupts
Sebastian Huber
2018-06-29
2
-17
/
+123
*
riscv: Fix _CPU_Context_Initialize() prototype
Sebastian Huber
2018-06-29
1
-6
/
+6
*
riscv: Implement _CPU_Context_validate()
Sebastian Huber
2018-06-29
1
-6
/
+1
*
riscv: Make some CPU port defines visible to asm
Sebastian Huber
2018-06-29
2
-37
/
+49
*
riscv: Implement _CPU_Context_volatile_clobber()
Sebastian Huber
2018-06-29
1
-4
/
+1
*
riscv: Remove mstatus from thread context
Sebastian Huber
2018-06-29
2
-11
/
+14
*
riscv: Fix CPU_STACK_ALIGNMENT
Sebastian Huber
2018-06-29
1
-1
/
+2
*
riscv: Remove RISCV_GCC_RED_ZONE_SIZE
Sebastian Huber
2018-06-29
1
-3
/
+0
*
riscv: Enable interrupts during dispatch after ISR
Sebastian Huber
2018-06-29
2
-0
/
+6
*
riscv: Add _CPU_Get_current_per_CPU_control()
Sebastian Huber
2018-06-28
2
-0
/
+23
*
riscv: Avoid namespace pollution
Sebastian Huber
2018-06-28
1
-7
/
+1
*
riscv: Optimize and fix interrupt disable/enable
Sebastian Huber
2018-06-28
1
-15
/
+16
*
riscv: Add dummy SMP support
Sebastian Huber
2018-06-28
2
-125
/
+27
*
riscv: Implement ISR set/get level
Sebastian Huber
2018-06-28
1
-2
/
+13
*
Rework initialization and interrupt stack support
Sebastian Huber
2018-06-27
1
-15
/
+0
*
score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Sebastian Huber
2018-06-27
1
-0
/
+5
*
Add _CPU_Counter_frequency()
Sebastian Huber
2018-06-15
1
-0
/
+2
*
Remove register keyword from public header files
Sebastian Huber
2018-04-16
1
-1
/
+1
*
riscv/include/rtems/score/types.h: Eliminate this file
Joel Sherrill
2018-03-12
2
-71
/
+4
*
Remove make preinstall
Chris Johns
2018-01-25
8
-0
/
+2558