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* Simplify TLS support in context switchSebastian Huber2017-06-091-1/+0
* Add support for IBM PowerPC 750 chip.Phong Pham2017-05-293-0/+6
* build-system: Parallel build all subdirs.Chris Johns2017-05-241-1/+1
* sparc: Adjust assembly to improve compability with LLVMJacob Hansen2017-05-143-5/+5
* sh/sh7750/sci/sh4uart.c: ix misleading indentation warningJoel Sherrill2017-04-241-1/+1
* powerpc/new-exceptions/bspsupport/ppc_exc_print.c: Fix printf() format warningsJoel Sherrill2017-04-241-2/+2
* powerpc/mpc5xx/console-generic/console-generic.c: Use updated struct termios ...Joel Sherrill2017-04-241-2/+2
* libcpu/../mpc5xx/.../vectors_init.c: Using inttype macros fixes 39 format war...Cillian O'Donnell2017-04-071-39/+41
* bsps/arm: Add Performance Monitors ExtensionSebastian Huber2017-03-271-1/+446
* termios: Synchronize with latest FreeBSD headersKevin Kirspel2017-03-2214-33/+38
* powerpc: Optimize AltiVec context switchSebastian Huber2017-03-072-31/+30
* powerpc: Fix AltiVec context switchSebastian Huber2017-03-071-12/+12
* powerpc: Fix warningsSebastian Huber2017-03-021-1/+1
* powerpc: Fix interrupt thread dispatchSebastian Huber2017-03-021-2/+1
* bsps/powerpc: Fix warningSebastian Huber2017-02-151-2/+0
* bsps/arm: Fix prototypeSebastian Huber2017-02-151-1/+1
* bsps/powerpc: Fix warningsSebastian Huber2017-02-154-58/+61
* score: Fix ARM and PowerPC context initializationSebastian Huber2016-12-021-0/+1
* libdebugger: Build for ARM's without a CP15.Chris Johns2016-12-021-1/+2
* sparc: Optimize _ISR_Handler()Sebastian Huber2016-11-281-0/+37
* or1k: Avoid multiple iterations over cacheMartin Erik Werner2016-11-281-0/+27
* or1k: Remove secondary functions in cache managerMartin Erik Werner2016-11-281-56/+34
* or1k: Avoid excessive ISR toggle in cache managerMartin Erik Werner2016-11-282-44/+123
* or1k: Indent & comment fix in cache.cMartin Erik Werner2016-11-281-14/+25
* or1k: Add functions for entire cache operationsMartin Erik Werner2016-11-281-3/+42
* score: Fix interrupt profilingSebastian Huber2016-11-241-20/+13
* powerpc: Fix interrupt profiling for e6500Sebastian Huber2016-11-241-1/+3
* powerpc/mpc5xx: Rename CPU_Interrupt_frameSebastian Huber2016-11-212-4/+4
* powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2016-11-182-20/+66
* score: Allow interrupts during thread dispatchSebastian Huber2016-11-181-12/+17
* powerpc: Add up to date CPU_Interrupt_frameSebastian Huber2016-11-183-379/+4
* powerpc: Move legacy CPU_Interrupt_frameSebastian Huber2016-11-181-0/+33
* bsps/powerpc: Avoid use of CPU_Interrupt_frameSebastian Huber2016-11-181-3/+3
* sparc64: Rename CPU_Minimum_stack_frameSebastian Huber2016-11-181-1/+1
* bsps/mips: Use <libcpu/isr_entries.h>Sebastian Huber2016-11-181-0/+2
* powerpc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2016-11-101-1/+8
* score: Add and use Thread_Control::is_idleSebastian Huber2016-11-092-10/+2
* powerpc: Fix SMP context switchSebastian Huber2016-09-081-61/+62
* bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by l...Pavel Pisa2016-09-071-48/+60
* bsps/arm: use defines for cache type register format field.Pavel Pisa2016-09-071-9/+30
* arm/bsps: CP15 and basic cache support entire cache clean for more architectu...Pavel Pisa2016-07-201-2/+42
* bsps/arm: do not disable MMU during translation table management operations.Pavel Pisa2016-07-201-0/+16
* bsps/powerpc: Fix AtliVec context switchSebastian Huber2016-07-192-62/+68
* Beaglebone: Update PWM driver imported from BBBIOPunit Vara2016-07-041-1/+96
* bsps/arm: basic on core cache support changed to use l1 functions.Pavel Pisa2016-07-041-3/+28
* bsps/arm: Change code to explicit selection of cache implementation for ARM B...Pavel Pisa2016-07-041-104/+30
* rtems+bsps/cache: Define cache manager operations for code synchronization an...Pavel Pisa2016-07-041-0/+42
* arm/score and shared: define ARM hypervisor mode and alternate vector table b...Pavel Pisa2016-07-041-0/+30
* score: Rename _ISR_Disable() and _ISR_Enable()Sebastian Huber2016-05-207-54/+54
* score: Rename _ISR_Disable_without_giant()Sebastian Huber2016-05-201-12/+12
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