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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860.
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being set to 0 to indicate that there should be no Clock Tick. This
was used by the Timing Tests to avoid clock tick overhead perturbing
execution times. Now the Timing Tests simply leave the Clock Tick
Driver out of the Device Driver Table.
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unnecessarily uses any variables defined by the BSP. On this
sweep, use of BSP_Configuration and Cpu_table was eliminated.
A significant part of this modification was the addition of
macros to access fields in the RTEMS configuration structures.
This is necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
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particular, using bsp.h, or getting information from the BSP which
should properly be obtained from RTEMS is forbidden. This is
necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
The changes primarily eliminated the need to include bsp.h and
peeking at BSP_Configuration. The use of Cpu_table in each
BSP needs to be eliminated.
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in libcpu/powerpc/mpc860/clock/clock.c:InstallClock() the reload value for
the PIT is defined as:
pit_value = (BSP_Configuration.microseconds_per_tick *
Cpu_table.clicks_per_usec) - 1 ;
What exactly is a tick, and what is a click?
My confusion stems from the fact, that Jay defines clicks_per_usec to 1
which is correct for his configuration, where a 4MHz clock is predivided
by 4 and then fed to the PIT. So I assume a "click" is just the period of
the PIT input frequency.
However, our HW config seems to have 32.768 kHz crystal input for PIT.
Mandatory division by 4 means 8.196kHz (122usec) at the PIT.
I think, the above assignment should read:
pit_value = (BSP_Configuration.microseconds_per_tick /
Cpu_table.clicks_per_usec) - 1;
where I can define Cpu_table.clicks_per_usec in bspstart.c to 122
(clicks_per_usec). That would lead to a PIT reload value of
10000/122 - 1 = 81 to reach a 10ms "tick" period.
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In c/src/exec/score/cpu/powerpc/rtems/score/ppc.h:
A lot of hardware interrupts were omitted. Patch enclosed.
I have also added the 821.
In c/src/exec/score/cpu/powerpc/rtems/score/cpu.h:
My patch adds the 821.
In c/src/exec/score/cpu/powerpc/cpu.c:
I have added the MPC821, and also fixed up for the missing hardware
interrupts. It is also inconsistent with
c/src/lib/libcpu/powerpc/mpc860/vectors/vectors.S. This has been fixed.
In c/src/lib/libcpu/powerpc/mpc860/vectors/vectors.S:
Fixed an inconsistency with cpu.c.
I also include some new files to go with the above patches. These are the
cpu library rtems-19990331/c/src/lib/libcpu/powerpc/mpc821/* and
c/src/exec/score/cpu/powerpc/mpc821.h which are minor modifications of
the 860 equivalents.
Other comments:
The various accesses to the DPRAM on the 860 are done with a linktime
symbol. This could be done dynamically at run time by reading the immr
register, and masking off the lower 16 bits. This takes the same amount
of time as loading an address constant, and the same number of
instructions as well (2).
In c/src/lib/libcpu/powerpc/mpc860/console-generic/console-generic.c:
This will silently fail if you attempt to use SCC1. This is only relevant
if you are not using SCC1 for ethernet.
This file also sets one of port B output pins for each port. This is NOT
generic, it should be in the BSP specific console driver.
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