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* Patch from Erik Ivanenko <erik.ivanenko@utoronto.ca> to eliminate aJoel Sherrill1999-04-191-1/+2
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* Fixed some spacing issues.Joel Sherrill1999-04-191-4/+5
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* Patch from "Tony R. Ambardar" <tonya@ece.ubc.ca> and blessed byJoel Sherrill1999-03-301-2/+2
| | | | | Ian Lance Taylor <ian@airs.com> to note that condition codes are modified.
* Patch from Ian Lance Taylor <ian@airs.com> to correct previous interruptJoel Sherrill1999-03-081-3/+2
| | | | patch.
* Patch from Ian Lance Taylor <ian@airs.com>:Joel Sherrill1999-02-181-6/+6
| | | | | | | | | Here is a patch which slightly improves the i386 interrupt handling macros. These macros were written to use both input and output parameters, which is not necessary. This patch changes them to use only an input or output parameter, as appropriate. It also changes the constraints to permit the interrupt level to be loaded directly in and out of memory, rather than always requiring a register.
* Patch from Emmanuel Raguet <raguet@crf.canon.fr>:Joel Sherrill1999-02-181-0/+147
| | | | | | | You will find enclosed a patch which contains, for Intel PC386 target : - an Ethernet driver for DEC21140 device based boards. - a simple cache management with paging mechanism.
* Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.Joel Sherrill1998-08-051-3/+6
| | | | Enabled on the pc386.
* Patch from Eric VALETTE <valette@crf.canon.fr>:Joel Sherrill1998-07-231-0/+365
Here is a enhanced version of my previous patch. This patch enables to potentially share the new interrupt management code for all Intel targets (pc386, go32 and force386) bsp. Note : this patch is complete only for pc386. It still needs to be completed for go32 and force386. I carrefully checked that anything needed is in for force386 (only some function name changes for IDT manipulation and GDT segment manipulation). But anyway I will not be able to test any of theses targets...