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path: root/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c (follow)
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* bsps: Move startup files to bspsSebastian Huber2018-04-201-673/+0
* uC5282/startup/bspstart.c: Fix printf() format warningsJoel Sherrill2017-04-241-6/+16
* mcf5282: Move cache to libcpu and update av5282 and uC5282 BSPsJoel Sherrill2014-10-161-108/+22
* m68k/uC5282: Fix warningsJoel Sherrill2014-10-131-48/+4
* m68k/uC5282/startup/bspstart.c: Add include of <bsp/bootcard.h> to fix warnin...Joel Sherrill2014-10-091-12/+5
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-211-1/+1
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
* 2011-03-15 Till Straumann <strauman@slac.stanford.edu>Joel Sherrill2011-03-151-5/+20
* 2011-02-17 Till Straumann <strauman@slac.stanford.edu>Joel Sherrill2011-02-171-4/+67
* 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-02-111-7/+7
* * startup/bspstart.c: Clean up some warnings.Eric Norum2010-04-261-1/+2
* Whitespace removal.Ralf Corsepius2009-11-291-18/+18
* 2009-11-03 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2009-11-031-1/+1
* 2009-09-09 Till Straumann <strauman@slac.stanford.edu>Till Straumann2009-09-091-0/+40
* Enable data cache.Eric Norum2009-07-301-5/+4
* PR 1420/bspsEric Norum2009-07-281-2/+7
* As per Freescale chip errata, disable buffered writes.Eric Norum2009-06-021-3/+15
* 2008-09-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-09-231-3/+3
* 2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-09-161-6/+6
* 2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-09-161-37/+12
* Back out changes from 2008-05-16 -- they don't seem to work.Eric Norum2008-05-191-4/+24
* Use shared version of bootstrap to set up workspace.Eric Norum2008-05-161-24/+4
* 2008-05-12 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-05-121-1/+0
* More clean up of FPGA interrupts.Eric Norum2008-04-241-2/+1
* startup/bspstart.c: Clean up non-FPGA use of EPORT interrupts.Eric Norum2008-04-081-11/+3
* 2007-12-11 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-111-9/+1
* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-6/+0
* 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-031-6/+0
* 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2007-11-261-199/+202
* 2007-03-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2007-03-121-1/+1
* 2007-03-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2007-03-111-3/+2
* * startup/bspstart.c: Changed BSP_installVME_isr() so thatTill Straumann2006-12-151-69/+138
* Add bsp_setbenv system call.Eric Norum2006-08-011-1/+2
* Allow single spurious FPGA interrupt.Eric Norum2006-05-151-3/+8
* Improve handling of unexpected FPGA interrupt conditions.Eric Norum2006-05-151-3/+19
* Add default exception handler.Eric Norum2006-04-111-0/+52
* Add missing reset cause bit.Eric Norum2006-03-241-0/+1
* Avoid possible division by zero.Eric Norum2006-02-061-1/+1
* Add code to maintain CPU load average.Eric Norum2006-01-291-1/+4
* Add another 'extended BSP' routine which returns reboot status register infor...Eric Norum2005-12-191-0/+37
* Assign copyright to OAR since all files descend from OAR's source.Eric Norum2005-11-071-6/+2
* Add bsp_reset bootrom call.Eric Norum2005-09-161-0/+1
* Enable CS1* and CS2* now that Arcturus bootstrap PROMs no longer take care of...Eric Norum2005-07-061-0/+1
* Try to maintain compatability with everyone else's VBR changes.Eric Norum2005-05-241-5/+0
* Followup fix to Joel's earlier _VBR changes.Eric Norum2005-05-111-0/+5
* Try insructioin-only cache.Eric Norum2005-04-211-7/+19
* Expose some read/write copies of configuration registers.Eric Norum2005-04-191-22/+25
* Set up IRQ1* handling properly.Eric Norum2005-04-101-10/+11
* FPGA interrupt status register is now 16-bit.Eric Norum2005-04-091-3/+56
* Add NOP after writing the CACR is there to address the issueEric Norum2005-03-101-1/+24