| Commit message (Collapse) | Author | Age | Files | Lines |
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Adjust build support files to new directory layout.
This patch is a part of the BSP source reorganization.
Update #3285.
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Intel has obsoleted this hardware and the BSP was never completed.
closes #3086.
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Update #2468.
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Move the gdb stub from the i386 UART code to use the libchip drivers.
Use any ports discovered during the probes.
Add gdb control to the boot command line.
Change the device naming to the full device path, not a partial path.
For example /dev/com1.
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The current support for the Edison supports a single polled
UART for input and output plus a simulated clock tick. The
activities forward for supporting the Edison have been posted
on the RTEMS mailing lists and at:
http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html
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PR 1802
* Makefile.am, configure.ac, preinstall.am, clock/ckinit.c,
start/start16.S, startup/bspstart.c, startup/ldsegs.S: Add SMP
support for i386.
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* clock/rtc.c, console/console.c, console/inch.c, console/outch.c,
include/bsp.h, include/crt.h, ne2000/ne2000.c, startup/bspcmdline.c,
startup/bspstart.c, startup/ldsegs.S, timer/timer.c,
timer/timerisr.S: Fix typo where license said found in found in.
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* start/start.S: Replace the call to _return_to_monitor by
hlt instruction.
* startup/ldsegs.S: Remove the _return_to_monitor function.
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* startup/ldsegs.S: put IDT and GDT into data segment. The CPU modifies
the 'accessed' bit and GDB's (rtems-gdb-stub) text segment checksum
comparison failed...
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* startup/ldsegs.S: Include <rtems/asm.h> instead of <asm.h>.
* include/bsp.h: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
* include/bsp.h: Include <rtems/console.h> instead of <console.h>.
* include/bsp.h: Include <rtems/iosupp.h> instead of <iosupp.h>.
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* clock/ckinit.c, clock/rtc.c, console/console.c, console/inch.c,
console/outch.c, ide/ide.c, include/bsp.h, include/crt.h,
ne2000/ne2000.c, start/start.S, startup/bspstart.c, startup/exit.c,
startup/ldsegs.S, startup/linkcmds, timer/timer.c, timer/timerisr.S:
URL for license changed.
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PR 368/filesystems
* startup/ldsegs.S: Increase alignment.
* Makefile.am, configure.ac, include/bsp.h, wrapup/Makefile.am:
Added IDE supporting infrastructure.
* ide/Makefile.am, ide/ide.c, ide/idecfg.c: New files. Added
BSP support for libchip standard ide driver.
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* startup/ldsegs.S: #include <asm.h>.
* include/bsp.h: Remove _IBMPC_chrdy (is not a public function).
Remove printk (Now in bspIo.h).
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that converts the libbsp/i386 subdirectory to full automake.
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problems:
- unclosed comment in pc386/start/start16.S
- bad #endif in pc386/startup/ldseg.S
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delay loop in this BSP. Here is his response to a question about
the patch:
Yes, or that other machine has a different chipset with different
timing requirements on enabling Gate 20. I am strongly suspecting
that it may some how related to the video card I am using (on my
old P-75 target it was plain PCI VGA, on my new one it is Diamond Stealth
3D 2000).
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proper Multiboot signature to pc386 BSP. This enables Grub to
recognize the image.
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initialization typo and make i8259s_cache only accessed from C.
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bug report from David Decotigny <David.Decotigny@irisa.fr>:
During the last few days, I've been back working on RTEMS. Let me
remind you that RTEMS didn't boot on our (old) Dell P90 machines (ref:
PC 590) : we could only get a reboot out of them.
1/ The symptoms
---------------
Hopefully, the problem was rather deterministic. The stack couldn't be
written correctly : issueing one or more "push" would always push '0'
onto the stack. The way to solve this was to issue a "pop", such as
"pushl eax ; popl eax". After this "pop", the stack would be writeable
again.
BUT, it will be writable for 8 consecutive "push"s. After these 8
"push"s, the other "push"s are wrong again, and a blank push/pop is
needed.
Considering that the L1 cache lines of this pentium are 32 bytes long,
and that 8 long int are 32 bytes long too, it came to us that there
was a problem with the cache.
Actually, the bug of the push could be shown through memory accesses
directly : writing on an not-in-cache mem location would put 0 until
this mem location is accessed through a single "read". Then, the whole
cache line would be right again.
2/ The consequences
-------------------
Of course, that was the first thing that we've been able to observe ;)
RTEMS could not boot. Actually, when a "call" pushed 0 onto the stack,
the ret could only lead to raise an exception a bit later. Since, in
the early stage, the Interrupt vector points to 0, averything couldn't
get worse : triple fault + reboot.
3/ Explanation
--------------
This cache mechanism corruption only appeared after load_segment()
returned (through a jump). Investigating a bit further shows that this
appears /sometimes/ during the PICs initialization.
"Sometimes" proved to be "When writing something with the 4th bit of
%al set". That is "when writing 0x28 or 0xff" for example. Clearing
this bit would just make the things work right.
Actually, this isn't a bug in the proper PIC initialization (which is
quite academic). It came from the "delay" routine, which theoretically
does nothing but writing to an "inexistant" port (0xed), in order to
lose some time.
BUT, in the special case of our Dell P90, it appears that this 0xed
port does something cruel with the cache mechanism when its 4th bit
(aka bit 3 or 0x8) is set.
I didn't investigate this non-standard behaviour of the P90 any
further : I don't know if this is documented, or if it is just another
(known ?) bug of the early Pentiums. Just notice that we have 5 such
machines, and it has the same effect on the cache mechanism.
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.s files to .S in conformance with GNU conventions. This is a
minor step along the way to supporting automake.
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