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* bsps: Improve interrupt vector enable/disable APISebastian Huber2017-06-201-12/+4
| | | | | | Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable() to not return a status code. Add bsp_interrupt_assert() and use it to validate the vector number in the vector enable/disable implementations.
* raspberrypi: fix math inside of sizeofGedare Bloom2017-01-191-1/+1
| | | | | | | Move the subtraction of 1 for terminator outside of sizeof operator. Closes #2731.
* raspberrypi: use signed int for return variableGedare Bloom2017-01-191-1/+1
| | | | Closes #2873.
* arm/raspberrypi: define bsp_reset to restart board by watchdog.Pavel Pisa2016-09-083-1/+82
| | | | | Whether the board is restarted after application finish/exit is controlled by BSP_RESET_BOARD_AT_EXIT configure option.
* bsp/raspberrypi: Rename fileSebastian Huber2016-09-082-1/+1
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* arm/raspberrypi: use GPU/system timer as clock source.Pavel Pisa2016-09-071-36/+62
| | | | | | It has advantage that it is designed as free-running counter with compare registers and can easily serve for for both timecounter and tick interrupt.
* arm/raspberrypi: correct and extend definitions for GPU timer.Pavel Pisa2016-09-072-7/+16
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* arm/raspberrypi: basic BCM2836 SMP implementation.Pavel Pisa2016-09-078-4/+230
| | | | | | | | The BSP support is divided to startup/bspsmp_api.c file where functions required by SuperCore are defined and BCM2836 hardware initialization part in startup/bspsmp_init.c. Separation is done to prevent smpfatal08 test build failure.
* arm/raspberrypi: propagate number of configured CPUs into linker script.Pavel Pisa2016-09-072-0/+16
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* arm/raspberrypi: rename linkcmds to linkcmds.in to allow their configure ↵Pavel Pisa2016-09-073-4/+3
| | | | processing.
* arm/raspberrypi: more definitions of BCM2836 core local peripherals.Pavel Pisa2016-09-071-2/+140
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* arm/raspberrypi: include definitions of BCM2836 SMP mailboxes.Rohini Kulkarni2016-09-071-0/+26
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* arm/raspberrypi: Mailbox : Extending functionalityMudit Jain2016-08-273-0/+130
| | | | | Adding functionality to get board serial, power state & clock rate
* arm/raspberrypi: framebuffer driver checks for initialization and tries ↵Pavel Pisa2016-07-311-1/+11
| | | | | | | | | | | | | | | runtime init if required. Code works but there is problem how to setup caching for the regions (arm_cp15_set_translation_table_entries arguments). If ARMV7_MMU_DATA_READ_WRITE_CACHED is used then CPU accesses are noncoherent with VideoCore and some part of image update are not visible until pushed from cache by other activities. If ARMV7_MMU_DATA_READ_WRITE is used then access is extremely slow. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* arm/raspberrypi: VideoCore access corrections in cache operation and more ↵Pavel Pisa2016-07-316-48/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | error checking. The first, mistake in buffer size computation for cache flush and invalidate has been corrected. GCC __attribute__( ( aligned( 64 ) ) ) should work and works for local variables. Code ensures right stack alignment. But attribute has to be moved to type declaration to ensure that structure size is affected by attribute. But even this seems to not work reliably for some reason. May it be, the stack area between frame start and end of local variable buffer accessed during context switch or some stack prefetch during resturn such way that some cache lines belonging to buffer are filled to cache. Extending buffer by one more cache line padding helps there. In the longer term perspective, buffer should be moved to some static area or cache aligned dynamic memory allocated. Concurrent calls to the VideoCore operations and access serialization should be added too but problem is that some calls are required during workspace and MMU setup so variant without need of mutex would be required as well. Framebuffer setup code and other VideoCore calls check more precisely for errors and do not proceed forward with incorrect data now. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* arm/raspberrypi: add Secure Digital (SD) controller interrupt source ID from ↵Pavel Pisa2016-07-231-1/+1
| | | | Mudit Jain'a tree.
* arm/raspberrypi: change interrupt dispatch and enable to generic vector id ↵Pavel Pisa2016-07-232-141/+89
| | | | | | | | based approach. Using conditional branches to find bits is extremely inefficient and for asynchronous delivery of different interrupt sources lead to total confusion of branch prediction unit.
* arm/raspberrypi: remove duplicate setup of IRQ handler in the main ARM ↵Pavel Pisa2016-07-232-21/+0
| | | | | | | | | | | | | | | | | | | | | | | exception table. Exception table setup is processed by common CPU architecture support. For ARM architecture, it can be found in the file rtems/c/src/lib/libbsp/arm/shared/start/start.S and ends by bsp_vector_table_copy_done label. The actual tabel content can be found at bsp_start_vector_table_begin For ARMv7-A and even other variant with hypervisor mode support, it is even not necessary to copy table to address 0 at all because CP15 register can be used to specify alternative table start address arm_cp15_set_vector_base_address(&)bsp_start_vector_table_begin; ARMv7-M have register to set exception table base as well.
* Added USB interrupt handler. And defined some macros regarding USB.Deval Shah2016-07-233-0/+25
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* arm/raspberrypi: reorder and update MMU config table to nor force RW section ↵Pavel Pisa2016-07-201-9/+22
| | | | | | | | | later to RO. Enable even the first megabyte of SDRAM to be cache-able after problems with stale cache content has been resolved by previous commit. Because major part of application usually fits to the first megabyte this speedups test dhrystone application by factor 40.
* arm/raspberrypi: use cache manager operations to flush/invalidate all cache ↵Pavel Pisa2016-07-201-7/+7
| | | | | | | | | levels. This fix strange behavior where some stale content has been stored in level 2 cache before RTEMS has been start from U-boot which has reappeared after MMU enable and shadow vector table at start of SDRAM.
* arm/raspberrypi: cache manager can be used for mailbox synchronization now. ↵Pavel Pisa2016-07-201-33/+2
| | | | | | Remove workarounds. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* bsps/arm: Change code to explicit selection of cache implementation for ARM ↵Pavel Pisa2016-07-042-8/+4
| | | | | | | | | | | | | | | | | | | | | | | BSPs. The original ARM architecture wide cache_.h is changed to dummy version for targets not implementing/enablig cache at all. The ARM targets equipped by cache should include appropriate implementation. Next options are available for now c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h basic ARM cache integrated on the CPU core directly which requires only CP15 oparations c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h support for case where ARM L2C-310 cache controller is used. It is accessible as mmaped peripheral. c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h Cortex-M specific cache support
* arm/raspberrypi: update VideoCore cache flush workaround to work on RPi2.Pavel Pisa2016-07-041-2/+13
| | | | | The arm_cp15_data_cache_clean_and_invalidate leads to hang on RPi2, clean by individual lines works on RPi1 and RPi2.
* arm/raspberrypi: Enable HYP to SVC switch for this BSP.Pavel Pisa2016-07-042-0/+7
| | | | | This support is required when newer firmware is used on Raspberry Pi 2 boards.
* arm/raspberrypi: resolve BSP warnings.Pavel Pisa2016-06-285-2/+8
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* arm/raspberrypi: run VideoCore and mailbox code through rtems.uncrustify.Pavel Pisa2016-06-285-246/+266
| | | | | | Some changes have been reverted to keep readability. For example squash of BCM2835_MBOX_TAG_* defines which are visually aligned in column.
* arm/raspberrypi: Adding functionalities to Mailbox RPiMudit Jain2016-06-283-0/+99
| | | | | Added functions for retrieving firmware revision, board model and board revision.
* arm/raspberrypi: Force VC mail box buffer to be synchronized through cache.Pavel Pisa2016-06-241-1/+13
| | | | | This solution is quick fix until CPU_DATA_CACHE_ALIGNMENT is defined and cache manager is checked on all Raspberry Pi variants.
* arm/raspberrypi: Ensure that buffers used for VC mail box communication are ↵Pavel Pisa2016-06-202-7/+56
| | | | synchronized through cache.
* arm/raspberrypi: add fbcons support for rpi bspYANG Qiao2016-05-318-2/+362
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* arm/raspberrypi: add video outchar support for rpi bspYANG Qiao2016-05-314-0/+5109
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* arm/raspberrypi: move MMU in front of application image to respect variable ↵Pavel Pisa2016-05-314-4/+83
| | | | | | | | | | | | | memory size. The page table is placed at address 0x00004000 which provides required 16 kB space till the start of application image. The RAM size specified in a linker script is upper limit address of RAM utilized for the work area initialization. If VideoCore reports to use lower address than expected then work area size is adjusted (shrinked) appropriately.
* arm/raspberrypi: add VideoCore framebuffer without initializationYANG Qiao2016-05-314-0/+469
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* arm/raspberrypi: Raspberry Pi v2 ALLOCATE_BUFFER VC4 operation returns ↵Pavel Pisa2016-05-311-0/+4
| | | | direct address.
* arm/raspberrypi: ensure that correct RPI_PERIPHERAL_BASE is provided by ↵Pavel Pisa2016-05-314-0/+4
| | | | | | | | | | | raspberrypi.h If the raspberrypi.h has been included without preceding inclussion of bsp.h then BSP_IS_RPI2 has not been set for Raspberry Pi 2 BSP variant and bad things happen later. The patch includes bspopts.h by raspberrypi.h and even includes bsp.h in critical peripherals support.
* arm/raspberrypi: cmdline enhancement and early access workaround.Pavel Pisa2016-05-311-4/+8
| | | | | | cmdline argument is returned without option name. The calls to command line parsing can be called earlier before BSS is cleaned out.
* arm/raspberrypi: add cmdline support for rpi bsp.Pavel Pisa2016-05-193-0/+54
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* arm/raspberrypi: add VideoCore frame buffer control supportYANG Qiao2016-05-195-0/+832
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* arm/raspberrypi: add VideoCore mailbox support read and writeYANG Qiao2016-05-195-0/+145
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* arm/raspberrypi: add locking around GPIO pin function selection.Pavel Pisa2016-05-191-0/+5
| | | | | | | | | | This is required if function or direction is changed by some driver after start of thread multitasking or in interrupts drivers. There can be problem with calling GPIO function selection before data section is initialized. But actual ticket lock implementation seems to be compatible even with memory initialized to zero oven on SMP.
* arm/raspberrypi: correct GPIO pin function selection.Pavel Pisa2016-05-192-10/+11
| | | | | | Original implementation does only bitwise-or with previous register value for all functions except IN. Switch from one to other function would lead to incorrect value.
* arm/raspberrypi: ensure that RTEMS application image can be started by U-boot.Pavel Pisa2016-05-192-1/+39
| | | | | | | | | | | | | | | | The current versions of U-boot start kernel/RTEMS application image with instruction and data caches enabled and it sets exception base register to new address after its self-relocation. ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */ mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */ Included changes in bsp_start_hook_0 restore default state to allow RTEMS image to run after startup from newer U-boot version on Raspberry Pi. Clear interrupt enable registers in interrupt controller to ensure that RTEMS starts from well defined state.
* arm/raspberrypi: Remove include of <rtems/console.h> from <bsp.h> and fix ↵Joel Sherrill2016-03-291-1/+0
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* arm/raspberrypi/include/bsp.h: Do not include <rtems/clockdrv.h>Joel Sherrill2016-03-251-1/+0
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* arm/raspberrypi: Add per-section compilation and linking suppoJoel Sherrill2016-03-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | updates #2577. For the raspberrypi BSP variant without this option, sample executable sizes were as follows: text data bss dec hex filename 91516 1724 134080496 134173736 7ff5428 ticker.exe 57809 1480 134114460 134173749 7ff5435 minimum.exe 816524 2004 133355216 134173744 7ff5430 cxx_iostream.exe 561132 5808 133606812 134173752 7ff5438 fileio.exe 444724 12624 133716388 134173736 7ff5428 pppd.exe 193344 2360 133978052 134173756 7ff543c capture.exe 109682 1812 134062236 134173730 7ff5422 nsecs.exe 175408 2100 133996244 134173752 7ff5438 paranoia.exe 187108 1756 133984880 134173744 7ff5430 cdtest.exe 88548 1724 134083488 134173760 7ff5440 base_sp.exe 91432 1748 134080552 134173732 7ff5424 unlimited.exe 103652 1700 134068384 134173736 7ff5428 hello.exe 271116 6508 133896112 134173736 7ff5428 loopback.exe For the raspberrypi BSP variant with this option, sample executable sizes were as follows: text data bss dec hex filename 85796 1700 134086236 134173732 7ff5424 ticker.exe 34428 1408 134137896 134173732 7ff5424 minimum.exe 508720 1972 133663044 134173736 7ff5428 cxx_iostream.exe 544516 5776 133623452 134173744 7ff5430 fileio.exe 409916 12452 133751380 134173748 7ff5434 pppd.exe 184020 2320 133987416 134173756 7ff543c capture.exe 104486 1788 134067476 134173750 7ff5436 nsecs.exe 168504 2068 134003164 134173736 7ff5428 paranoia.exe 178740 1732 133993272 134173744 7ff5430 cdtest.exe 81988 1692 134090068 134173748 7ff5434 base_sp.exe 82460 1716 134089568 134173744 7ff5430 unlimited.exe 94316 1636 134077800 134173752 7ff5438 hello.exe 249228 6388 133918144 134173760 7ff5440 loopback.exe
* Use linker set for libio initializationSebastian Huber2016-02-031-2/+0
| | | | Update #2408.
* bsp/raspberrypi: Move assignment outside if-conditionJan Sommer2015-12-291-1/+1
| | | | Assignment was misplaced by one line.
* Store task_id of the current thread for the ISR before waiting for the ↵Jan Sommer2015-12-121-0/+1
| | | | | | | | | | transient event The ISR will send a transient event to the task specified in bus->taskid. Make sure that the correct task_id is written to this field before waiting for the transient event to arrive. Fixes #2483
* bsps: Delete superfluous bsp_pretasking_hook()Sebastian Huber2015-12-101-1/+0
| | | | | | Use the bsp_predriver_hook() instead. Update #2408.
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