diff options
author | Pavel Pisa <ppisa@pikron.com> | 2016-05-19 10:24:46 +0200 |
---|---|---|
committer | Pavel Pisa <ppisa@pikron.com> | 2016-05-19 13:21:40 +0200 |
commit | e706a9d17c61ad0a5ebb43cc1fe59275063105cb (patch) | |
tree | 8ce6688f524fe06dddc374d990d6b3087ea3c743 /c/src/lib/libbsp/arm/raspberrypi | |
parent | bsps/arm: CP15 support for flush prefetch buffer and table base control. (diff) | |
download | rtems-e706a9d17c61ad0a5ebb43cc1fe59275063105cb.tar.bz2 |
arm/raspberrypi: ensure that RTEMS application image can be started by U-boot.
The current versions of U-boot start kernel/RTEMS application image
with instruction and data caches enabled and it sets exception
base register to new address after its self-relocation.
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
Included changes in bsp_start_hook_0 restore default state to
allow RTEMS image to run after startup from newer U-boot version
on Raspberry Pi.
Clear interrupt enable registers in interrupt controller
to ensure that RTEMS starts from well defined state.
Diffstat (limited to 'c/src/lib/libbsp/arm/raspberrypi')
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/irq/irq.c | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c | 36 |
2 files changed, 39 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c b/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c index 0867b6b2f1..96b16fbf20 100644 --- a/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c +++ b/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c @@ -207,5 +207,9 @@ void bsp_interrupt_handler_default(rtems_vector_number vector) rtems_status_code bsp_interrupt_facility_initialize(void) { raspberrypi_set_exception_handler(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt); + BCM2835_REG(BCM2835_IRQ_DISABLE1) = 0xffffffff; + BCM2835_REG(BCM2835_IRQ_DISABLE2) = 0xffffffff; + BCM2835_REG(BCM2835_IRQ_DISABLE_BASIC) = 0xffffffff; + BCM2835_REG(BCM2835_IRQ_FIQ_CTRL) = 0; return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c index 047c8ad138..d44be03ac3 100644 --- a/c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c @@ -26,11 +26,45 @@ #include <bsp/start.h> #include <bsp/raspberrypi.h> #include <bsp/mm.h> +#include <libcpu/arm-cp15.h> void BSP_START_TEXT_SECTION bsp_start_hook_0(void) { -} + uint32_t sctlr_val; + + sctlr_val = arm_cp15_get_control(); + + /* + * Current U-boot loader seems to start kernel image + * with I and D caches on and MMU enabled. + * If RTEMS application image finds that cache is on + * during startup then disable caches. + */ + if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) { + if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) { + /* + * If the data cache is on then ensure that it is clean + * before switching off to be extra carefull. + */ + arm_cp15_drain_write_buffer(); + arm_cp15_data_cache_clean_and_invalidate(); + } + arm_cp15_flush_prefetch_buffer(); + sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A); + arm_cp15_set_control(sctlr_val); + arm_cp15_tlb_invalidate(); + arm_cp15_flush_prefetch_buffer(); + arm_cp15_data_cache_invalidate(); + arm_cp15_instruction_cache_invalidate(); + } + + /* Clear Translation Table Base Control Register */ + arm_cp15_set_translation_table_base_control_register(0); + + /* Clear Secure or Non-secure Vector Base Address Register */ + arm_cp15_set_vector_base_address(0); +} void BSP_START_TEXT_SECTION bsp_start_hook_1(void) { |