Commit message (Collapse) | Author | Age | Files | Lines | |
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* | bsp/altera-cyclone-v: Fix define usage | Sebastian Huber | 2015-04-02 | 1 | -1/+1 |
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* | bsp/altera-cyclone-v: Typo | Sebastian Huber | 2015-03-25 | 1 | -3/+3 |
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* | bsp/altera-cyclone-v: Use proper free function | Sebastian Huber | 2015-01-23 | 1 | -1/+1 |
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* | Update bug report URL | Sebastian Huber | 2014-12-05 | 1 | -1/+1 |
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* | bsps/arm: Add .nocache section | Sebastian Huber | 2014-11-27 | 9 | -182/+11 |
| | | | | | This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area(). | ||||
* | bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs | Sebastian Huber | 2014-11-20 | 3 | -47/+7 |
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* | bsps/arm: L2C 310 add compile time checks | Sebastian Huber | 2014-11-20 | 1 | -2/+4 |
| | | | | Simplify initialization. Replace some assert() with fatal errors. | ||||
* | bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASE | Sebastian Huber | 2014-11-20 | 1 | -1/+1 |
| | | | | Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE. | ||||
* | libchip/serial: Add alternative NS16550 driver | Sebastian Huber | 2014-10-07 | 2 | -95/+71 |
| | | | | Use the Termios device API. | ||||
* | bsps: Fix build error | Sebastian Huber | 2014-09-18 | 2 | -5/+0 |
| | | | | Fix build error introduced in f535fe5311978af53635c2da8e5cb10ef9d78802. | ||||
* | bsps/arm: Add a9mpcore_clock_initialize_early() | Sebastian Huber | 2014-09-10 | 1 | -0/+2 |
| | | | | | This is necessary to use the CPU counter converter even in case no clock driver is present, e.g. in tmcontext01. | ||||
* | bsp/altera-cyclone-v: Add BSP_USE_UART_INTERRUPTS | Sebastian Huber | 2014-09-10 | 2 | -3/+12 |
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* | bsps/arm: Do not build unused file | Sebastian Huber | 2014-09-08 | 1 | -1/+0 |
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* | Regenerate all preinstall.am files. | Chris Johns | 2014-08-29 | 1 | -3/+3 |
| | | | | | With this patch the preinstall.am files are in a set order and not dependent on now perl implements a hash. | ||||
* | Regenerate all preinstall.am files. | Joel Sherrill | 2014-08-28 | 1 | -7/+7 |
| | | | | | Apparently, at some point automake output changed and these were not updated. | ||||
* | preinstall: Regenerated files differ from the repo. | Chris Johns | 2014-08-28 | 1 | -6/+6 |
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* | bsp/altera-cyclone-v: Add DMA support hwlib files | Sebastian Huber | 2014-08-26 | 17 | -7/+21297 |
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* | bsp/altera-cyclone-v: Update to hwlib 13.1 | Sebastian Huber | 2014-08-26 | 16 | -3841/+8786 |
| | | | | This version is distributed with SoC EDS 14.0.0.200. | ||||
* | libchip/dwmac: Make PHY address user configurable | Christian Mauderer | 2014-08-22 | 1 | -0/+28 |
| | | | | | | This patch allows the user to configure the PHY address for the DWMAC driver by giving a pointer to a dwmac_user_cfg structure to network stack via rtems_bsdnet_ifconfig::drv_ctrl. | ||||
* | bsp/altera-cyclone-v: Add RTC driver. | Christian Mauderer | 2014-08-11 | 4 | -4/+381 |
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* | bsp/altera-cyclone-v: Add a simple I2C driver. | Christian Mauderer | 2014-08-11 | 11 | -7/+10389 |
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* | bsp/altera-cyclone-v: Add socal from hwlib. | Christian Mauderer | 2014-08-11 | 2 | -2/+60 |
| | | | | Some of the headers from the hwlib need the files from the socal subdirectory. | ||||
* | bsp/altera-cyclone-v: Move MMU configuration table | Sebastian Huber | 2014-07-01 | 3 | -20/+37 |
| | | | | This makes it possible to use application specific version. | ||||
* | bsp/altera-cyclone-v: Enable unified L2 cache | Sebastian Huber | 2014-06-06 | 2 | -1/+12 |
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* | bsp/altera-cyclone-v: Move SMP support | Sebastian Huber | 2014-06-06 | 3 | -54/+94 |
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* | bsp/altera-cyclone-v: Simplify start hooks | Sebastian Huber | 2014-06-06 | 1 | -120/+25 |
| | | | | Use arm_a9mpcore_start_hook_0(). The L2 cache is now disabled. | ||||
* | bsp/altera-cyclone-v: Change default baud | Sebastian Huber | 2014-06-06 | 1 | -1/+1 |
| | | | | Use value for standard U-Boot. | ||||
* | bsp/altera-cyclone-v: Use NOLOAD for nocache sec | Sebastian Huber | 2014-06-06 | 1 | -1/+1 |
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* | bsp/altera-cyclone-v: Simplify MMU config table | Sebastian Huber | 2014-06-06 | 1 | -2/+1 |
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* | bsps/arm: Define ARM_CP15_TEXT_SECTION | Sebastian Huber | 2014-06-06 | 1 | -1/+3 |
| | | | | | Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the start code is in the right section. | ||||
* | bsp/altera-cyclone-v: Cleanup | Ralf Kirchner | 2014-05-28 | 1 | -3/+3 |
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* | bsp/altera-cyclone-v: Reduce size of nocache heap | Ralf Kirchner | 2014-05-28 | 2 | -4/+4 |
| | | | | Network mbufs and clusters now are cached. Thus the nocache heap can get reduced to 1 MByte. | ||||
* | bsp/altera-cyclone-v: Cache mbufs and clusters | Ralf Kirchner | 2014-05-28 | 1 | -12/+0 |
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* | bsp/altera-cyclone-v: Enable L2 cache for network driver | Ralf Kirchner | 2014-05-28 | 1 | -1/+14 |
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* | bsp/altera-vyclone-v: Broadcast cache maintenances | Ralf Kirchner | 2014-05-28 | 1 | -3/+3 |
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* | bsp/altera-caclone-v: Early printk support | Ralf Kirchner | 2014-05-12 | 1 | -24/+4 |
| | | | | Make sure printk can work early during BSP startup. | ||||
* | bsp/altera-cyclone-v: Move mbufs and network clusters to uncached RAM | Ralf Kirchner | 2014-04-30 | 1 | -0/+12 |
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* | bsp/altera-cyclone-v: Increase size of nocache region and nocache heap | Ralf Kirchner | 2014-04-30 | 2 | -3/+3 |
| | | | | Increase size of nocache heap in order to be able to move mbufs and clusters of the network driver to uncached RAM | ||||
* | bsp/altera-cyclone-v: Cleanup | Ralf Kirchner | 2014-04-17 | 1 | -2/+0 |
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* | bsp/altera-cyclone-v: Change console baud rate | Ralf Kirchner | 2014-04-17 | 1 | -1/+1 |
| | | | | | | The baud rate of the altera cyclone-V U-Boot can not be changed at the u-Boot console prompt. Thus we use the same baud rate as the U-Boot for the BSP. | ||||
* | rtems: Rename rtems_smp_get_current_processor() | Sebastian Huber | 2014-04-11 | 1 | -1/+1 |
| | | | | | | | Rename rtems_smp_get_current_processor() in rtems_get_current_processor(). Make rtems_get_current_processor() a function in uni-processor configurations to enable ABI compatibility with SMP configurations. | ||||
* | Change all references of rtems.com to rtems.org. | Chris Johns | 2014-03-21 | 7 | -7/+7 |
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* | bsp/altera-cyclone-v: Made hwlib compile clean | Ralf Kirchner | 2014-03-13 | 3 | -281/+6 |
| | | | | Made Alteras hwlib compile clean within the RTEMS build system | ||||
* | bsp/altera-cyclone-v: Add Alteras hwlib | Ralf Kirchner | 2014-03-13 | 23 | -0/+71250 |
| | | | | Add files from Alteras hwlib | ||||
* | bsp/altera-cyclone-v: New BSP | Ralf Kirchner | 2014-03-13 | 21 | -0/+2542 |
Implemented so far: - nocache heap for uncached RAM - basic timer - level 1 cache handling for arm cache controller in arm-cache-l1.h - level 2 L2C-310 cache controller - MMU - DWMAC 1000 ethernet controller - basic errata handling - smp startup for second core |