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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-09-10 16:17:02 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-09-10 16:17:02 +0200 |
| commit | ecf64a5eb94c8a7f2852b049793a96fdfb47a81e (patch) | |
| tree | fa7397184d0a51e7d70a6566e25835b6d59f9046 /c/src/lib/libbsp/arm/altera-cyclone-v | |
| parent | or1k: Let CPU/BSP Fatal handler have access to source (diff) | |
| download | rtems-ecf64a5eb94c8a7f2852b049793a96fdfb47a81e.tar.bz2 | |
bsps/arm: Add a9mpcore_clock_initialize_early()
This is necessary to use the CPU counter converter even in case no clock
driver is present, e.g. in tmcontext01.
Diffstat (limited to 'c/src/lib/libbsp/arm/altera-cyclone-v')
| -rw-r--r-- | c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c index a5e63e2d82..85eadbf628 100644 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c @@ -13,11 +13,13 @@ */ #include <bsp/bootcard.h> +#include <bsp/arm-a9mpcore-clock.h> #include <bsp/irq-generic.h> #include <bsp/nocache-heap.h> void bsp_start( void ) { + a9mpcore_clock_initialize_early(); bsp_interrupt_initialize(); altera_cyclone_v_nocache_init_heap(); } |