summaryrefslogtreecommitdiffstats
path: root/bsps/riscv (follow)
Commit message (Collapse)AuthorAgeFilesLines
* bsp/riscv: Add missing BSP variantSebastian Huber2018-08-021-0/+9
| | | | Update #3433.
* bsp/riscv: Fix build with RTEMS_SMP undefinedSebastian Huber2018-08-023-12/+10
| | | | Update #3433.
* bsp/riscv: Fix a synchronization issue for PLICSebastian Huber2018-08-021-0/+8
| | | | Update #3433.
* bsp/riscv: Remove unused variableSebastian Huber2018-08-011-4/+0
| | | | Update #3433.
* bsp/riscv: Add NS16750 support to console driverSebastian Huber2018-08-011-36/+74
| | | | Update #3433.
* bsp/riscv: Initialize FPU depending on ISASebastian Huber2018-08-011-1/+4
| | | | | | Initialize fcsr to zero for a defined rounding mode. Update #3433.
* bsp/riscv: Fix clock driverSebastian Huber2018-08-011-17/+49
| | | | | | Do not assume that mtime is zero at boot time. Update #3433.
* bsp/riscv: Fix inter-processor interruptsSebastian Huber2018-07-271-1/+7
| | | | | | | | The previous version worked only on a patched Qemu. Writes to mip are illegal according to the The RISC-V Instruction Set Manual, Volume II: Privileged Architecture, Privileged Architecture Version 1.10. Update #3433.
* riscv: Rework CPU counter supportSebastian Huber2018-07-271-4/+18
| | | | Update #3433.
* bsp/riscv: Use interrupt driven NS16550 driverSebastian Huber2018-07-251-1/+9
| | | | Update #3433.
* bsp/riscv: Add PLIC supportSebastian Huber2018-07-254-2/+258
| | | | Update #3433.
* bsp/riscv: Add simple SMP support to clock driverSebastian Huber2018-07-251-0/+2
| | | | | | This is a hack. The clock interrupt should be handled by each hart. Update #3433.
* bsp/riscv: Use CPU counter btimerSebastian Huber2018-07-251-68/+0
| | | | Update #3433.
* bsp/riscv: Add basic SMP startupSebastian Huber2018-07-256-26/+295
| | | | Update #3433.
* riscv: Add CLINT and PLIC supportSebastian Huber2018-07-253-62/+4
| | | | | | The CLINT and PLIC need some per-processor state. Update #3433.
* bsps/riscv: Update linker-symbols.hSebastian Huber2018-07-251-15/+16
| | | | Update #3433.
* bsp/riscv: Add reset via for SiFive Test FinisherSebastian Huber2018-07-251-5/+18
| | | | Update #3433.
* bsp/riscv: Add and use riscv_fdt_get_address()Sebastian Huber2018-07-254-24/+79
| | | | Update #3433.
* bsp/riscv: Fix HTIF warningsSebastian Huber2018-07-255-5/+62
| | | | Update #3433.
* riscv: Rework exception handlingSebastian Huber2018-07-257-51/+86
| | | | | | | | | | | Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() functions. Applications can install an exception handler via the fatal error handler to handle synchronous exceptions. Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must be provided by the BSP. Update #3433.
* bsp/riscv: Add console support for NS16550 devicesSebastian Huber2018-07-061-0/+100
| | | | Update #3433.
* bsp/riscv: Simplify printk() supportSebastian Huber2018-07-063-19/+16
| | | | | | | This is a prepartion to add NS16550 driver support to the console driver. Update #3433.
* riscv: Add LADDR assembler defineSebastian Huber2018-07-061-8/+8
| | | | | | | An address must be loaded to a register according to the code model. Add LADDR define for use in assembler code. Update #3433.
* riscv: Implement CPU counterSebastian Huber2018-07-061-10/+2
| | | | Update #3433.
* bsps: Update headers.amSebastian Huber2018-07-051-0/+8
|
* riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2018-06-281-1/+5
| | | | Update #3433.
* riscv: Avoid namespace pollutionSebastian Huber2018-06-281-0/+1
| | | | | | | Remove <rtems/score/riscv-utility.h> include from <rtems/score/cpu.h> (which is visible via <rtems.h> for example). Update #3433.
* bsp/riscv: Remove bsp_interrupt_handler_default()Sebastian Huber2018-06-281-9/+0
| | | | | | It duplicated the default implementation. Update #3433.
* bsp/riscv: Rework clock driverSebastian Huber2018-06-283-63/+120
| | | | | | | Use device tree provided timebase frequency. Do not write to read-only mtime register. Update #3433.
* bsp/riscv: Add device tree support for consoleSebastian Huber2018-06-283-60/+215
| | | | Update #3433.
* bsp/riscv: Fix vector table for lp64Sebastian Huber2018-06-281-16/+22
| | | | Update #3433.
* bsp/riscv: Add SMP startup synchronizationSebastian Huber2018-06-281-2/+20
| | | | Update #3433.
* bsp/riscv: Add device tree supportSebastian Huber2018-06-282-6/+14
| | | | Update #3433.
* riscv: Add dummy SMP supportSebastian Huber2018-06-281-0/+10
| | | | Update #3433.
* bsp/riscv: Load global pointerSebastian Huber2018-06-271-0/+6
| | | | Update #3433.
* bsp/riscv: Use memset() to clear .bssSebastian Huber2018-06-271-10/+5
| | | | Update #3433.
* riscv: Format assembler filesSebastian Huber2018-06-271-33/+36
| | | | | | Use tabs to match the GCC generated assembler output. Update #3433.
* bsp/riscv: Do not clear integer registers at startSebastian Huber2018-06-271-31/+0
| | | | | | There is no need to do this. Update #3433.
* bsp/riscv: Fix some warningsSebastian Huber2018-06-271-20/+4
| | | | Update #3444.
* bsp/riscv: Add BSP options to define RAM regionSebastian Huber2018-06-271-1/+1
| | | | Update #3433.
* bsp/riscv: Add new BSP variantsSebastian Huber2018-06-275-0/+45
| | | | | | | The latest RISC-V tool chain introduced new multilib variants. Add corresponding BSP variants. Update #3433.
* bsp/riscv_generic: Rename to "riscv"Sebastian Huber2018-06-2721-10/+10
| | | | Update #3433.
* bsp/riscv_generic: Use standard optimization flagsSebastian Huber2018-06-277-7/+21
| | | | Update #3433.
* bsps/riscv_generic: Rename and add variantsHesham Almatary2018-06-277-2/+37
| | | | Add BSP variants to match supported RISC-V ISA variants (multilibs).
* bsp/riscv_generic: New linker command fileSebastian Huber2018-06-274-341/+391
| | | | | | | This linker command file is based on the "riscv64-rtems5-ld --verbose" output. Update #3433.
* Rework initialization and interrupt stack supportSebastian Huber2018-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Statically initialize the interrupt stack area (_Configuration_Interrupt_stack_area_begin, _Configuration_Interrupt_stack_area_end, and _Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the interrupt stack area in a special section ".rtemsstack.interrupt". Let BSPs define the optimal placement of this section in their linker command files (e.g. in a fast on-chip memory). This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the low level initialization code has all information available via global symbols. This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define superfluous, since the interrupt stacks are allocated by confdefs.h for all architectures. There is no need for BSP-specific linker command file magic (except the section placement), see previous ARM linker command file as a bad example. Remove _CPU_Install_interrupt_stack(). Initialize the hardware interrupt stack in _CPU_Initialize() if necessary (e.g. m68k_install_interrupt_stack()). The optional _CPU_Interrupt_stack_setup() is still useful to customize the registration of the interrupt stack area in the per-CPU information. The initialization stack can reuse the interrupt stack, since * interrupts are disabled during the sequential system initialization, and * the boot_card() function does not return. This stack resuse saves memory. Changes per architecture: arm: * Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases. * Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp. bfin: * Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value. lm32, m32c, mips, nios2, riscv, sh, v850: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. m68k: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. powerpc: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA). sparc: * Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM. Update #3459.
* bsps: Support .rtemsstack.* linker input sectionsSebastian Huber2018-06-271-1/+5
| | | | | | Use a dedicated memory region or place it between the BSS and workspace. Update #3459.
* Remove Clock_driver_support_shutdown_hardware()Sebastian Huber2018-06-271-9/+0
| | | | | | | | | | | | | | | | | The aim of this clock driver hook was to stop clock tick interrupts at some late point in the exit() procedure. The use of atexit() pulls in malloc() which pulls in errno. It is incompatible with the intention of the CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option. The exit() function must be called from thread context, so accompanied clock tick interrupts should cause no harm. On the contrary, someone may assume a normal operating system operation, e.g. working timeouts. Remove the Clock_driver_support_shutdown_hardware() clock driver hook. Close #3436.
* bsps: Remove superfluous bsp_processor_countSebastian Huber2018-06-192-4/+0
| | | | | | This is unused copy and paste stuff. Update #3459.
* bsps: Move interrupt controller support to bspsSebastian Huber2018-04-231-0/+60
| | | | | | This patch is a part of the BSP source reorganization. Update #3285.
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-03 09:55:02 +0000