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* bsp/riscv: Add console support for NS16550 devicesSebastian Huber2018-07-061-0/+100
| | | | Update #3433.
* bsp/riscv: Simplify printk() supportSebastian Huber2018-07-063-19/+16
| | | | | | | This is a prepartion to add NS16550 driver support to the console driver. Update #3433.
* riscv: Add LADDR assembler defineSebastian Huber2018-07-061-8/+8
| | | | | | | An address must be loaded to a register according to the code model. Add LADDR define for use in assembler code. Update #3433.
* riscv: Implement CPU counterSebastian Huber2018-07-061-10/+2
| | | | Update #3433.
* bsps: Update headers.amSebastian Huber2018-07-051-0/+8
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* riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2018-06-281-1/+5
| | | | Update #3433.
* riscv: Avoid namespace pollutionSebastian Huber2018-06-281-0/+1
| | | | | | | Remove <rtems/score/riscv-utility.h> include from <rtems/score/cpu.h> (which is visible via <rtems.h> for example). Update #3433.
* bsp/riscv: Remove bsp_interrupt_handler_default()Sebastian Huber2018-06-281-9/+0
| | | | | | It duplicated the default implementation. Update #3433.
* bsp/riscv: Rework clock driverSebastian Huber2018-06-283-63/+120
| | | | | | | Use device tree provided timebase frequency. Do not write to read-only mtime register. Update #3433.
* bsp/riscv: Add device tree support for consoleSebastian Huber2018-06-283-60/+215
| | | | Update #3433.
* bsp/riscv: Fix vector table for lp64Sebastian Huber2018-06-281-16/+22
| | | | Update #3433.
* bsp/riscv: Add SMP startup synchronizationSebastian Huber2018-06-281-2/+20
| | | | Update #3433.
* bsp/riscv: Add device tree supportSebastian Huber2018-06-282-6/+14
| | | | Update #3433.
* riscv: Add dummy SMP supportSebastian Huber2018-06-281-0/+10
| | | | Update #3433.
* bsp/riscv: Load global pointerSebastian Huber2018-06-271-0/+6
| | | | Update #3433.
* bsp/riscv: Use memset() to clear .bssSebastian Huber2018-06-271-10/+5
| | | | Update #3433.
* riscv: Format assembler filesSebastian Huber2018-06-271-33/+36
| | | | | | Use tabs to match the GCC generated assembler output. Update #3433.
* bsp/riscv: Do not clear integer registers at startSebastian Huber2018-06-271-31/+0
| | | | | | There is no need to do this. Update #3433.
* bsp/riscv: Fix some warningsSebastian Huber2018-06-271-20/+4
| | | | Update #3444.
* bsp/riscv: Add BSP options to define RAM regionSebastian Huber2018-06-271-1/+1
| | | | Update #3433.
* bsp/riscv: Add new BSP variantsSebastian Huber2018-06-275-0/+45
| | | | | | | The latest RISC-V tool chain introduced new multilib variants. Add corresponding BSP variants. Update #3433.
* bsp/riscv_generic: Rename to "riscv"Sebastian Huber2018-06-2720-0/+1219
Update #3433.
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