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* bsps/zynqmp: Fix and update device treesHEADmasterKinsey Moore2 days4-115/+137
| | | | | | | | Add ref-clock-num identifiers to the device tree to ensure that interfaces use the correct clocks even when some are not used due to unconnected MII busses. This also adjusts the default ZynqMP PHY attachment to RGMII-ID which was the default before device trees were introduced.
* tftpDriver.c: Fix Coverity issuesFrank K├╝hndel7 days1-5/+22
| | | | | | | | CID 1506523: Unchecked return value from library (CHECKED_RETURN) CID 1506522: Unchecked return value from library (CHECKED_RETURN) CID 1437618: Unchecked return value from library (CHECKED_RETURN) Close #4718
* config: Add CONFIGURE_RECORD_INTERRUPTS_ENABLEDSebastian Huber8 days6-0/+132
| | | | | | | | This enables the tracing of interrupt entry/exit events through an application configuration option. The interrupt processing can be viewed with Trace Compass using rtems-record-lttng from the RTEMS Tools. Update #4769.
* bsps/irq: Add bsp_interrupt_get_dispatch_table_slot()Sebastian Huber8 days4-8/+26
| | | | Update #4769.
* bsps/irq: Rename handler in dispatch tableSebastian Huber8 days10-69/+67
| | | | | | | The name handler table was a bit misleading after the last rework. Rename it to distach table. Update the documentation accordingly. Update #4769.
* aarch64/raspberrypi: Remove duplicate filesSebastian Huber8 days1-3/+0
| | | | These files are already provided by "../../objirq".
* bsps/microblaze: Fix console interrupt build errorsAlex White10 days3-1/+21
| | | | | | This fixes build errors seen when building with console interrupts enabled. A few places were missing bspopts.h includes, and one of the UART functions was not defined.
* spec/beagle: Add missing spi.h installKinsey Moore12 days1-0/+1
| | | | | | The beagle SPI functions are unusable by applications unless this file is installed with the BSP. This ensures that the file is installed properly.
* libmisc/rtems-fdt: Support prop map items up to the size of uintptr_tChris Johns2022-11-252-2/+23
| | | | Updates #4729
* libmisc/shell: Fix edit Coverity errorChris Johns2022-11-251-1/+1
| | | | Coverity Id: CID 1517029, CID 1517030, CID 1517031
* bsps/riscv: Simplify PLIC supportSebastian Huber2022-11-231-28/+30
| | | | | In uniprocessor configurations there is no need to take interrupt affinities into account for the interrupt vector enable/disable.
* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-231-3/+5
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* bsps/riscv: Add riscv_plic_cpu_0_init()Sebastian Huber2022-11-231-13/+23
| | | | Move boot processor initialization of PLIC to separate function.
* bsps/riscv: Fix bsp_fdt_map_intr()Sebastian Huber2022-11-231-1/+1
| | | | | The interrupt numbers in the device tree are usually PLIC interrupts. Map the number to the vector number associated with an external interrupt.
* libmisc/shell: Support terminal size as env variablesChris Johns2022-11-233-39/+155
| | | | Closes #4763
* aarch64/versal: Add UART interrupt supportChris Johns2022-11-227-39/+342
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* rtems/versal: Updated mmu to include mapping for SDHCI devices on versalAaron Nyholm2022-11-221-1/+5
| | | | | | Tested on VCK190 Updates #4762
* cpukit/rtems-fdt: Avoid use of malloc/errnoKinsey Moore2022-11-181-7/+6
| | | | | | Use of malloc implies errno which adds TLS dependencies and prevents use of this FDT wrapper library in BSP initialization code. This change makes use of rtems_malloc and rtems_calloc which avoid TLS dependencies.
* bsps/zynqmp: Use direct fdt_* callsKinsey Moore2022-11-181-22/+10
| | | | | | This changes the ZynqMP device tree parsing over to direct libfdt calls to avoid inclusion of malloc() in the base BSP which currently causes sp01 to fail due to unexpected use of TLS space.
* aarch64/mmu: Prevent block descriptors at level -1Kinsey Moore2022-11-171-10/+13
| | | | | | | | | In the original implementation, level -1 was unused and all levels could have block-like descriptors (level 2 block descriptors are called page descriptors). When support for level -1 page tables was added the constraint on level -1 block descriptors was not honored. This prevents block descriptors from being mapped at level -1 since the hardware will not map them properly.
* testsuites/smptests: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-141-3/+22
| | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Updates #3053.
* cpukit: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1418-58/+374
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/riscv: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-145-12/+90
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/sparc: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1440-132/+894
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/shared/grlib: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1467-199/+1453
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/include/grlib: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1459-168/+1319
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/include/libchip: Remove legacy networking header fileDaniel Cederman2022-11-141-152/+0
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* wscript: rename bsp_list to bsplistGedare Bloom2022-11-111-1/+1
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* wscript: rename bsp_defaults to bspdefaultsGedare Bloom2022-11-111-9/+9
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* validation: Fix unused variable warningSebastian Huber2022-11-111-2/+0
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* bsps/riscv: Fix software interrupt dispatchingSebastian Huber2022-11-112-2/+33
| | | | | | | In SMP configurations, there may be no software interrupt handler installed when the software interrupt is processed. Add the new interrupt handler dispatch variant bsp_interrupt_handler_dispatch_unlikely() for this special case.
* validation: Improve spurious interrupt test caseSebastian Huber2022-11-113-29/+76
| | | | | | Use the tm27 support to test a spurious interrupt. This helps to run the validation test case on targets which have no software interrupt available for tests (for example riscv/PLIC/CLINT in the SMP configuration).
* bsps/noel: Fix interrupt supportSebastian Huber2022-11-111-0/+2
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* cpukit/fdt: Fix typos and clarify paramsKinsey Moore2022-11-101-9/+15
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* Remove remnants of rtems_io_lookup_nameJoel Sherrill2022-11-102-24/+0
| | | | Updates #3420.
* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-101-2/+2
| | | | Each PLIC enable register has 32 bits, so we have to divide by 32.
* arm: Fix Armv7-M TLS supportSebastian Huber2022-11-101-1/+1
| | | | | | | Set the thread ID register in the CPU context. Update #3835. Close #4753.
* bsps/riscv: Skip init on not configured processorsSebastian Huber2022-11-101-0/+11
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* bsps/riscv: Simplify riscv_plic_init()Sebastian Huber2022-11-101-30/+39
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* bsps/riscv: Simplify riscv_clint_init()Sebastian Huber2022-11-101-14/+25
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* bsps/riscv: Add tm27 supportSebastian Huber2022-11-101-1/+136
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* bsps/riscv: Always dispatch software interruptsSebastian Huber2022-11-101-3/+2
| | | | This helps to run the interrupt API validation tests.
* bsps/riscv: bsp_interrupt_get/set_affinity()Sebastian Huber2022-11-102-14/+7
| | | | | Provide bsp_interrupt_get_affinity() and bsp_interrupt_set_affinity() only if RTEMS_SMP is enabled. Replace fatal error with a status code.
* bsps/riscv: bsp_interrupt_raise_on()Sebastian Huber2022-11-101-4/+20
| | | | Implement bsp_interrupt_raise_on() and bsp_interrupt_raise().
* bsps/riscv: bsp_interrupt_is_pending()Sebastian Huber2022-11-101-2/+25
| | | | Implement this function.
* bsps/riscv: bsp_interrupt_get_attributes()Sebastian Huber2022-11-101-0/+15
| | | | Implement this function.
* bsps/riscv: Improve bsp_interrupt_vector_disable()Sebastian Huber2022-11-101-0/+8
| | | | Add support for hart-specific software and timer interrupts.
* bsps/riscv: Improve bsp_interrupt_vector_enable()Sebastian Huber2022-11-101-0/+8
| | | | Add support for hart-specific software and timer interrupts.
* bsps/riscv: bsp_interrupt_vector_is_enabled()Sebastian Huber2022-11-101-2/+47
| | | | Implement this function.
* bsps/riscv: bsp_interrupt_is_valid_vector()Sebastian Huber2022-11-102-1/+18
| | | | Implement this function.