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* ZYNQ7000: Add support PYNQ, PicoZed, MicroZed, ZYBO and ZYBO Z7Bernd Moessner2023-11-2821-2/+171
| | | | | | | | | | | | | This patch adds basic support for the following boards: xilinx_zynq_pynq - PYNQ Z1 / Z2 xilinx_zynq_microzed - MicroZed 7010 / 7020 xilinx_zynq_picozed - PicoZed 7010 / 7015 / 7020 / 7030 xilinx_zynq_zybo - ZYBO xilinx_zynq_zybo_z7 - ZYBO Z7-10 / Z7-20 N.b. Arty Z7-20 is basically a PYNQ Z1 - different board color and updated Eth PHY.
* Fix zedboard clock settingsBernd Moessner2023-11-281-2/+1
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* Fix add missing clock settings for zc706Bernd Moessner2023-11-281-1/+3
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* libtest: Add hash to gcov info dumpSebastian Huber2023-11-281-2/+27
| | | | This helps to validate that the data was transferred correctly.
* validation: Add nested test case remarksSebastian Huber2023-11-2826-0/+156
| | | | Close #4971.
* libtest: Add T_add_remark()Sebastian Huber2023-11-282-1/+40
| | | | | | | This can be used to report that nested test cases did run in a test case. Update #4971.
* bsps/imxrt1166: Disable video_muxChristian Mauderer2023-11-282-4/+7
| | | | | | The pinctrl-0 of the video_mux might overwrite pin settings done by other peripherals. Disabling it by default prevents unexpected pin settings.
* bsp/imxrt1166: Support GPIO CS pins in LPSPIChristian Mauderer2023-11-283-19/+248
| | | | | | | | | | | | | | With this, it is possible to use GPIOs as CS pins in the LPSPI. To avoid additional complexity, the GPIOs will have the same limitations as the native (hardware) CS pins. The GPIO CS feature adds a number of extra code when starting SPI transfers on this controller. Therefore it is possible to disable the additional code by just setting the IMXRT_LPSPI_MAX_CS option to 0. In that case only native CS pins are supported. At the moment, this feature is only enabled on i.MXRT1166 by default because it is not tested on i.MXRT1050. But it should work there too.
* bsps/imx*: imx_gpio from pointer to fdt propertyChristian Mauderer2023-11-282-12/+69
| | | | | | Device trees allow mixing different kinds of GPIOs in one property. For that it is usefull to only provide a pointer to an arbitrary location in the property and initialize a GPIO from that.
* validation: Remove superfluous includesSebastian Huber2023-11-231-4/+0
| | | | Update #3716.
* validation: Improve MrsP validationSebastian Huber2023-11-236-19/+64
| | | | | | | | | | For uniprocessor configurations, the selection of RTEMS_MULTIPROCESSOR_RESOURCE_SHARING results in a priority ceiling mutex. Build the MrsP validation tests only if RTEMS_SMP is enabled. Update #3716.
* waf: Fix Python 3.12 escape sequencesChris Johns2023-11-231-1/+1
| | | | Updates #4968
* score: Fix typo in nameSebastian Huber2023-11-211-1/+1
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* bsps/arm: Add BSP for ZynqMP RPUPhilip Kirkpatrick2023-11-2028-2/+1379
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* bsps/clock: Import Xilinx TTC hardware definitionsKinsey Moore2023-11-202-0/+231
| | | | | | This imports the TTC hardware definitions for the triple timer counters on various Xilinx platforms. This was imported as specified in the VERSION file in this commit.
* validation: Fix typosSebastian Huber2023-11-073-6/+6
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* validation: Improve thread idle bodies testSebastian Huber2023-11-071-4/+15
| | | | Update #3716.
* build: Do not use coverage for librtemstestSebastian Huber2023-11-0311-20/+38
| | | | | The goal is to get code and branch coverage from actual tests and not the test support itself.
* bsps/leon3: Install header filesSebastian Huber2023-11-031-0/+4
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* build: Exclude performance test if RTEMS_GCOV_COVERAGESebastian Huber2023-11-031-1/+2
| | | | | | The code coverage build is usually done without compiler optimizations. This results in long performance test runtimes and useless performance results.
* testsuites/unit: Add tests for compiler builtinsSebastian Huber2023-11-021-8/+391
| | | | | | | | Test some compiler builtins which may use integer library routines: https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html Update #3716.
* score: Fix implicit integer conversion warningsSebastian Huber2023-11-021-6/+6
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* build: Improve testsuite build selectionSebastian Huber2023-11-0228-45/+43
| | | | | | | | | | | | | Enable an individual testsuite only through the corresponding enable. Use BUILD_TESTS to change the default value of the individual testsuite enable options. This allows the user to enable all testsuites with specific exceptions. For example, this builds all testsuites except the benchmarks: [arch/bsp] BUILD_TESTS = True BUILD_BENCHMARKS = False
* imfs: Constify rtems_tarfs_load()Sebastian Huber2023-11-022-4/+6
| | | | Change the public image data type to a void pointer.
* cpukit/libfs/dosfs: Use enum values for enum initKinsey Moore2023-10-301-1/+1
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* cpukit/score: Convert Thread_Life_state to uint32_tKinsey Moore2023-10-301-40/+40
| | | | | | Thread_Life_state is used as a bitfield, but is declared as an enum. This converts the enum typedef to a uint32_t typedef and associated bit definitions.
* bsps/xnandpsu: Always wrap page to device sizeKinsey Moore2023-10-271-0/+8
| | | | | | | The xnandpsu driver conditionally tries to wrap page index to NAND chip size causing an off-by-one error where the first page of the second chip is not wrapped correctly. This removes the conditional so that page index is always wrapped.
* bsps/xnandpsu: Avoid loop counter resetKinsey Moore2023-10-271-0/+8
| | | | | | | | On configurations where multiple NAND chips are in use, the erasure loop in XNandPsu_Erase() can reset the loop counter variable once it gets to blocks in the second chip causing an infinite loop overwriting parts of the first chip. This change ensures that the loop counter is not accidentally reset.
* bsps/aarch64/zynqmp/nand: Erase using offsetKinsey Moore2023-10-271-8/+2
| | | | | | Prefer use of XNandPsu_Erase instead of XNandPsu_EraseBlock since the XNandPsu driver does not expose the primitives necessary to ensure device readiness after the operation is complete.
* validation: Add wrapped bsp_interrupt_dispatch for MicroBlazeAlex White2023-10-271-0/+17
| | | | | This adds a MicroBlaze-specific bsp_interrupt_dispatch wrapper which fixes a linker error.
* bsps/xil: Adjust Xilinx support code for Cortex-R5Kinsey Moore2023-10-2412-4/+201
| | | | | | | This fixes some issues in the Xilinx support code that are critical to support the Cortex-R5F cores present in my Xilinx SoCs. The imported Cortex-R5 xil_cache.c matches the existing information in bsps/shared/xil/VERSION.
* bsps/xil: Import Xilinx Cortex-R5 supportKinsey Moore2023-10-243-0/+1319
| | | | | This imports Xilinx support code for the MPU and cache on Cortex-R5 cores. This was imported as specified in bsps/shared/xil/VERSION.
* doxygen: Replace and move main pageSebastian Huber2023-10-233-952/+206
| | | | | | | | | | | | | | | Replace the main page with a high level description of the RTEMS feature set similar to: https://docs.rtems.org/branches/master/user/overview/index.html#features The replaced content can be found in the RTEMS Classic API Guide: https://docs.rtems.org/branches/master/c-user/overview.html https://docs.rtems.org/branches/master/c-user/key_concepts.html Update #3705.
* build: Let the get-integer action return NoneSebastian Huber2023-10-231-2/+2
| | | | | If used with the format-and-define action, this will result in an undefined define.
* sparc: Fix move of CPU counter implementationSebastian Huber2023-10-201-4/+2
| | | | | | This fixes a build error with RTEMS_PROFILING enabled. Update #4954.
* bsps/leon3: Use DSU time tag for GR712RCSebastian Huber2023-10-203-4/+84
| | | | Close #4954.
* bsps/leon3: leon3_counter_use_irqamp_timestamp()Sebastian Huber2023-10-201-4/+0
| | | | | | Simplify leon3_counter_use_irqamp_timestamp(). Update #4954.
* bsps/leon3: Statically initialize get timecountSebastian Huber2023-10-202-13/+19
| | | | Update #4954.
* bsps/leon3: Move code blocksSebastian Huber2023-10-201-53/+57
| | | | | | Move code blocks to simplify C preprocessor usage. Update #4954.
* bsps/leon3: Use custom CPU counter implementationSebastian Huber2023-10-206-91/+134
| | | | | | | | Merge the timecounter and CPU counter support for the leon3 BSP family. Remove now unused functions from the CPU counter support of the erc32 and leon3 BSPs. Update #4954.
* bsps/leon3: Simplify clock and CPU counterSebastian Huber2023-10-203-123/+62
| | | | | | | | Share the timecounter instance between the clock and the CPU counter. This greatly simplifies the clock driver since we have to do the device selection only in one place, the CPU counter support. Update #4954.
* bsps/leon3: Make GPTIMER fall back mandatorySebastian Huber2023-10-205-60/+43
| | | | | | | | Using the auto reload counter which generates the clock ticks for the timecounter or CPU counter is quite difficult and only works in uniprocessor configurations. Update #4954.
* sparc: Move CPU counter implementationSebastian Huber2023-10-2013-79/+86
| | | | | | Enable a BSP-specific CPU counter implementation. Update #4954.
* bsps/leon3: Optional IRQ(A)MP timestamp supportSebastian Huber2023-10-202-5/+2
| | | | | | This is necessary to run the tests on SIS with profiling enabled. Update #4954.
* bsps/leon3: Update due to register API changesSebastian Huber2023-10-201-1/+1
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* mpci: Hide implementation detailsSebastian Huber2023-10-203-5/+7
| | | | | | | | | | This improves the standard compatibility of API headers. It fixes errors like this if RTEMS_MULTIPROCESSING is enabled: cpukit/include/rtems/score/processormask.h: In function 'uint32_t _Processor_mask_Find_last_set(const Processor_mask*)': cpukit/include/rtems/score/processormask.h:339:21: error: 'flsl' was not declared in this scope 339 | return (uint32_t) __BIT_FLS( CPU_MAXIMUM_PROCESSORS, a ); | ^~~~~~~~~
* bsps/aarch64: Disable use of TTBR1Tian Ye2023-10-181-1/+2
| | | | | | | Force use of addresses that would be translated by TTBR1 to cause a translation fault. RTEMS on AArch64 does not use TTBR1 and so attempted translation of that address range could cause unexpected behavior in the form of other exception types since TTBR1 is never set.
* cpukit: Remove unused includesKinsey Moore2023-10-1320-25/+0
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* bsps: Remove unused includesKinsey Moore2023-10-134-6/+0
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* powerpc/t32mppc: Improve terminal settingsSebastian Huber2023-10-131-1/+4
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