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* configure: Paravirtualization for all targetsSebastian Huber2014-05-082-14/+6
| | | | Virtual machines with paravirtualization exist not only on x86.
* smptests/smp07: Fix test outputSebastian Huber2014-05-071-3/+2
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* smptests/smp05: Fix test name and outputSebastian Huber2014-05-071-4/+3
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* tests: Add locked_printf_plugin()Sebastian Huber2014-05-072-18/+49
| | | | Add locked_vprintf(). Return an int just like printf(), etc.
* rtems: Fix ASR SMP supportSebastian Huber2014-05-072-3/+24
| | | | Initialize the ISR lock only once and destroy it properly.
* score: Fix SMP startupSebastian Huber2014-05-071-1/+3
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* score: Implement forced thread migrationSebastian Huber2014-05-0743-152/+799
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of task migration in RTEMS has some implications with respect to the interrupt latency. It is crucial to preserve the system invariant that a task can execute on at most one processor in the system at a time. This is accomplished with a boolean indicator in the task context. The processor architecture specific low-level task context switch code will mark that a task context is no longer executing and waits that the heir context stopped execution before it restores the heir context and resumes execution of the heir task. So there is one point in time in which a processor is without a task. This is essential to avoid cyclic dependencies in case multiple tasks migrate at once. Otherwise some supervising entity is necessary to prevent life-locks. Such a global supervisor would lead to scalability problems so this approach is not used. Currently the thread dispatch is performed with interrupts disabled. So in case the heir task is currently executing on another processor then this prolongs the time of disabled interrupts since one processor has to wait for another processor to make progress. It is difficult to avoid this issue with the interrupt latency since interrupts normally store the context of the interrupted task on its stack. In case a task is marked as not executing we must not use its task stack to store such an interrupt context. We cannot use the heir stack before it stopped execution on another processor. So if we enable interrupts during this transition we have to provide an alternative task independent stack for this time frame. This issue needs further investigation.
* score: Delete _SMP_Test_message_default_handlerSebastian Huber2014-05-071-7/+1
| | | | | A default handler is not necessary. The test message sender must ensure that a handler is installed.
* bsps/arm: Declare return typesSebastian Huber2014-05-071-7/+8
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* bsps: Fix BSP_INITIAL_EXTENSIONSebastian Huber2014-05-071-1/+1
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* score: DocumentationSebastian Huber2014-05-072-4/+12
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* testsuites: Remove BSP_SMALL_MEMORYJoel Sherrill2014-05-0616-153/+18
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* multiple BSPs: Remove BSP_SMALL_MEMORYJoel Sherrill2014-05-0614-35/+0
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* bsp/gen83xx: Add BSP_USB_EHCI_MPC83XX_HAS_ULPISebastian Huber2014-05-061-0/+3
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* posix: Fix POSIX keys initializationSebastian Huber2014-05-061-5/+5
| | | | | Always initialize the freechain. This prevents a NULL pointer access in case no initial key value pairs are defined.
* score: Use atomic operations for SMP messagesSebastian Huber2014-05-053-19/+15
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* score: Add SMP test message handlerSebastian Huber2014-05-058-0/+281
| | | | | This handler can be used to test the inter-processor interrupt implementation.
* score: SMP_FATAL_SCHEDULER_WITHOUT_PROCESSORSSebastian Huber2014-05-0514-148/+83
| | | | | Avoid the SMP_FATAL_SCHEDULER_WITHOUT_PROCESSORS fatal error and make it a run-time error in rtems_scheduler_ident() and _Scheduler_Get_by_id().
* doc: Add SMP glossarySebastian Huber2014-05-051-0/+110
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* score: Fix TLS size usageSebastian Huber2014-05-053-7/+11
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* testsuite: Add a per BSP test check for tests not to build.Chris Johns2014-05-0539-110/+613
| | | | | | | | Provide a file per BSP to list tests that do not build for a BSP. This change removes the BSP_SMALL_MEMORY hack from the code. That hack was a mistake. Provide configuration files for each BSP with tests that cannot build.
* libchip: Add asserts to dwmac driverRalf Kirchner2014-04-301-0/+3
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* libchip: Correct netstats message for dwmac driverRalf Kirchner2014-04-301-1/+1
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* bsp/altera-cyclone-v: Move mbufs and network clusters to uncached RAMRalf Kirchner2014-04-301-0/+12
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* bsp/altera-cyclone-v: Increase size of nocache region and nocache heapRalf Kirchner2014-04-302-3/+3
| | | | Increase size of nocache heap in order to be able to move mbufs and clusters of the network driver to uncached RAM
* score: TypoSebastian Huber2014-04-301-1/+1
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* doc: Extend documentation for unlimited objectsRalf Kirchner2014-04-301-4/+37
| | | | | | | Mark POSIX Keys and POSIX Key Value Pairs as supported. Add list of unsupported object classes. Add hint to unified work areas. Add example.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-2921-149/+28
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* bsps/mips: Delete unused filesSebastian Huber2014-04-2915-705/+0
| | | | The MIPS port defines CPU_SIMPLE_VECTORED_INTERRUPTS to FALSE.
* bsps/m32r: Fix bsp_specsSebastian Huber2014-04-291-6/+4
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* bsps/bfin: Fix bsp_specsSebastian Huber2014-04-295-25/+12
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* sapi: Report profiling only if enabled for testsSebastian Huber2014-04-291-0/+2
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* bsp/h8sim: Fix linker command fileSebastian Huber2014-04-291-0/+2
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* score: Avoid copy and pasteSebastian Huber2014-04-281-19/+15
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* sapi: Add profiling done messageSebastian Huber2014-04-281-0/+6
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* sapi: Add arithmetic means to XML profiling reportSebastian Huber2014-04-281-9/+62
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* sparc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2014-04-285-93/+74
| | | | | | | | | | | | | | | | Use register g6 for the per-CPU control of the current processor. The register g6 is reserved for the operating system by the SPARC ABI. On Linux register g6 is used for a similar purpose with the same method since 1996. The register g6 must be initialized during system startup and then must remain unchanged. Since the per-CPU control is used in all critical sections of the operating system, this is a performance optimization for the operating system core procedures. An additional benefit is that the low-level context switch and interrupt processing code is now identical on non-SMP and SMP configurations.
* sparc: Document register g7 usageSebastian Huber2014-04-281-0/+3
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* sparc: Optimize context switchSebastian Huber2014-04-284-55/+53
| | | | | | The registers g2 through g4 are reserved for applications. GCC uses them as volatile registers by default. So they are treated like volatile registers in RTEMS as well.
* score: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2014-04-282-3/+25
| | | | | | | | | Add optional method _CPU_Get_current_per_CPU_control() to obtain the per-CPU control of the current processor. This is optional. Not every CPU port needs this. It is only an optional optimization variant. In case this macro is undefined, the default implementation using the current processor index will be used.
* rtems: Account for the network semaphore.Chris Johns2014-04-271-1/+8
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* sapi: Fix condef.h compile error for disabled network configuration.Jennifer Averett2014-04-251-0/+2
| | | | Added define for CONFIGURE_SEMAPHORES_FOR_NFS when networking disabled.
* libfs/rfs: Fix the fstime failures for the RFS file system.Chris Johns2014-04-252-12/+22
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* rtems: Account for file system semaphores.Chris Johns2014-04-251-2/+32
| | | | Add support to account for the semaphores used by the file systems.
* mcf52235/configure.ac: Delete junk lineJoel Sherrill2014-04-241-1/+0
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* bootstrap: Sort the contents of the prinstall.am files.Chris Johns2014-04-233-5/+5
| | | | | Sorting removed the variations across different host operating systems and file systems.
* shsim: Correct linking for C++Joel Sherrill2014-04-222-16/+13
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* gensh4: Correct linking for C++Joel Sherrill2014-04-222-42/+8
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* gensh2: Correct linking for C++Joel Sherrill2014-04-222-16/+8
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* gensh1: Correct linking for C++Joel Sherrill2014-04-222-16/+8
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