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authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-04-22 10:40:26 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-04-28 09:26:19 +0200
commit3fe1e4308a8d6586ab28c0c31422d0a330bf05ad (patch)
treebc69673e042522690ddef5086051b9ed5b298e5b
parentb2ec2d15971503466e1debf596dc84b6af0f9b13 (diff)
downloadrtems-3fe1e4308a8d6586ab28c0c31422d0a330bf05ad.tar.bz2
sparc: Document register g7 usage
-rw-r--r--doc/cpu_supplement/sparc.t3
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t
index 320c250e40..a6862c8aa2 100644
--- a/doc/cpu_supplement/sparc.t
+++ b/doc/cpu_supplement/sparc.t
@@ -401,6 +401,9 @@ The registers g2 through g4 are reserved for applications. GCC uses them as
volatile registers by default. So they are treated like volatile registers in
RTEMS as well.
+The register g7 is reserved for the operating system and contains the thread
+pointer used for thread-local storage (TLS) as mandated by the SPARC ABI.
+
@subsubsection Floating Point Registers
The SPARC V7 architecture includes thirty-two,