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* score603e: Add rtems_crtiJoel Sherrill2014-04-221-3/+3
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* ss555: Add rtems_crti/nJoel Sherrill2014-04-223-3/+17
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* sim68000/bsp_specs: Add crtbegin/end, crt[in]Joel Sherrill2014-04-221-2/+5
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* mpc8260ads: Add rtems_crti/nJoel Sherrill2014-04-223-6/+13
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* h8sim/bsp_specs: Add crtbegin/end, crt[in]Joel Sherrill2014-04-221-1/+4
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* mpci.c: Now compiles againJoel Sherrill2014-04-221-1/+3
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* niagara/Makefile.am: Fix rule for start.oJoel Sherrill2014-04-221-1/+1
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* utf8proc01: Honor BSP_SMALL_MEMORYJoel Sherrill2014-04-221-1/+7
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* flashdisk01: Honor BSP_SMALL_MEMORYJoel Sherrill2014-04-221-2/+2
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* fsdosfsname01: Honor BSP_SMALL_MEMORYJoel Sherrill2014-04-221-9/+23
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* fsdosfsformat01: Honor BSP_SMALL_MEMORYJoel Sherrill2014-04-221-4/+10
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* libcpu/sh: Build cache stubs so apps usign cache API linkJoel Sherrill2014-04-226-11/+46
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* dummy_printk_support.c: Comment clean upJoel Sherrill2014-04-221-6/+9
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* shsim: Add printk() support and move all code to console subdirectoryJoel Sherrill2014-04-224-10/+55
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* bsps: Fix TLS support in linker command filesSebastian Huber2014-04-2279-79/+237
| | | | | The TLS section symbols had wrong values in case of an empty TLS data section and a nonempty TLS BSS section.
* bsp/mbx8xx: Fix Makefile.am and bsp_specsSebastian Huber2014-04-224-7/+27
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* bsps/powerpc: Fix linker command filesSebastian Huber2014-04-223-11/+7
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* score: Use common names for per-CPU variablesSebastian Huber2014-04-2215-183/+183
| | | | | | | | | | | | | | | | Use "cpu" for an arbitrary Per_CPU_Control variable. Use "cpu_self" for the Per_CPU_Control of the current processor. Use "cpu_index" for an arbitrary processor index. Use "cpu_index_self" for the processor index of the current processor. Use "cpu_count" for the processor count obtained via _SMP_Get_processor_count(). Use "cpu_max" for the processor maximum obtained by rtems_configuration_get_maximum_processors().
* score: Fix warningSebastian Huber2014-04-221-2/+0
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* score: Delete superfluous assignmentsSebastian Huber2014-04-221-7/+0
| | | | These values are already zero initialized by C run-time setup.
* score: Simplify Giant lockSebastian Huber2014-04-221-9/+7
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* score: Use _Per_CPU_Get_snapshot()Sebastian Huber2014-04-221-1/+1
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* doc: Setting Affinity to a Single ProcessorSebastian Huber2014-04-221-8/+20
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* bsp/arm: Cleanup L2 cache handlingRalf Kirchner2014-04-171-38/+7
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* bsp/arm: Correct L2 cache enable methodRalf Kirchner2014-04-171-53/+48
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* bsp/arm: Add cache size methodsRalf Kirchner2014-04-172-0/+115
| | | | Add new methods which deliver the cache sizes of for supported cache levels.
* bsp/arm: Add L2 cache lockingRalf Kirchner2014-04-171-9/+34
| | | | This level 2 cache is a shared data and instruction cache and thus needs locking.
* bsp/arm: Remove unused cache store methodsRalf Kirchner2014-04-172-30/+0
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* bsp/arm: Correct cache misalignment handlingRalf Kirchner2014-04-172-32/+60
| | | | Correct misalignment handling and prepare for locking.
* bsp/arm: Correct L2 cache flushingRalf Kirchner2014-04-171-17/+31
| | | | Correct misalignment handling and prepare for locking.
* bsp/arm: Remove arm erratum 764369 from L2 cacheRalf Kirchner2014-04-171-14/+0
| | | | Arm erratum 764369 only applies to the level 1 cache.
* bsp/arm: Consistenly same handling for flushingRalf Kirchner2014-04-171-2/+2
| | | | | It is importeant to consistently apply the same handling for flushing within level 2 and level 1 cache handling. In this case now both handling use clean and invalidate.
* bsp/arm: RTEMS_SMP to arm erratum 764369 detectionRalf Kirchner2014-04-173-10/+8
| | | | Move the RTEMS_SMP conditional compilation to the detection method of arm erratum 764369
* bsp/arm: Erratum 764369 after enabling SCURalf Kirchner2014-04-171-1/+1
| | | | Execute the SCU part of the workaround of arm erratum 764368 after the SCU was enabled.
* bsp/arm: Correct detection of arm erratum 764368Ralf Kirchner2014-04-171-0/+1
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* bsp/arm: Cleanup L1 cacheRalf Kirchner2014-04-171-2/+2
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* libchip: Correct error handling in dwmac driverRalf Kirchner2014-04-171-11/+4
| | | | By fault an rtems_status_code has been expected instead of an errno error number.
* libchip: Reduce tx interruptsRalf Kirchner2014-04-174-222/+262
| | | | | | | Reduce number of packet transmitted interrupts by using the interrupt mechanism only if we run out of DMA descriptors. Under normal conditions regaining DMA descriptors, mbufs and clusters is handled via a counter.
* libchip: CleanupRalf Kirchner2014-04-171-2/+2
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* libchip: Improve handling of DMA suspendsRalf Kirchner2014-04-171-0/+1
| | | | Reset the corresponding DMA status bit
* bsp/altera-cyclone-v: CleanupRalf Kirchner2014-04-171-2/+0
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* bsp/altera-cyclone-v: Change console baud rateRalf Kirchner2014-04-171-1/+1
| | | | | | The baud rate of the altera cyclone-V U-Boot can not be changed at the u-Boot console prompt. Thus we use the same baud rate as the U-Boot for the BSP.
* score: Clarify TLS supportSebastian Huber2014-04-176-7/+26
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* doc: TypoSebastian Huber2014-04-171-2/+1
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* doc: rtems_task_set_scheduler()Sebastian Huber2014-04-172-0/+80
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* doc: rtems_task_get_scheduler()Sebastian Huber2014-04-171-0/+35
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* doc: rtems_scheduler_get_processor_set()Sebastian Huber2014-04-171-0/+40
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* doc: rtems_scheduler_ident()Sebastian Huber2014-04-171-0/+37
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* doc: rtems_task_set_affinity()Sebastian Huber2014-04-172-32/+15
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* doc: rtems_task_get_affinity()Sebastian Huber2014-04-171-24/+15
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