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* Thread Handler split into multiple files. Eventually, as RTEMS isJoel Sherrill1999-05-1751-2609/+3968
| | | | split into one function per file, this will decrease the size of executables.
* Patch from D. V. Henkel-Wallace <gumby@zembu.com> to remove compilerJoel Sherrill1999-05-1712-16/+16
| | | | warnings.
* Patch from D. V. Henkel-Wallace <gumby@zembu.com>:Joel Sherrill1999-05-172-0/+32
| | | | | | Here's a tiny patch that shreds memory returned to the pool (such as by free() and delete). This may help people find some nasty bugs, so here it is.
* Added C++ linking rule from Rosimildo DaSilva <rdasilva@connecttel.com>.Joel Sherrill1999-05-141-1/+20
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* Added testing for C++ exceptions from Rosimildo DaSilvaJoel Sherrill1999-05-142-34/+180
| | | | <rdasilva@connecttel.com>.
* Added 3COM 3C509 driver from Rosimildo DaSilva <rdasilva@connecttel.com>.Joel Sherrill1999-05-147-2/+2247
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* Regenerated.Joel Sherrill1999-05-140-0/+0
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* Regenerated.Joel Sherrill1999-05-140-0/+0
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* Enabled compilation of rtems_servers at request of Jake JanovetzJoel Sherrill1999-05-148-12/+16
| | | | <janovetz@tempest.ece.uiuc.edu>.
* Fixed typo.Joel Sherrill1999-05-141-1/+1
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* Added tool hints.Joel Sherrill1999-05-143-1/+12
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* New file.Joel Sherrill1999-05-141-0/+47
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* Removed check for initialized ID at request of Rosimildo DaSilvaJoel Sherrill1999-05-142-0/+46
| | | | | <rdasilva@connecttel.com> who encountered random failures in his port of omniORB2.
* Removed -fomit-frame-pointer from all i386 BSPs since it breaks C++Joel Sherrill1999-05-145-5/+10
| | | | exceptions and makes debug stack traces impossible.
* Fix based on bug report from Jay Kulpinski <jskulpin@eng01.gdds.com>Joel Sherrill1999-05-113-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | that the per task reentrancy structure was not being processed properly during exit(). joel@oarcorp.com wrote: > > > This is always an ugly place to poke around. :( > > The code in newlib/libc/stdlib/exit.c walks the atexit chain for the > reentrancy structure for JUST the current task. The code in libc_wrapup() > does it for both the current task and the global reentrancy structure > (which tends to be where driver atexit()'s were registered. > > So I think the _wrapup_reent(0) in libc_wrapup() should be commented out. > > If you concur, then I will make the change and improve the comment on this > line of code to explain things: > > libc_wrapup(); /* Why? XXX */ > > --joel That does the job. cdtest.exe works correctly now.
* Patch from Erik Ivanenko <erik.ivanenko@utoronto.ca> to correct 32 bitJoel Sherrill1999-05-111-0/+2
| | | | jmp relative offset from .reset section.
* Made all calls to _Thread_Yield_processor consistent in how they areJoel Sherrill1999-05-074-18/+18
| | | | wrapped by calls to _Thread_Enable_dispatch and _Thread_Disable_dispatch.
* Patch from Jiri Gaisler <jgais@ws.estec.esa.nl> to allow stacksizeJoel Sherrill1999-05-076-6/+20
| | | | of POSIX Init thread to be user configured.
* Added rules to handle alternate suffixes for C++ files.Joel Sherrill1999-05-072-0/+18
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* Error reporting fixed by Jennifer.Joel Sherrill1999-05-074-60/+60
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* Bug fix from Gunter Magin <magin@@skil.camelot.de>:Joel Sherrill1999-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | in libcpu/powerpc/mpc860/clock/clock.c:InstallClock() the reload value for the PIT is defined as: pit_value = (BSP_Configuration.microseconds_per_tick * Cpu_table.clicks_per_usec) - 1 ; What exactly is a tick, and what is a click? My confusion stems from the fact, that Jay defines clicks_per_usec to 1 which is correct for his configuration, where a 4MHz clock is predivided by 4 and then fed to the PIT. So I assume a "click" is just the period of the PIT input frequency. However, our HW config seems to have 32.768 kHz crystal input for PIT. Mandatory division by 4 means 8.196kHz (122usec) at the PIT. I think, the above assignment should read: pit_value = (BSP_Configuration.microseconds_per_tick / Cpu_table.clicks_per_usec) - 1; where I can define Cpu_table.clicks_per_usec in bspstart.c to 122 (clicks_per_usec). That would lead to a PIT reload value of 10000/122 - 1 = 81 to reach a 10ms "tick" period.
* Bug fix from Gunter Magin <magin@skil.camelot.de>:Joel Sherrill1999-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | in libcpu/powerpc/mpc860/clock/clock.c:InstallClock() the reload value for the PIT is defined as: pit_value = (BSP_Configuration.microseconds_per_tick * Cpu_table.clicks_per_usec) - 1 ; What exactly is a tick, and what is a click? My confusion stems from the fact, that Jay defines clicks_per_usec to 1 which is correct for his configuration, where a 4MHz clock is predivided by 4 and then fed to the PIT. So I assume a "click" is just the period of the PIT input frequency. However, our HW config seems to have 32.768 kHz crystal input for PIT. Mandatory division by 4 means 8.196kHz (122usec) at the PIT. I think, the above assignment should read: pit_value = (BSP_Configuration.microseconds_per_tick / Cpu_table.clicks_per_usec) - 1; where I can define Cpu_table.clicks_per_usec in bspstart.c to 122 (clicks_per_usec). That would lead to a PIT reload value of 10000/122 - 1 = 81 to reach a 10ms "tick" period.
* Added paragraph for Tony Ambardar (tonya@ece.ubc.ca) submittingJoel Sherrill1999-04-291-0/+5
| | | | | | a BSP for the TS-1325 embedded PC from Technologic Systems (http://www.t-systems.com) and patches to enable software floating-point emulation for x86 targets.
* Patch from Emmanuel Raguet <raguet@crf.canon.fr>:Joel Sherrill1999-04-281-1/+3
| | | | | | | | | | I have made test with the Dec21140 driver and it appears that all works fine even if the cache is enabled for the memory space in which the incoming and outcoming Ethernet frames are stored. I have had #ifdef to "comment" the code. If you want to disable cache, you only have to #define the name. It could be mandatory for some BSPs.
* Patch from Eric Norum <eric@cls.usask.ca> to corrent a miscount in lengthJoel Sherrill1999-04-274-4/+4
| | | | that results in an error in parsing network unit names/numbers.
* changed version to 19990426Joel Sherrill1999-04-260-0/+0
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* Repairing damage and recovering changes including C++ wrappers..Joel Sherrill1999-04-2612-9/+106
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* changed version to 19990426Joel Sherrill1999-04-260-0/+0
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* Recovered changes since CVS file was corrupted.Joel Sherrill1999-04-262-2/+18
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* changed version to 19990426Joel Sherrill1999-04-260-0/+0
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* changed version to 19990426Joel Sherrill1999-04-262-2/+2
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* Fixed Makefile to avoid copying the file to a new name.Joel Sherrill1999-04-231-1/+0
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* Changed date.Joel Sherrill1999-04-237-28/+27
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* Switched to full doc set.Joel Sherrill1999-04-231-1/+30
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* changed version to 19990423Joel Sherrill1999-04-232-2/+2
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* New BSP from Tony R. Ambardar <tonya@ece.ubc.ca> from theJoel Sherrill1999-04-2349-0/+6026
| | | | | | | | University of British Columbia. The BSP is for: Yes, this is the "entry model" of a series of boards from Technologic Systems. Costs <$200 I believe. They have a WWW page at www.t-systems.com. I am letting them know about the availability of this BSP too.
* Added lstat().Joel Sherrill1999-04-227-19/+118
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* Added some CPU models that did not have BSPs.Joel Sherrill1999-04-221-4/+9
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* Regenerated.Joel Sherrill1999-04-210-0/+0
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* Updated to reflect inclusion of IRQ test in ada examples.Joel Sherrill1999-04-201-3/+7
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* Added FAQ to the documentation set.Joel Sherrill1999-04-193-12/+9
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* Added debugging hints to the FAQ.Joel Sherrill1999-04-193-8/+10
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* New file.Joel Sherrill1999-04-191-0/+43
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* Updated to include first set of questions.Joel Sherrill1999-04-192-1/+124
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* First attempt to build.Joel Sherrill1999-04-193-5/+20
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* New file.Joel Sherrill1999-04-192-0/+176
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* Regenerated.Joel Sherrill1999-04-192-0/+2
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* New file based on notes from Jiri Gaisler <jgais@ws.estec.esa.nl>.Joel Sherrill1999-04-191-0/+77
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* Added info based on i960HA support.Joel Sherrill1999-04-191-10/+8
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* Intel i960HA support submitted by Jimen Ching <jimen@adtech-inc.com>Joel Sherrill1999-04-194-12/+154
| | | | | based on 3.6.0. It was very lucky that this went in as well as it did.