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-rw-r--r--cpukit/score/cpu/powerpc/cpu.c3
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/asm.h10
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h4
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpu.h11
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h33
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h11
-rw-r--r--cpukit/score/cpu/powerpc/ppc-context-validate.S2
-rw-r--r--cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S2
-rw-r--r--cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S2
9 files changed, 28 insertions, 50 deletions
diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c
index bdb9cf6ab5..7c90ac28dc 100644
--- a/cpukit/score/cpu/powerpc/cpu.c
+++ b/cpukit/score/cpu/powerpc/cpu.c
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (C) 2009, 2017 embedded brains GmbH.
+ * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -358,4 +358,5 @@ void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
: "r" (source), "r" (error)
: "memory"
);
+ RTEMS_UNREACHABLE();
}
diff --git a/cpukit/score/cpu/powerpc/include/rtems/asm.h b/cpukit/score/cpu/powerpc/include/rtems/asm.h
index 27af64e724..94f54245b4 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/asm.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/asm.h
@@ -75,23 +75,21 @@
#define __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__
#endif
-#include <rtems/concat.h>
-
/* Use the right prefix for global labels. */
-#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+#define SYM(x) RTEMS_XCONCAT (__USER_LABEL_PREFIX__, x)
/* Use the right prefix for procedure labels. */
-#define PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x)
+#define PROC(x) RTEMS_XCONCAT (__PROC_LABEL_PREFIX__, x)
/* Use the right prefix for registers. */
-#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+#define REG(x) RTEMS_XCONCAT (__REGISTER_PREFIX__, x)
/* Use the right prefix for floating point registers. */
-#define FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x)
+#define FREG(x) RTEMS_XCONCAT (__FLOAT_REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
diff --git a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
index b651261493..271dcc36af 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
@@ -541,8 +541,8 @@ lidate */
#define FSL_EIS_MAS0 624
#define FSL_EIS_MAS0_TLBSEL (1 << (63 - 35))
-#define FSL_EIS_MAS0_ESEL(n) ((0xf & (n)) << (63 - 47))
-#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xf)
+#define FSL_EIS_MAS0_ESEL(n) ((0xfff & (n)) << (63 - 47))
+#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xfff)
#define FSL_EIS_MAS0_NV (1 << (63 - 63))
#define FSL_EIS_MAS1 625
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
index 84f0bf3f65..6f2fe491e9 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
@@ -29,7 +29,7 @@
*
* Copyright (c) 2001 Surrey Satellite Technology Limited (SSTL).
*
- * Copyright (c) 2010, 2020 embedded brains GmbH.
+ * Copyright (C) 2010, 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -449,8 +449,8 @@ static inline ppc_context *ppc_get_context( const Context_Control *context )
#endif
#ifndef ASM
-typedef struct {
#if (PPC_HAS_FPU == 1)
+typedef struct {
/* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over
* procedure calls. However, this would mean that the interrupt
* frame had to hold f0-f13, and the fpscr. And as the majority
@@ -464,9 +464,8 @@ typedef struct {
float f[32];
uint32_t fpscr;
#endif
-#endif /* (PPC_HAS_FPU == 1) */
} Context_Control_fp;
-
+#endif /* (PPC_HAS_FPU == 1) */
#endif /* ASM */
/*
@@ -562,7 +561,9 @@ typedef struct {
* CPUs with a "floating point save context" instruction.
*/
+#if (PPC_HAS_FPU == 1)
#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
+#endif
/*
* (Optional) # of bytes for libmisc/stackchk to check
@@ -940,6 +941,7 @@ RTEMS_NO_RETURN void _CPU_Context_switch_no_return(
RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context );
+#if (PPC_HAS_FPU == 1)
/*
* _CPU_Context_save_fp
*
@@ -959,6 +961,7 @@ void _CPU_Context_save_fp(
void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+#endif
#ifdef RTEMS_SMP
uint32_t _CPU_SMP_Initialize( void );
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h
deleted file mode 100644
index 01bb99cda3..0000000000
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-
-/*
- * COPYRIGHT (c) 2012-2013 Deng Hengyi.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _RTEMS_SCORE_ATOMIC_CPU_H
-#define _RTEMS_SCORE_ATOMIC_CPU_H
-
-#include <rtems/score/cpustdatomic.h>
-
-#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
index c81675b53d..68b7165546 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
@@ -12,7 +12,7 @@
*
* Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu>
*
- * Copyright (c) 2009, 2017 embedded brains GmbH
+ * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -151,6 +151,8 @@
#define CPU_PER_CPU_CONTROL_SIZE 0
+#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
+
#ifdef RTEMS_SMP
/* Use SPRG0 for the per-CPU control of the current processor */
@@ -299,6 +301,13 @@ static inline void _CPU_Use_thread_local_storage(
__asm__ volatile ( "" : : "r" ( tp ) );
}
+static inline void *_CPU_Get_TLS_thread_pointer(
+ const Context_Control *context
+)
+{
+ return (void *) ppc_get_context( context )->tp;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/cpukit/score/cpu/powerpc/ppc-context-validate.S b/cpukit/score/cpu/powerpc/ppc-context-validate.S
index 67cb5b45c3..721633c642 100644
--- a/cpukit/score/cpu/powerpc/ppc-context-validate.S
+++ b/cpukit/score/cpu/powerpc/ppc-context-validate.S
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (c) 2013, 2020 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2013, 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
index 021ec6941b..d235929f7d 100644
--- a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
+++ b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S b/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S
index 4fc765195d..529b88bf3f 100644
--- a/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S
+++ b/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2014 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions