diff options
Diffstat (limited to 'c/src/lib/libcpu/mips/shared')
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/.cvsignore | 2 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/Makefile.am | 10 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/cache/.cvsignore | 2 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/cache/Makefile.am | 39 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/cache/cache.c | 10 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/cache/cache_.h | 13 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/.cvsignore | 2 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/Makefile.am | 32 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c | 29 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S | 74 | ||||
| -rw-r--r-- | c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c | 29 |
11 files changed, 242 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/mips/shared/.cvsignore b/c/src/lib/libcpu/mips/shared/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libcpu/mips/shared/Makefile.am b/c/src/lib/libcpu/mips/shared/Makefile.am new file mode 100644 index 0000000000..b534a0c8ea --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/Makefile.am @@ -0,0 +1,10 @@ +## +## $Id$ +## + +AUTOMAKE_OPTIONS = foreign 1.4 + +SUBDIRS = cache interrupts + +include $(top_srcdir)/../../../../../automake/subdirs.am +include $(top_srcdir)/../../../../../automake/local.am diff --git a/c/src/lib/libcpu/mips/shared/cache/.cvsignore b/c/src/lib/libcpu/mips/shared/cache/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/cache/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libcpu/mips/shared/cache/Makefile.am b/c/src/lib/libcpu/mips/shared/cache/Makefile.am new file mode 100644 index 0000000000..ca04231141 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/cache/Makefile.am @@ -0,0 +1,39 @@ +## +## $Id$ +## + +AUTOMAKE_OPTIONS = foreign 1.4 + +VPATH = @srcdir@:@srcdir@/../../../shared/src + +C_FILES = cache.c cache_aligned_malloc.c cache_manager.c +C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o) + +H_FILES = cache_.h +INSTALLED_H_FILES = + +OBJS = $(C_O_FILES) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(top_srcdir)/../../../../../automake/compile.am +include $(top_srcdir)/../../../../../automake/lib.am + +AM_CPPFLAGS += -I$(srcdir) + +$(PROJECT_INCLUDE)/libcpu: + $(mkinstalldirs) $@ + +$(PROJECT_INCLUDE)/libcpu/%.h: %.h + $(INSTALL_DATA) $< $@ + +$(PROJECT_INCLUDE)/libcpu/cache.h: $(top_srcdir)/../shared/include/cache.h + $(INSTALL_DATA) $< $@ + +PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu \ + $(PROJECT_INCLUDE)/libcpu/cache.h + +all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS) + +EXTRA_DIST = cache.c cache_.h + +include $(top_srcdir)/../../../../../automake/local.am diff --git a/c/src/lib/libcpu/mips/shared/cache/cache.c b/c/src/lib/libcpu/mips/shared/cache/cache.c new file mode 100644 index 0000000000..9af01feffd --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/cache/cache.c @@ -0,0 +1,10 @@ +/* + * Cache Management Support Routines for the MIPS + * + * $Id$ + */ + +#include <rtems.h> +#include "cache_.h" + +/* TBD */ diff --git a/c/src/lib/libcpu/mips/shared/cache/cache_.h b/c/src/lib/libcpu/mips/shared/cache/cache_.h new file mode 100644 index 0000000000..d51c4ee075 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/cache/cache_.h @@ -0,0 +1,13 @@ +/* + * MIPS Cache Manager Support + */ + +#ifndef __MIPS_CACHE_h +#define __MIPS_CACHE_h + +#include <libcpu/cache.h> + +/* TBD */ + +#endif +/* end of include file */ diff --git a/c/src/lib/libcpu/mips/shared/interrupts/.cvsignore b/c/src/lib/libcpu/mips/shared/interrupts/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/interrupts/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libcpu/mips/shared/interrupts/Makefile.am b/c/src/lib/libcpu/mips/shared/interrupts/Makefile.am new file mode 100644 index 0000000000..434f2a38ec --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/interrupts/Makefile.am @@ -0,0 +1,32 @@ +## +## $Id$ +## + +AUTOMAKE_OPTIONS = foreign 1.4 + +PGM = $(ARCH)/interrupts.rel + +C_FILES = installisrentries.c maxvectors.c + +S_FILES = isr_entries.S + +interrupts_rel_OBJECTS = $(C_FILES:%.c=$(ARCH)/%.o) $(S_FILES:%.S=$(ARCH)/%.o) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(top_srcdir)/../../../../../automake/compile.am +include $(top_srcdir)/../../../../../automake/lib.am + +# +# (OPTIONAL) Add local stuff here using += +# + +$(PGM): $(interrupts_rel_OBJECTS) + $(make-rel) + +all-local: $(ARCH) $(interrupts_rel_OBJECTS) $(PGM) + +.PRECIOUS: $(PGM) + +EXTRA_DIST = maxvectors.c + +include $(top_srcdir)/../../../../../automake/local.am diff --git a/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c b/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c new file mode 100644 index 0000000000..5dd37f82bb --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c @@ -0,0 +1,29 @@ +/* + * $Id$ + */ + +#include <rtems.h> +#include <idtcpu.h> +#include <stdlib.h> + +void mips_install_isr_entries( void ) +{ +#if __mips == 1 + void exc_utlb_code(void); + void exc_norm_code(void); + + memcpy( (void *)UT_VEC, exc_utlb_code, 40 ); /* utlbmiss vector */ + memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vevtor */ +#elif __mips == 3 + void exc_tlb_code(void); + void exc_utlb_code(void); + void exc_cache_code(void); + void exc_norm_code(void); + + memcpy( (void *)T_VEC, exc_tlb_code, 40 ); /* tlbmiss vector */ + memcpy( (void *)X_VEC, exc_xtlb_code, 40 ); /* xtlbmiss vector */ + memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ + memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ +#endif + rtems_cache_flush_entire_data(); +} diff --git a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S new file mode 100644 index 0000000000..8fe31cd6e2 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S @@ -0,0 +1,74 @@ +/* + * This file contains the raw entry points for the exceptions. + * + * COPYRIGHT (c) 1989-2000. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ +/* @(#)cpu_asm.S 08/20/96 1.15 */ + +#include <asm.h> +#include "iregdef.h" +#include "idtcpu.h" + +/* + * MIPS ISA Level 1 entries + */ + +#if __mips == 1 + +FRAME(exc_norm_code,sp,0,ra) + la k0, _ISR_Handler /* generic external int hndlr */ + j k0 + nop +ENDFRAME(exc_norm_code) + +/* XXX this is dependent on IDT/SIM and needs to be addressed */ +FRAME(exc_utlb_code,sp,0,ra) + la k0, (R_VEC+((48)*8)) + j k0 + nop +ENDFRAME(exc_tlb_code) + +/* + * MIPS ISA Level 3 + * XXX Again, reliance on SIM. Not good. + */ +#elif __mips == 3 + +FRAME(exc_tlb_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop +ENDFRAME(exc_tlb_code) + +FRAME(exc_xtlb_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop + +ENDFRAME(exc_xtlb_code) + +FRAME(exc_cache_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop +ENDFRAME(exc_cache_code) + +FRAME(exc_norm_code,sp,0,ra) + la k0, _ISR_Handler /* generic external int hndlr */ + j k0 + nop +ENDFRAME(exc_norm_code) + +#else + +#error "isr_entries.S: ISA support problem" + +#endif + diff --git a/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c b/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c new file mode 100644 index 0000000000..c1e5df20a4 --- /dev/null +++ b/c/src/lib/libcpu/mips/shared/interrupts/maxvectors.c @@ -0,0 +1,29 @@ +/* + * This file contains the maximum number of vectors. This can not + * be determined without knowing the RTEMS CPU model. + * + * COPYRIGHT (c) 1989-2000. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + + +/* + * The tx3904 attaches 4 of the eight interrupt bits to an on-CPU interrupt + * controller so that these four bits map to 16 unique interrupts. + * So you have: 2 software interrupts, an NMI, and 16 others. + */ +#if defined(tx3904) +#define MAX_VECTORS 19 +#endif + +#ifndef MAX +#define MAX_VECTORS 8 +#endif + +unsigned int mips_interrupt_number_of_vectors = MAX_VECTORS; |