diff options
Diffstat (limited to 'c/src/lib/libcpu/arm/at91rm9200/include')
7 files changed, 55 insertions, 55 deletions
diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h index 99346dbaa0..88825452d5 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h @@ -32,7 +32,7 @@ typedef volatile unsigned long vulong; #define AIC_SVR_REG(_x_) *(vulong *)(AIC_SVR_BASE + (_x_ & 0x7c)) /* Control Register - 32 of them */ -#define AIC_CTL_BASE 0xFFFFF100 +#define AIC_CTL_BASE 0xFFFFF100 #define AIC_CTL_REG(_x_) *(vulong *)(AIC_CTL_BASE + (_x_ & 0x7f)) /* Register Offsets */ @@ -103,9 +103,9 @@ typedef volatile unsigned long vulong; /* AIC_SMR */ #define AIC_SMR_PRIOR(_x_) ((_x_ & 0x07) << 0) #define AIC_SMR_SRC_LVL_LOW (0 << 5) /* Are these right? docs don't say which is high/low */ -#define AIC_SMR_SRC_EDGE_LOW (1 << 5) -#define AIC_SMR_SRC_LVL_HI (2 << 5) -#define AIC_SMR_SRC_EDGE_HI (3 << 5) +#define AIC_SMR_SRC_EDGE_LOW (1 << 5) +#define AIC_SMR_SRC_LVL_HI (2 << 5) +#define AIC_SMR_SRC_EDGE_HI (3 << 5) /**************************************************************************/ /* Debug Unit */ @@ -192,7 +192,7 @@ typedef volatile unsigned long vulong; * Note that each of the following peripherals has it's own * set of these registers starting at offset 0x100 from it's * base address: DBGU, SPI, USART and SSC - * To access the DMA for a peripheral, use the macro for that + * To access the DMA for a peripheral, use the macro for that * peripheral but with these register offsets **************************************************************************/ /* Register Offsets */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h index e4952ae4ad..961da4b8e1 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h index ea1d701de4..d7161e676f 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -104,7 +104,7 @@ #define EMAC_TSR_BNQ BIT4 /* 1 = Transmit buffer not queued */ #define EMAC_TSR_COMP BIT5 /* 1 = Transmit complete */ #define EMAC_TSR_UND BIT6 /* 1 = Transmit underrun */ - + /* Receive Status Register, EMAC_RSR, Offset 0x20 */ #define EMAC_RSR_BNA BIT0 /* 1 = Buffer not available */ #define EMAC_RSR_REC BIT1 /* 1 = Frame received */ @@ -137,7 +137,7 @@ #define EMAC_MAN_WRITE (0x1 << 28) /* Transfer is a write */ #define EMAC_MAN_READ (0x2 << 28) /* Transfer is a read */ #define EMAC_MAN_HIGH BIT30 /* Must be set */ -#define EMAC_MAN_LOW BIT31 +#define EMAC_MAN_LOW BIT31 /* * Bit assignments for Receive Buffer Descriptor diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h index d0a89a8f87..1aa38c9838 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -59,16 +59,16 @@ * * PORT A */ -#define GPIO_0 BIT0 -#define GPIO_1 BIT1 -#define GPIO_2 BIT2 -#define GPIO_3 BIT3 -#define GPIO_4 BIT4 -#define GPIO_5 BIT5 -#define GPIO_6 BIT6 -#define GPIO_7 BIT7 -#define GPIO_8 BIT8 -#define GPIO_9 BIT9 +#define GPIO_0 BIT0 +#define GPIO_1 BIT1 +#define GPIO_2 BIT2 +#define GPIO_3 BIT3 +#define GPIO_4 BIT4 +#define GPIO_5 BIT5 +#define GPIO_6 BIT6 +#define GPIO_7 BIT7 +#define GPIO_8 BIT8 +#define GPIO_9 BIT9 #define GPIO_10 BIT10 #define GPIO_11 BIT11 #define GPIO_12 BIT12 @@ -92,16 +92,16 @@ #define GPIO_30 BIT30 #define GPIO_31 BIT31 /* PORT B */ -#define GPIO_32 BIT0 -#define GPIO_33 BIT1 -#define GPIO_34 BIT2 -#define GPIO_35 BIT3 -#define GPIO_36 BIT4 -#define GPIO_37 BIT5 -#define GPIO_38 BIT6 -#define GPIO_39 BIT7 -#define GPIO_40 BIT8 -#define GPIO_41 BIT9 +#define GPIO_32 BIT0 +#define GPIO_33 BIT1 +#define GPIO_34 BIT2 +#define GPIO_35 BIT3 +#define GPIO_36 BIT4 +#define GPIO_37 BIT5 +#define GPIO_38 BIT6 +#define GPIO_39 BIT7 +#define GPIO_40 BIT8 +#define GPIO_41 BIT9 #define GPIO_42 BIT10 #define GPIO_43 BIT11 #define GPIO_44 BIT12 @@ -125,16 +125,16 @@ #define GPIO_62 BIT30 #define GPIO_63 BIT31 /* PORT C */ -#define GPIO_64 BIT0 -#define GPIO_65 BIT1 -#define GPIO_66 BIT2 -#define GPIO_67 BIT3 -#define GPIO_68 BIT4 -#define GPIO_69 BIT5 -#define GPIO_70 BIT6 -#define GPIO_71 BIT7 -#define GPIO_72 BIT8 -#define GPIO_73 BIT9 +#define GPIO_64 BIT0 +#define GPIO_65 BIT1 +#define GPIO_66 BIT2 +#define GPIO_67 BIT3 +#define GPIO_68 BIT4 +#define GPIO_69 BIT5 +#define GPIO_70 BIT6 +#define GPIO_71 BIT7 +#define GPIO_72 BIT8 +#define GPIO_73 BIT9 #define GPIO_74 BIT10 #define GPIO_75 BIT11 #define GPIO_76 BIT12 @@ -158,16 +158,16 @@ #define GPIO_94 BIT30 #define GPIO_95 BIT31 /* PORT D */ -#define GPIO_96 BIT0 -#define GPIO_97 BIT1 -#define GPIO_98 BIT2 -#define GPIO_99 BIT3 -#define GPIO_100 BIT4 -#define GPIO_101 BIT5 -#define GPIO_102 BIT6 -#define GPIO_103 BIT7 -#define GPIO_104 BIT8 -#define GPIO_105 BIT9 +#define GPIO_96 BIT0 +#define GPIO_97 BIT1 +#define GPIO_98 BIT2 +#define GPIO_99 BIT3 +#define GPIO_100 BIT4 +#define GPIO_101 BIT5 +#define GPIO_102 BIT6 +#define GPIO_103 BIT7 +#define GPIO_104 BIT8 +#define GPIO_105 BIT9 #define GPIO_106 BIT10 #define GPIO_107 BIT11 #define GPIO_108 BIT12 @@ -376,9 +376,9 @@ #define PIOD_ASR_RTS2 BIT23 /* USART 2 RTS */ #define PIOD_ASR_RTS3 BIT24 /* USART 3 RTS */ #define PIOD_ASR_DTR1 BIT25 /* USART 1 DTR */ - + /* Port D, Alternate Function B */ - + #define PIOC_ASR_TSYNC BIT7 /* ETM Sync */ #define PIOC_ASR_TCLK BIT8 /* ETM Clock */ #define PIOC_ASR_TPS0 BIT9 /* ETM Processor Status 0 */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h index ac11ceb697..6bc4be9103 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h index 40fd6c58f1..634ab676d8 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h index 8bbfa19906..9178fc0f9b 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * |