diff options
Diffstat (limited to 'c/src/lib/libcpu/arm')
47 files changed, 397 insertions, 397 deletions
diff --git a/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c b/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c index 04b3f4f96f..7a9cf6af07 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c +++ b/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c @@ -34,7 +34,7 @@ static unsigned long st_pimr_reload; static void clock_isr_on(const rtems_irq_connect_data *unused) { /* enable timer interrupt */ - ST_REG(ST_IER) = ST_SR_PITS; + ST_REG(ST_IER) = ST_SR_PITS; } /** @@ -58,13 +58,13 @@ static void clock_isr_off(const rtems_irq_connect_data *unused) static int clock_isr_is_on(const rtems_irq_connect_data *irq) { /* check timer interrupt */ - return ST_REG(ST_IMR) & ST_SR_PITS; + return ST_REG(ST_IMR) & ST_SR_PITS; } rtems_isr Clock_isr(rtems_vector_number vector); /* Replace the first value with the clock's interrupt name. */ -rtems_irq_connect_data clock_isr_data = {AT91RM9200_INT_SYSIRQ, +rtems_irq_connect_data clock_isr_data = {AT91RM9200_INT_SYSIRQ, (rtems_irq_hdl)Clock_isr, clock_isr_on, clock_isr_off, @@ -88,11 +88,11 @@ void Clock_driver_support_initialize_hardware(void) (((rtems_configuration_get_microseconds_per_tick() * slck) + (1000000/2))/ 1000000); st_pimr_reload = st_pimr_value; - /* read the status to clear the int */ + /* read the status to clear the int */ st_str = ST_REG(ST_SR); - + /* set priority */ - AIC_SMR_REG(AIC_SMR_SYSIRQ) = AIC_SMR_PRIOR(0x7); + AIC_SMR_REG(AIC_SMR_SYSIRQ) = AIC_SMR_PRIOR(0x7); /* set the timer value */ ST_REG(ST_PIMR) = st_pimr_reload; diff --git a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c index 7faabab5a1..4dbd16e536 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c +++ b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c @@ -1,7 +1,7 @@ /* * Console driver for AT91RM9200 DBGU port * - * This driver uses the shared console driver in + * This driver uses the shared console driver in * ...../libbsp/shared/console.c * * Copyright (c) 2003 by Cogent Computer Systems @@ -38,8 +38,8 @@ static void dbgu_write_polled(int minor, char c); static int dbgu_set_attributes(int minor, const struct termios *t); /* Pointers to functions for handling the UART. */ -console_fns dbgu_fns = -{ +console_fns dbgu_fns = +{ libchip_serial_default_probe, dbgu_first_open, dbgu_last_close, @@ -54,23 +54,23 @@ console_fns dbgu_fns = /* Functions called via callbacks (i.e. the ones in uart_fns */ /*********************************************************************/ -/* +/* * This is called the first time each device is opened. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd enable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd enable interrupts here. */ -static int dbgu_first_open(int major, int minor, void *arg) +static int dbgu_first_open(int major, int minor, void *arg) { return 0; } -/* +/* * This is called the last time each device is closed. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd disable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd disable interrupts here. */ -static int dbgu_last_close(int major, int minor, void *arg) +static int dbgu_last_close(int major, int minor, void *arg) { return 0; } @@ -82,7 +82,7 @@ static int dbgu_last_close(int major, int minor, void *arg) * return -1 if there's no data, otherwise return * the character in lowest 8 bits of returned int. */ -static int dbgu_read(int minor) +static int dbgu_read(int minor) { char c; console_tbl *console_entry; @@ -99,15 +99,15 @@ static int dbgu_read(int minor) if (!(dbgu->sr & DBGU_INT_RXRDY)) { return -1; } - - c = dbgu->rhr & 0xff; - + + c = dbgu->rhr & 0xff; + return c; } -/* - * Write buffer to UART +/* + * Write buffer to UART * * return 1 on success, -1 on error */ @@ -133,17 +133,17 @@ static int dbgu_write(int minor, const char *buf, int len) break; } } - + c = (char) buf[i]; dbgu->thr = c; - + /* the TXRDY flag does not seem to update right away (is this true?) */ /* so we wait a bit before continuing */ for (x = 0; x < 100; x++) { dbg_dly++; /* using a global so this doesn't get optimized out */ } } - + return 1; } @@ -186,7 +186,7 @@ static void dbgu_write_polled(int minor, char c) } /* This is for setting baud rate, bits, etc. */ -static int dbgu_set_attributes(int minor, const struct termios *t) +static int dbgu_set_attributes(int minor, const struct termios *t) { return 0; } @@ -197,7 +197,7 @@ static int dbgu_set_attributes(int minor, const struct termios *t) * functions use them instead. */ /***********************************************************************/ -/* +/* * Read from UART. This is used in the exit code, and can't * rely on interrupts. */ @@ -208,7 +208,7 @@ int dbgu_poll_read(int minor) /* - * Write a character to the console. This is used by printk() and + * Write a character to the console. This is used by printk() and * maybe other low level functions. It should not use interrupts or any * RTEMS system calls. It needs to be very simple */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h index 99346dbaa0..88825452d5 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h @@ -32,7 +32,7 @@ typedef volatile unsigned long vulong; #define AIC_SVR_REG(_x_) *(vulong *)(AIC_SVR_BASE + (_x_ & 0x7c)) /* Control Register - 32 of them */ -#define AIC_CTL_BASE 0xFFFFF100 +#define AIC_CTL_BASE 0xFFFFF100 #define AIC_CTL_REG(_x_) *(vulong *)(AIC_CTL_BASE + (_x_ & 0x7f)) /* Register Offsets */ @@ -103,9 +103,9 @@ typedef volatile unsigned long vulong; /* AIC_SMR */ #define AIC_SMR_PRIOR(_x_) ((_x_ & 0x07) << 0) #define AIC_SMR_SRC_LVL_LOW (0 << 5) /* Are these right? docs don't say which is high/low */ -#define AIC_SMR_SRC_EDGE_LOW (1 << 5) -#define AIC_SMR_SRC_LVL_HI (2 << 5) -#define AIC_SMR_SRC_EDGE_HI (3 << 5) +#define AIC_SMR_SRC_EDGE_LOW (1 << 5) +#define AIC_SMR_SRC_LVL_HI (2 << 5) +#define AIC_SMR_SRC_EDGE_HI (3 << 5) /**************************************************************************/ /* Debug Unit */ @@ -192,7 +192,7 @@ typedef volatile unsigned long vulong; * Note that each of the following peripherals has it's own * set of these registers starting at offset 0x100 from it's * base address: DBGU, SPI, USART and SSC - * To access the DMA for a peripheral, use the macro for that + * To access the DMA for a peripheral, use the macro for that * peripheral but with these register offsets **************************************************************************/ /* Register Offsets */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h index e4952ae4ad..961da4b8e1 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h index ea1d701de4..d7161e676f 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -104,7 +104,7 @@ #define EMAC_TSR_BNQ BIT4 /* 1 = Transmit buffer not queued */ #define EMAC_TSR_COMP BIT5 /* 1 = Transmit complete */ #define EMAC_TSR_UND BIT6 /* 1 = Transmit underrun */ - + /* Receive Status Register, EMAC_RSR, Offset 0x20 */ #define EMAC_RSR_BNA BIT0 /* 1 = Buffer not available */ #define EMAC_RSR_REC BIT1 /* 1 = Frame received */ @@ -137,7 +137,7 @@ #define EMAC_MAN_WRITE (0x1 << 28) /* Transfer is a write */ #define EMAC_MAN_READ (0x2 << 28) /* Transfer is a read */ #define EMAC_MAN_HIGH BIT30 /* Must be set */ -#define EMAC_MAN_LOW BIT31 +#define EMAC_MAN_LOW BIT31 /* * Bit assignments for Receive Buffer Descriptor diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h index d0a89a8f87..1aa38c9838 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -59,16 +59,16 @@ * * PORT A */ -#define GPIO_0 BIT0 -#define GPIO_1 BIT1 -#define GPIO_2 BIT2 -#define GPIO_3 BIT3 -#define GPIO_4 BIT4 -#define GPIO_5 BIT5 -#define GPIO_6 BIT6 -#define GPIO_7 BIT7 -#define GPIO_8 BIT8 -#define GPIO_9 BIT9 +#define GPIO_0 BIT0 +#define GPIO_1 BIT1 +#define GPIO_2 BIT2 +#define GPIO_3 BIT3 +#define GPIO_4 BIT4 +#define GPIO_5 BIT5 +#define GPIO_6 BIT6 +#define GPIO_7 BIT7 +#define GPIO_8 BIT8 +#define GPIO_9 BIT9 #define GPIO_10 BIT10 #define GPIO_11 BIT11 #define GPIO_12 BIT12 @@ -92,16 +92,16 @@ #define GPIO_30 BIT30 #define GPIO_31 BIT31 /* PORT B */ -#define GPIO_32 BIT0 -#define GPIO_33 BIT1 -#define GPIO_34 BIT2 -#define GPIO_35 BIT3 -#define GPIO_36 BIT4 -#define GPIO_37 BIT5 -#define GPIO_38 BIT6 -#define GPIO_39 BIT7 -#define GPIO_40 BIT8 -#define GPIO_41 BIT9 +#define GPIO_32 BIT0 +#define GPIO_33 BIT1 +#define GPIO_34 BIT2 +#define GPIO_35 BIT3 +#define GPIO_36 BIT4 +#define GPIO_37 BIT5 +#define GPIO_38 BIT6 +#define GPIO_39 BIT7 +#define GPIO_40 BIT8 +#define GPIO_41 BIT9 #define GPIO_42 BIT10 #define GPIO_43 BIT11 #define GPIO_44 BIT12 @@ -125,16 +125,16 @@ #define GPIO_62 BIT30 #define GPIO_63 BIT31 /* PORT C */ -#define GPIO_64 BIT0 -#define GPIO_65 BIT1 -#define GPIO_66 BIT2 -#define GPIO_67 BIT3 -#define GPIO_68 BIT4 -#define GPIO_69 BIT5 -#define GPIO_70 BIT6 -#define GPIO_71 BIT7 -#define GPIO_72 BIT8 -#define GPIO_73 BIT9 +#define GPIO_64 BIT0 +#define GPIO_65 BIT1 +#define GPIO_66 BIT2 +#define GPIO_67 BIT3 +#define GPIO_68 BIT4 +#define GPIO_69 BIT5 +#define GPIO_70 BIT6 +#define GPIO_71 BIT7 +#define GPIO_72 BIT8 +#define GPIO_73 BIT9 #define GPIO_74 BIT10 #define GPIO_75 BIT11 #define GPIO_76 BIT12 @@ -158,16 +158,16 @@ #define GPIO_94 BIT30 #define GPIO_95 BIT31 /* PORT D */ -#define GPIO_96 BIT0 -#define GPIO_97 BIT1 -#define GPIO_98 BIT2 -#define GPIO_99 BIT3 -#define GPIO_100 BIT4 -#define GPIO_101 BIT5 -#define GPIO_102 BIT6 -#define GPIO_103 BIT7 -#define GPIO_104 BIT8 -#define GPIO_105 BIT9 +#define GPIO_96 BIT0 +#define GPIO_97 BIT1 +#define GPIO_98 BIT2 +#define GPIO_99 BIT3 +#define GPIO_100 BIT4 +#define GPIO_101 BIT5 +#define GPIO_102 BIT6 +#define GPIO_103 BIT7 +#define GPIO_104 BIT8 +#define GPIO_105 BIT9 #define GPIO_106 BIT10 #define GPIO_107 BIT11 #define GPIO_108 BIT12 @@ -376,9 +376,9 @@ #define PIOD_ASR_RTS2 BIT23 /* USART 2 RTS */ #define PIOD_ASR_RTS3 BIT24 /* USART 3 RTS */ #define PIOD_ASR_DTR1 BIT25 /* USART 1 DTR */ - + /* Port D, Alternate Function B */ - + #define PIOC_ASR_TSYNC BIT7 /* ETM Sync */ #define PIOC_ASR_TCLK BIT8 /* ETM Clock */ #define PIOC_ASR_TPS0 BIT9 /* ETM Processor Status 0 */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h index ac11ceb697..6bc4be9103 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h index 40fd6c58f1..634ab676d8 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h index 8bbfa19906..9178fc0f9b 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S index 75952e9631..d8b6757e4c 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopgindog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -12,7 +12,7 @@ * $Id$ */ #define __asm__ - + .globl bsp_interrupt_dispatch bsp_interrupt_dispatch : /* @@ -21,7 +21,7 @@ bsp_interrupt_dispatch : * and load vector into r0 and handler address into r1. */ ldr r0, =0xFFFFF100 /* AIC_CTL_BASE + AIC_IVR */ - ldr r1, [r0] + ldr r1, [r0] str r1, [r0] /* write back in case we are using protect */ ldr r0, =0xFFFFF108 /* AIC_CTL_BASE + AIC_ISR */ @@ -35,7 +35,7 @@ bsp_interrupt_dispatch : IRQ_return: ldr r2, =0xFFFFF130 /* AIC_CTL_BASE + AIC_EIOCR */ str r1, [r2] - + ldmia sp!,{lr} mov pc, lr diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c index ab3d96b625..99cf822570 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -17,8 +17,8 @@ extern void default_int_handler(void); -/* - * Interrupt system initialization. Disable interrupts, clear +/* + * Interrupt system initialization. Disable interrupts, clear * any that are pending. */ void BSP_rtems_irq_mngt_init(void) diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c index d8255cd233..416c63125b 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -34,52 +34,52 @@ static int isValidInterrupt(int irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } - + /* - * Check if default handler is actually connected. If not, issue - * an error. Note: irq->name is a number corresponding to the - * sources PID (see the at91rm9200_pid for this mapping). We - * convert it to a long word offset to get source's vector register + * Check if default handler is actually connected. If not, issue + * an error. Note: irq->name is a number corresponding to the + * sources PID (see the at91rm9200_pid for this mapping). We + * convert it to a long word offset to get source's vector register */ if (AIC_SVR_REG(irq->name * 4) != (uint32_t) default_int_handler) { return 0; } - + rtems_interrupt_disable(level); - + /* * store the new handler */ AIC_SVR_REG(irq->name * 4) = (uint32_t) irq->hdl; - + /* * unmask interrupt */ AIC_CTL_REG(AIC_IECR) = 1 << irq->name; - + /* * Enable interrupt on device */ if(irq->on) { irq->on(irq); } - + rtems_interrupt_enable(level); - + return 1; } -/* +/* * Remove and interrupt handler */ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -96,7 +96,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * mask interrupt */ AIC_CTL_REG(AIC_IDCR) = 1 << irq->name; - + /* * Disable interrupt on device */ @@ -108,7 +108,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ AIC_SVR_REG(irq->name * 4) = (uint32_t) default_int_handler; - + rtems_interrupt_enable(level); return 1; diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h index 617a24bf7d..320c4415e5 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h @@ -2,7 +2,7 @@ * Interrupt handler Header file * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -24,7 +24,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <at91rm9200.h> @@ -35,7 +35,7 @@ extern void default_int_handler(); /* possible interrupt sources on the AT91RM9200 */ #define AT91RM9200_INT_FIQ 0 #define AT91RM9200_INT_SYSIRQ 1 -#define AT91RM9200_INT_PIOA 2 +#define AT91RM9200_INT_PIOA 2 #define AT91RM9200_INT_PIOB 3 #define AT91RM9200_INT_PIOC 4 #define AT91RM9200_INT_PIOD 5 @@ -71,7 +71,7 @@ extern void default_int_handler(); /* we can treat the AT91RM9200 AIC_SVR_BASE as */ /* a vector table */ #define VECTOR_TABLE AIC_SVR_BASE - + typedef unsigned char rtems_irq_level; typedef unsigned char rtems_irq_trigger; @@ -117,7 +117,7 @@ void BSP_rtems_irq_mngt_init(); int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* - * function to get the current RTEMS irq handler for ptr->name. + * function to get the current RTEMS irq handler for ptr->name. */ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); diff --git a/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c b/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c index 89616565ea..b5d65149fb 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c +++ b/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 PMC functions * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c b/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c index 7e407d82cf..5e7c267e58 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c +++ b/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c @@ -4,7 +4,7 @@ * This uses timer 0 for timing measurments. * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -16,7 +16,7 @@ * benchmark_timer_initialize() and benchmark_timer_read(). benchmark_timer_read() usually returns * the number of microseconds since benchmark_timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ @@ -31,7 +31,7 @@ uint16_t tstart; bool benchmark_timer_find_average_overhead; uint32_t tick_time; /* - * Set up TC0 - + * Set up TC0 - * timer_clock2 (MCK/8) * capture mode - this shouldn't matter */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c b/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c index c26cccc1f9..7633f05291 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c +++ b/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c @@ -1,10 +1,10 @@ /* * Driver for AT91RM9200 USART ports * - * COPYRIGHT (c) 2006-2009. + * COPYRIGHT (c) 2006-2009. * NCB - Sistemas Embarcados Ltda. (Brazil) * Fernando Nicodemos <fgnicodemos@terra.com.br> - * + * * and * * COPYRIGHT (c) 1989-2009. @@ -60,7 +60,7 @@ at91rm9200_usart_regs_t *usart_get_base(int minor) if (console_entry == NULL) return 0; - + port = (at91rm9200_usart_regs_t *) console_entry->ulCtrlPort1; //printk( "minor=%d entry=%p port=%p\n", minor, console_entry, port ); @@ -241,11 +241,11 @@ static int usart_set_attributes(int minor, const struct termios *t) mode |= US_MR_PAR_NONE; baud_requested = t->c_cflag & CBAUD; - + /* If not, set the dbgu console baud as USART baud default */ if (!baud_requested) - baud_requested = BSP_get_baud(); - + baud_requested = BSP_get_baud(); + baud = rtems_termios_baud_to_number(baud_requested); brgr = (at91rm9200_get_mck() / 16) / baud; diff --git a/c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c b/c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c index b8859f7bfa..c277c8ee2f 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c +++ b/c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c @@ -35,7 +35,7 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0, 3, /* unused for ARM cpus */ 0 }; /* unused for ARM cpus */ -/* If you follow the code, this is never used, so any value +/* If you follow the code, this is never used, so any value * should work */ #define CLOCK_VECTOR 0 @@ -72,16 +72,16 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0, * - enable it * - clear any pending interrupts * - * Since you may want the clock always running, you can + * Since you may want the clock always running, you can * enable interrupts here. If you do so, the clock_isr_on(), - * clock_isr_off(), and clock_isr_is_on() functions can be + * clock_isr_off(), and clock_isr_is_on() functions can be * NOPs. */ - + /* set timer to generate interrupt every rtems_configuration_get_microseconds_per_tick() * MR0/(LPC22xx_Fpclk/(PR0+1)) = 10/1000 = 0.01s - */ - + */ + #define Clock_driver_support_initialize_hardware() \ do { \ T0TCR &= 0; /* disable and clear timer 0, set to */ \ @@ -95,7 +95,7 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0, } while (0) /** - * Do whatever you need to shut the clock down and remove the + * Do whatever you need to shut the clock down and remove the * interrupt handler. Since this normally only gets called on * RTEMS shutdown, you may not need to do anything other than * remove the ISR. @@ -110,12 +110,12 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0, uint32_t bsp_clock_nanoseconds_since_last_tick(void) { uint32_t clicks; - + clicks = T0TC; /*T0TC is the 32bit time counter 0*/ - + return (uint32_t) (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000; } - + #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick diff --git a/c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h b/c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h index d5a021a34a..da99635d00 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h +++ b/c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h @@ -2,7 +2,7 @@ * Philips LPC22XX/LPC21xx Register definitions * * Copyright (c) 2006 by Ray <rayx.cn@gmail.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -318,7 +318,7 @@ #define CAN5TDA3 (*((volatile unsigned long *) 0xE0054058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */ #define CAN5TDB3 (*((volatile unsigned long *) 0xE005405C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */ -#ifdef CONFIG_ARCH_LPC22xx +#ifdef CONFIG_ARCH_LPC22xx #define CAN6MOD (*((volatile unsigned long *) 0xE0058000)) /* lpc2292\lpc2294 only */ #define CAN6CMR (*((volatile unsigned long *) 0xE0058004)) /* lpc2292\lpc2294 only */ #define CAN6GSR (*((volatile unsigned long *) 0xE0058008)) /* lpc2292\lpc2294 only */ @@ -455,7 +455,7 @@ /* Register define for constant -*/ +*/ #define REG_U0RBR 0xE000C000 #define REG_U1RBR 0xE0010000 diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S index d8181055c3..cec8a00b79 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S @@ -12,8 +12,8 @@ * $Id$ */ #define __asm__ - -/* + +/* * BSP specific interrupt handler for INT or FIQ. In here * you do determine which interrupt happened and call its * handler. @@ -30,7 +30,7 @@ bsp_interrupt_dispatch : * From source, determine offset into expanded vector table * and load handler address into r0. */ - + ldr r0, =0xFFFFF030 /* Read the vector number */ ldr r0, [r0] #ifdef __thumb__ diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c index db16373eac..4c5b7850ad 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c @@ -1,6 +1,6 @@ /* * NXP/Philips LPC22XX/LPC21xx Interrupt handler - * Ray 2007 <rayx.cn@gmail.com> to support LPC ARM + * Ray 2007 <rayx.cn@gmail.com> to support LPC ARM * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -16,8 +16,8 @@ extern void default_int_handler(void); -/* - * Interrupt system initialization. Disable interrupts, clear +/* + * Interrupt system initialization. Disable interrupts, clear * any that are pending. */ void BSP_rtems_irq_mngt_init(void) @@ -33,7 +33,7 @@ void BSP_rtems_irq_mngt_init(void) for (i=0; i<BSP_MAX_INT; i++) { *(vectorTable + i) = (long)(default_int_handler); } - + /* * Set IRQHandler */ @@ -56,10 +56,10 @@ void BSP_rtems_irq_mngt_init(void) * In case we must find an ABORT error, * enable the next lines and set a breakpoint * in ABORTHandler. - */ + */ #if 1 DATA_ABORT_VECTOR_ADDR = 0xE59FF018; -#endif +#endif /* * Init the Vectored Interrupt Controller (VIC) diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/irq.c b/c/src/lib/libcpu/arm/lpc22xx/irq/irq.c index cf2287d070..dfc97f9135 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/irq.c +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/irq.c @@ -1,7 +1,7 @@ /* * Philps LPC22XX Interrupt handler - * - * Copyright (c) 2006 by Ray<rayx.cn@gmail.com> to support LPC ARM + * + * Copyright (c) 2006 by Ray<rayx.cn@gmail.com> to support LPC ARM * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -37,11 +37,11 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) rtems_interrupt_level level; rtems_irq_hdl *bsp_tbl; int *vic_cntl; - + bsp_tbl = (rtems_irq_hdl *)VICVectAddrBase; vic_cntl=(int *)VICVectCntlBase; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -66,8 +66,8 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) */ vic_cntl[irq->name] = 0x20 | irq->name; - VICIntEnable |= 1 << irq->name; - + VICIntEnable |= 1 << irq->name; + if(irq->on) { irq->on(irq); @@ -75,11 +75,11 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) rtems_interrupt_enable(level); - + return 1; } -/* +/* * Remove and interrupt handler * * You should only have to add the code to mask the interrupt. @@ -91,7 +91,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) rtems_irq_hdl *bsp_tbl; bsp_tbl = (rtems_irq_hdl *)&VICVectAddr0; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -116,7 +116,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ bsp_tbl[irq->name] = default_int_handler; - + rtems_interrupt_enable(level); return 1; diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/irq.h b/c/src/lib/libcpu/arm/lpc22xx/irq/irq.h index 428530958a..11f8de1bba 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/irq.h +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/irq.h @@ -1,8 +1,8 @@ /* * Interrupt handler Header file * - * Copyright (c) 2006 by Ray <rayx.cn@gmail.com> to support LPC ARM - * + * Copyright (c) 2006 by Ray <rayx.cn@gmail.com> to support LPC ARM + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -25,7 +25,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <lpc22xx.h> @@ -66,7 +66,7 @@ extern void default_int_handler(); #define LPC22xx_INTERRUPT_CAN4RX 27 /* CAN2 Rx interrupt */ #define BSP_MAX_INT 28 -#define UNDEFINED_INSTRUCTION_VECTOR_ADDR (*(u_long *)0x00000004L) +#define UNDEFINED_INSTRUCTION_VECTOR_ADDR (*(u_long *)0x00000004L) #define SOFTWARE_INTERRUPT_VECTOR_ADDR (*(u_long *)0x00000008L) #define PREFETCH_ABORT_VECTOR_ADDR (*(u_long *)0x0000000CL) #define DATA_ABORT_VECTOR_ADDR (*(u_long *)0x00000010L) @@ -77,7 +77,7 @@ extern void default_int_handler(); #define IRQ_ISR_ADDR (*(u_long *)0x00000038L) #define FIQ_ISR_ADDR (*(u_long *)0x0000003CL) - + typedef unsigned char rtems_irq_level; typedef unsigned char rtems_irq_trigger; @@ -91,7 +91,7 @@ typedef int (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*); //extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT]; #define VECTOR_TABLE VICVectAddrBase - + typedef struct __rtems_irq_connect_data__ { /* IRQ line */ rtems_irq_number name; @@ -127,7 +127,7 @@ void BSP_rtems_irq_mngt_init(); int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* - * function to get the current RTEMS irq handler for ptr->name. + * function to get the current RTEMS irq handler for ptr->name. */ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); diff --git a/c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h b/c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h index 2e58da4e6b..364812ddb8 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h +++ b/c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h @@ -11,16 +11,16 @@ #define TCR_ENABLE_BIT 0 #define TCR_RESET_BIT 1 -// The channel name which is used in matching, in fact they represent -// corresponding Match Register +// The channel name which is used in matching, in fact they represent +// corresponding Match Register #define CH_MAXNUM 4 #define CH0 0 #define CH1 1 #define CH2 2 #define CH3 3 -// The channel name which is used in capturing, in fact they represent -// corresponding Capture Register +// The channel name which is used in capturing, in fact they represent +// corresponding Capture Register #define CPCH_MAXNUM 4 #define CPCH0 0 #define CPCH1 1 diff --git a/c/src/lib/libcpu/arm/lpc22xx/timer/timer.c b/c/src/lib/libcpu/arm/lpc22xx/timer/timer.c index 91f6df408b..0ac8ab32c1 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/timer/timer.c +++ b/c/src/lib/libcpu/arm/lpc22xx/timer/timer.c @@ -2,7 +2,7 @@ * RTL22xx board Timer driver * * This uses Timer1 for timing measurments. - * + * * By Ray xu<rayx.cn@gmail.com>, modify form Mc9328mxl RTEMS DSP * * The license and distribution terms for this file may be @@ -16,7 +16,7 @@ * benchmark_timer_initialize() and benchmark_timer_read(). benchmark_timer_read() usually returns * the number of microseconds since benchmark_timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ @@ -31,7 +31,7 @@ uint32_t g_freq; bool benchmark_timer_find_average_overhead; - + /* * Set up Timer 1 */ diff --git a/c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c b/c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c index d54cf74543..1f18e1ce76 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c +++ b/c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c @@ -37,12 +37,12 @@ rtems_irq_connect_data clock_isr_data = { .isOn = clock_isr_is_on, }; -/* If you follow the code, this is never used, so any value +/* If you follow the code, this is never used, so any value * should work */ #define CLOCK_VECTOR 0 - + /** * When we get the clock interrupt * - clear the interrupt bit? @@ -72,9 +72,9 @@ rtems_irq_connect_data clock_isr_data = { * - enable it * - clear any pending interrupts * - * Since you may want the clock always running, you can + * Since you may want the clock always running, you can * enable interrupts here. If you do so, the clock_isr_on(), - * clock_isr_off(), and clock_isr_is_on() functions can be + * clock_isr_off(), and clock_isr_is_on() functions can be * NOPs. */ #define Clock_driver_support_initialize_hardware() \ @@ -95,7 +95,7 @@ rtems_irq_connect_data clock_isr_data = { } while (0) /** - * Do whatever you need to shut the clock down and remove the + * Do whatever you need to shut the clock down and remove the * interrupt handler. Since this normally only gets called on * RTEMS shutdown, you may not need to do anything other than * remove the ISR. diff --git a/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h b/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h index 6aebf0928c..4a3dc03544 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h +++ b/c/src/lib/libcpu/arm/mc9328mxl/include/mc9328mxl.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -75,12 +75,12 @@ #define MC9328MXL_TMR_TCTL_CAP_FALL (2 << 6) #define MC9328MXL_TMR_TCTL_CAP_ANY (3 << 6) #define MC9328MXL_TMR_TCTL_OM (bit(5)) -#define MC9328MXL_TMR_TCTL_IRQEN (bit(4)) +#define MC9328MXL_TMR_TCTL_IRQEN (bit(4)) #define MC9328MXL_TMR_TCTL_CLKSRC_STOP (0 << 1) #define MC9328MXL_TMR_TCTL_CLKSRC_PCLK1 (1 << 1) #define MC9328MXL_TMR_TCTL_CLKSRC_PCLK_DIV16 (2 << 1) #define MC9328MXL_TMR_TCTL_CLKSRC_TIN (3 << 1) -#define MC9328MXL_TMR_TCTL_CLKSRC_32KHX (4 << 1) +#define MC9328MXL_TMR_TCTL_CLKSRC_32KHX (4 << 1) #define MC9328MXL_TMR_TCTL_TEN (bit(0)) #define MC9328MXL_UART1_RXD (*((volatile uint32_t *)((MC9328MXL_UART1_BASE) + 0x00))) @@ -221,7 +221,7 @@ typedef struct { #define MC9328MXL_UART_CR3_INVT (bit(1)) #define MC9328MXL_UART_CR3_BPEN (bit(0)) -#define MC9328MXL_UART_CR4_CTSTL(_x_) (((_x_) & 0x3f) << 10) +#define MC9328MXL_UART_CR4_CTSTL(_x_) (((_x_) & 0x3f) << 10) #define MC9328MXL_UART_CR4_INVR (bit(9)) #define MC9328MXL_UART_CR4_ENIRI (bit(8)) #define MC9328MXL_UART_CR4_WKEN (bit(7)) @@ -313,7 +313,7 @@ typedef struct { #define MC9328MXL_PLL_SPCTL_MFI_SHIFT (10) #define MC9328MXL_PLL_SPCTL_MFN_MASK (0x000003ff) #define MC9328MXL_PLL_SPCTL_MFN_SHIFT (0) - + #define MC9328MXL_GPIOA_DDIR (*((volatile uint32_t *)((MC9328MXL_GPIOA_BASE) + 0x00))) #define MC9328MXL_GPIOA_OCR1 (*((volatile uint32_t *)((MC9328MXL_GPIOA_BASE) + 0x04))) diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S index bcb3ba0e19..c2a33c4b22 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S @@ -12,8 +12,8 @@ * $Id$ */ #define __asm__ - -/* + +/* * BSP specific interrupt handler for INT or FIQ. In here * you do determine which interrupt happened and call its * handler. @@ -29,7 +29,7 @@ bsp_interrupt_dispatch : ldr r1, [r0] mov r1, r1, LSR #16 /* get the NIVECTOR into 16 LSbits */ - /* find the ISR's address based on the vector */ + /* find the ISR's address based on the vector */ ldr r0, =bsp_vector_table mov r1, r1, LSL #3 /* Shift vector to get offset into table */ add r1, r0, r1 /* r1 has address of vector entry */ diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_init.c index fd96778851..90e854440e 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_init.c @@ -2,7 +2,7 @@ * Motorola MC9328MXL Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -17,8 +17,8 @@ extern void default_int_handler(void); -/* - * Interrupt system initialization. Disable interrupts, clear +/* + * Interrupt system initialization. Disable interrupts, clear * any that are pending. */ void BSP_rtems_irq_mngt_init(void) diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c index 81a9c8ee72..36d23dc1d9 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c @@ -2,7 +2,7 @@ * Motorola MC9328MXL Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -38,7 +38,7 @@ static int isValidInterrupt(int irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -65,13 +65,13 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { irq->on(irq); } - + rtems_interrupt_enable(level); - + return 1; } -/* +/* * Remove and interrupt handler * * You should only have to add the code to mask the interrupt. diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h index 04a5f2a00b..6cc5c22f07 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h @@ -2,7 +2,7 @@ * Interrupt handler Header file * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -27,7 +27,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <mc9328mxl.h> @@ -37,72 +37,72 @@ extern void default_int_handler(); **********************************************************************/ /* possible interrupt sources on the MC9328MXL */ -#define BSP_INT_UART3_PFERR 0 -#define BSP_INT_UART3_RTS 1 -#define BSP_INT_UART3_DTR 2 -#define BSP_INT_UART3_UARTC 3 -#define BSP_INT_UART3_TX 4 -#define BSP_INT_PEN_UP 5 +#define BSP_INT_UART3_PFERR 0 +#define BSP_INT_UART3_RTS 1 +#define BSP_INT_UART3_DTR 2 +#define BSP_INT_UART3_UARTC 3 +#define BSP_INT_UART3_TX 4 +#define BSP_INT_PEN_UP 5 #define BSP_INT_CSI 6 -#define BSP_INT_MMA_MAC 7 +#define BSP_INT_MMA_MAC 7 #define BSP_INT_MMA 8 #define BSP_INT_COMP 9 -#define BSP_INT_MSIRQ 10 -#define BSP_INT_GPIO_PORTA 11 -#define BSP_INT_GPIO_PORTB 12 -#define BSP_INT_GPIO_PORTC 13 -#define BSP_INT_LCDC 14 -#define BSP_INT_SIM_IRQ 15 -#define BSP_INT_SIM_DATA 16 +#define BSP_INT_MSIRQ 10 +#define BSP_INT_GPIO_PORTA 11 +#define BSP_INT_GPIO_PORTB 12 +#define BSP_INT_GPIO_PORTC 13 +#define BSP_INT_LCDC 14 +#define BSP_INT_SIM_IRQ 15 +#define BSP_INT_SIM_DATA 16 #define BSP_INT_RTC 17 -#define BSP_INT_RTC_SAM 18 -#define BSP_INT_UART2_PFERR 19 -#define BSP_INT_UART2_RTS 20 -#define BSP_INT_UART2_DTR 21 -#define BSP_INT_UART2_UARTC 22 -#define BSP_INT_UART2_TX 23 -#define BSP_INT_UART2_RX 24 -#define BSP_INT_UART1_PFERR 25 -#define BSP_INT_UART1_RTS 26 -#define BSP_INT_UART1_DTR 27 -#define BSP_INT_UART1_UARTC 28 -#define BSP_INT_UART1_TX 29 -#define BSP_INT_UART1_RX 30 -#define BSP_INT_RES31 31 -#define BSP_INT_RES32 32 -#define BSP_INT_PEN_DATA 33 +#define BSP_INT_RTC_SAM 18 +#define BSP_INT_UART2_PFERR 19 +#define BSP_INT_UART2_RTS 20 +#define BSP_INT_UART2_DTR 21 +#define BSP_INT_UART2_UARTC 22 +#define BSP_INT_UART2_TX 23 +#define BSP_INT_UART2_RX 24 +#define BSP_INT_UART1_PFERR 25 +#define BSP_INT_UART1_RTS 26 +#define BSP_INT_UART1_DTR 27 +#define BSP_INT_UART1_UARTC 28 +#define BSP_INT_UART1_TX 29 +#define BSP_INT_UART1_RX 30 +#define BSP_INT_RES31 31 +#define BSP_INT_RES32 32 +#define BSP_INT_PEN_DATA 33 #define BSP_INT_PWM 34 -#define BSP_INT_MMC_IRQ 35 -#define BSP_INT_SSI2_TX 36 -#define BSP_INT_SSI2_RX 37 -#define BSP_INT_SSI2_ERR 38 +#define BSP_INT_MMC_IRQ 35 +#define BSP_INT_SSI2_TX 36 +#define BSP_INT_SSI2_RX 37 +#define BSP_INT_SSI2_ERR 38 #define BSP_INT_I2C 39 #define BSP_INT_SPI2 40 #define BSP_INT_SPI1 41 -#define BSP_INT_SSI_TX 42 -#define BSP_INT_SSI_TX_ERR 43 -#define BSP_INT_SSI_RX 44 -#define BSP_INT_SSI_RX_ERR 45 -#define BSP_INT_TOUCH 46 -#define BSP_INT_USBD0 47 -#define BSP_INT_USBD1 48 -#define BSP_INT_USBD2 49 -#define BSP_INT_USBD3 50 -#define BSP_INT_USBD4 51 -#define BSP_INT_USBD5 52 -#define BSP_INT_USBD6 53 -#define BSP_INT_UART3_RX 54 -#define BSP_INT_BTSYS 55 -#define BSP_INT_BTTIM 56 -#define BSP_INT_BTWUI 57 -#define BSP_INT_TIMER2 58 -#define BSP_INT_TIMER1 59 -#define BSP_INT_DMA_ERR 60 +#define BSP_INT_SSI_TX 42 +#define BSP_INT_SSI_TX_ERR 43 +#define BSP_INT_SSI_RX 44 +#define BSP_INT_SSI_RX_ERR 45 +#define BSP_INT_TOUCH 46 +#define BSP_INT_USBD0 47 +#define BSP_INT_USBD1 48 +#define BSP_INT_USBD2 49 +#define BSP_INT_USBD3 50 +#define BSP_INT_USBD4 51 +#define BSP_INT_USBD5 52 +#define BSP_INT_USBD6 53 +#define BSP_INT_UART3_RX 54 +#define BSP_INT_BTSYS 55 +#define BSP_INT_BTTIM 56 +#define BSP_INT_BTWUI 57 +#define BSP_INT_TIMER2 58 +#define BSP_INT_TIMER1 59 +#define BSP_INT_DMA_ERR 60 #define BSP_INT_DMA 61 -#define BSP_INT_GPIO_PORTD 62 +#define BSP_INT_GPIO_PORTD 62 #define BSP_INT_WDT 63 #define BSP_MAX_INT 64 - + typedef struct { rtems_irq_hdl vector; rtems_irq_hdl_param data; diff --git a/c/src/lib/libcpu/arm/mc9328mxl/timer/timer.c b/c/src/lib/libcpu/arm/mc9328mxl/timer/timer.c index f97ba13751..46565669e6 100644 --- a/c/src/lib/libcpu/arm/mc9328mxl/timer/timer.c +++ b/c/src/lib/libcpu/arm/mc9328mxl/timer/timer.c @@ -5,7 +5,7 @@ * * Copyright (c) 2004 Cogent Computer Systems * Written by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -17,7 +17,7 @@ * benchmark_timer_initialize() and benchmark_timer_read(). benchmark_timer_read() usually returns * the number of microseconds since benchmark_timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ @@ -32,13 +32,13 @@ uint32_t g_freq; bool benchmark_timer_find_average_overhead; - + /* * Set up Timer 1 */ void benchmark_timer_initialize( void ) { - MC9328MXL_TMR2_TCTL = (MC9328MXL_TMR_TCTL_CLKSRC_PCLK1 | + MC9328MXL_TMR2_TCTL = (MC9328MXL_TMR_TCTL_CLKSRC_PCLK1 | MC9328MXL_TMR_TCTL_FRR | MC9328MXL_TMR_TCTL_TEN); /* set prescaler to 1 (register value + 1) */ \ @@ -80,12 +80,12 @@ int benchmark_timer_read( void ) total = (t - g_start); /* convert to nanoseconds */ - total = (total * 1000)/ g_freq; + total = (total * 1000)/ g_freq; if ( benchmark_timer_find_average_overhead == 1 ) { - return (int) total; + return (int) total; } else if ( total < LEAST_VALID ) { - return 0; + return 0; } /* * Somehow convert total into microseconds diff --git a/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c b/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c index cbcd44ed2a..cf01feea7f 100755 --- a/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c +++ b/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c @@ -31,8 +31,8 @@ static void ffuart_write_polled(int minor, char c); static int ffuart_set_attributes(int minor, const struct termios *t); /* Pointers to functions for handling the UART. */ -console_fns ffuart_fns = -{ +console_fns ffuart_fns = +{ libchip_serial_default_probe, ffuart_first_open, ffuart_last_close, @@ -45,23 +45,23 @@ console_fns ffuart_fns = }; -/* +/* * This is called the first time each device is opened. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd enable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd enable interrupts here. */ -static int ffuart_first_open(int major, int minor, void *arg) +static int ffuart_first_open(int major, int minor, void *arg) { return 0; } -/* +/* * This is called the last time each device is closed. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd disable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd disable interrupts here. */ -static int ffuart_last_close(int major, int minor, void *arg) +static int ffuart_last_close(int major, int minor, void *arg) { return 0; } @@ -73,7 +73,7 @@ static int ffuart_last_close(int major, int minor, void *arg) * return -1 if there's no data, otherwise return * the character in lowest 8 bits of returned int. */ -static int ffuart_read(int minor) +static int ffuart_read(int minor) { char c; console_tbl *console_entry; @@ -90,15 +90,15 @@ static int ffuart_read(int minor) if (!(ffuart->lsr & FULL_RECEIVE)) { return -1; } - - c = ffuart->rbr & 0xff; - + + c = ffuart->rbr & 0xff; + return c; } -/* - * Write buffer to UART +/* + * Write buffer to UART * * return 1 on success, -1 on error */ @@ -124,7 +124,7 @@ static int ffuart_write(int minor, const char *buf, int len) break; } } - + c = (char) buf[i]; #if ON_SKYEYE != 1 if(c=='\n'){ @@ -140,14 +140,14 @@ static int ffuart_write(int minor, const char *buf, int len) } #endif ffuart->rbr = c; - + /* the TXRDY flag does not seem to update right away (is this true?) */ /* so we wait a bit before continuing */ for (x = 0; x < 100; x++) { dbg_dly++; /* using a global so this doesn't get optimized out */ } } - + return 1; } @@ -155,7 +155,7 @@ static int ffuart_write(int minor, const char *buf, int len) static void ffuart_init(int minor) { - + console_tbl *console_entry; ffuart_reg_t *ffuart; unsigned int divisor; @@ -163,11 +163,11 @@ static void ffuart_init(int minor) console_entry = BSP_get_uart_from_minor(minor); - + if (console_entry == NULL) { return; } - + ffuart = (ffuart_reg_t *)console_entry->ulCtrlPort1; ffuart->lcr |= DLAB; /*Set the Bound*/ @@ -191,7 +191,7 @@ static void ffuart_write_polled(int minor, char c) } /* This is for setting baud rate, bits, etc. */ -static int ffuart_set_attributes(int minor, const struct termios *t) +static int ffuart_set_attributes(int minor, const struct termios *t) { return 0; } @@ -202,7 +202,7 @@ static int ffuart_set_attributes(int minor, const struct termios *t) * functions use them instead. */ /***********************************************************************/ -/* +/* * Read from UART. This is used in the exit code, and can't * rely on interrupts. */ @@ -213,7 +213,7 @@ int ffuart_poll_read(int minor) /* - * Write a character to the console. This is used by printk() and + * Write a character to the console. This is used by printk() and * maybe other low level functions. It should not use interrupts or any * RTEMS system calls. It needs to be very simple */ diff --git a/c/src/lib/libcpu/arm/pxa255/include/ffuart.h b/c/src/lib/libcpu/arm/pxa255/include/ffuart.h index db01efc296..6ca5879987 100755 --- a/c/src/lib/libcpu/arm/pxa255/include/ffuart.h +++ b/c/src/lib/libcpu/arm/pxa255/include/ffuart.h @@ -47,4 +47,4 @@ typedef struct { #define FULL_RECEIVE 0x01 #endif - + diff --git a/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_asm.S index ada3b67821..17d5e47f1d 100755 --- a/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_asm.S @@ -1,7 +1,7 @@ /* * PXA255 Interrupt handler by Yang Xi <hiyangxi@gmail.com> * Copyright (c) 2004 by Jay Monkman <jtm@lopgindog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. @@ -10,7 +10,7 @@ */ #define __asm__ - + .globl bsp_interrupt_dispatch bsp_interrupt_dispatch : /* diff --git a/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_init.c index ebdaf5bd18..0470c88ce9 100755 --- a/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/pxa255/irq/bsp_irq_init.c @@ -1,7 +1,7 @@ /* * PXA255 interrupt controller by Yang Xi <hiyangxi@gmail.com> * Copyright (c) 2004 by Jay Monkman <jtm@lopgindog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. @@ -20,8 +20,8 @@ void dummy_handler(uint32_t vector) void (*IRQ_table[PRIMARY_IRQS])(uint32_t vector); -/* - * Interrupt system initialization. Disable interrupts, clear +/* + * Interrupt system initialization. Disable interrupts, clear * any that are pending. */ void BSP_rtems_irq_mngt_init(void) diff --git a/c/src/lib/libcpu/arm/pxa255/irq/irq.c b/c/src/lib/libcpu/arm/pxa255/irq/irq.c index 859b6834c0..2bfcadc98f 100755 --- a/c/src/lib/libcpu/arm/pxa255/irq/irq.c +++ b/c/src/lib/libcpu/arm/pxa255/irq/irq.c @@ -1,7 +1,7 @@ /* * PXA255 Interrupt handler by Yang Xi <hiyangxi@gmail.com> * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. @@ -32,54 +32,54 @@ static int isValidInterrupt(int irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } - + /* - * Check if default handler is actually connected. If not, issue - * an error. Note: irq->name is a number corresponding to the - * interrupt number . We - * convert it to a long word offset to get source's vector register + * Check if default handler is actually connected. If not, issue + * an error. Note: irq->name is a number corresponding to the + * interrupt number . We + * convert it to a long word offset to get source's vector register */ if (IRQ_table[irq->name] != dummy_handler) { return 0; } - + _CPU_ISR_Disable(level); - + /* * store the new handler */ IRQ_table[irq->name] = irq->hdl; - + /* * unmask interrupt */ XSCALE_INT_ICMR = XSCALE_INT_ICMR | 1 << irq->name; - + /* * Enable interrupt on device */ if(irq->on) { irq->on(irq); } - + _CPU_ISR_Enable(level); - + return 1; } -/* +/* * Remove and interrupt handler */ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -96,7 +96,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * mask interrupt */ XSCALE_INT_ICMR = XSCALE_INT_ICMR & (~(1 << irq->name)); - + /* * Disable interrupt on device */ @@ -108,7 +108,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ IRQ_table[irq->name] = dummy_handler; - + _CPU_ISR_Enable(level); return 1; diff --git a/c/src/lib/libcpu/arm/pxa255/irq/irq.h b/c/src/lib/libcpu/arm/pxa255/irq/irq.h index d685269ee6..dcc86384c7 100755 --- a/c/src/lib/libcpu/arm/pxa255/irq/irq.h +++ b/c/src/lib/libcpu/arm/pxa255/irq/irq.h @@ -1,7 +1,7 @@ /* * Interrupt handler Header file for PXA By Yang Xi <hiyangxi@gmail.com> * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. @@ -21,7 +21,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <pxa255.h> @@ -77,7 +77,7 @@ void BSP_rtems_irq_mngt_init(); int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* - * function to get the current RTEMS irq handler for ptr->name. + * function to get the current RTEMS irq handler for ptr->name. */ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); diff --git a/c/src/lib/libcpu/arm/pxa255/timer/timer.c b/c/src/lib/libcpu/arm/pxa255/timer/timer.c index d4162818fa..d174d4756f 100755 --- a/c/src/lib/libcpu/arm/pxa255/timer/timer.c +++ b/c/src/lib/libcpu/arm/pxa255/timer/timer.c @@ -8,7 +8,7 @@ * Timer_initialize() and Read_timer(). Read_timer() usually returns * the number of microseconds since Timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * The license and distribution terms for this file may be @@ -29,7 +29,7 @@ bool benchmark_timer_find_average_overhead; bool benchmark_timer_is_initialized = false; /* - * Use the timer count register to measure. + * Use the timer count register to measure. * The frequency of it is 3.4864MHZ * The longest period we are able to capture is 4G/3.4864MHZ */ @@ -62,7 +62,7 @@ int benchmark_timer_read(void) total -= tick_time; else total += 0xffffffff - tick_time; /*Round up but not overflow*/ - + if ( benchmark_timer_find_average_overhead == true ) return total; /*Counter cycles*/ diff --git a/c/src/lib/libcpu/arm/s3c2400/clock/support.c b/c/src/lib/libcpu/arm/s3c2400/clock/support.c index 7d85c1a9f4..99bd21168a 100644 --- a/c/src/lib/libcpu/arm/s3c2400/clock/support.c +++ b/c/src/lib/libcpu/arm/s3c2400/clock/support.c @@ -41,10 +41,10 @@ uint32_t get_UCLK(void) /* return HCLK frequency */ uint32_t get_HCLK(void) { - if (rCLKDIVN & 0x2) + if (rCLKDIVN & 0x2) return get_FCLK()/2; else - return get_FCLK(); + return get_FCLK(); } /* return PCLK frequency */ diff --git a/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h b/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h index 98138ab08b..b8243a7790 100644 --- a/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h +++ b/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h @@ -472,7 +472,7 @@ typedef union unsigned long all; } LCDCON1; -typedef union { +typedef union { struct { unsigned VSPW:6; /* TFT: Vertical sync pulse width determines the */ /* VSYNC pulse's high level width by counting the */ diff --git a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S index 5fab93dc2f..d3df84dd11 100644 --- a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S @@ -14,24 +14,24 @@ */ #define __asm__ - -/* - * Function to obtain, execute an IT handler and acknowledge the IT + +/* + * Function to obtain, execute an IT handler and acknowledge the IT */ .globl bsp_interrupt_dispatch - -bsp_interrupt_dispatch : + +bsp_interrupt_dispatch : ldr r0, =0x14400014 /* Read rINTOFFSET */ ldr r1, [r0] ldr r0, =bsp_vector_table ldr r0, [r0, r1, LSL #2] /* Read the address */ - + stmdb sp!,{lr} ldr lr, =IRQ_return /* prepare the return from handler */ - + mov pc, r0 IRQ_return: diff --git a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_init.c index c3122a0b8d..2e1e0c4ae1 100644 --- a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_init.c @@ -18,7 +18,7 @@ extern void default_int_handler(); -void BSP_rtems_irq_mngt_init() +void BSP_rtems_irq_mngt_init() { long *vectorTable; int i; diff --git a/c/src/lib/libcpu/arm/s3c2400/irq/irq.c b/c/src/lib/libcpu/arm/s3c2400/irq/irq.c index 6cef0e9268..20bcbb409f 100644 --- a/c/src/lib/libcpu/arm/s3c2400/irq/irq.c +++ b/c/src/lib/libcpu/arm/s3c2400/irq/irq.c @@ -41,7 +41,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -53,7 +53,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) if (*(HdlTable + irq->name) != default_int_handler) { return 0; } - + rtems_interrupt_disable(level); /* @@ -78,7 +78,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -103,7 +103,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ *(HdlTable + irq->name) = default_int_handler; - + rtems_interrupt_enable(level); return 1; diff --git a/c/src/lib/libcpu/arm/s3c2400/irq/irq.h b/c/src/lib/libcpu/arm/s3c2400/irq/irq.h index f58dbb9d98..1700285df5 100644 --- a/c/src/lib/libcpu/arm/s3c2400/irq/irq.h +++ b/c/src/lib/libcpu/arm/s3c2400/irq/irq.h @@ -23,7 +23,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <s3c2400.h> @@ -41,35 +41,35 @@ extern void default_int_handler(); #define BSP_EINT5 5 #define BSP_EINT6 6 #define BSP_EINT7 7 -#define BSP_INT_TICK 8 -#define BSP_INT_WDT 9 -#define BSP_INT_TIMER0 10 -#define BSP_INT_TIMER1 11 -#define BSP_INT_TIMER2 12 -#define BSP_INT_TIMER3 13 -#define BSP_INT_TIMER4 14 -#define BSP_INT_UERR01 15 -#define _res0 16 -#define BSP_INT_DMA0 17 -#define BSP_INT_DMA1 18 -#define BSP_INT_DMA2 19 -#define BSP_INT_DMA3 20 -#define BSP_INT_MMC 21 -#define BSP_INT_SPI 22 -#define BSP_INT_URXD0 23 -#define BSP_INT_URXD1 24 -#define BSP_INT_USBD 25 -#define BSP_INT_USBH 26 -#define BSP_INT_IIC 27 -#define BSP_INT_UTXD0 28 -#define BSP_INT_UTXD1 29 -#define BSP_INT_RTC 30 -#define BSP_INT_ADC 31 -#define BSP_MAX_INT 32 +#define BSP_INT_TICK 8 +#define BSP_INT_WDT 9 +#define BSP_INT_TIMER0 10 +#define BSP_INT_TIMER1 11 +#define BSP_INT_TIMER2 12 +#define BSP_INT_TIMER3 13 +#define BSP_INT_TIMER4 14 +#define BSP_INT_UERR01 15 +#define _res0 16 +#define BSP_INT_DMA0 17 +#define BSP_INT_DMA1 18 +#define BSP_INT_DMA2 19 +#define BSP_INT_DMA3 20 +#define BSP_INT_MMC 21 +#define BSP_INT_SPI 22 +#define BSP_INT_URXD0 23 +#define BSP_INT_URXD1 24 +#define BSP_INT_USBD 25 +#define BSP_INT_USBH 26 +#define BSP_INT_IIC 27 +#define BSP_INT_UTXD0 28 +#define BSP_INT_UTXD1 29 +#define BSP_INT_RTC 30 +#define BSP_INT_ADC 31 +#define BSP_MAX_INT 32 extern void *bsp_vector_table; #define VECTOR_TABLE &bsp_vector_table - + /* * Type definition for RTEMS managed interrupts */ @@ -101,9 +101,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). @@ -178,7 +178,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libcpu/arm/s3c2400/timer/timer.c b/c/src/lib/libcpu/arm/s3c2400/timer/timer.c index aa9dd22077..171ce4e5a6 100644 --- a/c/src/lib/libcpu/arm/s3c2400/timer/timer.c +++ b/c/src/lib/libcpu/arm/s3c2400/timer/timer.c @@ -14,7 +14,7 @@ * benchmark_timer_initialize() and benchmark_timer_read(). benchmark_timer_read() usually returns * the number of microseconds since benchmark_timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ @@ -29,7 +29,7 @@ uint32_t g_freq; bool benchmark_timer_find_average_overhead; - + /* * Set up Timer 1 */ @@ -37,7 +37,7 @@ void benchmark_timer_initialize( void ) { uint32_t cr; - /* stop TIMER1*/ + /* stop TIMER1*/ cr=rTCON & 0xFFFFF0FF; rTCON=(cr | (0x0 << 8)); @@ -45,15 +45,15 @@ void benchmark_timer_initialize( void ) cr=rTCFG1 & 0xFFFFFF0F; rTCFG1=(cr | (0<<4)); - /* input freq=PLCK/2 Mhz*/ - g_freq = get_PCLK() / 2000; + /* input freq=PLCK/2 Mhz*/ + g_freq = get_PCLK() / 2000; rTCNTB1 = 0xFFFF; - /* start TIMER1 with manual reload */ + /* start TIMER1 with manual reload */ cr=rTCON & 0xFFFFF0FF; rTCON=(cr | (0x1 << 9)); rTCON=(cr | (0x1 << 8)); - + g_start = rTCNTO1; } @@ -83,16 +83,16 @@ int benchmark_timer_read( void ) * interrupts since the timer was initialized and clicks since the last * interrupts. */ - + total = (g_start - t); /* convert to microseconds */ - total = (total*1000) / g_freq; + total = (total*1000) / g_freq; if ( benchmark_timer_find_average_overhead == 1 ) { - return (int) total; + return (int) total; } else if ( total < LEAST_VALID ) { - return 0; + return 0; } /* diff --git a/c/src/lib/libcpu/arm/s3c2410/irq/irq.h b/c/src/lib/libcpu/arm/s3c2410/irq/irq.h index 78dd84de88..de3accbf71 100644 --- a/c/src/lib/libcpu/arm/s3c2410/irq/irq.h +++ b/c/src/lib/libcpu/arm/s3c2410/irq/irq.h @@ -23,7 +23,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <s3c2410.h> @@ -40,34 +40,34 @@ extern void default_int_handler(); #define BSP_EINT4_7 4 #define BSP_EINT8_23 5 #define BSP_nBATT_FLT 7 -#define BSP_INT_TICK 8 -#define BSP_INT_WDT 9 -#define BSP_INT_TIMER0 10 -#define BSP_INT_TIMER1 11 -#define BSP_INT_TIMER2 12 -#define BSP_INT_TIMER3 13 -#define BSP_INT_TIMER4 14 -#define BSP_INT_UART2 15 -#define BSP_INT_LCD 16 -#define BSP_INT_DMA0 17 -#define BSP_INT_DMA1 18 -#define BSP_INT_DMA2 19 -#define BSP_INT_DMA3 20 -#define BSP_INT_SDI 21 -#define BSP_INT_SPI0 22 -#define BSP_INT_UART1 23 -#define BSP_INT_USBD 25 -#define BSP_INT_USBH 26 -#define BSP_INT_IIC 27 -#define BSP_INT_UART0 28 -#define BSP_INT_SPI1 29 -#define BSP_INT_RTC 30 -#define BSP_INT_ADC 31 -#define BSP_MAX_INT 32 +#define BSP_INT_TICK 8 +#define BSP_INT_WDT 9 +#define BSP_INT_TIMER0 10 +#define BSP_INT_TIMER1 11 +#define BSP_INT_TIMER2 12 +#define BSP_INT_TIMER3 13 +#define BSP_INT_TIMER4 14 +#define BSP_INT_UART2 15 +#define BSP_INT_LCD 16 +#define BSP_INT_DMA0 17 +#define BSP_INT_DMA1 18 +#define BSP_INT_DMA2 19 +#define BSP_INT_DMA3 20 +#define BSP_INT_SDI 21 +#define BSP_INT_SPI0 22 +#define BSP_INT_UART1 23 +#define BSP_INT_USBD 25 +#define BSP_INT_USBH 26 +#define BSP_INT_IIC 27 +#define BSP_INT_UART0 28 +#define BSP_INT_SPI1 29 +#define BSP_INT_RTC 30 +#define BSP_INT_ADC 31 +#define BSP_MAX_INT 32 extern void *bsp_vector_table; #define VECTOR_TABLE &bsp_vector_table - + /* * Type definition for RTEMS managed interrupts */ @@ -99,9 +99,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). @@ -176,7 +176,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libcpu/arm/shared/arm920/mmu.c b/c/src/lib/libcpu/arm/shared/arm920/mmu.c index 0158475e35..752314723d 100644 --- a/c/src/lib/libcpu/arm/shared/arm920/mmu.c +++ b/c/src/lib/libcpu/arm/shared/arm920/mmu.c @@ -108,9 +108,9 @@ void mmu_init(mmu_sect_map_t *map) while (sects > 0) { lvl1_base[vbase] = MMU_SET_LVL1_SECT(pbase << 20, - MMU_SECT_AP_ALL, - 0, - c, + MMU_SECT_AP_ALL, + 0, + c, b); pbase++; vbase++; @@ -249,4 +249,4 @@ void mmu_set_cpu_async_mode(void) reg |= 0xc0000000; mmu_set_ctrl(reg); } - + |