diff options
Diffstat (limited to 'c/src/lib/libbsp/m68k/mvme136/shmsupp')
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c | 32 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c | 85 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c | 75 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c | 42 |
4 files changed, 234 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c new file mode 100644 index 0000000000..8e1502f789 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c @@ -0,0 +1,32 @@ +/* Shm_Convert_address + * + * This MVME136 has a "normal" view of the VME address space. + * No address range conversion is required. + * + * Input parameters: + * address - address to convert + * + * Output parameters: + * returns - converted address + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +void *Shm_Convert_address( + void *address +) +{ + return ( address ); +} diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c new file mode 100644 index 0000000000..d4db200ad2 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c @@ -0,0 +1,85 @@ +/* void Shm_Get_configuration( localnode, &shmcfg ) + * + * This routine initializes, if necessary, and returns a pointer + * to the Shared Memory Configuration Table for the Cyclone CVME961. + * + * INPUT PARAMETERS: + * localnode - local node number + * shmcfg - address of pointer to SHM Config Table + * + * OUTPUT PARAMETERS: + * *shmcfg - pointer to SHM Config Table + * + * NOTES: The MPCSR interrupt on the MVME136 is used as an interprocessor + * interrupt. The capablities of the MPCSR are used to generate + * interprocessor interrupts for up to eight nodes. + * + * The following table illustrates the configuration limitations: + * + * BUS MAX + * MODE ENDIAN NODES + * ========= ====== ======= + * POLLED LITTLE 2+ + * INTERRUPT LITTLE 2-8 + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include "shm.h" + +#define INTERRUPT 1 /* MVME136 target supports both */ +#define POLLING 0 /* polling and interrupt modes */ + +shm_config_table BSP_shm_cfgtbl; + +rtems_unsigned32 *BSP_int_address() +{ + rtems_unsigned32 id, offset; + + id = (rtems_unsigned32) *(rtems_unsigned8 *)0xfffb0061; + offset = ((id & 0x1f) << 5) | ((id & 0xe0) << 8); + offset |= 0xffff000b; + return( (rtems_unsigned32 * ) offset ); +} + +void Shm_Get_configuration( + rtems_unsigned32 localnode, + shm_config_table **shmcfg +) +{ + BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000; + BSP_shm_cfgtbl.length = 1 * MEGABYTE; + BSP_shm_cfgtbl.format = SHM_BIG; + + BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt; + +#ifdef NEUTRAL_BIG + BSP_shm_cfgtbl.convert = NULL_CONVERT; +#else + BSP_shm_cfgtbl.convert = CPU_swap_u32; +#endif + +#if (POLLING==1) + BSP_shm_cfgtbl.poll_intr = POLLED_MODE; + BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT; +#else + BSP_shm_cfgtbl.poll_intr = INTR_MODE; + BSP_shm_cfgtbl.Intr.address = BSP_int_address(); + BSP_shm_cfgtbl.Intr.value = 0x80; + BSP_shm_cfgtbl.Intr.length = BYTE; +#endif + + *shmcfg = &BSP_shm_cfgtbl; + +} diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c new file mode 100644 index 0000000000..5ccc406af5 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c @@ -0,0 +1,75 @@ +/* Shared Memory Lock Routines + * + * This shared memory locked queue support routine need to be + * able to lock the specified locked queue. Interrupts are + * disabled while the queue is locked to prevent preemption + * and deadlock when two tasks poll for the same lock. + * previous level. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +/* + * Shm_Initialize_lock + * + * Initialize the lock for the specified locked queue. + */ + +void Shm_Initialize_lock( + Shm_Locked_queue_Control *lq_cb +) +{ + lq_cb->lock = LQ_UNLOCKED; +} + +/* void _Shm_Lock( &lq_cb ) + * + * This shared memory locked queue support routine locks the + * specified locked queue. It disables interrupts to prevent + * a deadlock condition. + */ + +void Shm_Lock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock; + + rtems_interrupt_disable( isr_level ); + Shm_isrstat = isr_level; + asm volatile( "lockit:" : : ); + asm volatile( "tas %0@" : "=a" (lockptr) : "0" (lockptr) ); + asm volatile( "bne lockit" : : ); +/* should delay */ +} + +/* + * Shm_Unlock + * + * Unlock the lock for the specified locked queue. + */ + +void Shm_Unlock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + + lq_cb->lock = SHM_UNLOCK_VALUE; + isr_level = Shm_isrstat; + rtems_interrupt_enable( isr_level ); +} + diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c new file mode 100644 index 0000000000..6591d28a11 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c @@ -0,0 +1,42 @@ +/* Shm_isr_mvme136() + * + * NOTE: This routine is not used when in polling mode. Either + * this routine OR Shm_clockisr is used in a particular system. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +rtems_isr Shm_isr_mvme136() +{ + Shm_Interrupt_count += 1; + rtems_multiprocessing_announce(); + (*(volatile rtems_unsigned8 *)0xfffb006b) = 0; /* clear MPCSR intr */ +} + +/* void _Shm_setvec( ) + * + * This driver routine sets the SHM interrupt vector to point to the + * driver's SHM interrupt service routine. + * + * Input parameters: NONE + * + * Output parameters: NONE + */ + +void Shm_setvec() +{ + /* may need to disable intr */ + set_vector( Shm_isr_mvme136, 75, 1 ); +} |