diff options
Diffstat (limited to 'c/src/lib/libbsp/m68k/mvme136')
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c | 111 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/console/console.c | 159 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/include/bsp.h | 142 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/include/coverhd.h | 104 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c | 32 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c | 85 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c | 75 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c | 42 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/startup/bspclean.c | 46 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c | 156 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/startup/linkcmds | 48 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/timer/timer.c | 108 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme136/timer/timerisr.s | 39 |
13 files changed, 1147 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c new file mode 100644 index 0000000000..de88fe9252 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c @@ -0,0 +1,111 @@ +/* Clock_init() + * + * This routine initializes the Z80386 1 on the MVME136 board. + * The tick frequency is 1 millisecond. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <stdlib.h> + +#include <rtems.h> +#include <bsp.h> +#include <clockdrv.h> +#include <z8036.h> + +#define MICRVAL 0xe2 /* disable lower chain, no vec */ + /* set right justified addr */ + /* and master int enable */ +#define MCCRVAL 0xc4 /* enable T1 and port B */ + /* timers independent */ +#define MS_COUNT 0x07d0 /* T1's countdown constant (1 ms) */ +#define T1MSRVAL 0x80 /* T1 cont. cycle/pulse output */ +#define T1CSRVAL 0xc6 /* enable interrupt, allow and */ + /* and trigger countdown */ + +rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ +volatile rtems_unsigned32 Clock_driver_ticks; + /* ticks since initialization */ +rtems_isr_entry Old_ticker; + +rtems_device_driver Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp, + rtems_id tid, + rtems_unsigned32 *rval +) +{ + Install_clock( Clock_isr ); +} + +void ReInstall_clock( + rtems_isr_entry clock_isr +) +{ + rtems_unsigned32 isrlevel; + + rtems_interrupt_disable( isrlevel ); + (void) set_vector( clock_isr, 66, 1 ); + rtems_interrupt_enable( isrlevel ); +} + +void Install_clock( + rtems_isr_entry clock_isr +) +{ + volatile struct z8036_map *timer; + + Clock_driver_ticks = 0; + Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; + + if ( BSP_Configuration.ticks_per_timeslice ) { + Old_ticker = (rtems_isr_entry) set_vector( clock_isr, 66, 1 ); + timer = (struct z8036_map *) 0xfffb0000; + timer->MASTER_INTR = MICRVAL; + timer->CT1_MODE_SPEC = T1MSRVAL; + + *((rtems_unsigned16 *)0xfffb0016) = MS_COUNT; /* write countdown value */ +/* + timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8); + timer->CT1_TIME_CONST_LSB = (MS_COUNT & 0xff); +*/ + timer->MASTER_CFG = MCCRVAL; + timer->CT1_CMD_STATUS = T1CSRVAL; + +/* + * Enable interrupt via VME interrupt mask register + */ + (*(rtems_unsigned8 *)0xfffb0038) &= 0xfd; + + + atexit( Clock_exit ); + } + +} + +void Clock_exit( void ) +{ + volatile struct z8036_map *timer; + + if ( BSP_Configuration.ticks_per_timeslice ) { + timer = (struct z8036_map *) 0xfffb0000; + timer->MASTER_INTR = 0x62; + timer->CT1_MODE_SPEC = 0x00; + timer->MASTER_CFG = 0xf4; + timer->CT1_CMD_STATUS = 0x00; + /* do not restore old vector */ + } +} diff --git a/c/src/lib/libbsp/m68k/mvme136/console/console.c b/c/src/lib/libbsp/m68k/mvme136/console/console.c new file mode 100644 index 0000000000..6bfcf84481 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/console/console.c @@ -0,0 +1,159 @@ +/* + * This file contains the MVME136 console IO package. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#define M136_INIT + +#include <rtems.h> +#include "console.h" +#include "bsp.h" + +/* console_initialize + * + * This routine initializes the console IO driver. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_device_driver console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg, + rtems_id self, + rtems_unsigned32 *status +) +{ + _Write_m681 = ( struct w_m681_info * ) M681ADDR; + _Read_m681 = ( struct r_m681_info * ) M681ADDR; + *status = RTEMS_SUCCESSFUL; +} + + +/* is_character_ready + * + * This routine returns TRUE if a character is available. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_boolean is_character_ready( + char *ch +) +{ + if ( !(_Read_m681->srb & RXRDYB) ) + return(FALSE); + + *ch = _Read_m681->rbb; + return(TRUE); +} + +/* inbyte + * + * This routine reads a character from the UART. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + * character read from UART + */ + +char inbyte( void ) +{ + while ( !(_Read_m681->srb & RXRDYB) ); + return _Read_m681->rbb; +} + + +/* outbyte + * + * This routine transmits a character out the M68681. It supports + * XON/XOFF flow control. + * + * Input parameters: + * ch - character to be transmitted + * + * Output parameters: NONE + */ + +void outbyte( + char ch +) +{ + while ( ! (_Read_m681->srb & TXRDYB) ) ; + while ( _Read_m681->srb & RXRDYB ) /* must be an XOFF */ + if ( _Read_m681->rbb == XOFF ) + do { + while ( ! (_Read_m681->srb & RXRDYB) ) ; + } while ( _Read_m681->rbb != XON ); + + _Write_m681->tbb = ch; + if ( ch == '\n' ) + outbyte( CR ); +} + +/* + * __read -- read bytes from the serial port. Ignore fd, since + * we only have stdin. + */ + +int __read( + int fd, + char *buf, + int nbytes +) +{ + int i = 0; + + for (i = 0; i < nbytes; i++) { + *(buf + i) = inbyte(); + if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) { + (*(buf + i++)) = '\n'; + (*(buf + i)) = 0; + break; + } + } + return (i); +} + +/* + * __write -- write bytes to the serial port. Ignore fd, since + * stdout and stderr are the same. Since we have no filesystem, + * open will only return an error. + */ + +int __write( + int fd, + char *buf, + int nbytes +) +{ + int i; + + for (i = 0; i < nbytes; i++) { + if (*(buf + i) == '\n') { + outbyte ('\r'); + } + outbyte (*(buf + i)); + } + return (nbytes); +} diff --git a/c/src/lib/libbsp/m68k/mvme136/include/bsp.h b/c/src/lib/libbsp/m68k/mvme136/include/bsp.h new file mode 100644 index 0000000000..f89a1b0461 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/include/bsp.h @@ -0,0 +1,142 @@ +/* bsp.h + * + * This include file contains all MVME136 board IO definitions. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __MVME136_h +#define __MVME136_h + +#ifdef __cplusplus +extern "C" { +#endif + +#include <rtems.h> +#include <iosupp.h> + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Define the interrupt mechanism for Time Test 27 + * + * NOTE: Use the MPCSR vector for the MVME136 + */ + +#define MUST_WAIT_FOR_INTERRUPT 0 + +#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 ) + +#define Cause_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80 + +#define Clear_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00 + +#define Lower_tm27_intr() + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) \ + { register rtems_unsigned32 _delay=(microseconds); \ + register rtems_unsigned32 _tmp=123; \ + asm volatile( "0: \ + nbcd %0 ; \ + nbcd %0 ; \ + dbf %1,0b" \ + : "=d" (_tmp), "=d" (_delay) \ + : "0" (_tmp), "1" (_delay) ); \ + } + +/* Constants */ + +#define RAM_START 0 +#define RAM_END 0x100000 + +#define M681ADDR 0xfffb0040 /* address of the M68681 chip */ +#define RXRDYB 0x01 /* status reg recv ready mask */ +#define TXRDYB 0x04 /* status reg trans ready mask */ +#define PARITYERR 0x20 /* status reg parity error mask */ +#define FRAMEERR 0x40 /* status reg frame error mask */ + + +#define FOREVER 1 /* infinite loop */ + +/* Structures */ + +struct r_m681_info { + char fill1[ 5 ]; /* channel A regs ( not used ) */ + char isr; /* interrupt status reg */ + char fill2[ 2 ]; /* counter regs (not used) */ + char mr1mr2b; /* MR1B and MR2B regs */ + char srb; /* status reg channel B */ + char fill3; /* do not access */ + char rbb; /* receive buffer channel B */ + char ivr; /* interrupt vector register */ +}; + +struct w_m681_info { + char fill1[ 4 ]; /* channel A regs (not used) */ + char acr; /* auxillary control reg */ + char imr; /* interrupt mask reg */ + char fill2[ 2 ]; /* counter regs (not used) */ + char mr1mr2b; /* MR1B and MR2B regs */ + char csrb; /* clock select reg */ + char crb; /* command reg */ + char tbb; /* transmit buffer channel B */ + char ivr; /* interrupt vector register */ +}; + +#ifdef M136_INIT +#undef EXTERN +#define EXTERN +#else +#undef EXTERN +#define EXTERN extern +#endif + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +/* M68681 DUART chip register variables */ + +EXTERN volatile struct r_m681_info *_Read_m681; /* M68681 read registers */ +EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */ + +extern m68k_isr M68Kvec[]; /* vector table address */ + +/* functions */ + +void bsp_cleanup( void ); + +m68k_isr set_vector( + rtems_isr_entry handler, + rtems_vector_number vector, + int type +); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/mvme136/include/coverhd.h b/c/src/lib/libbsp/m68k/mvme136/include/coverhd.h new file mode 100644 index 0000000000..7497514e97 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/include/coverhd.h @@ -0,0 +1,104 @@ +/* coverhd.h + * + * This include file has defines to represent the overhead associated + * with calling a particular directive from C on this target. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __COVERHD_h +#define __COVERHD_h + +#ifdef __cplusplus +extern "C" { +#endif + +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 2 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 1 +#define CALLING_OVERHEAD_TASK_CREATE 3 +#define CALLING_OVERHEAD_TASK_IDENT 2 +#define CALLING_OVERHEAD_TASK_START 2 +#define CALLING_OVERHEAD_TASK_RESTART 2 +#define CALLING_OVERHEAD_TASK_DELETE 1 +#define CALLING_OVERHEAD_TASK_SUSPEND 1 +#define CALLING_OVERHEAD_TASK_RESUME 2 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 2 +#define CALLING_OVERHEAD_TASK_MODE 2 +#define CALLING_OVERHEAD_TASK_GET_NOTE 2 +#define CALLING_OVERHEAD_TASK_SET_NOTE 2 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 4 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 1 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 2 +#define CALLING_OVERHEAD_CLOCK_GET 5 +#define CALLING_OVERHEAD_CLOCK_SET 4 +#define CALLING_OVERHEAD_CLOCK_TICK 1 + +#define CALLING_OVERHEAD_TIMER_CREATE 2 +#define CALLING_OVERHEAD_TIMER_IDENT 1 +#define CALLING_OVERHEAD_TIMER_DELETE 2 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 2 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 5 +#define CALLING_OVERHEAD_TIMER_RESET 1 +#define CALLING_OVERHEAD_TIMER_CANCEL 1 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 3 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 1 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 2 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 2 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 1 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 1 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 2 + +#define CALLING_OVERHEAD_EVENT_SEND 2 +#define CALLING_OVERHEAD_EVENT_RECEIVE 2 +#define CALLING_OVERHEAD_SIGNAL_CATCH 2 +#define CALLING_OVERHEAD_SIGNAL_SEND 2 +#define CALLING_OVERHEAD_PARTITION_CREATE 3 +#define CALLING_OVERHEAD_PARTITION_IDENT 2 +#define CALLING_OVERHEAD_PARTITION_DELETE 1 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 2 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 2 +#define CALLING_OVERHEAD_REGION_CREATE 3 +#define CALLING_OVERHEAD_REGION_IDENT 2 +#define CALLING_OVERHEAD_REGION_DELETE 2 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 3 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 2 +#define CALLING_OVERHEAD_PORT_CREATE 3 +#define CALLING_OVERHEAD_PORT_IDENT 2 +#define CALLING_OVERHEAD_PORT_DELETE 1 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2 + +#define CALLING_OVERHEAD_IO_INITIALIZE 2 +#define CALLING_OVERHEAD_IO_OPEN 2 +#define CALLING_OVERHEAD_IO_CLOSE 3 +#define CALLING_OVERHEAD_IO_READ 2 +#define CALLING_OVERHEAD_IO_WRITE 2 +#define CALLING_OVERHEAD_IO_CONTROL 2 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 1 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 2 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 1 + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c new file mode 100644 index 0000000000..8e1502f789 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c @@ -0,0 +1,32 @@ +/* Shm_Convert_address + * + * This MVME136 has a "normal" view of the VME address space. + * No address range conversion is required. + * + * Input parameters: + * address - address to convert + * + * Output parameters: + * returns - converted address + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +void *Shm_Convert_address( + void *address +) +{ + return ( address ); +} diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c new file mode 100644 index 0000000000..d4db200ad2 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c @@ -0,0 +1,85 @@ +/* void Shm_Get_configuration( localnode, &shmcfg ) + * + * This routine initializes, if necessary, and returns a pointer + * to the Shared Memory Configuration Table for the Cyclone CVME961. + * + * INPUT PARAMETERS: + * localnode - local node number + * shmcfg - address of pointer to SHM Config Table + * + * OUTPUT PARAMETERS: + * *shmcfg - pointer to SHM Config Table + * + * NOTES: The MPCSR interrupt on the MVME136 is used as an interprocessor + * interrupt. The capablities of the MPCSR are used to generate + * interprocessor interrupts for up to eight nodes. + * + * The following table illustrates the configuration limitations: + * + * BUS MAX + * MODE ENDIAN NODES + * ========= ====== ======= + * POLLED LITTLE 2+ + * INTERRUPT LITTLE 2-8 + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include "shm.h" + +#define INTERRUPT 1 /* MVME136 target supports both */ +#define POLLING 0 /* polling and interrupt modes */ + +shm_config_table BSP_shm_cfgtbl; + +rtems_unsigned32 *BSP_int_address() +{ + rtems_unsigned32 id, offset; + + id = (rtems_unsigned32) *(rtems_unsigned8 *)0xfffb0061; + offset = ((id & 0x1f) << 5) | ((id & 0xe0) << 8); + offset |= 0xffff000b; + return( (rtems_unsigned32 * ) offset ); +} + +void Shm_Get_configuration( + rtems_unsigned32 localnode, + shm_config_table **shmcfg +) +{ + BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000; + BSP_shm_cfgtbl.length = 1 * MEGABYTE; + BSP_shm_cfgtbl.format = SHM_BIG; + + BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt; + +#ifdef NEUTRAL_BIG + BSP_shm_cfgtbl.convert = NULL_CONVERT; +#else + BSP_shm_cfgtbl.convert = CPU_swap_u32; +#endif + +#if (POLLING==1) + BSP_shm_cfgtbl.poll_intr = POLLED_MODE; + BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT; +#else + BSP_shm_cfgtbl.poll_intr = INTR_MODE; + BSP_shm_cfgtbl.Intr.address = BSP_int_address(); + BSP_shm_cfgtbl.Intr.value = 0x80; + BSP_shm_cfgtbl.Intr.length = BYTE; +#endif + + *shmcfg = &BSP_shm_cfgtbl; + +} diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c new file mode 100644 index 0000000000..5ccc406af5 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c @@ -0,0 +1,75 @@ +/* Shared Memory Lock Routines + * + * This shared memory locked queue support routine need to be + * able to lock the specified locked queue. Interrupts are + * disabled while the queue is locked to prevent preemption + * and deadlock when two tasks poll for the same lock. + * previous level. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +/* + * Shm_Initialize_lock + * + * Initialize the lock for the specified locked queue. + */ + +void Shm_Initialize_lock( + Shm_Locked_queue_Control *lq_cb +) +{ + lq_cb->lock = LQ_UNLOCKED; +} + +/* void _Shm_Lock( &lq_cb ) + * + * This shared memory locked queue support routine locks the + * specified locked queue. It disables interrupts to prevent + * a deadlock condition. + */ + +void Shm_Lock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock; + + rtems_interrupt_disable( isr_level ); + Shm_isrstat = isr_level; + asm volatile( "lockit:" : : ); + asm volatile( "tas %0@" : "=a" (lockptr) : "0" (lockptr) ); + asm volatile( "bne lockit" : : ); +/* should delay */ +} + +/* + * Shm_Unlock + * + * Unlock the lock for the specified locked queue. + */ + +void Shm_Unlock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + + lq_cb->lock = SHM_UNLOCK_VALUE; + isr_level = Shm_isrstat; + rtems_interrupt_enable( isr_level ); +} + diff --git a/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c b/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c new file mode 100644 index 0000000000..6591d28a11 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c @@ -0,0 +1,42 @@ +/* Shm_isr_mvme136() + * + * NOTE: This routine is not used when in polling mode. Either + * this routine OR Shm_clockisr is used in a particular system. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <shm.h> + +rtems_isr Shm_isr_mvme136() +{ + Shm_Interrupt_count += 1; + rtems_multiprocessing_announce(); + (*(volatile rtems_unsigned8 *)0xfffb006b) = 0; /* clear MPCSR intr */ +} + +/* void _Shm_setvec( ) + * + * This driver routine sets the SHM interrupt vector to point to the + * driver's SHM interrupt service routine. + * + * Input parameters: NONE + * + * Output parameters: NONE + */ + +void Shm_setvec() +{ + /* may need to disable intr */ + set_vector( Shm_isr_mvme136, 75, 1 ); +} diff --git a/c/src/lib/libbsp/m68k/mvme136/startup/bspclean.c b/c/src/lib/libbsp/m68k/mvme136/startup/bspclean.c new file mode 100644 index 0000000000..4366603a55 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/startup/bspclean.c @@ -0,0 +1,46 @@ +/* + * This routine returns control to 135Bug. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <clockdrv.h> +#include <z8036.h> + +void bsp_return_to_monitor_trap() +{ + extern void start( void ); + + register volatile void *start_addr; + + m68k_set_vbr( 0 ); /* restore 135Bug vectors */ + asm volatile( "trap #15" ); /* trap to 135Bug */ + asm volatile( ".short 0x63" ); /* return to 135Bug (.RETURN) */ + /* restart program */ + start_addr = start; + + asm volatile ( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) ); +} + +#define TIMER 0xfffb0000 + +void bsp_cleanup( void ) +{ + Z8x36_WRITE( TIMER, MASTER_INTR, 0x62 ); /* redo timer */ + Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x00 ); + Z8x36_WRITE( TIMER, MASTER_CFG, 0xf4 ); + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x00 ); + + M68Kvec[ 45 ] = bsp_return_to_monitor_trap; /* install handler */ + asm volatile( "trap #13" ); /* insures SUPV mode */ +} diff --git a/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c new file mode 100644 index 0000000000..514340d9ea --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c @@ -0,0 +1,156 @@ +/* bsp_start() + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <libcsupport.h> +#include <z8036.h> + +#include "stackchk.h" + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +/* Initialize whatever libc we are using + * called from postdriver hook + */ + +void bsp_libc_init() +{ + extern int end; + rtems_unsigned32 heap_start; + + heap_start = (rtems_unsigned32) &end; + if (heap_start & (CPU_ALIGNMENT-1)) + heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); + + RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0); + + /* + * Set up for the libc handling. + */ + + if (BSP_Configuration.ticks_per_timeslice > 0) + libc_init(1); /* reentrant if possible */ + else + libc_init(0); /* non-reentrant */ + + /* + * Initialize the stack bounds checker + */ + +#ifdef STACK_CHECKER_ON + Stack_check_Initialize(); +#endif +} + +int bsp_start( + int argc, + char **argv, + char **environp +) +{ + m68k_isr *monitors_vector_table; + int index; + + monitors_vector_table = (m68k_isr *)0; /* 135Bug Vectors are at 0 */ + m68k_set_vbr( monitors_vector_table ); + + for ( index=2 ; index<=255 ; index++ ) + M68Kvec[ index ] = monitors_vector_table[ 32 ]; + + M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */ + M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */ + M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */ + M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */ + + m68k_set_vbr( &M68Kvec ); + + (*(rtems_unsigned8 *)0xfffb0067) = 0x7f; /* make VME access round-robin */ + + m68k_enable_caching(); + + /* + * we only use a hook to get the C library initialized. + */ + + Cpu_table.pretasking_hook = NULL; + + Cpu_table.predriver_hook = bsp_libc_init; /* RTEMS resources available */ + + Cpu_table.postdriver_hook = NULL; + + Cpu_table.idle_task = NULL; /* do not override system IDLE task */ + + Cpu_table.do_zero_of_workspace = TRUE; + + Cpu_table.interrupt_vector_table = (m68k_isr *) &M68Kvec; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.extra_system_initialization_stack = 0; + + /* + * Copy the table + */ + + BSP_Configuration = Configuration; + + BSP_Configuration.work_space_start = (void *) + (RAM_END - BSP_Configuration.work_space_size); + + /* + * Add 1 region for the RTEMS Malloc + */ + + BSP_Configuration.maximum_regions++; + + /* + * Add 1 extension for newlib libc + */ + +#ifdef RTEMS_NEWLIB + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Add another extension if using the stack checker + */ + +#ifdef STACK_CHECKER_ON + BSP_Configuration.maximum_extensions++; +#endif + + rtems_initialize_executive( &BSP_Configuration, &Cpu_table ); + /* does not return */ + + bsp_cleanup(); + + return 0; +} diff --git a/c/src/lib/libbsp/m68k/mvme136/startup/linkcmds b/c/src/lib/libbsp/m68k/mvme136/startup/linkcmds new file mode 100644 index 0000000000..13317a724e --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/startup/linkcmds @@ -0,0 +1,48 @@ +/* + * This file contains directives for the GNU linker which are specific + * to the Motorola MVME136/MVME135 boards. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +MEMORY + { + ram : org = 0x3000, l = 1M + } + +SECTIONS +{ + .text 0x3000 : + { + text_start = . ; + _text_start = . ; + *(.text) + etext = ALIGN( 0x10 ) ; + _etext = .; + } + .data ADDR( .text ) + SIZEOF( .text ): + { + data_start = . ; + _data_start = .; + *(.data) + edata = ALIGN( 0x10 ) ; + _edata = .; + } + .bss ADDR( .data ) + SIZEOF( .data ): + { + bss_start = . ; + _bss_start = . ; + *(.bss) + *(COMMON) + end = . ; + _end = . ; + } +} diff --git a/c/src/lib/libbsp/m68k/mvme136/timer/timer.c b/c/src/lib/libbsp/m68k/mvme136/timer/timer.c new file mode 100644 index 0000000000..8c3ecd45f2 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/timer/timer.c @@ -0,0 +1,108 @@ +/* Timer_init() + * + * This routine initializes the Z8036 timer on the MVME136 board. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * NOTE: This routine will not work if the optimizer is enabled + * for some compilers. The multiple writes to the Z8036 + * may be optimized away. + * + * It is important that the timer start/stop overhead be + * determined when porting or modifying this code. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + + +#include <rtems.h> +#include <bsp.h> +#include <z8036.h> + +#define TIMER 0xfffb0000 /* address of Z8036 on MVME136 */ + +int Ttimer_val; +rtems_boolean Timer_driver_Find_average_overhead; + +rtems_isr timerisr(); + +void Timer_initialize() +{ + (void) set_vector( timerisr, 66, 0 ); /* install ISR */ + + Ttimer_val = 0; /* clear timer ISR count */ + Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */ + Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */ + Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */ + /* set right justified addr */ + /* and master int enable */ + Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */ + /* cycle/pulse output */ + + *((rtems_unsigned16 *)0xfffb0016) = 0x0000; /* write countdown value */ +/* + Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 ); + Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 ); +*/ + Z8x36_WRITE( TIMER, MASTER_CFG, 0xc4 ); /* enable timer1 */ + + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xc6 ); /* set INTR enable (IE), */ + /* trigger command */ + /* (TCB) and gate */ + /* command (GCB) bits */ + *((rtems_unsigned8 *)0xfffb0038) &= 0xfd; /* enable timer INTR on */ + /* VME controller */ +} + +#define AVG_OVERHEAD 6 /* It typically takes 3.0 microseconds */ + /* (6 countdowns) to start/stop the timer. */ +#define LEAST_VALID 10 /* Don't trust a value lower than this */ + +int Read_timer() +{ +/* + rtems_unsigned8 msb, lsb; +*/ + rtems_unsigned32 remaining, total; + + Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */ +remaining = 0xffff - *((rtems_unsigned16 *) 0xfffb0010); +/* + Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb ); + Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb ); + + remaining = 0xffff - ((msb << 8) + lsb); +*/ + total = (Ttimer_val * 0x10000) + remaining; + + if ( Timer_driver_Find_average_overhead == 1 ) + return total; /* in one-half microsecond units */ + + else { + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + return (total-AVG_OVERHEAD) >> 1; + } +} + +rtems_status_code Empty_function( void ) +{ + return RTEMS_SUCCESSFUL; +} + +void Set_find_average_overhead( + rtems_boolean find_flag +) +{ + Timer_driver_Find_average_overhead = find_flag; +} diff --git a/c/src/lib/libbsp/m68k/mvme136/timer/timerisr.s b/c/src/lib/libbsp/m68k/mvme136/timer/timerisr.s new file mode 100644 index 0000000000..a8f7e7b212 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme136/timer/timerisr.s @@ -0,0 +1,39 @@ +# timer_isr() +# +# This routine provides the ISR for the Z8036 timer on the MVME136 +# board. The timer is set up to generate an interrupt at maximum +# intervals. +# +# Input parameters: NONE +# +# Output parameters: NONE +# +# COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. +# On-Line Applications Research Corporation (OAR). +# All rights assigned to U.S. Government, 1994. +# +# This material may be reproduced by or for the U.S. Government pursuant +# to the copyright license under the clause at DFARS 252.227-7013. This +# notice must appear in all copies of this file and its derivatives. +# +# $Id$ +# + +#include "asm.h" + +BEGIN_CODE + +.set CT1_CMD_STATUS, 0xfffb000a | port A +.set RELOAD, 0x24 | clr IP & IUS,allow countdown + + PUBLIC (timerisr) +SYM (timerisr): + movl a0,a7@- | save a0 + movl #CT1_CMD_STATUS,a0 | a0 = addr of cmd status reg + movb #RELOAD,a0@ | reload countdown + addql #1, SYM (Ttimer_val) | increment timer value + movl a7@+,a0 | save a0 + rte + +END_CODE +END |