diff options
Diffstat (limited to 'c/src/lib/libbsp/i960/cvme961/startup')
-rw-r--r-- | c/src/lib/libbsp/i960/cvme961/startup/bspclean.c | 32 | ||||
-rw-r--r-- | c/src/lib/libbsp/i960/cvme961/startup/bspstart.c | 163 | ||||
-rw-r--r-- | c/src/lib/libbsp/i960/cvme961/startup/exit.c | 38 | ||||
-rw-r--r-- | c/src/lib/libbsp/i960/cvme961/startup/linkcmds | 48 | ||||
-rw-r--r-- | c/src/lib/libbsp/i960/cvme961/startup/setvec.c | 145 |
5 files changed, 426 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/i960/cvme961/startup/bspclean.c b/c/src/lib/libbsp/i960/cvme961/startup/bspclean.c new file mode 100644 index 0000000000..fb35e206be --- /dev/null +++ b/c/src/lib/libbsp/i960/cvme961/startup/bspclean.c @@ -0,0 +1,32 @@ +/* + * This routine is used to return control to the NINDY monitor + * and is automatically invoked at shutdown. + * + * NOTES: DOES NOT RETURN!!! + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include "bsp.h" + +void bsp_cleanup( void ) +{ + asm volatile( "mov 0,g0; \ + fmark ; \ + syncf ; \ + .word 0xfeedface ; \ + bx start" : : ); + /* The constant 0xfeedface is a magic word for break which + * is defined by NINDY. The branch extended restarts the + * application if the user types "go". + */ +} diff --git a/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c b/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c new file mode 100644 index 0000000000..afb9b7e733 --- /dev/null +++ b/c/src/lib/libbsp/i960/cvme961/startup/bspstart.c @@ -0,0 +1,163 @@ +/* bsp_start() + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include "libcsupport.h" + + +#include "stackchk.h" + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; + +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +/* Initialize whatever libc we are using + * called from postdriver hook + */ + +void bsp_libc_init() +{ + extern int end; + rtems_unsigned32 heap_start; + + heap_start = (rtems_unsigned32) &end; + if (heap_start & (CPU_ALIGNMENT-1)) + heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); + + RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0); + + /* + * Set up for the libc handling. + */ + + if (BSP_Configuration.ticks_per_timeslice > 0) + libc_init(1); /* reentrant if possible */ + else + libc_init(0); /* non-reentrant */ + /* + * Initialize the stack bounds checker + */ + +#ifdef STACK_CHECKER_ON + Stack_check_Initialize(); +#endif +} + +int bsp_start( + int argc, + char **argv, + char **environp +) +{ + /* set node number in SQSIO4 CTL REG */ + + *((rtems_unsigned32 *)0xc00000b0) = + (Configuration.User_multiprocessing_table) ? + Configuration.User_multiprocessing_table->node : 0; + + Prcb = get_prcb(); + Ctl_tbl = Prcb->control_tbl; + + /* following configures the data breakpoint (which must be set + * before this is executed) to break on writes only. + */ + + Ctl_tbl->bpcon &= ~0x00cc0000; + i960_reload_ctl_group( 6 ); + + /* bit 31 of the Register Cache Control can be set to + * enable an alternative caching algorithm. It does + * not appear to help RTEMS. + */ + + /* Configure Number of Register Caches */ + + Prcb->reg_cache_cfg = 8; + i960_soft_reset( Prcb ); + + /* + * we do not use the pretasking_hook. + */ + + Cpu_table.pretasking_hook = NULL; + + Cpu_table.predriver_hook = bsp_libc_init; /* RTEMS resources available */ + + Cpu_table.postdriver_hook = NULL; /* Call our main() for constructors */ + + Cpu_table.idle_task = NULL; /* do not override system IDLE task */ + + Cpu_table.do_zero_of_workspace = TRUE; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.extra_system_initialization_stack = 0; + + Cpu_table.Prcb = Prcb; + + /* + * Copy the table + */ + + BSP_Configuration = Configuration; + + /* + * Add 1 region for the RTEMS Malloc + */ + + BSP_Configuration.maximum_regions++; + + /* + * Add 1 extension for newlib libc + */ + +#ifdef RTEMS_NEWLIB + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Add another extension if using the stack checker + */ + +#ifdef STACK_CHECKER_ON + BSP_Configuration.maximum_extensions++; +#endif + + BSP_Configuration.work_space_start = (void *) + (RAM_END - BSP_Configuration.work_space_size); + + rtems_initialize_executive( &BSP_Configuration, &Cpu_table ); + /* does not return */ + + bsp_cleanup(); + + return 0; + +} diff --git a/c/src/lib/libbsp/i960/cvme961/startup/exit.c b/c/src/lib/libbsp/i960/cvme961/startup/exit.c new file mode 100644 index 0000000000..c412cad281 --- /dev/null +++ b/c/src/lib/libbsp/i960/cvme961/startup/exit.c @@ -0,0 +1,38 @@ +/* exit + * + * This routine is used to return control to the NINDY monitor + * and is automatically invoked by the STDIO exit() routine. + * + * INPUT: + * status - exit status + * + * OUTPUT: NONE + * + * NOTES: DOES NOT RETURN!!! + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include "bsp.h" + +void _exit( ) +{ + asm volatile( "mov 0,g0; \ + fmark ; \ + syncf ; \ + .word 0xfeedface ; \ + bx start" : : ); + /* The constant 0xfeedface is a magic word for break which + * is defined by NINDY. The branch extended restarts the + * application if the user types "go". + */ +} diff --git a/c/src/lib/libbsp/i960/cvme961/startup/linkcmds b/c/src/lib/libbsp/i960/cvme961/startup/linkcmds new file mode 100644 index 0000000000..5acbf22283 --- /dev/null +++ b/c/src/lib/libbsp/i960/cvme961/startup/linkcmds @@ -0,0 +1,48 @@ +/* + * This file contains directives for the GNU linker which are specific + * to the Cyclone CVME960/CVME961 boards. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +MEMORY + { + ram : org = 0x0, l = 1M + } + +SECTIONS +{ + .text 0x10000 : + { + text_start = . ; + _text_start = . ; + *(.text) + etext = ALIGN( 0x10 ) ; +/* _etext = .; */ + } + .data ADDR( .text ) + SIZEOF( .text ): + { + data_start = . ; + _data_start = .; + *(.data) + edata = ALIGN( 0x10 ) ; +/* _edata = .; */ + } + .bss ADDR( .data ) + SIZEOF( .data ): + { + bss_start = . ; +/* _bss_start = . ; */ + *(.bss) + *(COMMON) + end = . ; + _end = . ; + } +} diff --git a/c/src/lib/libbsp/i960/cvme961/startup/setvec.c b/c/src/lib/libbsp/i960/cvme961/startup/setvec.c new file mode 100644 index 0000000000..ea3706c3b3 --- /dev/null +++ b/c/src/lib/libbsp/i960/cvme961/startup/setvec.c @@ -0,0 +1,145 @@ +/* set_vector + * + * This routine attempts to perform all "generic" interrupt initialization + * for the specified XINT line. It is specific to the Cyclone CVME961 in + * that it knows which interrupts are initialized by the monitor, the + * characteristics of XINT5 (VIC068 clock tick), and that it assumes the + * i960 is processing interrupts in dedicated mode. It attempts to map + * XINTs to interrupt vectors in a fairly straght forward way. + * + * XINT USE VECTOR INTR TBL INDEX TRIGGERED + * ==== ============= ====== ============== ========= + * 0 VMEbus ERROR 0x02 0x03 EDGE + * 1 DRAM PARITY 0x12 0x13 EDGE + * 2 Z8530 0x22 0x23 LEVEL + * 3 SQUALL 0 0x52 0x53 ---- + * 4 Z8536 (SQSIO4) 0x72 0x73 LEVEL + * 5 TICK 0x32 0x33 EDGE + * 6 VIC068 0x62 0x63 LEVEL + * 7 UNUSED 0x42 0x43 LEVEL + * + * The interrupt handler is installed in both the cached and memory + * resident interrupt tables. The appropriate IMAP register is updated to + * reflect the vector selected by this routine. Global interrupts are + * enabled. If XINT5 is being installed, places it in trigger mode. + * Finally, set_vector_support() is invoked to install the new IMAP and + * ICON, unmask the XINT in IMASK, and lower the i960's interrupt + * level to 0. + * + * INPUT: + * func - interrupt handler entry point + * xint - external interrupt line + * type - 0 indicates raw hardware connect + * 1 indicates RTEMS interrupt connect + * + * RETURNS: + * address of previous interrupt handler + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> + +#include <stdio.h> + +void print_prcb(); +void print_intr_info(); +void print_ipnd_imsk(); + +unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 }; + +i960_isr set_vector( /* returns old vector */ + rtems_isr_entry func, /* isr routine */ + unsigned int xint, /* XINT number */ + unsigned int type /* RTEMS or RAW */ +) +{ + i960_isr *intr_tbl, *cached_intr_tbl; + i960_isr saved_intr; + unsigned int vector, group, nibble; + unsigned int *imap; + + if ( xint > 7 ) + exit( 0x80 ); + + cached_intr_tbl = (i960_isr *) 0; + intr_tbl = (i960_isr *) Prcb->intr_tbl; + group = Xint_2_Group_Map[xint]; /* remap XINT to group */ + vector = (group << 4) + 2; /* direct vector num */ + + if ( type ) + rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr ); + else { + saved_intr = (i960_isr) intr_tbl[ vector ]; + /* return old vector */ + intr_tbl[ vector + 1 ] = /* normal vector table */ + cached_intr_tbl[ group ] = (i960_isr) func; /* cached vector */ + } + + if ( xint <= 3 ) imap = &Ctl_tbl->imap0; /* updating IMAP0 */ + else imap = &Ctl_tbl->imap1; /* updating IMAP1 */ + nibble = (xint % 4) * 4; + *imap &= ~(0xf << nibble); + *imap |= group << nibble; + + Ctl_tbl->icon &= ~0x00000400; /* enable global interrupts */ + Ctl_tbl->icon |= 0x00004000; /* fast sampling mode */ + switch ( xint ) { + case 0: Ctl_tbl->icon |= 0x00000004; break; + case 1: Ctl_tbl->icon |= 0x00000008; break; + case 2: Ctl_tbl->icon &= ~0x00000010; break; + case 4: Ctl_tbl->icon &= ~0x00000040; break; + case 5: Ctl_tbl->icon |= 0x00000080; break; + case 6: Ctl_tbl->icon &= ~0x00000100; break; + default: exit( 0x81 ); break; /* unsupported */ + } + + if ( xint == 4 ) { /* reprogram MCON for SQSIO4 */ + Ctl_tbl->mcon12 = 0x00002012; /* MCON12 - 0xCxxxxxxx */ + Ctl_tbl->mcon13 = 0x00000000; /* MCON13 - 0xDxxxxxxx */ + i960_reload_ctl_group( 5 ); /* update MCON12-MCON15 */ + } + + i960_unmask_intr( xint ); /* update IMSK */ + i960_reload_ctl_group( 1 ); /* update IMAP?/ICON */ + return( saved_intr ); /* return old vector */ +} + +void print_prcb() +{ + printf( "fault_table =0x%p\n", Prcb->fault_tbl ); + printf( "control_tbl =0x%p\n", Prcb->control_tbl ); + printf( "AC mask ov =0x%x\n", Prcb->initial_ac ); + printf( "fltconfig =0x%x\n", Prcb->fault_config ); + printf( "intr tbl =0x%p\n", Prcb->intr_tbl ); + printf( "systable =0x%p\n", Prcb->sys_proc_tbl ); + printf( "reserved =0x%x\n", Prcb->reserved ); + printf( "isr stk =0x%p\n", Prcb->intr_stack ); + printf( "ins cache =0x%x\n", Prcb->ins_cache_cfg ); + printf( "reg cache =0x%x\n", Prcb->reg_cache_cfg ); +} + +void print_intr_info() +{ + printf( "prcb =0x%p\n", Prcb ); + printf( "ctl_tbl =0x%p\n", Ctl_tbl ); + printf( "intr_tbl=0x%p\n", Prcb->intr_tbl ); + printf( "IMAP0 = 0x%x\n", Ctl_tbl->imap0 ); + printf( "IMAP1 = 0x%x\n", Ctl_tbl->imap1 ); + print_ipnd_imsk(); +} + +void print_ipnd_imsk() +{ + printf(" IPEND = 0x%x\n", i960_pend_intrs() ); + printf(" IMASK = 0x%x\n", i960_mask_intrs() ); +} |