diff options
Diffstat (limited to 'bsps/shared/dev/spi/xqspipsu.c')
| -rw-r--r-- | bsps/shared/dev/spi/xqspipsu.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/bsps/shared/dev/spi/xqspipsu.c b/bsps/shared/dev/spi/xqspipsu.c index 1286efd359..93d3fa4c98 100644 --- a/bsps/shared/dev/spi/xqspipsu.c +++ b/bsps/shared/dev/spi/xqspipsu.c @@ -84,6 +84,9 @@ #include "xqspipsu.h" #include "xqspipsu_control.h" #include "sleep.h" +#ifdef __rtems__ +#include <rtems/rtems/cache.h> +#endif /************************** Constant Definitions *****************************/ #define MAX_DELAY_CNT 10000000U /**< Max delay count */ @@ -275,6 +278,12 @@ void XQspiPsu_Abort(XQspiPsu *InstancePtr) u32 IntrStatus, ConfigReg, FifoStatus; u32 DelayCount = 0U; +#ifdef __rtems__ + u32 FifoStatusMask = XQSPIPSU_ISR_RXEMPTY_MASK; + FifoStatusMask |= XQSPIPSU_ISR_TXEMPTY_MASK; + FifoStatusMask |= XQSPIPSU_ISR_GENFIFOEMPTY_MASK; +#endif + Xil_AssertVoid(InstancePtr != NULL); #ifdef DEBUG xil_printf("\nXQspiPsu_Abort\r\n"); @@ -326,8 +335,13 @@ void XQspiPsu_Abort(XQspiPsu *InstancePtr) */ FifoStatus = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress, +#ifdef __rtems__ + XQSPIPSU_ISR_OFFSET) & FifoStatusMask; + while(FifoStatus != FifoStatusMask) { +#else XQSPIPSU_FIFO_CTRL_OFFSET); while(FifoStatus != 0U) { +#endif if (DelayCount == MAX_DELAY_CNT) { #ifdef DEBUG xil_printf("Timeout error, FIFO reset failed.\r\n"); @@ -337,7 +351,11 @@ void XQspiPsu_Abort(XQspiPsu *InstancePtr) usleep(1); DelayCount++; FifoStatus = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress, +#ifdef __rtems__ + XQSPIPSU_ISR_OFFSET) & FifoStatusMask; +#else XQSPIPSU_FIFO_CTRL_OFFSET); +#endif } } @@ -442,7 +460,16 @@ s32 XQspiPsu_PolledTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, for (Index = 0; Index < (s32)NumMsg; Index++) { Xil_AssertNonvoid(Msg[Index].ByteCount > 0U); +#ifdef __rtems__ + if (Msg[Index].TxBfrPtr != NULL) { + rtems_cache_flush_multiple_data_lines(Msg[Index].TxBfrPtr, Msg[Index].ByteCount); + } +#endif } +#ifdef __rtems__ + rtems_cache_flush_multiple_data_lines(Msg, NumMsg * sizeof(*Msg)); +#endif + /* * Check whether there is another transfer in progress. * Not thread-safe @@ -582,7 +609,18 @@ s32 XQspiPsu_InterruptTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); for (Index = 0; Index < (s32)NumMsg; Index++) +#ifdef __rtems__ + { +#endif Xil_AssertNonvoid(Msg[Index].ByteCount > 0U); +#ifdef __rtems__ + if (Msg[Index].TxBfrPtr != NULL) { + rtems_cache_flush_multiple_data_lines(Msg[Index].TxBfrPtr, Msg[Index].ByteCount); + } + } + rtems_cache_flush_multiple_data_lines(Msg, NumMsg * sizeof(*Msg)); +#endif + /* * Check whether there is another transfer in progress. * Not thread-safe |